Remove stanza (#231)

* Removed stanza implementation/tests.

In the future we can move the stanza tests over, but for now they should
be deleted.

* Added back integration .fir files

* Added Makefile to give Travis hooks

* Added firrtl script (was ignored before)

16 files changed, 0 insertions, 194 deletions

diff --git a/test/errors/high-form/Flip-Mem.fir b/test/errors/high-form/Flip-Mem.fir
deleted file mode 100644
index a8cb67ca..00000000
--- a/test/errors/high-form/Flip-Mem.fir
+++ /dev/null
@@ -1,12 +0,0 @@
-; RUN: firrtl -i %s -o %s.v -X verilog -p c 2>&1 | tee %s.out | FileCheck %s
-; CHECK: Memory mc cannot be a bundle type with flips.
-
-circuit Flip-Mem : 
-  module Flip-Mem : 
-    input clk : Clock
-    mem mc : 
-       depth => 10
-       data-type => {x : UInt<3>, flip y : UInt<5>}
-       write-latency => 1
-       read-latency => 0
-    ;smem ms : {x : UInt<3>, flip y : UInt<5>}[10], clk
diff --git a/test/errors/high-form/Flip-Poison.fir b/test/errors/high-form/Flip-Poison.fir
deleted file mode 100644
index 278d3b74..00000000
--- a/test/errors/high-form/Flip-Poison.fir
+++ /dev/null
@@ -1,8 +0,0 @@
-; RUN: firrtl -i %s -o %s.v -X verilog -p c 2>&1 | tee %s.out | FileCheck %s
-; CHECK: Poison p cannot be a bundle type with flips.
-
-circuit Flip-Poison : 
-  module Flip-Poison : 
-    input clk : Clock
-    poison p : {x : UInt<10>, flip y : UInt<10>}
-
diff --git a/test/errors/high-form/InstanceNotModule.fir b/test/errors/high-form/InstanceNotModule.fir
deleted file mode 100644
index aa49b26b..00000000
--- a/test/errors/high-form/InstanceNotModule.fir
+++ /dev/null
@@ -1,8 +0,0 @@
-; RUN: firrtl -i %s -o %s.v -X verilog -p c 2>&1 | tee %s.out | FileCheck %s
-; CHECK: Module Top2 is not defined.
-
-circuit Top :
-  module Top :
-    wire x : UInt<1>
-    inst t of Top2
-
diff --git a/test/errors/high-form/InvalidLOC.fir b/test/errors/high-form/InvalidLOC.fir
deleted file mode 100644
index 8329cc02..00000000
--- a/test/errors/high-form/InvalidLOC.fir
+++ /dev/null
@@ -1,12 +0,0 @@
-; RUN: firrtl -i %s -o %s.v -X verilog -p c 2>&1 | tee %s.out | FileCheck %s
-; CHECK: Invalid connect to an expression that is not a reference or a WritePort.
-; CHECK: Invalid connect to an expression that is not a reference or a WritePort.
-; CHECK: Invalid connect to an expression that is not a reference or a WritePort.
-
-circuit Top :
-  module Top :
-    wire x : UInt
-    add(x,x) <= UInt(1)
-    UInt(1) <= UInt(1)
-    SInt(1) <= UInt(1)
-
diff --git a/test/errors/high-form/InvalidSubexp.fir b/test/errors/high-form/InvalidSubexp.fir
deleted file mode 100644
index d0ad34c0..00000000
--- a/test/errors/high-form/InvalidSubexp.fir
+++ /dev/null
@@ -1,9 +0,0 @@
-; RUN: firrtl -i %s -o %s.v -X verilog -p c 2>&1 | tee %s.out | FileCheck %s
-; CHECK: Invalid access to non-reference.
-; CHECK: Invalid access to non-reference.
-
-circuit Top :
-  module Top :
-    wire x : UInt<4>
-    add(x,x)[10] <= UInt(1)
-    add(x,x).x <= UInt(1)
diff --git a/test/errors/high-form/NegUInt.fir b/test/errors/high-form/NegUInt.fir
deleted file mode 100644
index 8249f791..00000000
--- a/test/errors/high-form/NegUInt.fir
+++ /dev/null
@@ -1,7 +0,0 @@
-; RUN: firrtl -i %s -o %s.v -X verilog -p c 2>&1 | tee %s.out | FileCheck %s
-; CHECK: UIntValue cannot be negative.
-
-circuit Top :
-  module Top :
-    wire x : UInt<4>
-    x <= UInt(-2)
diff --git a/test/errors/high-form/NegVecSize.fir b/test/errors/high-form/NegVecSize.fir
deleted file mode 100644
index 8a89d4e6..00000000
--- a/test/errors/high-form/NegVecSize.fir
+++ /dev/null
@@ -1,7 +0,0 @@
-; RUN: firrtl -i %s -o %s.v -X verilog -p c 2>&1 | tee %s.out | FileCheck %s
-; CHECK: Vector type size cannot be negative
-
-circuit Top : 
-  module Top : 
-    wire x : UInt<3>[-5]
-
diff --git a/test/errors/high-form/NegWidth.fir b/test/errors/high-form/NegWidth.fir
deleted file mode 100644
index 1eb54a34..00000000
--- a/test/errors/high-form/NegWidth.fir
+++ /dev/null
@@ -1,7 +0,0 @@
-; RUN: firrtl -i %s -o %s.v -X verilog -p c 2>&1 | tee %s.out | FileCheck %s
-; CHECK: Width cannot be negative or zero.
-
-circuit Top : 
-  module Top : 
-    wire x : UInt<-3>
-
diff --git a/test/errors/high-form/NumArgs.fir b/test/errors/high-form/NumArgs.fir
deleted file mode 100644
index 7db78509..00000000
--- a/test/errors/high-form/NumArgs.fir
+++ /dev/null
@@ -1,9 +0,0 @@
-; RUN: firrtl -i %s -o %s.v -X verilog -p c 2>&1 | tee %s.out | FileCheck %s
-; CHECK: Primop add requires 2 expression arguments.
-; CHECK: Primop bits requires 2 integer arguments.
-
-circuit Top : 
-  module Top : 
-    node y = add(SInt(1),UInt(1),UInt(1))
-    node z = bits(UInt(1),1,2,3)
-
diff --git a/test/errors/high-form/Prefix.fir b/test/errors/high-form/Prefix.fir
deleted file mode 100644
index ba4a28a2..00000000
--- a/test/errors/high-form/Prefix.fir
+++ /dev/null
@@ -1,9 +0,0 @@
-; RUN: firrtl -i %s -o %s.v -X verilog -p c 2>&1 | tee %s.out | FileCheck %s
-; CHECK: Symbol x$z$y is a prefix.
-
-circuit Top :
-  module Top :
-    wire x : UInt<2>
-    wire x$z$y : UInt<1>
-
-
diff --git a/test/errors/high-form/Printf.fir b/test/errors/high-form/Printf.fir
deleted file mode 100644
index 5580182b..00000000
--- a/test/errors/high-form/Printf.fir
+++ /dev/null
@@ -1,16 +0,0 @@
-; RUN: firrtl -i %s -o %s.v -X verilog -p c 2>&1 | tee %s.out | FileCheck %s
-
-circuit Top : 
-  module Top : 
-    input x : {y : UInt<1>}
-    input p : UInt<1>
-    input clk : Clock
-    printf(clk,p,"Hello World%!\n",x)
-    printf(clk,p,"Hello World%")
-    printf(clk,p,"Hello World%d %s %h %x",x,x,x)
-
-;CHECK: Bad printf format: "%!"
-;CHECK: Bad printf format: trailing "%"
-;CHECK: Bad printf format: incorrect number of arguments
-;CHECK: Bad printf format: "%h"
-;CHECK: Bad printf format: incorrect number of arguments
diff --git a/test/errors/high-form/RemoveChar.fir b/test/errors/high-form/RemoveChar.fir
deleted file mode 100644
index aa5e8227..00000000
--- a/test/errors/high-form/RemoveChar.fir
+++ /dev/null
@@ -1,12 +0,0 @@
-; RUN: firrtl -i %s -o %s.v -X verilog -p c 2>&1 | tee %s.out | FileCheck %s
-; CHECK: Done!
-
-circuit Top :
-  module Top :
-    wire x_1 : UInt<1>
-    x_1 <= UInt(1)
-    wire x : UInt<1>
-    x <= add(add(UInt(1),UInt(1)),UInt(1))
-
-
-
diff --git a/test/errors/high-form/RemoveScope.fir b/test/errors/high-form/RemoveScope.fir
deleted file mode 100644
index 63dfb4de..00000000
--- a/test/errors/high-form/RemoveScope.fir
+++ /dev/null
@@ -1,18 +0,0 @@
-; RUN: firrtl -i %s -o %s.v -X verilog -p c 2>&1 | tee %s.out | FileCheck %s
-; XFAIL: *
-; CHECK: Done!
-
-circuit Top :
-  module Top :
-    wire x : UInt<1>
-    node p = UInt(1)
-    when p :
-       wire x : UInt<1>
-       x <= UInt(1)
-       node y = add(x,UInt(1))
-    else :
-       wire x : UInt<1>
-       x <= UInt(1)
-       node z = add(x,UInt(1))
-    x <= UInt(1)
-    node w = add(x,UInt(1))
diff --git a/test/errors/high-form/SpecialChars.fir b/test/errors/high-form/SpecialChars.fir
deleted file mode 100644
index 85911c06..00000000
--- a/test/errors/high-form/SpecialChars.fir
+++ /dev/null
@@ -1,35 +0,0 @@
-; RUN: firrtl -i %s -o %s.v -X verilog -p c 2>&1 | tee %s.out | FileCheck %s
-; CHECK: Done!
-
-circuit Top :
-  module Top :
-    wire x : UInt<1>
-    x <= UInt(1)
-    wire x~y : UInt<2>
-    x~y <= UInt(1)
-    wire x!y : UInt<2>
-    x!y <= UInt(1)
-    wire x@y : UInt<2>
-    x@y <= UInt(1)
-    wire x#y : UInt<2>
-    x#y <= UInt(1)
-    wire x%y : UInt<2>
-    x%y <= UInt(1)
-    wire x^y : UInt<2>
-    x^y <= UInt(1)
-    wire x*y : UInt<2>
-    x*y <= UInt(1)
-    wire x-y : UInt<2>
-    x-y <= UInt(1)
-    wire x_y : UInt<2>
-    x_y <= UInt(1)
-    wire x+y : UInt<2>
-    x+y <= UInt(1)
-    wire x=y : UInt<2>
-    x=y <= UInt(1)
-    wire x?y : UInt<2>
-    x?y <= UInt(1)
-    wire x/y : UInt<2>
-    x/y <= UInt(1)
-
-
diff --git a/test/errors/high-form/Top.fir b/test/errors/high-form/Top.fir
deleted file mode 100644
index ddeb9c3b..00000000
--- a/test/errors/high-form/Top.fir
+++ /dev/null
@@ -1,9 +0,0 @@
-; RUN: firrtl -i %s -o %s.v -X verilog -p c 2>&1 | tee %s.out | FileCheck %s
-
-; CHECK: A single module must be named Top.
-
-circuit Top :
-  module Top1 :
-    wire x : UInt<1>
-  module Top2 : 
-    wire x : UInt<1>
diff --git a/test/errors/high-form/Unique.fir b/test/errors/high-form/Unique.fir
deleted file mode 100644
index 60201b92..00000000
--- a/test/errors/high-form/Unique.fir
+++ /dev/null
@@ -1,16 +0,0 @@
-; RUN: firrtl -i %s -o %s.v -X verilog -p c 2>&1 | tee %s.out | FileCheck %s
-
-; CHECK: Reference x does not have a unique name.
-; CHECK: Reference p does not have a unique name.
-; CHECK-NOT: Reference q does not have a unique name.
-
-circuit Top :
-  module Top :
-    wire x : UInt<1>
-    wire x : UInt<2>
-    wire p : UInt<3>
-    wire q : UInt<3>
-    when p :
-       wire p : UInt<4>
-  module Other :
-     wire q : UInt<3>