Clk2clock - rename the implicit "clk" module input "clock" (#387)

* Rename implict module "clk" input to "clock".
This doesn't rename all the "self-contained" test instances.
nor the memory "clk" enables,
nor the implict module "clk"s in the regress .fir files.

* Consistency: rename implict module "clk" input to "clock" in "self-contained" test instances.
This doesn't rename the memory "clk" enables, nor the implict module "clk"s in the regress .fir files.

1 files changed, 8 insertions, 8 deletions

diff --git a/src/test/resources/features/CustomTransform.fir b/src/test/resources/features/CustomTransform.fir
index 61bd6ad2..de00f261 100644
--- a/src/test/resources/features/CustomTransform.fir
+++ b/src/test/resources/features/CustomTransform.fir
@@ -2,21 +2,21 @@
 circuit CustomTransform :
   ; Replaced in custom transform by an implementation
   extmodule Delay :
-    input clk : Clock
+    input clock : Clock
     input reset : UInt<1>
     input a : UInt<32>
     input en : UInt<1>
     output b : UInt<32>
 
   module CustomTransform :
-    input clk : Clock
+    input clock : Clock
     input reset : UInt<1>
 
-    reg cycle : UInt<32>, clk with : (reset => (reset, UInt<32>(0)))
+    reg cycle : UInt<32>, clock with : (reset => (reset, UInt<32>(0)))
     cycle <= tail(add(cycle, UInt<32>(1)), 1)
 
     inst delay of Delay
-    delay.clk <= clk
+    delay.clock <= clock
     delay.reset <= reset
     delay.a <= UInt(0)
     delay.en <= UInt(0)
@@ -26,9 +26,9 @@ circuit CustomTransform :
       delay.a <= UInt("hdeadbeef")
     when eq(cycle, UInt(1)) :
       when neq(delay.b, UInt("hdeadbeef")) :
-        printf(clk, UInt(1), "Assertion failed!\n")
-        stop(clk, UInt(1), 1)
+        printf(clock, UInt(1), "Assertion failed!\n")
+        stop(clock, UInt(1), 1)
     when eq(cycle, UInt(2)) :
-      printf(clk, UInt(1), "Success!\n")
-      stop(clk, UInt(1), 0)
+      printf(clock, UInt(1), "Success!\n")
+      stop(clock, UInt(1), 0)