[spec] Update Mid FIRRTL spec to reflect removal of subaccesses (#1451)

1 files changed, 1 insertions, 0 deletions

diff --git a/spec/spec.tex b/spec/spec.tex
index 70b073c3..45c25d4b 100644
--- a/spec/spec.tex
+++ b/spec/spec.tex
@@ -1667,6 +1667,7 @@ A FIRRTL circuit is defined to be a valid MidFIRRTL circuit if it obeys the foll
 \begin{itemize}
 \item All widths must be explicitly defined.
 \item The conditional statement is not used.
+\item The dynamic subaccess expression is not used.
 \item All components are connected to exactly once.
 \end{itemize}