From f89f39342f166dc4f2caec4dcb5d2e7dc6e58b70 Mon Sep 17 00:00:00 2001
From: Albert Magyar
Date: Fri, 13 Mar 2020 15:38:53 -0700
Subject: [spec] Update Mid FIRRTL spec to reflect removal of subaccesses
 (#1451)

---
 spec/spec.tex | 1 +
 1 file changed, 1 insertion(+)

(limited to 'spec/spec.tex')

diff --git a/spec/spec.tex b/spec/spec.tex
index 70b073c3..45c25d4b 100644
--- a/spec/spec.tex
+++ b/spec/spec.tex
@@ -1667,6 +1667,7 @@ A FIRRTL circuit is defined to be a valid MidFIRRTL circuit if it obeys the foll
 \begin{itemize}
 \item All widths must be explicitly defined.
 \item The conditional statement is not used.
+\item The dynamic subaccess expression is not used.
 \item All components are connected to exactly once.
 \end{itemize}
 
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cgit v1.2.3

