diff options
| author | azidar | 2015-08-24 10:58:49 -0700 |
|---|---|---|
| committer | azidar | 2015-08-24 10:58:49 -0700 |
| commit | 50cf7a4823d69967dcb2b10cdef892b0ab5f2184 (patch) | |
| tree | b8a4d9fc9b2063703a5f37fec538f7a220cc7681 | |
| parent | 02a7fb53fc424346a1693f23661a1b1a4a867c4f (diff) | |
Removed old chisel3 tests that all failed for syntax reasons. Tests should now be small examples, categorized by either passes, errors, or features.
29 files changed, 4 insertions, 4485 deletions
@@ -27,7 +27,7 @@ build: build-fast: cd $(firrtl_dir) && stanza -i firrtl-test-main.stanza -o $(root_dir)/utils/bin/firrtl -flags OPTIMIZE -check: build +check: cd $(test_dir) && lit -v . --path=$(root_dir)/utils/bin/ passes: @@ -36,12 +36,6 @@ passes: errors: cd $(test_dir)/errors && lit -v . --path=$(root_dir)/utils/bin/ -chisel3: - cd $(test_dir)/chisel3 && lit -v . --path=$(root_dir)/utils/bin/ - -refchip: - cd $(test_dir)/refchip && lit -v . --path=$(root_dir)/utils/bin/ - features: cd $(test_dir)/features && lit -v . --path=$(root_dir)/utils/bin/ @@ -62,7 +56,7 @@ $(units): % : firrtl -X verilog -i test/chisel3/$*.fir -o test/chisel3/$*.fir.v -p c > test/chisel3/$*.fir.out #scp test/chisel3/$*.fir.v adamiz@a5:/scratch/adamiz/firrtl-all/riscv-mini/generated-src/$*.v -done: check +done: build check say "done" fail: @@ -1,14 +1,9 @@ Support ASIC backend - Writemasks for ram's in general (ASICs and FPGAs) + Pass to generate writemasks for ram's in general (ASICs and FPGAs) Mem of vec, should just work? ASIC rams (pass to replace smem with black box) Readwrite Port -Readenables need work - - - - ================================================ ========== ADAM's BIG ARSE TODO LIST ============ ================================================ @@ -16,8 +11,8 @@ Readenables need work ======== Current Tasks ======== put clocks on accessors add clock check to high firrtl check -registers in onreset cannot have flips add equivalence to spec + remove SInt from bit/bits in spec naming still doesn't work - x!0 will conflict with x think about inferring read enable from lo firrtl @@ -30,7 +25,6 @@ Tests: Large width of dshl fix expand-whens to have correct semantics -update high/low firrtl checks need an annotation example move width inference earlier (required for consistent vec width inference) Temp elimination needs to count # uses diff --git a/test/chisel3/ALUTop.fir b/test/chisel3/ALUTop.fir deleted file mode 100644 index df7235b7..00000000 --- a/test/chisel3/ALUTop.fir +++ /dev/null @@ -1,118 +0,0 @@ -; RUN: firrtl -i %s -o %s.v -X verilog -p c | tee %s.out | FileCheck %s -; CHECK: Done! - -circuit ALUTop : - module ALU : - input B : UInt<32> - output out : UInt<32> - output sum : UInt<32> - input A : UInt<32> - input alu_op : UInt<4> - - node shamt = bits(B, 4, 0) - node T_157 = addw(A, B) - node T_158 = subw(A, B) - node T_159 = asSInt(A) - node T_160 = dshr(T_159, shamt) - node T_161 = asUInt(T_160) - node T_162 = dshr(A, shamt) - node T_163 = dshl(A, shamt) - node T_164 = bits(T_163, 31, 0) - node T_165 = cvt(A) - node T_166 = cvt(B) - node T_167 = lt(T_165, T_166) - node T_168 = asUInt(T_167) - node T_169 = lt(A, B) - node T_170 = asUInt(T_169) - node T_171 = and(A, B) - node T_172 = or(A, B) - node T_173 = xor(A, B) - node T_174 = eq(UInt<4>(10), alu_op) - node T_175 = mux(T_174, A, B) - node T_176 = eq(UInt<4>(4), alu_op) - node T_177 = mux(T_176, T_173, T_175) - node T_178 = eq(UInt<4>(3), alu_op) - node T_179 = mux(T_178, T_172, T_177) - node T_180 = eq(UInt<4>(2), alu_op) - node T_181 = mux(T_180, T_171, T_179) - node T_182 = eq(UInt<4>(7), alu_op) - node T_183 = mux(T_182, T_170, T_181) - node T_184 = eq(UInt<4>(5), alu_op) - node T_185 = mux(T_184, T_168, T_183) - node T_186 = eq(UInt<4>(6), alu_op) - node T_187 = mux(T_186, T_164, T_185) - node T_188 = eq(UInt<4>(8), alu_op) - node T_189 = mux(T_188, T_162, T_187) - node T_190 = eq(UInt<4>(9), alu_op) - node T_191 = mux(T_190, T_161, T_189) - node T_192 = eq(UInt<4>(1), alu_op) - node T_193 = mux(T_192, T_158, T_191) - node T_194 = eq(UInt<4>(0), alu_op) - node oot = mux(T_194, T_157, T_193) - node T_195 = bits(oot, 31, 0) - out := T_195 - node T_196 = bit(alu_op, 0) - node T_197 = subw(UInt<1>(0), B) - node T_198 = mux(T_196, T_197, B) - node T_199 = addw(A, T_198) - sum := T_199 - module ALUdec : - input opcode : UInt<7> - input funct : UInt<3> - input add_rshift_type : UInt<1> - output alu_op : UInt<4> - - node T_200 = mux(add_rshift_type, UInt<4>(1), UInt<4>(0)) - node T_201 = mux(add_rshift_type, UInt<4>(9), UInt<4>(8)) - node T_202 = eq(UInt<3>(5), funct) - node T_203 = mux(T_202, T_201, UInt<4>(15)) - node T_204 = eq(UInt<3>(7), funct) - node T_205 = mux(T_204, UInt<4>(2), T_203) - node T_206 = eq(UInt<3>(6), funct) - node T_207 = mux(T_206, UInt<4>(3), T_205) - node T_208 = eq(UInt<3>(4), funct) - node T_209 = mux(T_208, UInt<4>(4), T_207) - node T_210 = eq(UInt<3>(3), funct) - node T_211 = mux(T_210, UInt<4>(7), T_209) - node T_212 = eq(UInt<3>(2), funct) - node T_213 = mux(T_212, UInt<4>(5), T_211) - node T_214 = eq(UInt<3>(1), funct) - node T_215 = mux(T_214, UInt<4>(6), T_213) - node T_216 = eq(UInt<3>(0), funct) - node alu_op1 = mux(T_216, T_200, T_215) - node T_217 = eq(UInt<7>(19), opcode) - node T_218 = mux(T_217, alu_op1, UInt<4>(15)) - node T_219 = eq(UInt<7>(51), opcode) - node T_220 = mux(T_219, alu_op1, T_218) - node T_221 = eq(UInt<7>(3), opcode) - node T_222 = mux(T_221, UInt<4>(0), T_220) - node T_223 = eq(UInt<7>(35), opcode) - node T_224 = mux(T_223, UInt<4>(0), T_222) - node T_225 = eq(UInt<7>(99), opcode) - node T_226 = mux(T_225, UInt<4>(0), T_224) - node T_227 = eq(UInt<7>(103), opcode) - node T_228 = mux(T_227, UInt<4>(0), T_226) - node T_229 = eq(UInt<7>(111), opcode) - node T_230 = mux(T_229, UInt<4>(0), T_228) - node T_231 = eq(UInt<7>(23), opcode) - node T_232 = mux(T_231, UInt<4>(0), T_230) - node T_233 = eq(UInt<7>(55), opcode) - node alu_op2 = mux(T_233, UInt<4>(11), T_232) - alu_op := alu_op2 - module ALUTop : - input B : UInt<32> - output out : UInt<32> - input A : UInt<32> - input opcode : UInt<7> - input funct : UInt<3> - input add_rshift_type : UInt<1> - - inst alu of ALU - inst alu_dec of ALUdec - alu_dec.opcode := opcode - alu_dec.funct := funct - alu_dec.add_rshift_type := add_rshift_type - alu.A := A - alu.B := B - out := alu.out - alu.alu_op := alu_dec.alu_op diff --git a/test/chisel3/BundleWire.fir b/test/chisel3/BundleWire.fir deleted file mode 100644 index eeed3309..00000000 --- a/test/chisel3/BundleWire.fir +++ /dev/null @@ -1,17 +0,0 @@ -; RUN: firrtl -i %s -o %s.v -X verilog -p c | tee %s.out | FileCheck %s -;CHECK: Done! - -circuit BundleWire : - module BundleWire : - input in : {x : UInt<32>, y : UInt<32>} - output outs : {x : UInt<32>, y : UInt<32>}[4] - - wire coords : {x : UInt<32>, y : UInt<32>}[4] - coords[0] := in - outs[0] := coords[0] - coords[1] := in - outs[1] := coords[1] - coords[2] := in - outs[2] := coords[2] - coords[3] := in - outs[3] := coords[3] diff --git a/test/chisel3/ComplexAssign.fir b/test/chisel3/ComplexAssign.fir deleted file mode 100644 index 925b8e34..00000000 --- a/test/chisel3/ComplexAssign.fir +++ /dev/null @@ -1,16 +0,0 @@ -; RUN: firrtl -i %s -o %s.v -X verilog -p c | tee %s.out | FileCheck %s -;CHECK: Done! - -circuit ComplexAssign : - module ComplexAssign : - input in : {re : UInt<10>, im : UInt<10>} - output out : {re : UInt<10>, im : UInt<10>} - input e : UInt<1> - when e : - wire T_18 : {re : UInt<10>, im : UInt<10>} - T_18 := in - out.re := T_18.re - out.im := T_18.im - else : - out.re := UInt<1>(0) - out.im := UInt<1>(0) diff --git a/test/chisel3/Control.fir b/test/chisel3/Control.fir deleted file mode 100644 index 08824c33..00000000 --- a/test/chisel3/Control.fir +++ /dev/null @@ -1,651 +0,0 @@ -; RUN: firrtl -i %s -o %s.v -X verilog -p c | tee %s.out | FileCheck %s -;CHECK: Done! - -circuit Control : - module Control : - input clk : Clock - input reset : UInt<1> - output ctrl : {flip inst : UInt<32>, st_type : UInt<2>, ld_type : UInt<3>, wb_sel : UInt<2>, wb_en : UInt<1>, csr_cmd : UInt<2>, pc_sel : UInt<1>, inst_re : UInt<1>, flip stall : UInt<1>, data_re : UInt<1>, inst_type : UInt<1>, A_sel : UInt<1>, B_sel : UInt<1>, imm_sel : UInt<3>, alu_op : UInt<4>, br_type : UInt<3>} - - node T_831 = and(UInt<7>(127), ctrl.inst) - node T_832 = eq(T_831, UInt<6>(55)) - node T_833 = and(UInt<7>(127), ctrl.inst) - node T_834 = eq(T_833, UInt<5>(23)) - node T_835 = and(UInt<7>(127), ctrl.inst) - node T_836 = eq(T_835, UInt<7>(111)) - node T_837 = and(UInt<15>(28799), ctrl.inst) - node T_838 = eq(T_837, UInt<7>(103)) - node T_839 = and(UInt<15>(28799), ctrl.inst) - node T_840 = eq(T_839, UInt<7>(99)) - node T_841 = and(UInt<15>(28799), ctrl.inst) - node T_842 = eq(T_841, UInt<13>(4195)) - node T_843 = and(UInt<15>(28799), ctrl.inst) - node T_844 = eq(T_843, UInt<15>(16483)) - node T_845 = and(UInt<15>(28799), ctrl.inst) - node T_846 = eq(T_845, UInt<15>(20579)) - node T_847 = and(UInt<15>(28799), ctrl.inst) - node T_848 = eq(T_847, UInt<15>(24675)) - node T_849 = and(UInt<15>(28799), ctrl.inst) - node T_850 = eq(T_849, UInt<15>(28771)) - node T_851 = and(UInt<15>(28799), ctrl.inst) - node T_852 = eq(T_851, UInt<2>(3)) - node T_853 = and(UInt<15>(28799), ctrl.inst) - node T_854 = eq(T_853, UInt<13>(4099)) - node T_855 = and(UInt<15>(28799), ctrl.inst) - node T_856 = eq(T_855, UInt<14>(8195)) - node T_857 = and(UInt<15>(28799), ctrl.inst) - node T_858 = eq(T_857, UInt<15>(16387)) - node T_859 = and(UInt<15>(28799), ctrl.inst) - node T_860 = eq(T_859, UInt<15>(20483)) - node T_861 = and(UInt<15>(28799), ctrl.inst) - node T_862 = eq(T_861, UInt<6>(35)) - node T_863 = and(UInt<15>(28799), ctrl.inst) - node T_864 = eq(T_863, UInt<13>(4131)) - node T_865 = and(UInt<15>(28799), ctrl.inst) - node T_866 = eq(T_865, UInt<14>(8227)) - node T_867 = and(UInt<15>(28799), ctrl.inst) - node T_868 = eq(T_867, UInt<5>(19)) - node T_869 = and(UInt<15>(28799), ctrl.inst) - node T_870 = eq(T_869, UInt<14>(8211)) - node T_871 = and(UInt<15>(28799), ctrl.inst) - node T_872 = eq(T_871, UInt<14>(12307)) - node T_873 = and(UInt<15>(28799), ctrl.inst) - node T_874 = eq(T_873, UInt<15>(16403)) - node T_875 = and(UInt<15>(28799), ctrl.inst) - node T_876 = eq(T_875, UInt<15>(24595)) - node T_877 = and(UInt<15>(28799), ctrl.inst) - node T_878 = eq(T_877, UInt<15>(28691)) - node T_879 = and(UInt<32>(4261441663), ctrl.inst) - node T_880 = eq(T_879, UInt<13>(4115)) - node T_881 = and(UInt<32>(4261441663), ctrl.inst) - node T_882 = eq(T_881, UInt<15>(20499)) - node T_883 = and(UInt<32>(4261441663), ctrl.inst) - node T_884 = eq(T_883, UInt<31>(1073762323)) - node T_885 = and(UInt<32>(4261441663), ctrl.inst) - node T_886 = eq(T_885, UInt<6>(51)) - node T_887 = and(UInt<32>(4261441663), ctrl.inst) - node T_888 = eq(T_887, UInt<31>(1073741875)) - node T_889 = and(UInt<32>(4261441663), ctrl.inst) - node T_890 = eq(T_889, UInt<13>(4147)) - node T_891 = and(UInt<32>(4261441663), ctrl.inst) - node T_892 = eq(T_891, UInt<14>(8243)) - node T_893 = and(UInt<32>(4261441663), ctrl.inst) - node T_894 = eq(T_893, UInt<14>(12339)) - node T_895 = and(UInt<32>(4261441663), ctrl.inst) - node T_896 = eq(T_895, UInt<15>(16435)) - node T_897 = and(UInt<32>(4261441663), ctrl.inst) - node T_898 = eq(T_897, UInt<15>(20531)) - node T_899 = and(UInt<32>(4261441663), ctrl.inst) - node T_900 = eq(T_899, UInt<31>(1073762355)) - node T_901 = and(UInt<32>(4261441663), ctrl.inst) - node T_902 = eq(T_901, UInt<15>(24627)) - node T_903 = and(UInt<32>(4261441663), ctrl.inst) - node T_904 = eq(T_903, UInt<15>(28723)) - node T_905 = and(UInt<15>(28799), ctrl.inst) - node T_906 = eq(T_905, UInt<13>(4211)) - node T_907 = and(UInt<15>(28799), ctrl.inst) - node T_908 = eq(T_907, UInt<14>(8307)) - node T_909 = and(UInt<15>(28799), ctrl.inst) - node T_910 = eq(T_909, UInt<14>(12403)) - node T_911 = and(UInt<15>(28799), ctrl.inst) - node T_912 = eq(T_911, UInt<15>(20595)) - node T_913 = and(UInt<15>(28799), ctrl.inst) - node T_914 = eq(T_913, UInt<15>(24691)) - node T_915 = and(UInt<15>(28799), ctrl.inst) - node T_916 = eq(T_915, UInt<15>(28787)) - node T_917 = mux(T_916, UInt<1>(0), UInt<1>(0)) - node T_918 = mux(T_914, UInt<1>(0), T_917) - node T_919 = mux(T_912, UInt<1>(0), T_918) - node T_920 = mux(T_910, UInt<1>(0), T_919) - node T_921 = mux(T_908, UInt<1>(0), T_920) - node T_922 = mux(T_906, UInt<1>(0), T_921) - node T_923 = mux(T_904, UInt<1>(0), T_922) - node T_924 = mux(T_902, UInt<1>(0), T_923) - node T_925 = mux(T_900, UInt<1>(0), T_924) - node T_926 = mux(T_898, UInt<1>(0), T_925) - node T_927 = mux(T_896, UInt<1>(0), T_926) - node T_928 = mux(T_894, UInt<1>(0), T_927) - node T_929 = mux(T_892, UInt<1>(0), T_928) - node T_930 = mux(T_890, UInt<1>(0), T_929) - node T_931 = mux(T_888, UInt<1>(0), T_930) - node T_932 = mux(T_886, UInt<1>(0), T_931) - node T_933 = mux(T_884, UInt<1>(0), T_932) - node T_934 = mux(T_882, UInt<1>(0), T_933) - node T_935 = mux(T_880, UInt<1>(0), T_934) - node T_936 = mux(T_878, UInt<1>(0), T_935) - node T_937 = mux(T_876, UInt<1>(0), T_936) - node T_938 = mux(T_874, UInt<1>(0), T_937) - node T_939 = mux(T_872, UInt<1>(0), T_938) - node T_940 = mux(T_870, UInt<1>(0), T_939) - node T_941 = mux(T_868, UInt<1>(0), T_940) - node T_942 = mux(T_866, UInt<1>(0), T_941) - node T_943 = mux(T_864, UInt<1>(0), T_942) - node T_944 = mux(T_862, UInt<1>(0), T_943) - node T_945 = mux(T_860, UInt<1>(0), T_944) - node T_946 = mux(T_858, UInt<1>(0), T_945) - node T_947 = mux(T_856, UInt<1>(0), T_946) - node T_948 = mux(T_854, UInt<1>(0), T_947) - node T_949 = mux(T_852, UInt<1>(0), T_948) - node T_950 = mux(T_850, UInt<1>(0), T_949) - node T_951 = mux(T_848, UInt<1>(0), T_950) - node T_952 = mux(T_846, UInt<1>(0), T_951) - node T_953 = mux(T_844, UInt<1>(0), T_952) - node T_954 = mux(T_842, UInt<1>(0), T_953) - node T_955 = mux(T_840, UInt<1>(0), T_954) - node T_956 = mux(T_838, UInt<1>(1), T_955) - node T_957 = mux(T_836, UInt<1>(1), T_956) - node T_958 = mux(T_834, UInt<1>(0), T_957) - node T_959 = mux(T_832, UInt<1>(0), T_958) - node T_960 = mux(T_916, UInt<1>(1), UInt<1>(1)) - node T_961 = mux(T_914, UInt<1>(1), T_960) - node T_962 = mux(T_912, UInt<1>(1), T_961) - node T_963 = mux(T_910, UInt<1>(0), T_962) - node T_964 = mux(T_908, UInt<1>(0), T_963) - node T_965 = mux(T_906, UInt<1>(0), T_964) - node T_966 = mux(T_904, UInt<1>(0), T_965) - node T_967 = mux(T_902, UInt<1>(0), T_966) - node T_968 = mux(T_900, UInt<1>(0), T_967) - node T_969 = mux(T_898, UInt<1>(0), T_968) - node T_970 = mux(T_896, UInt<1>(0), T_969) - node T_971 = mux(T_894, UInt<1>(0), T_970) - node T_972 = mux(T_892, UInt<1>(0), T_971) - node T_973 = mux(T_890, UInt<1>(0), T_972) - node T_974 = mux(T_888, UInt<1>(0), T_973) - node T_975 = mux(T_886, UInt<1>(0), T_974) - node T_976 = mux(T_884, UInt<1>(0), T_975) - node T_977 = mux(T_882, UInt<1>(0), T_976) - node T_978 = mux(T_880, UInt<1>(0), T_977) - node T_979 = mux(T_878, UInt<1>(0), T_978) - node T_980 = mux(T_876, UInt<1>(0), T_979) - node T_981 = mux(T_874, UInt<1>(0), T_980) - node T_982 = mux(T_872, UInt<1>(0), T_981) - node T_983 = mux(T_870, UInt<1>(0), T_982) - node T_984 = mux(T_868, UInt<1>(0), T_983) - node T_985 = mux(T_866, UInt<1>(0), T_984) - node T_986 = mux(T_864, UInt<1>(0), T_985) - node T_987 = mux(T_862, UInt<1>(0), T_986) - node T_988 = mux(T_860, UInt<1>(0), T_987) - node T_989 = mux(T_858, UInt<1>(0), T_988) - node T_990 = mux(T_856, UInt<1>(0), T_989) - node T_991 = mux(T_854, UInt<1>(0), T_990) - node T_992 = mux(T_852, UInt<1>(0), T_991) - node T_993 = mux(T_850, UInt<1>(1), T_992) - node T_994 = mux(T_848, UInt<1>(1), T_993) - node T_995 = mux(T_846, UInt<1>(1), T_994) - node T_996 = mux(T_844, UInt<1>(1), T_995) - node T_997 = mux(T_842, UInt<1>(1), T_996) - node T_998 = mux(T_840, UInt<1>(1), T_997) - node T_999 = mux(T_838, UInt<1>(0), T_998) - node T_1000 = mux(T_836, UInt<1>(1), T_999) - node T_1001 = mux(T_834, UInt<1>(1), T_1000) - node T_1002 = mux(T_832, UInt<1>(1), T_1001) - node T_1003 = mux(T_916, UInt<1>(1), UInt<1>(0)) - node T_1004 = mux(T_914, UInt<1>(1), T_1003) - node T_1005 = mux(T_912, UInt<1>(1), T_1004) - node T_1006 = mux(T_910, UInt<1>(0), T_1005) - node T_1007 = mux(T_908, UInt<1>(0), T_1006) - node T_1008 = mux(T_906, UInt<1>(0), T_1007) - node T_1009 = mux(T_904, UInt<1>(0), T_1008) - node T_1010 = mux(T_902, UInt<1>(0), T_1009) - node T_1011 = mux(T_900, UInt<1>(0), T_1010) - node T_1012 = mux(T_898, UInt<1>(0), T_1011) - node T_1013 = mux(T_896, UInt<1>(0), T_1012) - node T_1014 = mux(T_894, UInt<1>(0), T_1013) - node T_1015 = mux(T_892, UInt<1>(0), T_1014) - node T_1016 = mux(T_890, UInt<1>(0), T_1015) - node T_1017 = mux(T_888, UInt<1>(0), T_1016) - node T_1018 = mux(T_886, UInt<1>(0), T_1017) - node T_1019 = mux(T_884, UInt<1>(1), T_1018) - node T_1020 = mux(T_882, UInt<1>(1), T_1019) - node T_1021 = mux(T_880, UInt<1>(1), T_1020) - node T_1022 = mux(T_878, UInt<1>(1), T_1021) - node T_1023 = mux(T_876, UInt<1>(1), T_1022) - node T_1024 = mux(T_874, UInt<1>(1), T_1023) - node T_1025 = mux(T_872, UInt<1>(1), T_1024) - node T_1026 = mux(T_870, UInt<1>(1), T_1025) - node T_1027 = mux(T_868, UInt<1>(1), T_1026) - node T_1028 = mux(T_866, UInt<1>(1), T_1027) - node T_1029 = mux(T_864, UInt<1>(1), T_1028) - node T_1030 = mux(T_862, UInt<1>(1), T_1029) - node T_1031 = mux(T_860, UInt<1>(1), T_1030) - node T_1032 = mux(T_858, UInt<1>(1), T_1031) - node T_1033 = mux(T_856, UInt<1>(1), T_1032) - node T_1034 = mux(T_854, UInt<1>(1), T_1033) - node T_1035 = mux(T_852, UInt<1>(1), T_1034) - node T_1036 = mux(T_850, UInt<1>(1), T_1035) - node T_1037 = mux(T_848, UInt<1>(1), T_1036) - node T_1038 = mux(T_846, UInt<1>(1), T_1037) - node T_1039 = mux(T_844, UInt<1>(1), T_1038) - node T_1040 = mux(T_842, UInt<1>(1), T_1039) - node T_1041 = mux(T_840, UInt<1>(1), T_1040) - node T_1042 = mux(T_838, UInt<1>(1), T_1041) - node T_1043 = mux(T_836, UInt<1>(1), T_1042) - node T_1044 = mux(T_834, UInt<1>(1), T_1043) - node T_1045 = mux(T_832, UInt<1>(1), T_1044) - node T_1046 = mux(T_916, UInt<3>(5), UInt<3>(7)) - node T_1047 = mux(T_914, UInt<3>(5), T_1046) - node T_1048 = mux(T_912, UInt<3>(5), T_1047) - node T_1049 = mux(T_910, UInt<3>(5), T_1048) - node T_1050 = mux(T_908, UInt<3>(5), T_1049) - node T_1051 = mux(T_906, UInt<3>(5), T_1050) - node T_1052 = mux(T_904, UInt<3>(7), T_1051) - node T_1053 = mux(T_902, UInt<3>(7), T_1052) - node T_1054 = mux(T_900, UInt<3>(7), T_1053) - node T_1055 = mux(T_898, UInt<3>(7), T_1054) - node T_1056 = mux(T_896, UInt<3>(7), T_1055) - node T_1057 = mux(T_894, UInt<3>(7), T_1056) - node T_1058 = mux(T_892, UInt<3>(7), T_1057) - node T_1059 = mux(T_890, UInt<3>(7), T_1058) - node T_1060 = mux(T_888, UInt<3>(7), T_1059) - node T_1061 = mux(T_886, UInt<3>(7), T_1060) - node T_1062 = mux(T_884, UInt<3>(0), T_1061) - node T_1063 = mux(T_882, UInt<3>(0), T_1062) - node T_1064 = mux(T_880, UInt<3>(0), T_1063) - node T_1065 = mux(T_878, UInt<3>(0), T_1064) - node T_1066 = mux(T_876, UInt<3>(0), T_1065) - node T_1067 = mux(T_874, UInt<3>(0), T_1066) - node T_1068 = mux(T_872, UInt<3>(0), T_1067) - node T_1069 = mux(T_870, UInt<3>(0), T_1068) - node T_1070 = mux(T_868, UInt<3>(0), T_1069) - node T_1071 = mux(T_866, UInt<3>(1), T_1070) - node T_1072 = mux(T_864, UInt<3>(1), T_1071) - node T_1073 = mux(T_862, UInt<3>(1), T_1072) - node T_1074 = mux(T_860, UInt<3>(0), T_1073) - node T_1075 = mux(T_858, UInt<3>(0), T_1074) - node T_1076 = mux(T_856, UInt<3>(0), T_1075) - node T_1077 = mux(T_854, UInt<3>(0), T_1076) - node T_1078 = mux(T_852, UInt<3>(0), T_1077) - node T_1079 = mux(T_850, UInt<3>(4), T_1078) - node T_1080 = mux(T_848, UInt<3>(4), T_1079) - node T_1081 = mux(T_846, UInt<3>(4), T_1080) - node T_1082 = mux(T_844, UInt<3>(4), T_1081) - node T_1083 = mux(T_842, UInt<3>(4), T_1082) - node T_1084 = mux(T_840, UInt<3>(4), T_1083) - node T_1085 = mux(T_838, UInt<3>(0), T_1084) - node T_1086 = mux(T_836, UInt<3>(3), T_1085) - node T_1087 = mux(T_834, UInt<3>(2), T_1086) - node T_1088 = mux(T_832, UInt<3>(2), T_1087) - node T_1089 = mux(T_916, UInt<4>(11), UInt<4>(15)) - node T_1090 = mux(T_914, UInt<4>(11), T_1089) - node T_1091 = mux(T_912, UInt<4>(11), T_1090) - node T_1092 = mux(T_910, UInt<4>(10), T_1091) - node T_1093 = mux(T_908, UInt<4>(10), T_1092) - node T_1094 = mux(T_906, UInt<4>(10), T_1093) - node T_1095 = mux(T_904, UInt<4>(2), T_1094) - node T_1096 = mux(T_902, UInt<4>(3), T_1095) - node T_1097 = mux(T_900, UInt<4>(9), T_1096) - node T_1098 = mux(T_898, UInt<4>(8), T_1097) - node T_1099 = mux(T_896, UInt<4>(4), T_1098) - node T_1100 = mux(T_894, UInt<4>(7), T_1099) - node T_1101 = mux(T_892, UInt<4>(5), T_1100) - node T_1102 = mux(T_890, UInt<4>(6), T_1101) - node T_1103 = mux(T_888, UInt<4>(1), T_1102) - node T_1104 = mux(T_886, UInt<4>(0), T_1103) - node T_1105 = mux(T_884, UInt<4>(9), T_1104) - node T_1106 = mux(T_882, UInt<4>(8), T_1105) - node T_1107 = mux(T_880, UInt<4>(6), T_1106) - node T_1108 = mux(T_878, UInt<4>(2), T_1107) - node T_1109 = mux(T_876, UInt<4>(3), T_1108) - node T_1110 = mux(T_874, UInt<4>(4), T_1109) - node T_1111 = mux(T_872, UInt<4>(7), T_1110) - node T_1112 = mux(T_870, UInt<4>(5), T_1111) - node T_1113 = mux(T_868, UInt<4>(0), T_1112) - node T_1114 = mux(T_866, UInt<4>(0), T_1113) - node T_1115 = mux(T_864, UInt<4>(0), T_1114) - node T_1116 = mux(T_862, UInt<4>(0), T_1115) - node T_1117 = mux(T_860, UInt<4>(0), T_1116) - node T_1118 = mux(T_858, UInt<4>(0), T_1117) - node T_1119 = mux(T_856, UInt<4>(0), T_1118) - node T_1120 = mux(T_854, UInt<4>(0), T_1119) - node T_1121 = mux(T_852, UInt<4>(0), T_1120) - node T_1122 = mux(T_850, UInt<4>(0), T_1121) - node T_1123 = mux(T_848, UInt<4>(0), T_1122) - node T_1124 = mux(T_846, UInt<4>(0), T_1123) - node T_1125 = mux(T_844, UInt<4>(0), T_1124) - node T_1126 = mux(T_842, UInt<4>(0), T_1125) - node T_1127 = mux(T_840, UInt<4>(0), T_1126) - node T_1128 = mux(T_838, UInt<4>(0), T_1127) - node T_1129 = mux(T_836, UInt<4>(0), T_1128) - node T_1130 = mux(T_834, UInt<4>(0), T_1129) - node T_1131 = mux(T_832, UInt<4>(11), T_1130) - node T_1132 = mux(T_916, UInt<3>(7), UInt<3>(7)) - node T_1133 = mux(T_914, UInt<3>(7), T_1132) - node T_1134 = mux(T_912, UInt<3>(7), T_1133) - node T_1135 = mux(T_910, UInt<3>(7), T_1134) - node T_1136 = mux(T_908, UInt<3>(7), T_1135) - node T_1137 = mux(T_906, UInt<3>(7), T_1136) - node T_1138 = mux(T_904, UInt<3>(7), T_1137) - node T_1139 = mux(T_902, UInt<3>(7), T_1138) - node T_1140 = mux(T_900, UInt<3>(7), T_1139) - node T_1141 = mux(T_898, UInt<3>(7), T_1140) - node T_1142 = mux(T_896, UInt<3>(7), T_1141) - node T_1143 = mux(T_894, UInt<3>(7), T_1142) - node T_1144 = mux(T_892, UInt<3>(7), T_1143) - node T_1145 = mux(T_890, UInt<3>(7), T_1144) - node T_1146 = mux(T_888, UInt<3>(7), T_1145) - node T_1147 = mux(T_886, UInt<3>(7), T_1146) - node T_1148 = mux(T_884, UInt<3>(7), T_1147) - node T_1149 = mux(T_882, UInt<3>(7), T_1148) - node T_1150 = mux(T_880, UInt<3>(7), T_1149) - node T_1151 = mux(T_878, UInt<3>(7), T_1150) - node T_1152 = mux(T_876, UInt<3>(7), T_1151) - node T_1153 = mux(T_874, UInt<3>(7), T_1152) - node T_1154 = mux(T_872, UInt<3>(7), T_1153) - node T_1155 = mux(T_870, UInt<3>(7), T_1154) - node T_1156 = mux(T_868, UInt<3>(7), T_1155) - node T_1157 = mux(T_866, UInt<3>(7), T_1156) - node T_1158 = mux(T_864, UInt<3>(7), T_1157) - node T_1159 = mux(T_862, UInt<3>(7), T_1158) - node T_1160 = mux(T_860, UInt<3>(7), T_1159) - node T_1161 = mux(T_858, UInt<3>(7), T_1160) - node T_1162 = mux(T_856, UInt<3>(7), T_1161) - node T_1163 = mux(T_854, UInt<3>(7), T_1162) - node T_1164 = mux(T_852, UInt<3>(7), T_1163) - node T_1165 = mux(T_850, UInt<3>(4), T_1164) - node T_1166 = mux(T_848, UInt<3>(0), T_1165) - node T_1167 = mux(T_846, UInt<3>(5), T_1166) - node T_1168 = mux(T_844, UInt<3>(1), T_1167) - node T_1169 = mux(T_842, UInt<3>(6), T_1168) - node T_1170 = mux(T_840, UInt<3>(2), T_1169) - node T_1171 = mux(T_838, UInt<3>(7), T_1170) - node T_1172 = mux(T_836, UInt<3>(7), T_1171) - node T_1173 = mux(T_834, UInt<3>(7), T_1172) - node T_1174 = mux(T_832, UInt<3>(7), T_1173) - node T_1175 = mux(T_916, UInt<1>(0), UInt<1>(0)) - node T_1176 = mux(T_914, UInt<1>(0), T_1175) - node T_1177 = mux(T_912, UInt<1>(0), T_1176) - node T_1178 = mux(T_910, UInt<1>(0), T_1177) - node T_1179 = mux(T_908, UInt<1>(0), T_1178) - node T_1180 = mux(T_906, UInt<1>(0), T_1179) - node T_1181 = mux(T_904, UInt<1>(0), T_1180) - node T_1182 = mux(T_902, UInt<1>(0), T_1181) - node T_1183 = mux(T_900, UInt<1>(0), T_1182) - node T_1184 = mux(T_898, UInt<1>(0), T_1183) - node T_1185 = mux(T_896, UInt<1>(0), T_1184) - node T_1186 = mux(T_894, UInt<1>(0), T_1185) - node T_1187 = mux(T_892, UInt<1>(0), T_1186) - node T_1188 = mux(T_890, UInt<1>(0), T_1187) - node T_1189 = mux(T_888, UInt<1>(0), T_1188) - node T_1190 = mux(T_886, UInt<1>(0), T_1189) - node T_1191 = mux(T_884, UInt<1>(0), T_1190) - node T_1192 = mux(T_882, UInt<1>(0), T_1191) - node T_1193 = mux(T_880, UInt<1>(0), T_1192) - node T_1194 = mux(T_878, UInt<1>(0), T_1193) - node T_1195 = mux(T_876, UInt<1>(0), T_1194) - node T_1196 = mux(T_874, UInt<1>(0), T_1195) - node T_1197 = mux(T_872, UInt<1>(0), T_1196) - node T_1198 = mux(T_870, UInt<1>(0), T_1197) - node T_1199 = mux(T_868, UInt<1>(0), T_1198) - node T_1200 = mux(T_866, UInt<1>(0), T_1199) - node T_1201 = mux(T_864, UInt<1>(0), T_1200) - node T_1202 = mux(T_862, UInt<1>(0), T_1201) - node T_1203 = mux(T_860, UInt<1>(0), T_1202) - node T_1204 = mux(T_858, UInt<1>(0), T_1203) - node T_1205 = mux(T_856, UInt<1>(0), T_1204) - node T_1206 = mux(T_854, UInt<1>(0), T_1205) - node T_1207 = mux(T_852, UInt<1>(0), T_1206) - node T_1208 = mux(T_850, UInt<1>(0), T_1207) - node T_1209 = mux(T_848, UInt<1>(0), T_1208) - node T_1210 = mux(T_846, UInt<1>(0), T_1209) - node T_1211 = mux(T_844, UInt<1>(0), T_1210) - node T_1212 = mux(T_842, UInt<1>(0), T_1211) - node T_1213 = mux(T_840, UInt<1>(0), T_1212) - node T_1214 = mux(T_838, UInt<1>(1), T_1213) - node T_1215 = mux(T_836, UInt<1>(1), T_1214) - node T_1216 = mux(T_834, UInt<1>(0), T_1215) - node T_1217 = mux(T_832, UInt<1>(0), T_1216) - node T_1218 = mux(T_916, UInt<2>(3), UInt<2>(3)) - node T_1219 = mux(T_914, UInt<2>(3), T_1218) - node T_1220 = mux(T_912, UInt<2>(3), T_1219) - node T_1221 = mux(T_910, UInt<2>(3), T_1220) - node T_1222 = mux(T_908, UInt<2>(3), T_1221) - node T_1223 = mux(T_906, UInt<2>(3), T_1222) - node T_1224 = mux(T_904, UInt<2>(3), T_1223) - node T_1225 = mux(T_902, UInt<2>(3), T_1224) - node T_1226 = mux(T_900, UInt<2>(3), T_1225) - node T_1227 = mux(T_898, UInt<2>(3), T_1226) - node T_1228 = mux(T_896, UInt<2>(3), T_1227) - node T_1229 = mux(T_894, UInt<2>(3), T_1228) - node T_1230 = mux(T_892, UInt<2>(3), T_1229) - node T_1231 = mux(T_890, UInt<2>(3), T_1230) - node T_1232 = mux(T_888, UInt<2>(3), T_1231) - node T_1233 = mux(T_886, UInt<2>(3), T_1232) - node T_1234 = mux(T_884, UInt<2>(3), T_1233) - node T_1235 = mux(T_882, UInt<2>(3), T_1234) - node T_1236 = mux(T_880, UInt<2>(3), T_1235) - node T_1237 = mux(T_878, UInt<2>(3), T_1236) - node T_1238 = mux(T_876, UInt<2>(3), T_1237) - node T_1239 = mux(T_874, UInt<2>(3), T_1238) - node T_1240 = mux(T_872, UInt<2>(3), T_1239) - node T_1241 = mux(T_870, UInt<2>(3), T_1240) - node T_1242 = mux(T_868, UInt<2>(3), T_1241) - node T_1243 = mux(T_866, UInt<2>(0), T_1242) - node T_1244 = mux(T_864, UInt<2>(1), T_1243) - node T_1245 = mux(T_862, UInt<2>(2), T_1244) - node T_1246 = mux(T_860, UInt<2>(3), T_1245) - node T_1247 = mux(T_858, UInt<2>(3), T_1246) - node T_1248 = mux(T_856, UInt<2>(3), T_1247) - node T_1249 = mux(T_854, UInt<2>(3), T_1248) - node T_1250 = mux(T_852, UInt<2>(3), T_1249) - node T_1251 = mux(T_850, UInt<2>(3), T_1250) - node T_1252 = mux(T_848, UInt<2>(3), T_1251) - node T_1253 = mux(T_846, UInt<2>(3), T_1252) - node T_1254 = mux(T_844, UInt<2>(3), T_1253) - node T_1255 = mux(T_842, UInt<2>(3), T_1254) - node T_1256 = mux(T_840, UInt<2>(3), T_1255) - node T_1257 = mux(T_838, UInt<2>(3), T_1256) - node T_1258 = mux(T_836, UInt<2>(3), T_1257) - node T_1259 = mux(T_834, UInt<2>(3), T_1258) - node T_1260 = mux(T_832, UInt<2>(3), T_1259) - node T_1261 = mux(T_916, UInt<3>(7), UInt<3>(7)) - node T_1262 = mux(T_914, UInt<3>(7), T_1261) - node T_1263 = mux(T_912, UInt<3>(7), T_1262) - node T_1264 = mux(T_910, UInt<3>(7), T_1263) - node T_1265 = mux(T_908, UInt<3>(7), T_1264) - node T_1266 = mux(T_906, UInt<3>(7), T_1265) - node T_1267 = mux(T_904, UInt<3>(7), T_1266) - node T_1268 = mux(T_902, UInt<3>(7), T_1267) - node T_1269 = mux(T_900, UInt<3>(7), T_1268) - node T_1270 = mux(T_898, UInt<3>(7), T_1269) - node T_1271 = mux(T_896, UInt<3>(7), T_1270) - node T_1272 = mux(T_894, UInt<3>(7), T_1271) - node T_1273 = mux(T_892, UInt<3>(7), T_1272) - node T_1274 = mux(T_890, UInt<3>(7), T_1273) - node T_1275 = mux(T_888, UInt<3>(7), T_1274) - node T_1276 = mux(T_886, UInt<3>(7), T_1275) - node T_1277 = mux(T_884, UInt<3>(7), T_1276) - node T_1278 = mux(T_882, UInt<3>(7), T_1277) - node T_1279 = mux(T_880, UInt<3>(7), T_1278) - node T_1280 = mux(T_878, UInt<3>(7), T_1279) - node T_1281 = mux(T_876, UInt<3>(7), T_1280) - node T_1282 = mux(T_874, UInt<3>(7), T_1281) - node T_1283 = mux(T_872, UInt<3>(7), T_1282) - node T_1284 = mux(T_870, UInt<3>(7), T_1283) - node T_1285 = mux(T_868, UInt<3>(7), T_1284) - node T_1286 = mux(T_866, UInt<3>(7), T_1285) - node T_1287 = mux(T_864, UInt<3>(7), T_1286) - node T_1288 = mux(T_862, UInt<3>(7), T_1287) - node T_1289 = mux(T_860, UInt<3>(3), T_1288) - node T_1290 = mux(T_858, UInt<3>(4), T_1289) - node T_1291 = mux(T_856, UInt<3>(0), T_1290) - node T_1292 = mux(T_854, UInt<3>(1), T_1291) - node T_1293 = mux(T_852, UInt<3>(2), T_1292) - node T_1294 = mux(T_850, UInt<3>(7), T_1293) - node T_1295 = mux(T_848, UInt<3>(7), T_1294) - node T_1296 = mux(T_846, UInt<3>(7), T_1295) - node T_1297 = mux(T_844, UInt<3>(7), T_1296) - node T_1298 = mux(T_842, UInt<3>(7), T_1297) - node T_1299 = mux(T_840, UInt<3>(7), T_1298) - node T_1300 = mux(T_838, UInt<3>(7), T_1299) - node T_1301 = mux(T_836, UInt<3>(7), T_1300) - node T_1302 = mux(T_834, UInt<3>(7), T_1301) - node T_1303 = mux(T_832, UInt<3>(7), T_1302) - node T_1304 = mux(T_916, UInt<2>(3), UInt<2>(0)) - node T_1305 = mux(T_914, UInt<2>(3), T_1304) - node T_1306 = mux(T_912, UInt<2>(3), T_1305) - node T_1307 = mux(T_910, UInt<2>(3), T_1306) - node T_1308 = mux(T_908, UInt<2>(3), T_1307) - node T_1309 = mux(T_906, UInt<2>(3), T_1308) - node T_1310 = mux(T_904, UInt<2>(0), T_1309) - node T_1311 = mux(T_902, UInt<2>(0), T_1310) - node T_1312 = mux(T_900, UInt<2>(0), T_1311) - node T_1313 = mux(T_898, UInt<2>(0), T_1312) - node T_1314 = mux(T_896, UInt<2>(0), T_1313) - node T_1315 = mux(T_894, UInt<2>(0), T_1314) - node T_1316 = mux(T_892, UInt<2>(0), T_1315) - node T_1317 = mux(T_890, UInt<2>(0), T_1316) - node T_1318 = mux(T_888, UInt<2>(0), T_1317) - node T_1319 = mux(T_886, UInt<2>(0), T_1318) - node T_1320 = mux(T_884, UInt<2>(0), T_1319) - node T_1321 = mux(T_882, UInt<2>(0), T_1320) - node T_1322 = mux(T_880, UInt<2>(0), T_1321) - node T_1323 = mux(T_878, UInt<2>(0), T_1322) - node T_1324 = mux(T_876, UInt<2>(0), T_1323) - node T_1325 = mux(T_874, UInt<2>(0), T_1324) - node T_1326 = mux(T_872, UInt<2>(0), T_1325) - node T_1327 = mux(T_870, UInt<2>(0), T_1326) - node T_1328 = mux(T_868, UInt<2>(0), T_1327) - node T_1329 = mux(T_866, UInt<2>(0), T_1328) - node T_1330 = mux(T_864, UInt<2>(0), T_1329) - node T_1331 = mux(T_862, UInt<2>(0), T_1330) - node T_1332 = mux(T_860, UInt<2>(1), T_1331) - node T_1333 = mux(T_858, UInt<2>(1), T_1332) - node T_1334 = mux(T_856, UInt<2>(1), T_1333) - node T_1335 = mux(T_854, UInt<2>(1), T_1334) - node T_1336 = mux(T_852, UInt<2>(1), T_1335) - node T_1337 = mux(T_850, UInt<2>(0), T_1336) - node T_1338 = mux(T_848, UInt<2>(0), T_1337) - node T_1339 = mux(T_846, UInt<2>(0), T_1338) - node T_1340 = mux(T_844, UInt<2>(0), T_1339) - node T_1341 = mux(T_842, UInt<2>(0), T_1340) - node T_1342 = mux(T_840, UInt<2>(0), T_1341) - node T_1343 = mux(T_838, UInt<2>(2), T_1342) - node T_1344 = mux(T_836, UInt<2>(2), T_1343) - node T_1345 = mux(T_834, UInt<2>(0), T_1344) - node T_1346 = mux(T_832, UInt<2>(0), T_1345) - node T_1347 = mux(T_916, UInt<1>(0), UInt<1>(0)) - node T_1348 = mux(T_914, UInt<1>(0), T_1347) - node T_1349 = mux(T_912, UInt<1>(0), T_1348) - node T_1350 = mux(T_910, UInt<1>(0), T_1349) - node T_1351 = mux(T_908, UInt<1>(0), T_1350) - node T_1352 = mux(T_906, UInt<1>(0), T_1351) - node T_1353 = mux(T_904, UInt<1>(1), T_1352) - node T_1354 = mux(T_902, UInt<1>(1), T_1353) - node T_1355 = mux(T_900, UInt<1>(1), T_1354) - node T_1356 = mux(T_898, UInt<1>(1), T_1355) - node T_1357 = mux(T_896, UInt<1>(1), T_1356) - node T_1358 = mux(T_894, UInt<1>(1), T_1357) - node T_1359 = mux(T_892, UInt<1>(1), T_1358) - node T_1360 = mux(T_890, UInt<1>(1), T_1359) - node T_1361 = mux(T_888, UInt<1>(1), T_1360) - node T_1362 = mux(T_886, UInt<1>(1), T_1361) - node T_1363 = mux(T_884, UInt<1>(1), T_1362) - node T_1364 = mux(T_882, UInt<1>(1), T_1363) - node T_1365 = mux(T_880, UInt<1>(1), T_1364) - node T_1366 = mux(T_878, UInt<1>(1), T_1365) - node T_1367 = mux(T_876, UInt<1>(1), T_1366) - node T_1368 = mux(T_874, UInt<1>(1), T_1367) - node T_1369 = mux(T_872, UInt<1>(1), T_1368) - node T_1370 = mux(T_870, UInt<1>(1), T_1369) - node T_1371 = mux(T_868, UInt<1>(1), T_1370) - node T_1372 = mux(T_866, UInt<1>(0), T_1371) - node T_1373 = mux(T_864, UInt<1>(0), T_1372) - node T_1374 = mux(T_862, UInt<1>(0), T_1373) - node T_1375 = mux(T_860, UInt<1>(1), T_1374) - node T_1376 = mux(T_858, UInt<1>(1), T_1375) - node T_1377 = mux(T_856, UInt<1>(1), T_1376) - node T_1378 = mux(T_854, UInt<1>(1), T_1377) - node T_1379 = mux(T_852, UInt<1>(1), T_1378) - node T_1380 = mux(T_850, UInt<1>(0), T_1379) - node T_1381 = mux(T_848, UInt<1>(0), T_1380) - node T_1382 = mux(T_846, UInt<1>(0), T_1381) - node T_1383 = mux(T_844, UInt<1>(0), T_1382) - node T_1384 = mux(T_842, UInt<1>(0), T_1383) - node T_1385 = mux(T_840, UInt<1>(0), T_1384) - node T_1386 = mux(T_838, UInt<1>(1), T_1385) - node T_1387 = mux(T_836, UInt<1>(1), T_1386) - node T_1388 = mux(T_834, UInt<1>(1), T_1387) - node T_1389 = mux(T_832, UInt<1>(1), T_1388) - node T_1390 = mux(T_916, UInt<2>(3), UInt<2>(0)) - node T_1391 = mux(T_914, UInt<2>(2), T_1390) - node T_1392 = mux(T_912, UInt<2>(1), T_1391) - node T_1393 = mux(T_910, UInt<2>(3), T_1392) - node T_1394 = mux(T_908, UInt<2>(2), T_1393) - node T_1395 = mux(T_906, UInt<2>(1), T_1394) - node T_1396 = mux(T_904, UInt<2>(0), T_1395) - node T_1397 = mux(T_902, UInt<2>(0), T_1396) - node T_1398 = mux(T_900, UInt<2>(0), T_1397) - node T_1399 = mux(T_898, UInt<2>(0), T_1398) - node T_1400 = mux(T_896, UInt<2>(0), T_1399) - node T_1401 = mux(T_894, UInt<2>(0), T_1400) - node T_1402 = mux(T_892, UInt<2>(0), T_1401) - node T_1403 = mux(T_890, UInt<2>(0), T_1402) - node T_1404 = mux(T_888, UInt<2>(0), T_1403) - node T_1405 = mux(T_886, UInt<2>(0), T_1404) - node T_1406 = mux(T_884, UInt<2>(0), T_1405) - node T_1407 = mux(T_882, UInt<2>(0), T_1406) - node T_1408 = mux(T_880, UInt<2>(0), T_1407) - node T_1409 = mux(T_878, UInt<2>(0), T_1408) - node T_1410 = mux(T_876, UInt<2>(0), T_1409) - node T_1411 = mux(T_874, UInt<2>(0), T_1410) - node T_1412 = mux(T_872, UInt<2>(0), T_1411) - node T_1413 = mux(T_870, UInt<2>(0), T_1412) - node T_1414 = mux(T_868, UInt<2>(0), T_1413) - node T_1415 = mux(T_866, UInt<2>(0), T_1414) - node T_1416 = mux(T_864, UInt<2>(0), T_1415) - node T_1417 = mux(T_862, UInt<2>(0), T_1416) - node T_1418 = mux(T_860, UInt<2>(0), T_1417) - node T_1419 = mux(T_858, UInt<2>(0), T_1418) - node T_1420 = mux(T_856, UInt<2>(0), T_1419) - node T_1421 = mux(T_854, UInt<2>(0), T_1420) - node T_1422 = mux(T_852, UInt<2>(0), T_1421) - node T_1423 = mux(T_850, UInt<2>(0), T_1422) - node T_1424 = mux(T_848, UInt<2>(0), T_1423) - node T_1425 = mux(T_846, UInt<2>(0), T_1424) - node T_1426 = mux(T_844, UInt<2>(0), T_1425) - node T_1427 = mux(T_842, UInt<2>(0), T_1426) - node T_1428 = mux(T_840, UInt<2>(0), T_1427) - node T_1429 = mux(T_838, UInt<2>(0), T_1428) - node T_1430 = mux(T_836, UInt<2>(0), T_1429) - node T_1431 = mux(T_834, UInt<2>(0), T_1430) - node T_1432 = mux(T_832, UInt<2>(0), T_1431) - node rs1_addr = bits(ctrl.inst, 19, 15) - node rs2_addr = bits(ctrl.inst, 24, 20) - reg st_type : UInt<2>, clk, reset - reg ld_type : UInt<3>, clk, reset - reg wb_sel : UInt<2>, clk, reset - node T_1433 = bit(T_1389, 0) - reg wb_en : UInt<1>, clk, reset - reg csr_cmd : UInt<2>, clk, reset - ctrl.pc_sel := T_959 - node T_1434 = not(ctrl.stall) - node T_1435 = not(ctrl.data_re) - node T_1436 = and(T_1434, T_1435) - ctrl.inst_re := T_1436 - node T_1437 = neq(T_1303, UInt<3>(7)) - node T_1438 = bit(T_1217, 0) - node T_1439 = or(T_1437, T_1438) - node T_1440 = mux(T_1439, UInt<1>(1), UInt<1>(0)) - ctrl.inst_type := T_1440 - ctrl.A_sel := T_1002 - ctrl.B_sel := T_1045 - ctrl.imm_sel := T_1088 - ctrl.alu_op := T_1131 - ctrl.br_type := T_1174 - ctrl.st_type := T_1260 - node T_1441 = not(ctrl.stall) - when T_1441 : - st_type := ctrl.st_type - ld_type := T_1303 - wb_sel := T_1346 - node T_1442 = bit(T_1389, 0) - wb_en := T_1442 - csr_cmd := T_1432 - node T_1443 = neq(ctrl.ld_type, UInt<3>(7)) - node T_1444 = neq(T_1303, UInt<3>(7)) - node T_1445 = mux(ctrl.stall, T_1443, T_1444) - ctrl.data_re := T_1445 - ctrl.ld_type := ld_type - ctrl.wb_en := wb_en - ctrl.wb_sel := wb_sel - ctrl.csr_cmd := csr_cmd diff --git a/test/chisel3/Core.fir b/test/chisel3/Core.fir deleted file mode 100644 index 297f60cb..00000000 --- a/test/chisel3/Core.fir +++ /dev/null @@ -1,1039 +0,0 @@ -; RUN: firrtl -i %s -o %s.v -X verilog -p c | tee %s.out | FileCheck %s -;CHECK: Done! - -circuit Core : - module ALU : - input B : UInt<32> - output out : UInt<32> - output sum : UInt<32> - input A : UInt<32> - input alu_op : UInt<4> - - node shamt = bits(B, 4, 0) - node T_1224 = addw(A, B) - node T_1225 = subw(A, B) - node T_1226 = asSInt(A) - node T_1227 = dshr(T_1226, shamt) - node T_1228 = asUInt(T_1227) - node T_1229 = dshr(A, shamt) - node T_1230 = dshl(A, shamt) - node T_1231 = bits(T_1230, 31, 0) - node T_1232 = asSInt(A) - node T_1233 = asSInt(B) - node T_1234 = lt(T_1232, T_1233) - node T_1235 = asUInt(T_1234) - node T_1236 = lt(A, B) - node T_1237 = asUInt(T_1236) - node T_1238 = and(A, B) - node T_1239 = or(A, B) - node T_1240 = xor(A, B) - node T_1241 = eq(UInt<4>(10), alu_op) - node T_1242 = mux(T_1241, A, B) - node T_1243 = eq(UInt<4>(4), alu_op) - node T_1244 = mux(T_1243, T_1240, T_1242) - node T_1245 = eq(UInt<4>(3), alu_op) - node T_1246 = mux(T_1245, T_1239, T_1244) - node T_1247 = eq(UInt<4>(2), alu_op) - node T_1248 = mux(T_1247, T_1238, T_1246) - node T_1249 = eq(UInt<4>(7), alu_op) - node T_1250 = mux(T_1249, T_1237, T_1248) - node T_1251 = eq(UInt<4>(5), alu_op) - node T_1252 = mux(T_1251, T_1235, T_1250) - node T_1253 = eq(UInt<4>(6), alu_op) - node T_1254 = mux(T_1253, T_1231, T_1252) - node T_1255 = eq(UInt<4>(8), alu_op) - node T_1256 = mux(T_1255, T_1229, T_1254) - node T_1257 = eq(UInt<4>(9), alu_op) - node T_1258 = mux(T_1257, T_1228, T_1256) - node T_1259 = eq(UInt<4>(1), alu_op) - node T_1260 = mux(T_1259, T_1225, T_1258) - node T_1261 = eq(UInt<4>(0), alu_op) - node oot = mux(T_1261, T_1224, T_1260) - node T_1262 = bits(oot, 31, 0) - out := T_1262 - node T_1263 = bit(alu_op, 0) - node T_1264 = subw(UInt<1>(0), B) - node T_1265 = mux(T_1263, T_1264, B) - node T_1266 = addw(A, T_1265) - sum := T_1266 - module BrCond : - input br_type : UInt<3> - input rs1 : UInt<32> - input rs2 : UInt<32> - output taken : UInt<1> - - node eq = eq(rs1, rs2) - node neq = not(eq) - node T_1267 = asSInt(rs1) - node T_1268 = asSInt(rs2) - node lt = lt(T_1267, T_1268) - node ge = not(lt) - node ltu = lt(rs1, rs2) - node geu = not(ltu) - node T_1269 = eq(br_type, UInt<3>(2)) - node T_1270 = and(T_1269, eq) - node T_1271 = eq(br_type, UInt<3>(6)) - node T_1272 = and(T_1271, neq) - node T_1273 = or(T_1270, T_1272) - node T_1274 = eq(br_type, UInt<3>(1)) - node T_1275 = and(T_1274, lt) - node T_1276 = or(T_1273, T_1275) - node T_1277 = eq(br_type, UInt<3>(5)) - node T_1278 = and(T_1277, ge) - node T_1279 = or(T_1276, T_1278) - node T_1280 = eq(br_type, UInt<3>(0)) - node T_1281 = and(T_1280, ltu) - node T_1282 = or(T_1279, T_1281) - node T_1283 = eq(br_type, UInt<3>(4)) - node T_1284 = and(T_1283, geu) - node T_1285 = or(T_1282, T_1284) - taken := T_1285 - module RegFile : - input raddr1 : UInt<5> - input raddr2 : UInt<5> - output rdata1 : UInt<32> - output rdata2 : UInt<32> - input wen : UInt<1> - input waddr : UInt<5> - input wdata : UInt<32> - input clk : Clock - - cmem regs : UInt<32>[32],clk - node T_1286 = eq(raddr1, UInt<1>(0)) - node T_1287 = not(T_1286) - infer accessor T_1288 = regs[raddr1] - node T_1289 = mux(T_1287, T_1288, UInt<1>(0)) - rdata1 := T_1289 - node T_1290 = eq(raddr2, UInt<1>(0)) - node T_1291 = not(T_1290) - infer accessor T_1292 = regs[raddr2] - node T_1293 = mux(T_1291, T_1292, UInt<1>(0)) - rdata2 := T_1293 - node T_1294 = eq(waddr, UInt<1>(0)) - node T_1295 = not(T_1294) - node T_1296 = and(wen, T_1295) - when T_1296 : - infer accessor T_1297 = regs[waddr] - T_1297 := wdata - module ImmGenWire : - output out : UInt<32> - input sel : UInt<3> - input inst : UInt<32> - - node T_1298 = bits(inst, 31, 20) - node Iimm = asSInt(T_1298) - node T_1299 = bits(inst, 31, 25) - node T_1300 = bits(inst, 11, 7) - node T_1301 = cat(T_1299, T_1300) - node Simm = asSInt(T_1301) - node T_1302 = bit(inst, 31) - node T_1303 = bit(inst, 7) - node T_1304 = bits(inst, 30, 25) - node T_1305 = bits(inst, 11, 8) - node T_1306 = cat(T_1302, T_1303) - node T_1307 = cat(T_1305, UInt<1>(0)) - node T_1308 = cat(T_1304, T_1307) - node T_1309 = cat(T_1306, T_1308) - node Bimm = asSInt(T_1309) - node T_1310 = bits(inst, 31, 12) - node T_1311 = cat(T_1310, UInt<12>(0)) - node Uimm = asSInt(T_1311) - node T_1312 = bit(inst, 31) - node T_1313 = bits(inst, 19, 12) - node T_1314 = bit(inst, 20) - node T_1315 = bits(inst, 30, 25) - node T_1316 = bits(inst, 24, 21) - node T_1317 = cat(T_1313, T_1314) - node T_1318 = cat(T_1312, T_1317) - node T_1319 = cat(T_1316, UInt<1>(0)) - node T_1320 = cat(T_1315, T_1319) - node T_1321 = cat(T_1318, T_1320) - node Jimm = asSInt(T_1321) - node T_1322 = bits(inst, 19, 15) - node T_1323 = pad(T_1322, 32) - node Zimm = asSInt(T_1323) - node T_1324 = eq(UInt<3>(3), sel) - node T_1325 = mux(T_1324, Jimm, Zimm) - node T_1326 = eq(UInt<3>(2), sel) - node T_1327 = mux(T_1326, Uimm, T_1325) - node T_1328 = eq(UInt<3>(4), sel) - node T_1329 = mux(T_1328, Bimm, T_1327) - node T_1330 = eq(UInt<3>(1), sel) - node T_1331 = mux(T_1330, Simm, T_1329) - node T_1332 = eq(UInt<3>(0), sel) - node T_1333 = mux(T_1332, Iimm, T_1331) - node T_1334 = asUInt(T_1333) - out := T_1334 - module CSR : - output host : {status : UInt<32>, flip hid : UInt<1>, tohost : UInt<32>} - input src : UInt<32> - input cmd : UInt<2> - output data : UInt<32> - input addr : UInt<12> - input clk : Clock - input reset : UInt<1> - - reg reg_tohost : UInt<32>,clk,reset - onreset reg_tohost := UInt<32>(0) - reg reg_status : UInt<32>,clk,reset - onreset reg_status := UInt<32>(0) - host.tohost := reg_tohost - host.status := reg_status - node T_1335 = eq(UInt<12>(1291), addr) - node T_1336 = mux(T_1335, host.hid, UInt<1>(0)) - node T_1337 = eq(UInt<12>(1290), addr) - node T_1338 = mux(T_1337, reg_status, T_1336) - node T_1339 = eq(UInt<12>(1310), addr) - node T_1340 = mux(T_1339, reg_tohost, T_1338) - data := T_1340 - node T_1341 = eq(cmd, UInt<2>(1)) - when T_1341 : - node T_1342 = eq(addr, UInt<12>(1310)) - when T_1342 : reg_tohost := src - node T_1343 = eq(addr, UInt<12>(1290)) - when T_1343 : reg_status := src - node T_1344 = eq(cmd, UInt<2>(2)) - node T_1345 = neq(src, UInt<1>(0)) - node T_1346 = and(T_1344, T_1345) - when T_1346 : - node T_1347 = eq(addr, UInt<12>(1310)) - when T_1347 : - node T_1348 = dshl(UInt<1>(1), bits(src,5,0)) - node T_1349 = or(data, T_1348) - reg_tohost := T_1349 - node T_1350 = eq(addr, UInt<12>(1290)) - when T_1350 : - node T_1351 = dshl(UInt<1>(1), bits(src,5,0)) - node T_1352 = or(data, T_1351) - reg_status := T_1352 - node T_1353 = eq(cmd, UInt<2>(3)) - node T_1354 = neq(src, UInt<1>(0)) - node T_1355 = and(T_1353, T_1354) - when T_1355 : - node T_1356 = eq(addr, UInt<12>(1310)) - when T_1356 : - node T_1357 = dshl(UInt<1>(0), bits(src,5,0)) - node T_1358 = and(data, T_1357) - reg_tohost := T_1358 - node T_1359 = eq(addr, UInt<12>(1290)) - when T_1359 : - node T_1360 = dshl(UInt<1>(0), bits(src,5,0)) - node T_1361 = and(data, T_1360) - reg_status := T_1361 - module Datapath : - output host : {status : UInt<32>, flip hid : UInt<1>, tohost : UInt<32>} - input ctrl : {flip inst : UInt<32>, flip stall : UInt<1>, pc_sel : UInt<1>, inst_re : UInt<1>, inst_type : UInt<1>, A_sel : UInt<1>, B_sel : UInt<1>, imm_sel : UInt<3>, alu_op : UInt<4>, br_type : UInt<3>, data_re : UInt<1>, st_type : UInt<2>, ld_type : UInt<3>, wb_sel : UInt<2>, wb_en : UInt<1>, csr_cmd : UInt<2>} - output icache : {re : UInt<1>, addr : UInt<32>, flip dout : UInt<32>, we : UInt<4>, din : UInt<32>} - output dcache : {re : UInt<1>, addr : UInt<32>, flip dout : UInt<32>, we : UInt<4>, din : UInt<32>} - input stall : UInt<1> - input clk : Clock - input reset : UInt<1> - - inst alu of ALU - inst brCond of BrCond - inst regFile of RegFile - regFile.clk := clk - inst immGen of ImmGenWire - reg fe_inst : UInt<32>,clk,reset - onreset fe_inst := UInt<32>(0) - reg fe_pc : UInt,clk,reset - reg ew_inst : UInt<32>,clk,reset - onreset ew_inst := UInt<32>(0) - reg ew_pc : UInt,clk,reset - reg ew_alu : UInt,clk,reset - node T_1362 = subw(UInt<14>(8192), UInt<32>(4)) - reg pc : UInt<32>,clk,reset - onreset pc := T_1362 - node T_1363 = eq(ctrl.pc_sel, UInt<1>(1)) - node T_1364 = or(T_1363, brCond.taken) - node T_1365 = addw(pc, UInt<3>(4)) - node iaddr = mux(T_1364, alu.sum, T_1365) - node T_1366 = eq(ctrl.inst_type, UInt<1>(1)) - node T_1367 = or(T_1366, brCond.taken) - node inst = mux(T_1367, UInt<32>(19), icache.dout) - icache.we := UInt<1>(0) - icache.din := UInt<1>(0) - icache.addr := iaddr - icache.re := ctrl.inst_re - node T_1368 = eq(dcache.we, UInt<1>(0)) - node T_1369 = not(T_1368) - node T_1370 = not(T_1369) - node T_1371 = and(icache.re, T_1370) - node T_1372 = mux(T_1371, iaddr, pc) - pc := T_1372 - node T_1373 = not(stall) - when T_1373 : - fe_pc := pc - fe_inst := inst - ctrl.inst := fe_inst - ctrl.stall := stall - node rd_addr = bits(fe_inst, 11, 7) - node rs1_addr = bits(fe_inst, 19, 15) - node rs2_addr = bits(fe_inst, 24, 20) - regFile.raddr1 := rs1_addr - regFile.raddr2 := rs2_addr - immGen.inst := fe_inst - immGen.sel := ctrl.imm_sel - node T_1374 = eq(rs1_addr, UInt<1>(0)) - node rs1NotZero = not(T_1374) - node T_1375 = eq(rs2_addr, UInt<1>(0)) - node rs2NotZero = not(T_1375) - node T_1376 = eq(ctrl.wb_sel, UInt<2>(0)) - node alutype = and(ctrl.wb_en, T_1376) - node ex_rd_addr = bits(ew_inst, 11, 7) - node T_1377 = and(alutype, rs1NotZero) - node T_1378 = eq(rs1_addr, ex_rd_addr) - node T_1379 = and(T_1377, T_1378) - node rs1 = mux(T_1379, ew_alu, regFile.rdata1) - node T_1380 = and(alutype, rs2NotZero) - node T_1381 = eq(rs2_addr, ex_rd_addr) - node T_1382 = and(T_1380, T_1381) - node rs2 = mux(T_1382, ew_alu, regFile.rdata2) - node T_1383 = eq(ctrl.A_sel, UInt<1>(0)) - node T_1384 = mux(T_1383, rs1, fe_pc) - alu.A := T_1384 - node T_1385 = eq(ctrl.B_sel, UInt<1>(0)) - node T_1386 = mux(T_1385, rs2, immGen.out) - alu.B := T_1386 - alu.alu_op := ctrl.alu_op - brCond.rs1 := rs1 - brCond.rs2 := rs2 - brCond.br_type := ctrl.br_type - node T_1387 = bit(alu.sum, 1) - node T_1388 = dshl(T_1387, UInt<3>(4)) - node T_1389 = bit(alu.sum, 0) - node T_1390 = dshl(T_1389, UInt<2>(3)) - node woffset = or(T_1388, T_1390) - dcache.re := ctrl.data_re - node T_1391 = mux(stall, ew_alu, alu.sum) - dcache.addr := T_1391 - node T_1392 = bits(alu.sum, 1, 0) - node T_1393 = dshl(UInt<2>(3), T_1392) - node T_1394 = bits(T_1393, 3, 0) - node T_1395 = bits(alu.sum, 1, 0) - node T_1396 = dshl(UInt<1>(1), T_1395) - node T_1397 = bits(T_1396, 3, 0) - node T_1398 = eq(UInt<2>(2), ctrl.st_type) - node T_1399 = mux(T_1398, T_1397, UInt<4>(0)) - node T_1400 = eq(UInt<2>(1), ctrl.st_type) - node T_1401 = mux(T_1400, T_1394, T_1399) - node T_1402 = eq(UInt<2>(0), ctrl.st_type) - node T_1403 = mux(T_1402, UInt<4>(15), T_1401) - node T_1404 = mux(stall, UInt<4>(0), T_1403) - dcache.we := T_1404 - node T_1405 = dshl(rs2, woffset) - node T_1406 = bits(T_1405, 31, 0) - dcache.din := T_1406 - node T_1407 = not(stall) - when T_1407 : - ew_pc := fe_pc - ew_inst := fe_inst - ew_alu := alu.out - node T_1408 = bit(ew_alu, 1) - node T_1409 = dshl(T_1408, UInt<3>(4)) - node T_1410 = bit(ew_alu, 0) - node T_1411 = dshl(T_1410, UInt<2>(3)) - node loffset = or(T_1409, T_1411) - node lshift = dshr(dcache.dout, loffset) - node T_1412 = bits(lshift, 15, 0) - node T_1413 = asSInt(T_1412) - node T_1414 = pad(T_1413, 32) - node T_1415 = asUInt(T_1414) - node T_1416 = bits(lshift, 7, 0) - node T_1417 = asSInt(T_1416) - node T_1418 = pad(T_1417, 32) - node T_1419 = asUInt(T_1418) - node T_1420 = bits(lshift, 15, 0) - node T_1421 = bits(lshift, 7, 0) - node T_1422 = eq(UInt<3>(4), ctrl.ld_type) - node T_1423 = mux(T_1422, T_1421, dcache.dout) - node T_1424 = eq(UInt<3>(3), ctrl.ld_type) - node T_1425 = mux(T_1424, T_1420, T_1423) - node T_1426 = eq(UInt<3>(2), ctrl.ld_type) - node T_1427 = mux(T_1426, T_1419, T_1425) - node T_1428 = eq(UInt<3>(1), ctrl.ld_type) - node load = mux(T_1428, T_1415, T_1427) - inst csr of CSR - csr.clk := clk - csr.reset := reset - host := csr.host - csr.src := ew_alu - node T_1429 = bits(ew_inst, 31, 20) - csr.addr := T_1429 - csr.cmd := ctrl.csr_cmd - node T_1430 = addw(ew_pc, UInt<3>(4)) - node T_1431 = eq(UInt<2>(3), ctrl.wb_sel) - node T_1432 = mux(T_1431, csr.data, ew_alu) - node T_1433 = eq(UInt<2>(2), ctrl.wb_sel) - node T_1434 = mux(T_1433, T_1430, T_1432) - node T_1435 = eq(UInt<2>(1), ctrl.wb_sel) - node regWrite = mux(T_1435, load, T_1434) - regFile.wen := ctrl.wb_en - regFile.waddr := ex_rd_addr - regFile.wdata := regWrite - module Control : - output ctrl : {flip inst : UInt<32>, st_type : UInt<2>, ld_type : UInt<3>, wb_sel : UInt<2>, wb_en : UInt<1>, csr_cmd : UInt<2>, pc_sel : UInt<1>, inst_re : UInt<1>, flip stall : UInt<1>, data_re : UInt<1>, inst_type : UInt<1>, A_sel : UInt<1>, B_sel : UInt<1>, imm_sel : UInt<3>, alu_op : UInt<4>, br_type : UInt<3>} - input clk : Clock - input reset : UInt<1> - - node T_831 = and(UInt<7>(127), ctrl.inst) - node T_832 = eq(T_831, UInt<6>(55)) - node T_833 = and(UInt<7>(127), ctrl.inst) - node T_834 = eq(T_833, UInt<5>(23)) - node T_835 = and(UInt<7>(127), ctrl.inst) - node T_836 = eq(T_835, UInt<7>(111)) - node T_837 = and(UInt<15>(28799), ctrl.inst) - node T_838 = eq(T_837, UInt<7>(103)) - node T_839 = and(UInt<15>(28799), ctrl.inst) - node T_840 = eq(T_839, UInt<7>(99)) - node T_841 = and(UInt<15>(28799), ctrl.inst) - node T_842 = eq(T_841, UInt<13>(4195)) - node T_843 = and(UInt<15>(28799), ctrl.inst) - node T_844 = eq(T_843, UInt<15>(16483)) - node T_845 = and(UInt<15>(28799), ctrl.inst) - node T_846 = eq(T_845, UInt<15>(20579)) - node T_847 = and(UInt<15>(28799), ctrl.inst) - node T_848 = eq(T_847, UInt<15>(24675)) - node T_849 = and(UInt<15>(28799), ctrl.inst) - node T_850 = eq(T_849, UInt<15>(28771)) - node T_851 = and(UInt<15>(28799), ctrl.inst) - node T_852 = eq(T_851, UInt<2>(3)) - node T_853 = and(UInt<15>(28799), ctrl.inst) - node T_854 = eq(T_853, UInt<13>(4099)) - node T_855 = and(UInt<15>(28799), ctrl.inst) - node T_856 = eq(T_855, UInt<14>(8195)) - node T_857 = and(UInt<15>(28799), ctrl.inst) - node T_858 = eq(T_857, UInt<15>(16387)) - node T_859 = and(UInt<15>(28799), ctrl.inst) - node T_860 = eq(T_859, UInt<15>(20483)) - node T_861 = and(UInt<15>(28799), ctrl.inst) - node T_862 = eq(T_861, UInt<6>(35)) - node T_863 = and(UInt<15>(28799), ctrl.inst) - node T_864 = eq(T_863, UInt<13>(4131)) - node T_865 = and(UInt<15>(28799), ctrl.inst) - node T_866 = eq(T_865, UInt<14>(8227)) - node T_867 = and(UInt<15>(28799), ctrl.inst) - node T_868 = eq(T_867, UInt<5>(19)) - node T_869 = and(UInt<15>(28799), ctrl.inst) - node T_870 = eq(T_869, UInt<14>(8211)) - node T_871 = and(UInt<15>(28799), ctrl.inst) - node T_872 = eq(T_871, UInt<14>(12307)) - node T_873 = and(UInt<15>(28799), ctrl.inst) - node T_874 = eq(T_873, UInt<15>(16403)) - node T_875 = and(UInt<15>(28799), ctrl.inst) - node T_876 = eq(T_875, UInt<15>(24595)) - node T_877 = and(UInt<15>(28799), ctrl.inst) - node T_878 = eq(T_877, UInt<15>(28691)) - node T_879 = and(UInt<32>(4261441663), ctrl.inst) - node T_880 = eq(T_879, UInt<13>(4115)) - node T_881 = and(UInt<32>(4261441663), ctrl.inst) - node T_882 = eq(T_881, UInt<15>(20499)) - node T_883 = and(UInt<32>(4261441663), ctrl.inst) - node T_884 = eq(T_883, UInt<31>(1073762323)) - node T_885 = and(UInt<32>(4261441663), ctrl.inst) - node T_886 = eq(T_885, UInt<6>(51)) - node T_887 = and(UInt<32>(4261441663), ctrl.inst) - node T_888 = eq(T_887, UInt<31>(1073741875)) - node T_889 = and(UInt<32>(4261441663), ctrl.inst) - node T_890 = eq(T_889, UInt<13>(4147)) - node T_891 = and(UInt<32>(4261441663), ctrl.inst) - node T_892 = eq(T_891, UInt<14>(8243)) - node T_893 = and(UInt<32>(4261441663), ctrl.inst) - node T_894 = eq(T_893, UInt<14>(12339)) - node T_895 = and(UInt<32>(4261441663), ctrl.inst) - node T_896 = eq(T_895, UInt<15>(16435)) - node T_897 = and(UInt<32>(4261441663), ctrl.inst) - node T_898 = eq(T_897, UInt<15>(20531)) - node T_899 = and(UInt<32>(4261441663), ctrl.inst) - node T_900 = eq(T_899, UInt<31>(1073762355)) - node T_901 = and(UInt<32>(4261441663), ctrl.inst) - node T_902 = eq(T_901, UInt<15>(24627)) - node T_903 = and(UInt<32>(4261441663), ctrl.inst) - node T_904 = eq(T_903, UInt<15>(28723)) - node T_905 = and(UInt<15>(28799), ctrl.inst) - node T_906 = eq(T_905, UInt<13>(4211)) - node T_907 = and(UInt<15>(28799), ctrl.inst) - node T_908 = eq(T_907, UInt<14>(8307)) - node T_909 = and(UInt<15>(28799), ctrl.inst) - node T_910 = eq(T_909, UInt<14>(12403)) - node T_911 = and(UInt<15>(28799), ctrl.inst) - node T_912 = eq(T_911, UInt<15>(20595)) - node T_913 = and(UInt<15>(28799), ctrl.inst) - node T_914 = eq(T_913, UInt<15>(24691)) - node T_915 = and(UInt<15>(28799), ctrl.inst) - node T_916 = eq(T_915, UInt<15>(28787)) - node T_917 = mux(T_916, UInt<1>(0), UInt<1>(0)) - node T_918 = mux(T_914, UInt<1>(0), T_917) - node T_919 = mux(T_912, UInt<1>(0), T_918) - node T_920 = mux(T_910, UInt<1>(0), T_919) - node T_921 = mux(T_908, UInt<1>(0), T_920) - node T_922 = mux(T_906, UInt<1>(0), T_921) - node T_923 = mux(T_904, UInt<1>(0), T_922) - node T_924 = mux(T_902, UInt<1>(0), T_923) - node T_925 = mux(T_900, UInt<1>(0), T_924) - node T_926 = mux(T_898, UInt<1>(0), T_925) - node T_927 = mux(T_896, UInt<1>(0), T_926) - node T_928 = mux(T_894, UInt<1>(0), T_927) - node T_929 = mux(T_892, UInt<1>(0), T_928) - node T_930 = mux(T_890, UInt<1>(0), T_929) - node T_931 = mux(T_888, UInt<1>(0), T_930) - node T_932 = mux(T_886, UInt<1>(0), T_931) - node T_933 = mux(T_884, UInt<1>(0), T_932) - node T_934 = mux(T_882, UInt<1>(0), T_933) - node T_935 = mux(T_880, UInt<1>(0), T_934) - node T_936 = mux(T_878, UInt<1>(0), T_935) - node T_937 = mux(T_876, UInt<1>(0), T_936) - node T_938 = mux(T_874, UInt<1>(0), T_937) - node T_939 = mux(T_872, UInt<1>(0), T_938) - node T_940 = mux(T_870, UInt<1>(0), T_939) - node T_941 = mux(T_868, UInt<1>(0), T_940) - node T_942 = mux(T_866, UInt<1>(0), T_941) - node T_943 = mux(T_864, UInt<1>(0), T_942) - node T_944 = mux(T_862, UInt<1>(0), T_943) - node T_945 = mux(T_860, UInt<1>(0), T_944) - node T_946 = mux(T_858, UInt<1>(0), T_945) - node T_947 = mux(T_856, UInt<1>(0), T_946) - node T_948 = mux(T_854, UInt<1>(0), T_947) - node T_949 = mux(T_852, UInt<1>(0), T_948) - node T_950 = mux(T_850, UInt<1>(0), T_949) - node T_951 = mux(T_848, UInt<1>(0), T_950) - node T_952 = mux(T_846, UInt<1>(0), T_951) - node T_953 = mux(T_844, UInt<1>(0), T_952) - node T_954 = mux(T_842, UInt<1>(0), T_953) - node T_955 = mux(T_840, UInt<1>(0), T_954) - node T_956 = mux(T_838, UInt<1>(1), T_955) - node T_957 = mux(T_836, UInt<1>(1), T_956) - node T_958 = mux(T_834, UInt<1>(0), T_957) - node T_959 = mux(T_832, UInt<1>(0), T_958) - node T_960 = mux(T_916, UInt<1>(1), UInt<1>(1)) - node T_961 = mux(T_914, UInt<1>(1), T_960) - node T_962 = mux(T_912, UInt<1>(1), T_961) - node T_963 = mux(T_910, UInt<1>(0), T_962) - node T_964 = mux(T_908, UInt<1>(0), T_963) - node T_965 = mux(T_906, UInt<1>(0), T_964) - node T_966 = mux(T_904, UInt<1>(0), T_965) - node T_967 = mux(T_902, UInt<1>(0), T_966) - node T_968 = mux(T_900, UInt<1>(0), T_967) - node T_969 = mux(T_898, UInt<1>(0), T_968) - node T_970 = mux(T_896, UInt<1>(0), T_969) - node T_971 = mux(T_894, UInt<1>(0), T_970) - node T_972 = mux(T_892, UInt<1>(0), T_971) - node T_973 = mux(T_890, UInt<1>(0), T_972) - node T_974 = mux(T_888, UInt<1>(0), T_973) - node T_975 = mux(T_886, UInt<1>(0), T_974) - node T_976 = mux(T_884, UInt<1>(0), T_975) - node T_977 = mux(T_882, UInt<1>(0), T_976) - node T_978 = mux(T_880, UInt<1>(0), T_977) - node T_979 = mux(T_878, UInt<1>(0), T_978) - node T_980 = mux(T_876, UInt<1>(0), T_979) - node T_981 = mux(T_874, UInt<1>(0), T_980) - node T_982 = mux(T_872, UInt<1>(0), T_981) - node T_983 = mux(T_870, UInt<1>(0), T_982) - node T_984 = mux(T_868, UInt<1>(0), T_983) - node T_985 = mux(T_866, UInt<1>(0), T_984) - node T_986 = mux(T_864, UInt<1>(0), T_985) - node T_987 = mux(T_862, UInt<1>(0), T_986) - node T_988 = mux(T_860, UInt<1>(0), T_987) - node T_989 = mux(T_858, UInt<1>(0), T_988) - node T_990 = mux(T_856, UInt<1>(0), T_989) - node T_991 = mux(T_854, UInt<1>(0), T_990) - node T_992 = mux(T_852, UInt<1>(0), T_991) - node T_993 = mux(T_850, UInt<1>(1), T_992) - node T_994 = mux(T_848, UInt<1>(1), T_993) - node T_995 = mux(T_846, UInt<1>(1), T_994) - node T_996 = mux(T_844, UInt<1>(1), T_995) - node T_997 = mux(T_842, UInt<1>(1), T_996) - node T_998 = mux(T_840, UInt<1>(1), T_997) - node T_999 = mux(T_838, UInt<1>(0), T_998) - node T_1000 = mux(T_836, UInt<1>(1), T_999) - node T_1001 = mux(T_834, UInt<1>(1), T_1000) - node T_1002 = mux(T_832, UInt<1>(1), T_1001) - node T_1003 = mux(T_916, UInt<1>(1), UInt<1>(0)) - node T_1004 = mux(T_914, UInt<1>(1), T_1003) - node T_1005 = mux(T_912, UInt<1>(1), T_1004) - node T_1006 = mux(T_910, UInt<1>(0), T_1005) - node T_1007 = mux(T_908, UInt<1>(0), T_1006) - node T_1008 = mux(T_906, UInt<1>(0), T_1007) - node T_1009 = mux(T_904, UInt<1>(0), T_1008) - node T_1010 = mux(T_902, UInt<1>(0), T_1009) - node T_1011 = mux(T_900, UInt<1>(0), T_1010) - node T_1012 = mux(T_898, UInt<1>(0), T_1011) - node T_1013 = mux(T_896, UInt<1>(0), T_1012) - node T_1014 = mux(T_894, UInt<1>(0), T_1013) - node T_1015 = mux(T_892, UInt<1>(0), T_1014) - node T_1016 = mux(T_890, UInt<1>(0), T_1015) - node T_1017 = mux(T_888, UInt<1>(0), T_1016) - node T_1018 = mux(T_886, UInt<1>(0), T_1017) - node T_1019 = mux(T_884, UInt<1>(1), T_1018) - node T_1020 = mux(T_882, UInt<1>(1), T_1019) - node T_1021 = mux(T_880, UInt<1>(1), T_1020) - node T_1022 = mux(T_878, UInt<1>(1), T_1021) - node T_1023 = mux(T_876, UInt<1>(1), T_1022) - node T_1024 = mux(T_874, UInt<1>(1), T_1023) - node T_1025 = mux(T_872, UInt<1>(1), T_1024) - node T_1026 = mux(T_870, UInt<1>(1), T_1025) - node T_1027 = mux(T_868, UInt<1>(1), T_1026) - node T_1028 = mux(T_866, UInt<1>(1), T_1027) - node T_1029 = mux(T_864, UInt<1>(1), T_1028) - node T_1030 = mux(T_862, UInt<1>(1), T_1029) - node T_1031 = mux(T_860, UInt<1>(1), T_1030) - node T_1032 = mux(T_858, UInt<1>(1), T_1031) - node T_1033 = mux(T_856, UInt<1>(1), T_1032) - node T_1034 = mux(T_854, UInt<1>(1), T_1033) - node T_1035 = mux(T_852, UInt<1>(1), T_1034) - node T_1036 = mux(T_850, UInt<1>(1), T_1035) - node T_1037 = mux(T_848, UInt<1>(1), T_1036) - node T_1038 = mux(T_846, UInt<1>(1), T_1037) - node T_1039 = mux(T_844, UInt<1>(1), T_1038) - node T_1040 = mux(T_842, UInt<1>(1), T_1039) - node T_1041 = mux(T_840, UInt<1>(1), T_1040) - node T_1042 = mux(T_838, UInt<1>(1), T_1041) - node T_1043 = mux(T_836, UInt<1>(1), T_1042) - node T_1044 = mux(T_834, UInt<1>(1), T_1043) - node T_1045 = mux(T_832, UInt<1>(1), T_1044) - node T_1046 = mux(T_916, UInt<3>(5), UInt<3>(7)) - node T_1047 = mux(T_914, UInt<3>(5), T_1046) - node T_1048 = mux(T_912, UInt<3>(5), T_1047) - node T_1049 = mux(T_910, UInt<3>(5), T_1048) - node T_1050 = mux(T_908, UInt<3>(5), T_1049) - node T_1051 = mux(T_906, UInt<3>(5), T_1050) - node T_1052 = mux(T_904, UInt<3>(7), T_1051) - node T_1053 = mux(T_902, UInt<3>(7), T_1052) - node T_1054 = mux(T_900, UInt<3>(7), T_1053) - node T_1055 = mux(T_898, UInt<3>(7), T_1054) - node T_1056 = mux(T_896, UInt<3>(7), T_1055) - node T_1057 = mux(T_894, UInt<3>(7), T_1056) - node T_1058 = mux(T_892, UInt<3>(7), T_1057) - node T_1059 = mux(T_890, UInt<3>(7), T_1058) - node T_1060 = mux(T_888, UInt<3>(7), T_1059) - node T_1061 = mux(T_886, UInt<3>(7), T_1060) - node T_1062 = mux(T_884, UInt<3>(0), T_1061) - node T_1063 = mux(T_882, UInt<3>(0), T_1062) - node T_1064 = mux(T_880, UInt<3>(0), T_1063) - node T_1065 = mux(T_878, UInt<3>(0), T_1064) - node T_1066 = mux(T_876, UInt<3>(0), T_1065) - node T_1067 = mux(T_874, UInt<3>(0), T_1066) - node T_1068 = mux(T_872, UInt<3>(0), T_1067) - node T_1069 = mux(T_870, UInt<3>(0), T_1068) - node T_1070 = mux(T_868, UInt<3>(0), T_1069) - node T_1071 = mux(T_866, UInt<3>(1), T_1070) - node T_1072 = mux(T_864, UInt<3>(1), T_1071) - node T_1073 = mux(T_862, UInt<3>(1), T_1072) - node T_1074 = mux(T_860, UInt<3>(0), T_1073) - node T_1075 = mux(T_858, UInt<3>(0), T_1074) - node T_1076 = mux(T_856, UInt<3>(0), T_1075) - node T_1077 = mux(T_854, UInt<3>(0), T_1076) - node T_1078 = mux(T_852, UInt<3>(0), T_1077) - node T_1079 = mux(T_850, UInt<3>(4), T_1078) - node T_1080 = mux(T_848, UInt<3>(4), T_1079) - node T_1081 = mux(T_846, UInt<3>(4), T_1080) - node T_1082 = mux(T_844, UInt<3>(4), T_1081) - node T_1083 = mux(T_842, UInt<3>(4), T_1082) - node T_1084 = mux(T_840, UInt<3>(4), T_1083) - node T_1085 = mux(T_838, UInt<3>(0), T_1084) - node T_1086 = mux(T_836, UInt<3>(3), T_1085) - node T_1087 = mux(T_834, UInt<3>(2), T_1086) - node T_1088 = mux(T_832, UInt<3>(2), T_1087) - node T_1089 = mux(T_916, UInt<4>(11), UInt<4>(15)) - node T_1090 = mux(T_914, UInt<4>(11), T_1089) - node T_1091 = mux(T_912, UInt<4>(11), T_1090) - node T_1092 = mux(T_910, UInt<4>(10), T_1091) - node T_1093 = mux(T_908, UInt<4>(10), T_1092) - node T_1094 = mux(T_906, UInt<4>(10), T_1093) - node T_1095 = mux(T_904, UInt<4>(2), T_1094) - node T_1096 = mux(T_902, UInt<4>(3), T_1095) - node T_1097 = mux(T_900, UInt<4>(9), T_1096) - node T_1098 = mux(T_898, UInt<4>(8), T_1097) - node T_1099 = mux(T_896, UInt<4>(4), T_1098) - node T_1100 = mux(T_894, UInt<4>(7), T_1099) - node T_1101 = mux(T_892, UInt<4>(5), T_1100) - node T_1102 = mux(T_890, UInt<4>(6), T_1101) - node T_1103 = mux(T_888, UInt<4>(1), T_1102) - node T_1104 = mux(T_886, UInt<4>(0), T_1103) - node T_1105 = mux(T_884, UInt<4>(9), T_1104) - node T_1106 = mux(T_882, UInt<4>(8), T_1105) - node T_1107 = mux(T_880, UInt<4>(6), T_1106) - node T_1108 = mux(T_878, UInt<4>(2), T_1107) - node T_1109 = mux(T_876, UInt<4>(3), T_1108) - node T_1110 = mux(T_874, UInt<4>(4), T_1109) - node T_1111 = mux(T_872, UInt<4>(7), T_1110) - node T_1112 = mux(T_870, UInt<4>(5), T_1111) - node T_1113 = mux(T_868, UInt<4>(0), T_1112) - node T_1114 = mux(T_866, UInt<4>(0), T_1113) - node T_1115 = mux(T_864, UInt<4>(0), T_1114) - node T_1116 = mux(T_862, UInt<4>(0), T_1115) - node T_1117 = mux(T_860, UInt<4>(0), T_1116) - node T_1118 = mux(T_858, UInt<4>(0), T_1117) - node T_1119 = mux(T_856, UInt<4>(0), T_1118) - node T_1120 = mux(T_854, UInt<4>(0), T_1119) - node T_1121 = mux(T_852, UInt<4>(0), T_1120) - node T_1122 = mux(T_850, UInt<4>(0), T_1121) - node T_1123 = mux(T_848, UInt<4>(0), T_1122) - node T_1124 = mux(T_846, UInt<4>(0), T_1123) - node T_1125 = mux(T_844, UInt<4>(0), T_1124) - node T_1126 = mux(T_842, UInt<4>(0), T_1125) - node T_1127 = mux(T_840, UInt<4>(0), T_1126) - node T_1128 = mux(T_838, UInt<4>(0), T_1127) - node T_1129 = mux(T_836, UInt<4>(0), T_1128) - node T_1130 = mux(T_834, UInt<4>(0), T_1129) - node T_1131 = mux(T_832, UInt<4>(11), T_1130) - node T_1132 = mux(T_916, UInt<3>(7), UInt<3>(7)) - node T_1133 = mux(T_914, UInt<3>(7), T_1132) - node T_1134 = mux(T_912, UInt<3>(7), T_1133) - node T_1135 = mux(T_910, UInt<3>(7), T_1134) - node T_1136 = mux(T_908, UInt<3>(7), T_1135) - node T_1137 = mux(T_906, UInt<3>(7), T_1136) - node T_1138 = mux(T_904, UInt<3>(7), T_1137) - node T_1139 = mux(T_902, UInt<3>(7), T_1138) - node T_1140 = mux(T_900, UInt<3>(7), T_1139) - node T_1141 = mux(T_898, UInt<3>(7), T_1140) - node T_1142 = mux(T_896, UInt<3>(7), T_1141) - node T_1143 = mux(T_894, UInt<3>(7), T_1142) - node T_1144 = mux(T_892, UInt<3>(7), T_1143) - node T_1145 = mux(T_890, UInt<3>(7), T_1144) - node T_1146 = mux(T_888, UInt<3>(7), T_1145) - node T_1147 = mux(T_886, UInt<3>(7), T_1146) - node T_1148 = mux(T_884, UInt<3>(7), T_1147) - node T_1149 = mux(T_882, UInt<3>(7), T_1148) - node T_1150 = mux(T_880, UInt<3>(7), T_1149) - node T_1151 = mux(T_878, UInt<3>(7), T_1150) - node T_1152 = mux(T_876, UInt<3>(7), T_1151) - node T_1153 = mux(T_874, UInt<3>(7), T_1152) - node T_1154 = mux(T_872, UInt<3>(7), T_1153) - node T_1155 = mux(T_870, UInt<3>(7), T_1154) - node T_1156 = mux(T_868, UInt<3>(7), T_1155) - node T_1157 = mux(T_866, UInt<3>(7), T_1156) - node T_1158 = mux(T_864, UInt<3>(7), T_1157) - node T_1159 = mux(T_862, UInt<3>(7), T_1158) - node T_1160 = mux(T_860, UInt<3>(7), T_1159) - node T_1161 = mux(T_858, UInt<3>(7), T_1160) - node T_1162 = mux(T_856, UInt<3>(7), T_1161) - node T_1163 = mux(T_854, UInt<3>(7), T_1162) - node T_1164 = mux(T_852, UInt<3>(7), T_1163) - node T_1165 = mux(T_850, UInt<3>(4), T_1164) - node T_1166 = mux(T_848, UInt<3>(0), T_1165) - node T_1167 = mux(T_846, UInt<3>(5), T_1166) - node T_1168 = mux(T_844, UInt<3>(1), T_1167) - node T_1169 = mux(T_842, UInt<3>(6), T_1168) - node T_1170 = mux(T_840, UInt<3>(2), T_1169) - node T_1171 = mux(T_838, UInt<3>(7), T_1170) - node T_1172 = mux(T_836, UInt<3>(7), T_1171) - node T_1173 = mux(T_834, UInt<3>(7), T_1172) - node T_1174 = mux(T_832, UInt<3>(7), T_1173) - node T_1175 = mux(T_916, UInt<1>(0), UInt<1>(0)) - node T_1176 = mux(T_914, UInt<1>(0), T_1175) - node T_1177 = mux(T_912, UInt<1>(0), T_1176) - node T_1178 = mux(T_910, UInt<1>(0), T_1177) - node T_1179 = mux(T_908, UInt<1>(0), T_1178) - node T_1180 = mux(T_906, UInt<1>(0), T_1179) - node T_1181 = mux(T_904, UInt<1>(0), T_1180) - node T_1182 = mux(T_902, UInt<1>(0), T_1181) - node T_1183 = mux(T_900, UInt<1>(0), T_1182) - node T_1184 = mux(T_898, UInt<1>(0), T_1183) - node T_1185 = mux(T_896, UInt<1>(0), T_1184) - node T_1186 = mux(T_894, UInt<1>(0), T_1185) - node T_1187 = mux(T_892, UInt<1>(0), T_1186) - node T_1188 = mux(T_890, UInt<1>(0), T_1187) - node T_1189 = mux(T_888, UInt<1>(0), T_1188) - node T_1190 = mux(T_886, UInt<1>(0), T_1189) - node T_1191 = mux(T_884, UInt<1>(0), T_1190) - node T_1192 = mux(T_882, UInt<1>(0), T_1191) - node T_1193 = mux(T_880, UInt<1>(0), T_1192) - node T_1194 = mux(T_878, UInt<1>(0), T_1193) - node T_1195 = mux(T_876, UInt<1>(0), T_1194) - node T_1196 = mux(T_874, UInt<1>(0), T_1195) - node T_1197 = mux(T_872, UInt<1>(0), T_1196) - node T_1198 = mux(T_870, UInt<1>(0), T_1197) - node T_1199 = mux(T_868, UInt<1>(0), T_1198) - node T_1200 = mux(T_866, UInt<1>(0), T_1199) - node T_1201 = mux(T_864, UInt<1>(0), T_1200) - node T_1202 = mux(T_862, UInt<1>(0), T_1201) - node T_1203 = mux(T_860, UInt<1>(0), T_1202) - node T_1204 = mux(T_858, UInt<1>(0), T_1203) - node T_1205 = mux(T_856, UInt<1>(0), T_1204) - node T_1206 = mux(T_854, UInt<1>(0), T_1205) - node T_1207 = mux(T_852, UInt<1>(0), T_1206) - node T_1208 = mux(T_850, UInt<1>(0), T_1207) - node T_1209 = mux(T_848, UInt<1>(0), T_1208) - node T_1210 = mux(T_846, UInt<1>(0), T_1209) - node T_1211 = mux(T_844, UInt<1>(0), T_1210) - node T_1212 = mux(T_842, UInt<1>(0), T_1211) - node T_1213 = mux(T_840, UInt<1>(0), T_1212) - node T_1214 = mux(T_838, UInt<1>(1), T_1213) - node T_1215 = mux(T_836, UInt<1>(1), T_1214) - node T_1216 = mux(T_834, UInt<1>(0), T_1215) - node T_1217 = mux(T_832, UInt<1>(0), T_1216) - node T_1218 = mux(T_916, UInt<2>(3), UInt<2>(3)) - node T_1219 = mux(T_914, UInt<2>(3), T_1218) - node T_1220 = mux(T_912, UInt<2>(3), T_1219) - node T_1221 = mux(T_910, UInt<2>(3), T_1220) - node T_1222 = mux(T_908, UInt<2>(3), T_1221) - node T_1223 = mux(T_906, UInt<2>(3), T_1222) - node T_1224 = mux(T_904, UInt<2>(3), T_1223) - node T_1225 = mux(T_902, UInt<2>(3), T_1224) - node T_1226 = mux(T_900, UInt<2>(3), T_1225) - node T_1227 = mux(T_898, UInt<2>(3), T_1226) - node T_1228 = mux(T_896, UInt<2>(3), T_1227) - node T_1229 = mux(T_894, UInt<2>(3), T_1228) - node T_1230 = mux(T_892, UInt<2>(3), T_1229) - node T_1231 = mux(T_890, UInt<2>(3), T_1230) - node T_1232 = mux(T_888, UInt<2>(3), T_1231) - node T_1233 = mux(T_886, UInt<2>(3), T_1232) - node T_1234 = mux(T_884, UInt<2>(3), T_1233) - node T_1235 = mux(T_882, UInt<2>(3), T_1234) - node T_1236 = mux(T_880, UInt<2>(3), T_1235) - node T_1237 = mux(T_878, UInt<2>(3), T_1236) - node T_1238 = mux(T_876, UInt<2>(3), T_1237) - node T_1239 = mux(T_874, UInt<2>(3), T_1238) - node T_1240 = mux(T_872, UInt<2>(3), T_1239) - node T_1241 = mux(T_870, UInt<2>(3), T_1240) - node T_1242 = mux(T_868, UInt<2>(3), T_1241) - node T_1243 = mux(T_866, UInt<2>(0), T_1242) - node T_1244 = mux(T_864, UInt<2>(1), T_1243) - node T_1245 = mux(T_862, UInt<2>(2), T_1244) - node T_1246 = mux(T_860, UInt<2>(3), T_1245) - node T_1247 = mux(T_858, UInt<2>(3), T_1246) - node T_1248 = mux(T_856, UInt<2>(3), T_1247) - node T_1249 = mux(T_854, UInt<2>(3), T_1248) - node T_1250 = mux(T_852, UInt<2>(3), T_1249) - node T_1251 = mux(T_850, UInt<2>(3), T_1250) - node T_1252 = mux(T_848, UInt<2>(3), T_1251) - node T_1253 = mux(T_846, UInt<2>(3), T_1252) - node T_1254 = mux(T_844, UInt<2>(3), T_1253) - node T_1255 = mux(T_842, UInt<2>(3), T_1254) - node T_1256 = mux(T_840, UInt<2>(3), T_1255) - node T_1257 = mux(T_838, UInt<2>(3), T_1256) - node T_1258 = mux(T_836, UInt<2>(3), T_1257) - node T_1259 = mux(T_834, UInt<2>(3), T_1258) - node T_1260 = mux(T_832, UInt<2>(3), T_1259) - node T_1261 = mux(T_916, UInt<3>(7), UInt<3>(7)) - node T_1262 = mux(T_914, UInt<3>(7), T_1261) - node T_1263 = mux(T_912, UInt<3>(7), T_1262) - node T_1264 = mux(T_910, UInt<3>(7), T_1263) - node T_1265 = mux(T_908, UInt<3>(7), T_1264) - node T_1266 = mux(T_906, UInt<3>(7), T_1265) - node T_1267 = mux(T_904, UInt<3>(7), T_1266) - node T_1268 = mux(T_902, UInt<3>(7), T_1267) - node T_1269 = mux(T_900, UInt<3>(7), T_1268) - node T_1270 = mux(T_898, UInt<3>(7), T_1269) - node T_1271 = mux(T_896, UInt<3>(7), T_1270) - node T_1272 = mux(T_894, UInt<3>(7), T_1271) - node T_1273 = mux(T_892, UInt<3>(7), T_1272) - node T_1274 = mux(T_890, UInt<3>(7), T_1273) - node T_1275 = mux(T_888, UInt<3>(7), T_1274) - node T_1276 = mux(T_886, UInt<3>(7), T_1275) - node T_1277 = mux(T_884, UInt<3>(7), T_1276) - node T_1278 = mux(T_882, UInt<3>(7), T_1277) - node T_1279 = mux(T_880, UInt<3>(7), T_1278) - node T_1280 = mux(T_878, UInt<3>(7), T_1279) - node T_1281 = mux(T_876, UInt<3>(7), T_1280) - node T_1282 = mux(T_874, UInt<3>(7), T_1281) - node T_1283 = mux(T_872, UInt<3>(7), T_1282) - node T_1284 = mux(T_870, UInt<3>(7), T_1283) - node T_1285 = mux(T_868, UInt<3>(7), T_1284) - node T_1286 = mux(T_866, UInt<3>(7), T_1285) - node T_1287 = mux(T_864, UInt<3>(7), T_1286) - node T_1288 = mux(T_862, UInt<3>(7), T_1287) - node T_1289 = mux(T_860, UInt<3>(3), T_1288) - node T_1290 = mux(T_858, UInt<3>(4), T_1289) - node T_1291 = mux(T_856, UInt<3>(0), T_1290) - node T_1292 = mux(T_854, UInt<3>(1), T_1291) - node T_1293 = mux(T_852, UInt<3>(2), T_1292) - node T_1294 = mux(T_850, UInt<3>(7), T_1293) - node T_1295 = mux(T_848, UInt<3>(7), T_1294) - node T_1296 = mux(T_846, UInt<3>(7), T_1295) - node T_1297 = mux(T_844, UInt<3>(7), T_1296) - node T_1298 = mux(T_842, UInt<3>(7), T_1297) - node T_1299 = mux(T_840, UInt<3>(7), T_1298) - node T_1300 = mux(T_838, UInt<3>(7), T_1299) - node T_1301 = mux(T_836, UInt<3>(7), T_1300) - node T_1302 = mux(T_834, UInt<3>(7), T_1301) - node T_1303 = mux(T_832, UInt<3>(7), T_1302) - node T_1304 = mux(T_916, UInt<2>(3), UInt<2>(0)) - node T_1305 = mux(T_914, UInt<2>(3), T_1304) - node T_1306 = mux(T_912, UInt<2>(3), T_1305) - node T_1307 = mux(T_910, UInt<2>(3), T_1306) - node T_1308 = mux(T_908, UInt<2>(3), T_1307) - node T_1309 = mux(T_906, UInt<2>(3), T_1308) - node T_1310 = mux(T_904, UInt<2>(0), T_1309) - node T_1311 = mux(T_902, UInt<2>(0), T_1310) - node T_1312 = mux(T_900, UInt<2>(0), T_1311) - node T_1313 = mux(T_898, UInt<2>(0), T_1312) - node T_1314 = mux(T_896, UInt<2>(0), T_1313) - node T_1315 = mux(T_894, UInt<2>(0), T_1314) - node T_1316 = mux(T_892, UInt<2>(0), T_1315) - node T_1317 = mux(T_890, UInt<2>(0), T_1316) - node T_1318 = mux(T_888, UInt<2>(0), T_1317) - node T_1319 = mux(T_886, UInt<2>(0), T_1318) - node T_1320 = mux(T_884, UInt<2>(0), T_1319) - node T_1321 = mux(T_882, UInt<2>(0), T_1320) - node T_1322 = mux(T_880, UInt<2>(0), T_1321) - node T_1323 = mux(T_878, UInt<2>(0), T_1322) - node T_1324 = mux(T_876, UInt<2>(0), T_1323) - node T_1325 = mux(T_874, UInt<2>(0), T_1324) - node T_1326 = mux(T_872, UInt<2>(0), T_1325) - node T_1327 = mux(T_870, UInt<2>(0), T_1326) - node T_1328 = mux(T_868, UInt<2>(0), T_1327) - node T_1329 = mux(T_866, UInt<2>(0), T_1328) - node T_1330 = mux(T_864, UInt<2>(0), T_1329) - node T_1331 = mux(T_862, UInt<2>(0), T_1330) - node T_1332 = mux(T_860, UInt<2>(1), T_1331) - node T_1333 = mux(T_858, UInt<2>(1), T_1332) - node T_1334 = mux(T_856, UInt<2>(1), T_1333) - node T_1335 = mux(T_854, UInt<2>(1), T_1334) - node T_1336 = mux(T_852, UInt<2>(1), T_1335) - node T_1337 = mux(T_850, UInt<2>(0), T_1336) - node T_1338 = mux(T_848, UInt<2>(0), T_1337) - node T_1339 = mux(T_846, UInt<2>(0), T_1338) - node T_1340 = mux(T_844, UInt<2>(0), T_1339) - node T_1341 = mux(T_842, UInt<2>(0), T_1340) - node T_1342 = mux(T_840, UInt<2>(0), T_1341) - node T_1343 = mux(T_838, UInt<2>(2), T_1342) - node T_1344 = mux(T_836, UInt<2>(2), T_1343) - node T_1345 = mux(T_834, UInt<2>(0), T_1344) - node T_1346 = mux(T_832, UInt<2>(0), T_1345) - node T_1347 = mux(T_916, UInt<1>(0), UInt<1>(0)) - node T_1348 = mux(T_914, UInt<1>(0), T_1347) - node T_1349 = mux(T_912, UInt<1>(0), T_1348) - node T_1350 = mux(T_910, UInt<1>(0), T_1349) - node T_1351 = mux(T_908, UInt<1>(0), T_1350) - node T_1352 = mux(T_906, UInt<1>(0), T_1351) - node T_1353 = mux(T_904, UInt<1>(1), T_1352) - node T_1354 = mux(T_902, UInt<1>(1), T_1353) - node T_1355 = mux(T_900, UInt<1>(1), T_1354) - node T_1356 = mux(T_898, UInt<1>(1), T_1355) - node T_1357 = mux(T_896, UInt<1>(1), T_1356) - node T_1358 = mux(T_894, UInt<1>(1), T_1357) - node T_1359 = mux(T_892, UInt<1>(1), T_1358) - node T_1360 = mux(T_890, UInt<1>(1), T_1359) - node T_1361 = mux(T_888, UInt<1>(1), T_1360) - node T_1362 = mux(T_886, UInt<1>(1), T_1361) - node T_1363 = mux(T_884, UInt<1>(1), T_1362) - node T_1364 = mux(T_882, UInt<1>(1), T_1363) - node T_1365 = mux(T_880, UInt<1>(1), T_1364) - node T_1366 = mux(T_878, UInt<1>(1), T_1365) - node T_1367 = mux(T_876, UInt<1>(1), T_1366) - node T_1368 = mux(T_874, UInt<1>(1), T_1367) - node T_1369 = mux(T_872, UInt<1>(1), T_1368) - node T_1370 = mux(T_870, UInt<1>(1), T_1369) - node T_1371 = mux(T_868, UInt<1>(1), T_1370) - node T_1372 = mux(T_866, UInt<1>(0), T_1371) - node T_1373 = mux(T_864, UInt<1>(0), T_1372) - node T_1374 = mux(T_862, UInt<1>(0), T_1373) - node T_1375 = mux(T_860, UInt<1>(1), T_1374) - node T_1376 = mux(T_858, UInt<1>(1), T_1375) - node T_1377 = mux(T_856, UInt<1>(1), T_1376) - node T_1378 = mux(T_854, UInt<1>(1), T_1377) - node T_1379 = mux(T_852, UInt<1>(1), T_1378) - node T_1380 = mux(T_850, UInt<1>(0), T_1379) - node T_1381 = mux(T_848, UInt<1>(0), T_1380) - node T_1382 = mux(T_846, UInt<1>(0), T_1381) - node T_1383 = mux(T_844, UInt<1>(0), T_1382) - node T_1384 = mux(T_842, UInt<1>(0), T_1383) - node T_1385 = mux(T_840, UInt<1>(0), T_1384) - node T_1386 = mux(T_838, UInt<1>(1), T_1385) - node T_1387 = mux(T_836, UInt<1>(1), T_1386) - node T_1388 = mux(T_834, UInt<1>(1), T_1387) - node T_1389 = mux(T_832, UInt<1>(1), T_1388) - node T_1390 = mux(T_916, UInt<2>(3), UInt<2>(0)) - node T_1391 = mux(T_914, UInt<2>(2), T_1390) - node T_1392 = mux(T_912, UInt<2>(1), T_1391) - node T_1393 = mux(T_910, UInt<2>(3), T_1392) - node T_1394 = mux(T_908, UInt<2>(2), T_1393) - node T_1395 = mux(T_906, UInt<2>(1), T_1394) - node T_1396 = mux(T_904, UInt<2>(0), T_1395) - node T_1397 = mux(T_902, UInt<2>(0), T_1396) - node T_1398 = mux(T_900, UInt<2>(0), T_1397) - node T_1399 = mux(T_898, UInt<2>(0), T_1398) - node T_1400 = mux(T_896, UInt<2>(0), T_1399) - node T_1401 = mux(T_894, UInt<2>(0), T_1400) - node T_1402 = mux(T_892, UInt<2>(0), T_1401) - node T_1403 = mux(T_890, UInt<2>(0), T_1402) - node T_1404 = mux(T_888, UInt<2>(0), T_1403) - node T_1405 = mux(T_886, UInt<2>(0), T_1404) - node T_1406 = mux(T_884, UInt<2>(0), T_1405) - node T_1407 = mux(T_882, UInt<2>(0), T_1406) - node T_1408 = mux(T_880, UInt<2>(0), T_1407) - node T_1409 = mux(T_878, UInt<2>(0), T_1408) - node T_1410 = mux(T_876, UInt<2>(0), T_1409) - node T_1411 = mux(T_874, UInt<2>(0), T_1410) - node T_1412 = mux(T_872, UInt<2>(0), T_1411) - node T_1413 = mux(T_870, UInt<2>(0), T_1412) - node T_1414 = mux(T_868, UInt<2>(0), T_1413) - node T_1415 = mux(T_866, UInt<2>(0), T_1414) - node T_1416 = mux(T_864, UInt<2>(0), T_1415) - node T_1417 = mux(T_862, UInt<2>(0), T_1416) - node T_1418 = mux(T_860, UInt<2>(0), T_1417) - node T_1419 = mux(T_858, UInt<2>(0), T_1418) - node T_1420 = mux(T_856, UInt<2>(0), T_1419) - node T_1421 = mux(T_854, UInt<2>(0), T_1420) - node T_1422 = mux(T_852, UInt<2>(0), T_1421) - node T_1423 = mux(T_850, UInt<2>(0), T_1422) - node T_1424 = mux(T_848, UInt<2>(0), T_1423) - node T_1425 = mux(T_846, UInt<2>(0), T_1424) - node T_1426 = mux(T_844, UInt<2>(0), T_1425) - node T_1427 = mux(T_842, UInt<2>(0), T_1426) - node T_1428 = mux(T_840, UInt<2>(0), T_1427) - node T_1429 = mux(T_838, UInt<2>(0), T_1428) - node T_1430 = mux(T_836, UInt<2>(0), T_1429) - node T_1431 = mux(T_834, UInt<2>(0), T_1430) - node T_1432 = mux(T_832, UInt<2>(0), T_1431) - node rs1_addr = bits(ctrl.inst, 19, 15) - node rs2_addr = bits(ctrl.inst, 24, 20) - reg st_type : UInt<2>, clk, reset - reg ld_type : UInt<3>, clk, reset - reg wb_sel : UInt<2>, clk, reset - node T_1433 = bit(T_1389, 0) - reg wb_en : UInt<1>, clk, reset - reg csr_cmd : UInt<2>, clk, reset - ctrl.pc_sel := T_959 - node T_1434 = not(ctrl.stall) - node T_1435 = not(ctrl.data_re) - node T_1436 = and(T_1434, T_1435) - ctrl.inst_re := T_1436 - node T_1437 = neq(T_1303, UInt<3>(7)) - node T_1438 = bit(T_1217, 0) - node T_1439 = or(T_1437, T_1438) - node T_1440 = mux(T_1439, UInt<1>(1), UInt<1>(0)) - ctrl.inst_type := T_1440 - ctrl.A_sel := T_1002 - ctrl.B_sel := T_1045 - ctrl.imm_sel := T_1088 - ctrl.alu_op := T_1131 - ctrl.br_type := T_1174 - ctrl.st_type := T_1260 - node T_1441 = not(ctrl.stall) - when T_1441 : - st_type := ctrl.st_type - ld_type := T_1303 - wb_sel := T_1346 - node T_1442 = bit(T_1389, 0) - wb_en := T_1442 - csr_cmd := T_1432 - node T_1443 = neq(ctrl.ld_type, UInt<3>(7)) - node T_1444 = neq(T_1303, UInt<3>(7)) - node T_1445 = mux(ctrl.stall, T_1443, T_1444) - ctrl.data_re := T_1445 - ctrl.ld_type := ld_type - ctrl.wb_en := wb_en - ctrl.wb_sel := wb_sel - ctrl.csr_cmd := csr_cmd - module Core : - output host : {status : UInt<32>, flip hid : UInt<1>, tohost : UInt<32>} - output icache : {re : UInt<1>, addr : UInt<32>, flip dout : UInt<32>, we : UInt<4>, din : UInt<32>} - output dcache : {re : UInt<1>, addr : UInt<32>, flip dout : UInt<32>, we : UInt<4>, din : UInt<32>} - input stall : UInt<1> - input clk : Clock - input reset : UInt<1> - - inst dpath of Datapath - dpath.clk := clk - dpath.reset := reset - inst ctrl of Control - ctrl.clk := clk - ctrl.reset := reset - host := dpath.host - icache := dpath.icache - dcache := dpath.dcache - dpath.ctrl := ctrl.ctrl - dpath.stall := stall diff --git a/test/chisel3/Counter.fir b/test/chisel3/Counter.fir deleted file mode 100644 index 0f80f687..00000000 --- a/test/chisel3/Counter.fir +++ /dev/null @@ -1,17 +0,0 @@ -; RUN: firrtl -i %s -o %s.v -X verilog -p c | tee %s.out | FileCheck %s -;CHECK: Done! - -circuit Counter : - module Counter : - input inc : UInt<1> - output tot : UInt<8> - input amt : UInt<4> - - reg T_13 : UInt<8> - on-reset T_13 := UInt<8>(0) - when inc : - node T_14 = add-wrap(T_13, amt) - node T_15 = gt(T_14, UInt<8>(255)) - node T_16 = mux(T_15, UInt<1>(0), T_14) - T_13 := T_16 - tot := T_13 diff --git a/test/chisel3/Datapath.fir b/test/chisel3/Datapath.fir deleted file mode 100644 index 1315041a..00000000 --- a/test/chisel3/Datapath.fir +++ /dev/null @@ -1,373 +0,0 @@ -; RUN: firrtl -i %s -o %s.v -X verilog -p c | tee %s.out | FileCheck %s -;CHECK: Done! - -circuit Datapath : - module ALU : - input B : UInt<32> - output out : UInt<32> - output sum : UInt<32> - input A : UInt<32> - input alu_op : UInt<4> - - node shamt = bits(B, 4, 0) - node T_433 = addw(A, B) - node T_434 = subw(A, B) - node T_435 = asSInt(A) - node T_436 = dshr(T_435, shamt) - node T_437 = asUInt(T_436) - node T_438 = dshr(A, shamt) - node T_439 = dshl(A, shamt) - node T_440 = bits(T_439, 31, 0) - node T_441 = asSInt(A) - node T_442 = asSInt(B) - node T_443 = lt(T_441, T_442) - node T_444 = asUInt(T_443) - node T_445 = lt(A, B) - node T_446 = asUInt(T_445) - node T_447 = and(A, B) - node T_448 = or(A, B) - node T_449 = xor(A, B) - node T_450 = eq(UInt<4>(10), alu_op) - node T_451 = mux(T_450, A, B) - node T_452 = eq(UInt<4>(4), alu_op) - node T_453 = mux(T_452, T_449, T_451) - node T_454 = eq(UInt<4>(3), alu_op) - node T_455 = mux(T_454, T_448, T_453) - node T_456 = eq(UInt<4>(2), alu_op) - node T_457 = mux(T_456, T_447, T_455) - node T_458 = eq(UInt<4>(7), alu_op) - node T_459 = mux(T_458, T_446, T_457) - node T_460 = eq(UInt<4>(5), alu_op) - node T_461 = mux(T_460, T_444, T_459) - node T_462 = eq(UInt<4>(6), alu_op) - node T_463 = mux(T_462, T_440, T_461) - node T_464 = eq(UInt<4>(8), alu_op) - node T_465 = mux(T_464, T_438, T_463) - node T_466 = eq(UInt<4>(9), alu_op) - node T_467 = mux(T_466, T_437, T_465) - node T_468 = eq(UInt<4>(1), alu_op) - node T_469 = mux(T_468, T_434, T_467) - node T_470 = eq(UInt<4>(0), alu_op) - node oot = mux(T_470, T_433, T_469) - node T_471 = bits(oot, 31, 0) - out := T_471 - node T_472 = bit(alu_op, 0) - node T_473 = subw(UInt<1>(0), B) - node T_474 = mux(T_472, T_473, B) - node T_475 = addw(A, T_474) - sum := T_475 - module BrCond : - input rs1 : UInt<32> - input rs2 : UInt<32> - output taken : UInt<1> - input br_type : UInt<3> - - node eq = eq(rs1, rs2) - node neq = not(eq) - node T_476 = asSInt(rs1) - node T_477 = asSInt(rs2) - node lt = lt(T_476, T_477) - node ge = not(lt) - node ltu = lt(rs1, rs2) - node geu = not(ltu) - node T_478 = eq(br_type, UInt<3>(2)) - node T_479 = and(T_478, eq) - node T_480 = eq(br_type, UInt<3>(6)) - node T_481 = and(T_480, neq) - node T_482 = or(T_479, T_481) - node T_483 = eq(br_type, UInt<3>(1)) - node T_484 = and(T_483, lt) - node T_485 = or(T_482, T_484) - node T_486 = eq(br_type, UInt<3>(5)) - node T_487 = and(T_486, ge) - node T_488 = or(T_485, T_487) - node T_489 = eq(br_type, UInt<3>(0)) - node T_490 = and(T_489, ltu) - node T_491 = or(T_488, T_490) - node T_492 = eq(br_type, UInt<3>(4)) - node T_493 = and(T_492, geu) - node T_494 = or(T_491, T_493) - taken := T_494 - module RegFile : - input clk : Clock - input raddr1 : UInt<5> - input raddr2 : UInt<5> - output rdata1 : UInt<32> - output rdata2 : UInt<32> - input wen : UInt<1> - input waddr : UInt<5> - input wdata : UInt<32> - - cmem regs : UInt<32>[32], clk - node T_495 = eq(raddr1, UInt<1>(0)) - node T_496 = not(T_495) - infer accessor T_497 = regs[raddr1] - node T_498 = mux(T_496, T_497, UInt<1>(0)) - rdata1 := T_498 - node T_499 = eq(raddr2, UInt<1>(0)) - node T_500 = not(T_499) - infer accessor T_501 = regs[raddr2] - node T_502 = mux(T_500, T_501, UInt<1>(0)) - rdata2 := T_502 - node T_503 = eq(waddr, UInt<1>(0)) - node T_504 = not(T_503) - node T_505 = and(wen, T_504) - when T_505 : - infer accessor T_506 = regs[waddr] - T_506 := wdata - module ImmGenWire : - output out : UInt<32> - input inst : UInt<32> - input sel : UInt<3> - - node T_507 = bits(inst, 31, 20) - node Iimm = asSInt(T_507) - node T_508 = bits(inst, 31, 25) - node T_509 = bits(inst, 11, 7) - node T_510 = cat(T_508, T_509) - node Simm = asSInt(T_510) - node T_511 = bit(inst, 31) - node T_512 = bit(inst, 7) - node T_513 = bits(inst, 30, 25) - node T_514 = bits(inst, 11, 8) - node T_515 = cat(T_511, T_512) - node T_516 = cat(T_514, UInt<1>(0)) - node T_517 = cat(T_513, T_516) - node T_518 = cat(T_515, T_517) - node Bimm = asSInt(T_518) - node T_519 = bits(inst, 31, 12) - node T_520 = cat(T_519, UInt<12>(0)) - node Uimm = asSInt(T_520) - node T_521 = bit(inst, 31) - node T_522 = bits(inst, 19, 12) - node T_523 = bit(inst, 20) - node T_524 = bits(inst, 30, 25) - node T_525 = bits(inst, 24, 21) - node T_526 = cat(T_522, T_523) - node T_527 = cat(T_521, T_526) - node T_528 = cat(T_525, UInt<1>(0)) - node T_529 = cat(T_524, T_528) - node T_530 = cat(T_527, T_529) - node Jimm = asSInt(T_530) - node T_531 = bits(inst, 19, 15) - node T_532 = pad(T_531, 32) - node Zimm = asSInt(T_532) - node T_533 = eq(UInt<3>(3), sel) - node T_534 = mux(T_533, Jimm, Zimm) - node T_535 = eq(UInt<3>(2), sel) - node T_536 = mux(T_535, Uimm, T_534) - node T_537 = eq(UInt<3>(4), sel) - node T_538 = mux(T_537, Bimm, T_536) - node T_539 = eq(UInt<3>(1), sel) - node T_540 = mux(T_539, Simm, T_538) - node T_541 = eq(UInt<3>(0), sel) - node T_542 = mux(T_541, Iimm, T_540) - node T_543 = asUInt(T_542) - out := T_543 - module CSR : - input clk : Clock - input reset : UInt<1> - output host : {status : UInt<32>, tohost : UInt<32>, flip hid : UInt<1>} - input src : UInt<32> - input cmd : UInt<2> - output data : UInt<32> - input addr : UInt<12> - - reg reg_tohost : UInt<32>, clk, reset - onreset reg_tohost := UInt<32>(0) - reg reg_status : UInt<32>, clk, reset - onreset reg_status := UInt<32>(0) - host.tohost := reg_tohost - host.status := reg_status - node T_544 = eq(UInt<12>(1291), addr) - node T_545 = mux(T_544, host.hid, UInt<1>(0)) - node T_546 = eq(UInt<12>(1290), addr) - node T_547 = mux(T_546, reg_status, T_545) - node T_548 = eq(UInt<12>(1310), addr) - node T_549 = mux(T_548, reg_tohost, T_547) - data := T_549 - node T_550 = eq(cmd, UInt<2>(1)) - when T_550 : - node T_551 = eq(addr, UInt<12>(1310)) - when T_551 : reg_tohost := src - node T_552 = eq(addr, UInt<12>(1290)) - when T_552 : reg_status := src - node T_553 = eq(cmd, UInt<2>(2)) - node T_554 = neq(src, UInt<1>(0)) - node T_555 = and(T_553, T_554) - when T_555 : - node T_556 = eq(addr, UInt<12>(1310)) - when T_556 : - node T_557 = dshl(UInt<1>(1), bits(src,5,0)) - node T_558 = or(data, T_557) - reg_tohost := T_558 - node T_559 = eq(addr, UInt<12>(1290)) - when T_559 : - node T_560 = dshl(UInt<1>(1), bits(src,5,0)) - node T_561 = or(data, T_560) - reg_status := T_561 - node T_562 = eq(cmd, UInt<2>(3)) - node T_563 = neq(src, UInt<1>(0)) - node T_564 = and(T_562, T_563) - when T_564 : - node T_565 = eq(addr, UInt<12>(1310)) - when T_565 : - node T_566 = dshl(UInt<1>(0), bits(src,5,0)) - node T_567 = and(data, T_566) - reg_tohost := T_567 - node T_568 = eq(addr, UInt<12>(1290)) - when T_568 : - node T_569 = dshl(UInt<1>(0), bits(src,5,0)) - node T_570 = and(data, T_569) - reg_status := T_570 - module Datapath : - input clk : Clock - input reset : UInt<1> - output host : {status : UInt<32>, tohost : UInt<32>, flip hid : UInt<1>} - input ctrl : {flip inst : UInt<32>, pc_sel : UInt<1>, inst_type : UInt<1>, inst_re : UInt<1>, flip stall : UInt<1>, imm_sel : UInt<3>, wb_en : UInt<1>, wb_sel : UInt<2>, A_sel : UInt<1>, B_sel : UInt<1>, alu_op : UInt<4>, br_type : UInt<3>, data_re : UInt<1>, st_type : UInt<2>, ld_type : UInt<3>, csr_cmd : UInt<2>} - output icache : {re : UInt<1>, flip dout : UInt<32>, we : UInt<4>, addr : UInt<32>, din : UInt<32>} - output dcache : {re : UInt<1>, flip dout : UInt<32>, we : UInt<4>, addr : UInt<32>, din : UInt<32>} - input stall : UInt<1> - - inst alu of ALU - inst brCond of BrCond - inst regFile of RegFile - regFile.clk := clk - inst immGen of ImmGenWire - reg fe_inst : UInt<32>, clk, reset - onreset fe_inst := UInt<32>(0) - reg fe_pc : UInt, clk, reset - reg ew_inst : UInt<32>, clk, reset - onreset ew_inst := UInt<32>(0) - reg ew_pc : UInt, clk, reset - reg ew_alu : UInt, clk, reset - node T_571 = subw(UInt<14>(8192), UInt<32>(4)) - reg pc : UInt<32>, clk, reset - onreset pc := T_571 - node T_572 = eq(ctrl.pc_sel, UInt<1>(1)) - node T_573 = or(T_572, brCond.taken) - node T_574 = addw(pc, UInt<3>(4)) - node iaddr = mux(T_573, alu.sum, T_574) - node T_575 = eq(ctrl.inst_type, UInt<1>(1)) - node T_576 = or(T_575, brCond.taken) - node inst = mux(T_576, UInt<32>(19), icache.dout) - icache.we := UInt<1>(0) - icache.din := UInt<1>(0) - icache.addr := iaddr - icache.re := ctrl.inst_re - node T_577 = eq(dcache.we, UInt<1>(0)) - node T_578 = not(T_577) - node T_579 = not(T_578) - node T_580 = and(icache.re, T_579) - node T_581 = mux(T_580, iaddr, pc) - pc := T_581 - node T_582 = not(stall) - when T_582 : - fe_pc := pc - fe_inst := inst - ctrl.inst := fe_inst - ctrl.stall := stall - node rd_addr = bits(fe_inst, 11, 7) - node rs1_addr = bits(fe_inst, 19, 15) - node rs2_addr = bits(fe_inst, 24, 20) - regFile.raddr1 := rs1_addr - regFile.raddr2 := rs2_addr - immGen.inst := fe_inst - immGen.sel := ctrl.imm_sel - node T_583 = eq(rs1_addr, UInt<1>(0)) - node rs1NotZero = not(T_583) - node T_584 = eq(rs2_addr, UInt<1>(0)) - node rs2NotZero = not(T_584) - node T_585 = eq(ctrl.wb_sel, UInt<2>(0)) - node alutype = and(ctrl.wb_en, T_585) - node ex_rd_addr = bits(ew_inst, 11, 7) - node T_586 = and(alutype, rs1NotZero) - node T_587 = eq(rs1_addr, ex_rd_addr) - node T_588 = and(T_586, T_587) - node rs1 = mux(T_588, ew_alu, regFile.rdata1) - node T_589 = and(alutype, rs2NotZero) - node T_590 = eq(rs2_addr, ex_rd_addr) - node T_591 = and(T_589, T_590) - node rs2 = mux(T_591, ew_alu, regFile.rdata2) - node T_592 = eq(ctrl.A_sel, UInt<1>(0)) - node T_593 = mux(T_592, rs1, fe_pc) - alu.A := T_593 - node T_594 = eq(ctrl.B_sel, UInt<1>(0)) - node T_595 = mux(T_594, rs2, immGen.out) - alu.B := T_595 - alu.alu_op := ctrl.alu_op - brCond.rs1 := rs1 - brCond.rs2 := rs2 - brCond.br_type := ctrl.br_type - node T_596 = bit(alu.sum, 1) - node T_597 = dshl(T_596, UInt<3>(4)) - node T_598 = bit(alu.sum, 0) - node T_599 = dshl(T_598, UInt<2>(3)) - node woffset = or(T_597, T_599) - dcache.re := ctrl.data_re - node T_600 = mux(stall, ew_alu, alu.sum) - dcache.addr := T_600 - node T_601 = bits(alu.sum, 1, 0) - node T_602 = dshl(UInt<2>(3), T_601) - node T_603 = bits(T_602, 3, 0) - node T_604 = bits(alu.sum, 1, 0) - node T_605 = dshl(UInt<1>(1), T_604) - node T_606 = bits(T_605, 3, 0) - node T_607 = eq(UInt<2>(2), ctrl.st_type) - node T_608 = mux(T_607, T_606, UInt<4>(0)) - node T_609 = eq(UInt<2>(1), ctrl.st_type) - node T_610 = mux(T_609, T_603, T_608) - node T_611 = eq(UInt<2>(0), ctrl.st_type) - node T_612 = mux(T_611, UInt<4>(15), T_610) - node T_613 = mux(stall, UInt<4>(0), T_612) - dcache.we := T_613 - node T_614 = dshl(rs2, woffset) - node T_615 = bits(T_614, 31, 0) - dcache.din := T_615 - node T_616 = not(stall) - when T_616 : - ew_pc := fe_pc - ew_inst := fe_inst - ew_alu := alu.out - node T_617 = bit(ew_alu, 1) - node T_618 = dshl(T_617, UInt<3>(4)) - node T_619 = bit(ew_alu, 0) - node T_620 = dshl(T_619, UInt<2>(3)) - node loffset = or(T_618, T_620) - node lshift = dshr(dcache.dout, loffset) - node T_621 = bits(lshift, 15, 0) - node T_622 = asSInt(T_621) - node T_623 = pad(T_622, 32) - node T_624 = asUInt(T_623) - node T_625 = bits(lshift, 7, 0) - node T_626 = asSInt(T_625) - node T_627 = pad(T_626, 32) - node T_628 = asUInt(T_627) - node T_629 = bits(lshift, 15, 0) - node T_630 = bits(lshift, 7, 0) - node T_631 = eq(UInt<3>(4), ctrl.ld_type) - node T_632 = mux(T_631, T_630, dcache.dout) - node T_633 = eq(UInt<3>(3), ctrl.ld_type) - node T_634 = mux(T_633, T_629, T_632) - node T_635 = eq(UInt<3>(2), ctrl.ld_type) - node T_636 = mux(T_635, T_628, T_634) - node T_637 = eq(UInt<3>(1), ctrl.ld_type) - node load = mux(T_637, T_624, T_636) - inst csr of CSR - csr.reset := reset - csr.clk := clk - host := csr.host - csr.src := ew_alu - node T_638 = bits(ew_inst, 31, 20) - csr.addr := T_638 - csr.cmd := ctrl.csr_cmd - node T_639 = addw(ew_pc, UInt<3>(4)) - node T_640 = eq(UInt<2>(3), ctrl.wb_sel) - node T_641 = mux(T_640, csr.data, ew_alu) - node T_642 = eq(UInt<2>(2), ctrl.wb_sel) - node T_643 = mux(T_642, T_639, T_641) - node T_644 = eq(UInt<2>(1), ctrl.wb_sel) - node regWrite = mux(T_644, load, T_643) - regFile.wen := ctrl.wb_en - regFile.waddr := ex_rd_addr - regFile.wdata := regWrite diff --git a/test/chisel3/Datapath_new.fir b/test/chisel3/Datapath_new.fir deleted file mode 100644 index 2d3072b2..00000000 --- a/test/chisel3/Datapath_new.fir +++ /dev/null @@ -1,355 +0,0 @@ -; RUN: firrtl -i %s -o %s.v -X verilog -p c | tee %s.out | FileCheck %s -;CHECK: Done! - -circuit Datapath : - module ALU : - input B : UInt<32> - output out : UInt<32> - output sum : UInt<32> - input A : UInt<32> - input alu_op : UInt<4> - - node shamt = bits(B, 4, 0) - node T_426 = add-wrap(A, B) - node T_427 = sub-wrap(A, B) - node T_428 = as-SInt(A) - node T_429 = dshr(T_428, shamt) - node T_430 = as-UInt(T_429) - node T_431 = dshr(A, shamt) - node T_432 = dshl(A, shamt) - node T_433 = as-SInt(A) - node T_434 = as-SInt(B) - node T_435 = lt(T_433, T_434) - node T_436 = lt(A, B) - node T_437 = bit-and(A, B) - node T_438 = bit-or(A, B) - node T_439 = bit-xor(A, B) - node T_440 = eq(UInt<4>(10), alu_op) - node T_441 = mux(T_440, A, B) - node T_442 = eq(UInt<4>(4), alu_op) - node T_443 = mux(T_442, T_439, T_441) - node T_444 = eq(UInt<4>(3), alu_op) - node T_445 = mux(T_444, T_438, T_443) - node T_446 = eq(UInt<4>(2), alu_op) - node T_447 = mux(T_446, T_437, T_445) - node T_448 = eq(UInt<4>(7), alu_op) - node T_449 = mux(T_448, T_436, T_447) - node T_450 = eq(UInt<4>(5), alu_op) - node T_451 = mux(T_450, T_435, T_449) - node T_452 = eq(UInt<4>(6), alu_op) - node T_453 = mux(T_452, T_432, T_451) - node T_454 = eq(UInt<4>(8), alu_op) - node T_455 = mux(T_454, T_431, T_453) - node T_456 = eq(UInt<4>(9), alu_op) - node T_457 = mux(T_456, T_430, T_455) - node T_458 = eq(UInt<4>(1), alu_op) - node T_459 = mux(T_458, T_427, T_457) - node T_460 = eq(UInt<4>(0), alu_op) - node T_461 = mux(T_460, T_426, T_459) - out := T_461 - node T_462 = bit(alu_op, 0) - node T_463 = sub-wrap(UInt<1>(0), B) - node T_464 = mux(T_462, T_463, B) - node T_465 = add-wrap(A, T_464) - sum := T_465 - module BrCond : - output taken : UInt<1> - input rs2 : UInt<32> - input rs1 : UInt<32> - input br_type : UInt<3> - - node eq = eq(rs1, rs2) - node neq = bit-not(eq) - node T_466 = as-SInt(rs1) - node T_467 = as-SInt(rs2) - node lt = lt(T_466, T_467) - node ge = bit-not(lt) - node ltu = lt(rs1, rs2) - node geu = bit-not(ltu) - node T_468 = eq(br_type, UInt<3>(2)) - node T_469 = bit-and(T_468, eq) - node T_470 = eq(br_type, UInt<3>(6)) - node T_471 = bit-and(T_470, neq) - node T_472 = bit-or(T_469, T_471) - node T_473 = eq(br_type, UInt<3>(1)) - node T_474 = bit-and(T_473, lt) - node T_475 = bit-or(T_472, T_474) - node T_476 = eq(br_type, UInt<3>(5)) - node T_477 = bit-and(T_476, ge) - node T_478 = bit-or(T_475, T_477) - node T_479 = eq(br_type, UInt<3>(0)) - node T_480 = bit-and(T_479, ltu) - node T_481 = bit-or(T_478, T_480) - node T_482 = eq(br_type, UInt<3>(4)) - node T_483 = bit-and(T_482, geu) - node T_484 = bit-or(T_481, T_483) - taken := T_484 - module RegFile : - input raddr1 : UInt<5> - input raddr2 : UInt<5> - output rdata1 : UInt<32> - output rdata2 : UInt<32> - input wen : UInt<1> - input waddr : UInt<5> - input wdata : UInt<32> - - cmem regs : UInt<32>[32] - node T_485 = eq(raddr1, UInt<1>(0)) - node T_486 = bit-not(T_485) - infer accessor T_487 = regs[raddr1] - node T_488 = mux(T_486, T_487, UInt<1>(0)) - rdata1 := T_488 - node T_489 = eq(raddr2, UInt<1>(0)) - node T_490 = bit-not(T_489) - infer accessor T_491 = regs[raddr2] - node T_492 = mux(T_490, T_491, UInt<1>(0)) - rdata2 := T_492 - node T_493 = eq(waddr, UInt<1>(0)) - node T_494 = bit-not(T_493) - node T_495 = bit-and(wen, T_494) - when T_495 : - infer accessor T_496 = regs[waddr] - T_496 := wdata - module ImmGenWire : - output out : UInt<32> - input inst_252 : UInt<32> - input sel : UInt<3> - - node T_497 = bits(inst_252, 31, 20) - node Iimm = as-SInt(T_497) - node T_498 = bits(inst_252, 31, 25) - node T_499 = bits(inst_252, 11, 7) - node T_500 = cat(T_498, T_499) - node Simm = as-SInt(T_500) - node T_501 = bit(inst_252, 31) - node T_502 = bit(inst_252, 7) - node T_503 = bits(inst_252, 30, 25) - node T_504 = bits(inst_252, 11, 8) - node T_505 = cat(T_501, T_502) - node T_506 = cat(T_504, UInt<1>(0)) - node T_507 = cat(T_503, T_506) - node T_508 = cat(T_505, T_507) - node Bimm = as-SInt(T_508) - node T_509 = bits(inst_252, 31, 12) - node T_510 = cat(T_509, UInt<12>(0)) - node Uimm = as-SInt(T_510) - node T_511 = bit(inst_252, 31) - node T_512 = bits(inst_252, 19, 12) - node T_513 = bit(inst_252, 20) - node T_514 = bits(inst_252, 30, 25) - node T_515 = bits(inst_252, 24, 21) - node T_516 = cat(T_512, T_513) - node T_517 = cat(T_511, T_516) - node T_518 = cat(T_515, UInt<1>(0)) - node T_519 = cat(T_514, T_518) - node T_520 = cat(T_517, T_519) - node Jimm = as-SInt(T_520) - node T_521 = bits(inst_252, 19, 15) - node Zimm = convert(T_521) - node T_522 = eq(UInt<3>(3), sel) - node T_523 = mux(T_522, Jimm, Zimm) - node T_524 = eq(UInt<3>(2), sel) - node T_525 = mux(T_524, Uimm, T_523) - node T_526 = eq(UInt<3>(4), sel) - node T_527 = mux(T_526, Bimm, T_525) - node T_528 = eq(UInt<3>(1), sel) - node T_529 = mux(T_528, Simm, T_527) - node T_530 = eq(UInt<3>(0), sel) - node T_531 = mux(T_530, Iimm, T_529) - node T_532 = as-UInt(T_531) - out := T_532 - module CSR : - output host : {status : UInt<32>, flip id : UInt<1>, tohost : UInt<32>} - input cmd : UInt<2> - input src : UInt<32> - output data : UInt<32> - input addr : UInt<12> - - reg reg_tohost : UInt<32> - on-reset reg_tohost := UInt<32>(0) - reg reg_status : UInt<32> - on-reset reg_status := UInt<32>(0) - host.tohost := reg_tohost - host.status := reg_status - node T_533 = eq(UInt<12>(1291), addr) - node T_534 = mux(T_533, host.id, UInt<1>(0)) - node T_535 = eq(UInt<12>(1290), addr) - node T_536 = mux(T_535, reg_status, T_534) - node T_537 = eq(UInt<12>(1310), addr) - node T_538 = mux(T_537, reg_tohost, T_536) - data := T_538 - node T_539 = eq(cmd, UInt<2>(1)) - when T_539 : - node T_540 = eq(addr, UInt<12>(1310)) - when T_540 : reg_tohost := src - node T_541 = eq(addr, UInt<12>(1290)) - when T_541 : reg_status := src - node T_542 = eq(cmd, UInt<2>(2)) - node T_543 = neq(src, UInt<1>(0)) - node T_544 = bit-and(T_542, T_543) - when T_544 : - node T_545 = eq(addr, UInt<12>(1310)) - when T_545 : - node T_546 = dshl(UInt<1>(1), src) - node T_547 = bit-or(data, T_546) - reg_tohost := T_547 - node T_548 = eq(addr, UInt<12>(1290)) - when T_548 : - node T_549 = dshl(UInt<1>(1), src) - node T_550 = bit-or(data, T_549) - reg_status := T_550 - node T_551 = eq(cmd, UInt<2>(3)) - node T_552 = neq(src, UInt<1>(0)) - node T_553 = bit-and(T_551, T_552) - when T_553 : - node T_554 = eq(addr, UInt<12>(1310)) - when T_554 : - node T_555 = dshl(UInt<1>(0), src) - node T_556 = bit-and(data, T_555) - reg_tohost := T_556 - node T_557 = eq(addr, UInt<12>(1290)) - when T_557 : - node T_558 = dshl(UInt<1>(0), src) - node T_559 = bit-and(data, T_558) - reg_status := T_559 - module Datapath : - output host : {status : UInt<32>, flip id : UInt<1>, tohost : UInt<32>} - input ctrl : {flip inst_424 : UInt<32>, pc_sel : UInt<1>, inst_type : UInt<1>, inst_re : UInt<1>, flip stall : UInt<1>, imm_sel : UInt<3>, wb_en : UInt<1>, wb_sel : UInt<2>, A_sel : UInt<1>, B_sel : UInt<1>, alu_op : UInt<4>, br_type : UInt<3>, data_re : UInt<1>, st_type : UInt<2>, ld_type : UInt<3>, csr_cmd : UInt<2>} - output icache : {re : UInt<1>, addr : UInt<32>, we : UInt<4>, din : UInt<32>, flip dout : UInt<32>} - output dcache : {re : UInt<1>, addr : UInt<32>, we : UInt<4>, din : UInt<32>, flip dout : UInt<32>} - input stall : UInt<1> - - inst alu of ALU - inst brCond of BrCond - inst regFile of RegFile - inst immGen of ImmGenWire - reg fe_inst : UInt<32> - on-reset fe_inst := UInt<32>(0) - reg fe_pc : UInt - reg ew_inst : UInt<32> - on-reset ew_inst := UInt<32>(0) - reg ew_pc : UInt - reg ew_alu : UInt - node T_560 = sub-wrap(UInt<14>(8192), UInt<3>(4)) - reg pc : UInt<14> - on-reset pc := T_560 - node T_561 = eq(ctrl.pc_sel, UInt<1>(1)) - node T_562 = bit-or(T_561, brCond.taken) - node T_563 = add-wrap(pc, UInt<3>(4)) - node iaddr = mux(T_562, alu.sum, T_563) - node T_564 = eq(ctrl.inst_type, UInt<1>(1)) - node T_565 = bit-or(T_564, brCond.taken) - node inst_425 = mux(T_565, UInt<32>(19), icache.dout) - icache.addr := iaddr - icache.re := ctrl.inst_re - node T_566 = eq(dcache.we, UInt<1>(0)) - node T_567 = bit-not(T_566) - node T_568 = bit-not(T_567) - node T_569 = bit-and(icache.re, T_568) - node T_570 = mux(T_569, iaddr, pc) - pc := T_570 - node T_571 = bit-not(stall) - when T_571 : - fe_pc := pc - fe_inst := inst_425 - ctrl.inst_424 := fe_inst - ctrl.stall := stall - node rd_addr = bits(fe_inst, 11, 7) - node rs1_addr = bits(fe_inst, 19, 15) - node rs2_addr = bits(fe_inst, 24, 20) - regFile.raddr1 := rs1_addr - regFile.raddr2 := rs2_addr - immGen.inst_252 := fe_inst - immGen.sel := ctrl.imm_sel - node T_572 = eq(rs1_addr, UInt<1>(0)) - node rs1NotZero = bit-not(T_572) - node T_573 = eq(rs2_addr, UInt<1>(0)) - node rs2NotZero = bit-not(T_573) - node T_574 = eq(ctrl.wb_sel, UInt<2>(0)) - node alutype = bit-and(ctrl.wb_en, T_574) - node ex_rd_addr = bits(ew_inst, 11, 7) - node T_575 = bit-and(alutype, rs1NotZero) - node T_576 = eq(rs1_addr, ex_rd_addr) - node T_577 = bit-and(T_575, T_576) - node rs1 = mux(T_577, ew_alu, regFile.rdata1) - node T_578 = bit-and(alutype, rs2NotZero) - node T_579 = eq(rs2_addr, ex_rd_addr) - node T_580 = bit-and(T_578, T_579) - node rs2 = mux(T_580, ew_alu, regFile.rdata2) - node T_581 = eq(ctrl.A_sel, UInt<1>(0)) - node T_582 = mux(T_581, rs1, fe_pc) - alu.A := T_582 - node T_583 = eq(ctrl.B_sel, UInt<1>(0)) - node T_584 = mux(T_583, rs2, immGen.out) - alu.B := T_584 - alu.alu_op := ctrl.alu_op - brCond.rs1 := rs1 - brCond.rs2 := rs2 - brCond.br_type := ctrl.br_type - node T_585 = bit(alu.sum, 1) - node T_586 = dshl(T_585, UInt<3>(4)) - node T_587 = bit(alu.sum, 0) - node T_588 = dshl(T_587, UInt<2>(3)) - node woffset = bit-or(T_586, T_588) - dcache.re := ctrl.data_re - node T_589 = mux(stall, ew_alu, alu.sum) - dcache.addr := T_589 - node T_590 = bits(alu.sum, 1, 0) - node T_591 = dshl(UInt<2>(3), T_590) - node T_592 = bits(alu.sum, 1, 0) - node T_593 = dshl(UInt<1>(1), T_592) - node T_594 = eq(UInt<2>(2), ctrl.st_type) - node T_595 = mux(T_594, T_593, UInt<4>(0)) - node T_596 = eq(UInt<2>(1), ctrl.st_type) - node T_597 = mux(T_596, T_591, T_595) - node T_598 = eq(UInt<2>(0), ctrl.st_type) - node T_599 = mux(T_598, UInt<4>(15), T_597) - node T_600 = mux(stall, UInt<4>(0), T_599) - dcache.we := T_600 - node T_601 = dshl(rs2, woffset) - dcache.din := T_601 - node T_602 = bit-not(stall) - when T_602 : - ew_pc := fe_pc - ew_inst := fe_inst - ew_alu := alu.out - node T_603 = bit(ew_alu, 1) - node T_604 = dshl(T_603, UInt<3>(4)) - node T_605 = bit(ew_alu, 0) - node T_606 = dshl(T_605, UInt<2>(3)) - node loffset = bit-or(T_604, T_606) - node lshift = dshr(dcache.dout, loffset) - node T_607 = as-SInt(dcache.dout) - node T_608 = bits(lshift, 15, 0) - node T_609 = as-SInt(T_608) - node T_610 = bits(lshift, 7, 0) - node T_611 = as-SInt(T_610) - node T_612 = bits(lshift, 15, 0) - node T_613 = convert(T_612) - node T_614 = bits(lshift, 7, 0) - node T_615 = convert(T_614) - node T_616 = eq(UInt<3>(4), ctrl.ld_type) - node T_617 = mux(T_616, T_615, T_607) - node T_618 = eq(UInt<3>(3), ctrl.ld_type) - node T_619 = mux(T_618, T_613, T_617) - node T_620 = eq(UInt<3>(2), ctrl.ld_type) - node T_621 = mux(T_620, T_611, T_619) - node T_622 = eq(UInt<3>(1), ctrl.ld_type) - node T_623 = mux(T_622, T_609, T_621) - node load = as-UInt(T_623) - inst csr of CSR - csr.host <> host - csr.src := ew_alu - node T_624 = bits(ew_inst, 31, 20) - csr.addr := T_624 - csr.cmd := ctrl.csr_cmd - node T_625 = add-wrap(ew_pc, UInt<3>(4)) - node T_626 = eq(UInt<2>(3), ctrl.wb_sel) - node T_627 = mux(T_626, csr.data, ew_alu) - node T_628 = eq(UInt<2>(2), ctrl.wb_sel) - node T_629 = mux(T_628, T_625, T_627) - node T_630 = eq(UInt<2>(1), ctrl.wb_sel) - node regWrite = mux(T_630, load, T_629) - regFile.wen := ctrl.wb_en - regFile.waddr := ex_rd_addr - regFile.wdata := regWrite diff --git a/test/chisel3/EnableShiftRegister.fir b/test/chisel3/EnableShiftRegister.fir deleted file mode 100644 index bfc8f9c3..00000000 --- a/test/chisel3/EnableShiftRegister.fir +++ /dev/null @@ -1,23 +0,0 @@ -; RUN: firrtl -i %s -o %s.v -X verilog -p c | tee %s.out | FileCheck %s -;CHECK: Done! - -circuit EnableShiftRegister : - module EnableShiftRegister : - input in : UInt<4> - output out : UInt<4> - input shift : UInt<1> - - reg r0 : UInt<4> - on-reset r0 := UInt<4>(0) - reg r1 : UInt<4> - on-reset r1 := UInt<4>(0) - reg r2 : UInt<4> - on-reset r2 := UInt<4>(0) - reg r3 : UInt<4> - on-reset r3 := UInt<4>(0) - when shift : - r0 := in - r1 := r0 - r2 := r1 - r3 := r2 - out := r3 diff --git a/test/chisel3/GCD.fir b/test/chisel3/GCD.fir deleted file mode 100644 index 90b0a8b8..00000000 --- a/test/chisel3/GCD.fir +++ /dev/null @@ -1,26 +0,0 @@ -; RUN: firrtl -i %s -o %s.v -X verilog -p c | tee %s.out | FileCheck %s -;CHECK: Done! - -circuit GCD : - module GCD : - output v : UInt<1> - input e : UInt<1> - output z : UInt<16> - input a : UInt<16> - input b : UInt<16> - - reg x : UInt<16> - reg y : UInt<16> - node T_17 = gt(x, y) - when T_17 : - node T_18 = sub-wrap(x, y) - x := T_18 - else : - node T_19 = sub-wrap(y, x) - y := T_19 - when e : - x := a - y := b - z := x - node T_20 = eq(y, UInt<1>(0)) - v := T_20 diff --git a/test/chisel3/LFSR16.fir b/test/chisel3/LFSR16.fir deleted file mode 100644 index 29a2823a..00000000 --- a/test/chisel3/LFSR16.fir +++ /dev/null @@ -1,22 +0,0 @@ -; RUN: firrtl -i %s -o %s.v -X verilog -p c | tee %s.out | FileCheck %s -;CHECK: Done! - -circuit LFSR16 : - module LFSR16 : - output out : UInt<16> - input inc : UInt<1> - - reg res : UInt<16> - on-reset res := UInt<16>(1) - when inc : - node T_16 = bit(res, 0) - node T_17 = bit(res, 2) - node T_18 = bit-xor(T_16, T_17) - node T_19 = bit(res, 3) - node T_20 = bit-xor(T_18, T_19) - node T_21 = bit(res, 5) - node T_22 = bit-xor(T_20, T_21) - node T_23 = bits(res, 15, 1) - node T_24 = cat(T_22, T_23) - res := T_24 - out := res diff --git a/test/chisel3/MemorySearch.fir b/test/chisel3/MemorySearch.fir deleted file mode 100644 index fec082c0..00000000 --- a/test/chisel3/MemorySearch.fir +++ /dev/null @@ -1,34 +0,0 @@ -; RUN: firrtl -i %s -o %s.v -X verilog -p c | tee %s.out | FileCheck %s -;CHECK: Done! - -circuit MemorySearch : - module MemorySearch : - input target : UInt<4> - output address : UInt<3> - input en : UInt<1> - output done : UInt<1> - - reg index : UInt<3> - on-reset index := UInt<3>(0) - wire elts : UInt<4>[7] - elts[0] := UInt<4>(0) - elts[1] := UInt<4>(4) - elts[2] := UInt<4>(15) - elts[3] := UInt<4>(14) - elts[4] := UInt<4>(2) - elts[5] := UInt<4>(5) - elts[6] := UInt<4>(13) - infer accessor elt = elts[index] - node T_35 = bit-not(en) - node T_36 = eq(elt, target) - node T_37 = eq(index, UInt<3>(7)) - node T_38 = bit-or(T_36, T_37) - node end = bit-and(T_35, T_38) - when en : index := UInt<1>(0) - else : - node T_39 = bit-not(end) - when T_39 : - node T_40 = add-wrap(index, UInt<1>(1)) - index := T_40 - done := end - address := index diff --git a/test/chisel3/ModuleVec.fir b/test/chisel3/ModuleVec.fir deleted file mode 100644 index 758f544c..00000000 --- a/test/chisel3/ModuleVec.fir +++ /dev/null @@ -1,29 +0,0 @@ -; RUN: firrtl -i %s -o %s.v -X verilog -p c | tee %s.out | FileCheck %s -;CHECK: Done! - -circuit ModuleVec : - module PlusOne : - input in : UInt<32> - output out : UInt<32> - - node T_33 = add-wrap(in, UInt<1>(1)) - out := T_33 - module PlusOne_25 : - input in : UInt<32> - output out : UInt<32> - - node T_34 = add-wrap(in, UInt<1>(1)) - out := T_34 - module ModuleVec : - input ins : UInt<32>[2] - output outs : UInt<32>[2] - - inst T_35 of PlusOne - inst T_36 of PlusOne_25 - wire pluses : {flip in : UInt<32>, out : UInt<32>}[2] - pluses[0] := T_35 - pluses[1] := T_36 - pluses[0].in := ins[0] - outs[0] := pluses[0].out - pluses[1].in := ins[1] - outs[1] := pluses[1].out diff --git a/test/chisel3/ModuleWire.fir b/test/chisel3/ModuleWire.fir deleted file mode 100644 index 3be7f928..00000000 --- a/test/chisel3/ModuleWire.fir +++ /dev/null @@ -1,17 +0,0 @@ -; RUN: firrtl -i %s -o %s.v -X verilog -p c | tee %s.out | FileCheck %s -;CHECK: Done! - -circuit ModuleWire : - module Inc : - input in : UInt<32> - output out : UInt<32> - - node T_12 = add-wrap(in, UInt<1>(1)) - out := T_12 - module ModuleWire : - input in : UInt<32> - output out : UInt<32> - - inst T_13 of Inc - T_13.in := in - out := T_13.out diff --git a/test/chisel3/Mul.fir b/test/chisel3/Mul.fir deleted file mode 100644 index b80b8a83..00000000 --- a/test/chisel3/Mul.fir +++ /dev/null @@ -1,30 +0,0 @@ -; RUN: firrtl -i %s -o %s.v -X verilog -p c | tee %s.out | FileCheck %s -;CHECK: Done! - -circuit Mul : - module Mul : - input x : UInt<2> - output z : UInt<4> - input y : UInt<2> - - wire tbl : UInt<4>[16] - tbl[0] := UInt<4>(0) - tbl[1] := UInt<4>(0) - tbl[2] := UInt<4>(0) - tbl[3] := UInt<4>(0) - tbl[4] := UInt<4>(0) - tbl[5] := UInt<4>(1) - tbl[6] := UInt<4>(2) - tbl[7] := UInt<4>(3) - tbl[8] := UInt<4>(0) - tbl[9] := UInt<4>(2) - tbl[10] := UInt<4>(4) - tbl[11] := UInt<4>(6) - tbl[12] := UInt<4>(0) - tbl[13] := UInt<4>(3) - tbl[14] := UInt<4>(6) - tbl[15] := UInt<4>(9) - node T_42 = shl(x, 2) - node T_43 = bit-or(T_42, y) - infer accessor T_44 = tbl[T_43] - z := T_44 diff --git a/test/chisel3/Outer.fir b/test/chisel3/Outer.fir deleted file mode 100644 index 886a01ba..00000000 --- a/test/chisel3/Outer.fir +++ /dev/null @@ -1,19 +0,0 @@ -; RUN: firrtl -i %s -o %s.v -X verilog -p c | tee %s.out | FileCheck %s -;CHECK: Done! - -circuit Outer : - module Inner : - input in : UInt<8> - output out : UInt<8> - - node T_15 = add-wrap(in, UInt<1>(1)) - out := T_15 - module Outer : - input in : UInt<8> - output out : UInt<8> - - inst T_16 of Inner - T_16.in := in - node T_17 = mul(T_16.out, UInt<2>(2)) - node T_18 = bits(T_17, 7, 0) - out := T_18 diff --git a/test/chisel3/RegisterVecShift.fir b/test/chisel3/RegisterVecShift.fir deleted file mode 100644 index 3d51ece3..00000000 --- a/test/chisel3/RegisterVecShift.fir +++ /dev/null @@ -1,29 +0,0 @@ -; RUN: firrtl -i %s -o %s.v -X verilog -p c | tee %s.out | FileCheck %s -;CHECK: Done! - -circuit RegisterVecShift : - module RegisterVecShift : - input load : UInt<1> - output out : UInt<4> - input shift : UInt<1> - input ins : UInt<4>[4] - - reg delays : UInt<4>[4] - when reset : - wire T_33 : UInt<4>[4] - T_33[0] := UInt<4>(0) - T_33[1] := UInt<4>(0) - T_33[2] := UInt<4>(0) - T_33[3] := UInt<4>(0) - delays := T_33 - when load : - delays[0] := ins[0] - delays[1] := ins[1] - delays[2] := ins[2] - delays[3] := ins[3] - else : when shift : - delays[0] := ins[0] - delays[1] := delays[0] - delays[2] := delays[1] - delays[3] := delays[2] - out := delays[3] diff --git a/test/chisel3/Risc.fir b/test/chisel3/Risc.fir deleted file mode 100644 index a1ba01b9..00000000 --- a/test/chisel3/Risc.fir +++ /dev/null @@ -1,53 +0,0 @@ -; RUN: firrtl -i %s -o %s.v -X verilog -p c | tee %s.out | FileCheck %s -;CHECK: Done! - -circuit Risc : - module Risc : - output out : UInt<32> - output valid : UInt<1> - input boot : UInt<1> - input isWr : UInt<1> - input wrAddr : UInt<8> - input wrData : UInt<32> - - cmem file : UInt<32>[256] - cmem code : UInt<32>[256] - reg pc : UInt<8> - on-reset pc := UInt<8>(0) - infer accessor inst = code[pc] - node op = bits(inst, 31, 24) - node rci = bits(inst, 23, 16) - node rai = bits(inst, 15, 8) - node rbi = bits(inst, 7, 0) - node T_51 = eq(rai, UInt<1>(0)) - infer accessor T_52 = file[rai] - node ra = mux(T_51, UInt<1>(0), T_52) - node T_53 = eq(rbi, UInt<1>(0)) - infer accessor T_54 = file[rbi] - node rb = mux(T_53, UInt<1>(0), T_54) - wire rc : UInt<32> - valid := UInt<1>(0) - out := UInt<1>(0) - rc := UInt<1>(0) - when isWr : - infer accessor T_55 = code[wrAddr] - T_55 := wrData - else : when boot : pc := UInt<1>(0) - else : - node T_56 = eq(UInt<1>(0), op) - when T_56 : - node T_57 = add-wrap(ra, rb) - rc := T_57 - node T_58 = eq(UInt<1>(1), op) - when T_58 : - node T_59 = shl(rai, 8) - node T_60 = bit-or(T_59, rbi) - rc := T_60 - out := rc - node T_61 = eq(rci, UInt<8>(255)) - when T_61 : valid := UInt<1>(1) - else : - infer accessor T_62 = file[rci] - T_62 := rc - node T_63 = add-wrap(pc, UInt<1>(1)) - pc := T_63 diff --git a/test/chisel3/Rom.fir b/test/chisel3/Rom.fir deleted file mode 100644 index f91593a4..00000000 --- a/test/chisel3/Rom.fir +++ /dev/null @@ -1,27 +0,0 @@ -; RUN: firrtl -i %s -o %s.v -X verilog -p c | tee %s.out | FileCheck %s -;CHECK: Done! - -circuit Rom : - module Rom : - output out : UInt<5> - input addr : UInt<4> - - wire r : UInt<5>[16] - r[0] := UInt<5>(0) - r[1] := UInt<5>(2) - r[2] := UInt<5>(4) - r[3] := UInt<5>(6) - r[4] := UInt<5>(8) - r[5] := UInt<5>(10) - r[6] := UInt<5>(12) - r[7] := UInt<5>(14) - r[8] := UInt<5>(16) - r[9] := UInt<5>(18) - r[10] := UInt<5>(20) - r[11] := UInt<5>(22) - r[12] := UInt<5>(24) - r[13] := UInt<5>(26) - r[14] := UInt<5>(28) - r[15] := UInt<5>(30) - infer accessor T_39 = r[addr] - out := T_39 diff --git a/test/chisel3/SIntOps.fir b/test/chisel3/SIntOps.fir deleted file mode 100644 index 59ad2a47..00000000 --- a/test/chisel3/SIntOps.fir +++ /dev/null @@ -1,53 +0,0 @@ -; RUN: firrtl -i %s -o %s.v -X verilog -p c | tee %s.out | FileCheck %s -;CHECK: Done! - -circuit SIntOps : - module SIntOps : - input a : SInt<16> - input b : SInt<16> - output addout : SInt<16> - output subout : SInt<16> - output timesout : SInt<16> - output divout : SInt<16> - output modout : SInt<16> - output lshiftout : SInt<16> - output rshiftout : SInt<16> - output lessout : UInt<1> - output greatout : UInt<1> - output eqout : UInt<1> - output noteqout : UInt<1> - output lesseqout : UInt<1> - output greateqout : UInt<1> - output negout : SInt<16> - - node ub = as-UInt(b) - node T_38 = add-wrap(a, b) - addout := T_38 - node T_39 = sub-wrap(a, b) - subout := T_39 - node T_40 = mul(a, b) - node T_41 = bits(as-UInt(T_40), 15, 0) - timesout := as-SInt(T_41) - node T_42 = mul(a, b) - node T_43 = bits(as-UInt(T_42), 15, 0) - divout := as-SInt(T_43) - modout := SInt<1>(0) - node T_44 = shl(a, 12) - node T_45 = bits(as-UInt(T_44), 15, 0) - lshiftout := as-SInt(T_45) - node T_46 = shr(a, 8) - rshiftout := T_46 - node T_47 = lt(a, b) - lessout := T_47 - node T_48 = gt(a, b) - greatout := T_48 - node T_49 = eq(a, b) - eqout := T_49 - node T_50 = neq(a, b) - noteqout := T_50 - node T_51 = leq(a, b) - lesseqout := T_51 - node T_52 = geq(a, b) - greateqout := T_52 - node T_53 = sub-wrap(SInt<1>(0), a) - negout := T_53 diff --git a/test/chisel3/Stack.fir b/test/chisel3/Stack.fir deleted file mode 100644 index 52c9b437..00000000 --- a/test/chisel3/Stack.fir +++ /dev/null @@ -1,36 +0,0 @@ -; RUN: firrtl -i %s -o %s.v -X verilog -p c | tee %s.out | FileCheck %s -;CHECK: Done! - -circuit Stack : - module Stack : - input push : UInt<1> - input pop : UInt<1> - input en : UInt<1> - output dataOut : UInt<32> - input dataIn : UInt<32> - - cmem stack_mem : UInt<32>[16] - reg sp : UInt<5> - on-reset sp := UInt<5>(0) - reg out : UInt<32> - on-reset out := UInt<32>(0) - when en : - node T_30 = lt(sp, UInt<5>(16)) - node T_31 = bit-and(push, T_30) - when T_31 : - infer accessor T_32 = stack_mem[sp] - T_32 := dataIn - node T_33 = add-wrap(sp, UInt<1>(1)) - sp := T_33 - else : - node T_34 = gt(sp, UInt<1>(0)) - node T_35 = bit-and(pop, T_34) - when T_35 : - node T_36 = sub-wrap(sp, UInt<1>(1)) - sp := T_36 - node T_37 = gt(sp, UInt<1>(0)) - when T_37 : - node T_38 = sub-wrap(sp, UInt<1>(1)) - infer accessor T_39 = stack_mem[T_38] - out := T_39 - dataOut := out diff --git a/test/chisel3/Sum.fir b/test/chisel3/Sum.fir deleted file mode 100644 index 9eed6109..00000000 --- a/test/chisel3/Sum.fir +++ /dev/null @@ -1,132 +0,0 @@ -; RUN: firrtl -i %s -o %s.v -X verilog -p c | tee %s.out | FileCheck %s -;CHECK: Done! - -circuit SumTop : - module Sum : - input sreq : {valid : UInt<1>, bits : {v : UInt<32>, len : UInt<32>}, flip ready : UInt<1>} - output srsp : {valid : UInt<1>, bits : {data : UInt<32>}, flip ready : UInt<1>} - input mrsp : {valid : UInt<1>, bits : {tag : UInt<8>, data : UInt<32>}, flip ready : UInt<1>} - output mreq : {valid : UInt<1>, bits : {wr? : UInt<1>, tag : UInt<8>, addr : UInt<32>, data : UInt<32>}, flip ready : UInt<1>} - reg a2 : UInt<32> - reg ea3 : UInt<32> - reg sum4 : UInt<32> - reg num_reqs5 : UInt<?> - on-reset num_reqs5 := UInt<8>(0) - reg computing?6 : UInt<?> - on-reset computing?6 := UInt<1>(0) - mrsp.ready := UInt<1>(1) - sreq.ready := UInt<1>(1) - srsp.valid := UInt<1>(0) - srsp.bits.data := UInt<1>(0) - mrsp.ready := UInt<1>(1) - mreq.bits.wr? := UInt<1>(0) - mreq.bits.data := UInt<1>(0) - mreq.bits.addr := UInt<1>(0) - mreq.valid := UInt<1>(0) - mreq.bits.tag := UInt<1>(0) - when computing?6 : - sreq.ready := UInt<1>(0) - when mrsp.valid : - node tmp7 = add-wrap(sum4, mrsp.bits.data) - sum4 := tmp7 - node tmp8 = lt(a2, ea3) - when tmp8 : - mreq.valid := UInt<1>(1) - mreq.bits.addr := a2 - when mreq.ready : - node tmp9 = add-wrap(a2, UInt<1>(1)) - a2 := tmp9 - else : - node tmp10 = eq(num_reqs5, UInt<1>(0)) - when tmp10 : - srsp.valid := UInt<1>(1) - srsp.bits.data := sum4 - when srsp.ready : - sum4 := UInt<1>(0) - computing?6 := UInt<1>(0) - else : - when sreq.valid : - a2 := sreq.bits.v - node tmp11 = add-wrap(sreq.bits.v, sreq.bits.len) - ea3 := tmp11 - module Memory : - input req : {valid : UInt<1>, bits : {wr? : UInt<1>, tag : UInt<8>, addr : UInt<32>, data : UInt<32>}, flip ready : UInt<1>} - output rsp : {valid : UInt<1>, bits : {tag : UInt<8>, data : UInt<32>}, flip ready : UInt<1>} - cmem mem13 : UInt<32>[8] - req.ready := rsp.ready - rsp.valid := UInt<1>(0) - rsp.bits.data := UInt<1>(0) - rsp.bits.tag := UInt<1>(0) - when req.valid : - rsp.valid := UInt<1>(1) - rsp.bits.tag := req.bits.tag - when req.bits.wr? : - rsp.bits.data := req.bits.data - accessor a14 = mem13[req.bits.addr] - a14 := req.bits.data - else : - accessor a15 = mem13[req.bits.addr] - rsp.bits.data := a15 - module ArbiterRR : - input in : {valid : UInt<1>, bits : {wr? : UInt<1>, tag : UInt<8>, addr : UInt<32>, data : UInt<32>}, flip ready : UInt<1>}[2] - output out : {valid : UInt<1>, bits : {wr? : UInt<1>, tag : UInt<8>, addr : UInt<32>, data : UInt<32>}, flip ready : UInt<1>} - output chosen : UInt<2> - reg last-grant17 : UInt<?> - on-reset last-grant17 := UInt<2>(0) - node tmp19 = bit-and(in[0].valid, UInt<1>(0)) - node tmp20 = gt(tmp19, last-grant17) - node tmp21 = bit-and(in[1].valid, UInt<1>(1)) - node tmp22 = gt(tmp21, last-grant17) - node tmp25 = bit-or(UInt<1>(0), tmp20) - node tmp26 = bit-not(tmp25) - node tmp28 = bit-or(UInt<1>(0), tmp20) - node tmp29 = bit-or(tmp28, tmp22) - node tmp30 = bit-not(tmp29) - node tmp32 = bit-or(UInt<1>(0), tmp20) - node tmp33 = bit-or(tmp32, tmp22) - node tmp34 = bit-or(tmp33, in[0].valid) - node tmp35 = bit-not(tmp34) - node tmp36 = bit-and(UInt<1>(1), UInt<1>(0)) - node tmp37 = gt(tmp36, last-grant17) - node tmp38 = bit-or(tmp37, tmp30) - node tmp39 = bit-and(tmp38, out.ready) - in[0].ready := tmp39 - node tmp40 = bit-and(tmp26, UInt<1>(1)) - node tmp41 = gt(tmp40, last-grant17) - node tmp42 = bit-or(tmp41, tmp35) - node tmp43 = bit-and(tmp42, out.ready) - in[1].ready := tmp43 - accessor a44 = in[chosen] - out.valid := a44.valid - accessor a45 = in[chosen] - out.bits := a45.bits - wire w46 : UInt<?> - w46 := UInt<1>(1) - when in[0].valid : - w46 := UInt<1>(0) - node tmp47 = bit-and(in[1].valid, UInt<1>(1)) - node tmp48 = gt(tmp47, last-grant17) - wire w49 : UInt<?> - w49 := w46 - when tmp48 : - w49 := UInt<1>(1) - chosen := w49 - node tmp50 = bit-and(out.ready, out.valid) - when tmp50 : - last-grant17 := chosen - module SumTop : - input sreq : {valid : UInt<1>, bits : {v : UInt<32>, len : UInt<32>}, flip ready : UInt<1>} - output srsp : {valid : UInt<1>, bits : {data : UInt<32>}, flip ready : UInt<1>} - input mreq : {valid : UInt<1>, bits : {wr? : UInt<1>, tag : UInt<8>, addr : UInt<32>, data : UInt<32>}, flip ready : UInt<1>} - output mrsp : {valid : UInt<1>, bits : {tag : UInt<8>, data : UInt<32>}, flip ready : UInt<1>} - inst sum1 of Sum - inst mem12 of Memory - inst mreqs16 of ArbiterRR - mreqs16.in[0] := mreq - mreqs16.in[1] := sum1.mreq - mem12.req := mreqs16.out - sum1.mrsp := mem12.rsp - mrsp := mem12.rsp - srsp := sum1.srsp - sum1.sreq := sreq - diff --git a/test/chisel3/Tbl.fir b/test/chisel3/Tbl.fir deleted file mode 100644 index 013fd098..00000000 --- a/test/chisel3/Tbl.fir +++ /dev/null @@ -1,19 +0,0 @@ -; RUN: firrtl -i %s -o %s.v -X verilog -p c | tee %s.out | FileCheck %s -;CHECK: Done! - -circuit Tbl : - module Tbl : - input i : UInt<16> - input d : UInt<16> - output o : UInt<16> - input we : UInt<1> - - cmem m : UInt<10>[256] - o := UInt<1>(0) - when we : - infer accessor T_13 = m[i] - node T_14 = bits(d, 9, 0) - T_13 := T_14 - else : - infer accessor T_15 = m[i] - o := T_15 diff --git a/test/chisel3/Test.fir b/test/chisel3/Test.fir deleted file mode 100644 index f0d8f80e..00000000 --- a/test/chisel3/Test.fir +++ /dev/null @@ -1,18 +0,0 @@ -; RUN: firrtl -i %s -o %s.v -X verilog -p c | tee %s.out | FileCheck %s -; CHECK: Done! - -circuit Test : - module Test : - input clk : Clock - input reset : UInt<1> - input falling : UInt<1> - - reg hold : UInt<100>, clk, UInt(1) - - hold := UInt("h42") - when reset : - hold := UInt("h7f") - else : - when falling : - hold := UInt("h8f") - diff --git a/test/chisel3/Tile.fir b/test/chisel3/Tile.fir deleted file mode 100644 index 9efb079c..00000000 --- a/test/chisel3/Tile.fir +++ /dev/null @@ -1,1234 +0,0 @@ -; RUN: firrtl -i %s -o %s.v -X verilog -p c | tee %s.out | FileCheck %s -;CHECK: Done! - -circuit Tile : - module ALU : - input B : UInt<32> - output out : UInt<32> - output sum : UInt<32> - input A : UInt<32> - input alu_op : UInt<4> - - node shamt = bits(B, 4, 0) - node T_1554 = add-wrap(A, B) - node T_1555 = sub-wrap(A, B) - node T_1556 = as-SInt(A) - node T_1557 = dshr(T_1556, shamt) - node T_1558 = as-UInt(T_1557) - node T_1559 = dshr(A, shamt) - node T_1560 = dshl(A, shamt) - node T_1561 = bits(T_1560, 31, 0) - node T_1562 = as-SInt(A) - node T_1563 = as-SInt(B) - node T_1564 = lt(T_1562, T_1563) - node T_1565 = as-UInt(T_1564) - node T_1566 = lt(A, B) - node T_1567 = as-UInt(T_1566) - node T_1568 = bit-and(A, B) - node T_1569 = bit-or(A, B) - node T_1570 = bit-xor(A, B) - node T_1571 = eq(UInt<4>(10), alu_op) - node T_1572 = mux(T_1571, A, B) - node T_1573 = eq(UInt<4>(4), alu_op) - node T_1574 = mux(T_1573, T_1570, T_1572) - node T_1575 = eq(UInt<4>(3), alu_op) - node T_1576 = mux(T_1575, T_1569, T_1574) - node T_1577 = eq(UInt<4>(2), alu_op) - node T_1578 = mux(T_1577, T_1568, T_1576) - node T_1579 = eq(UInt<4>(7), alu_op) - node T_1580 = mux(T_1579, T_1567, T_1578) - node T_1581 = eq(UInt<4>(5), alu_op) - node T_1582 = mux(T_1581, T_1565, T_1580) - node T_1583 = eq(UInt<4>(6), alu_op) - node T_1584 = mux(T_1583, T_1561, T_1582) - node T_1585 = eq(UInt<4>(8), alu_op) - node T_1586 = mux(T_1585, T_1559, T_1584) - node T_1587 = eq(UInt<4>(9), alu_op) - node T_1588 = mux(T_1587, T_1558, T_1586) - node T_1589 = eq(UInt<4>(1), alu_op) - node T_1590 = mux(T_1589, T_1555, T_1588) - node T_1591 = eq(UInt<4>(0), alu_op) - node oot = mux(T_1591, T_1554, T_1590) - node T_1592 = bits(oot, 31, 0) - out := T_1592 - node T_1593 = bit(alu_op, 0) - node T_1594 = sub-wrap(UInt<1>(0), B) - node T_1595 = mux(T_1593, T_1594, B) - node T_1596 = add-wrap(A, T_1595) - sum := T_1596 - module BrCond : - input br_type : UInt<3> - input rs1 : UInt<32> - input rs2 : UInt<32> - output taken : UInt<1> - - node eq = eq(rs1, rs2) - node neq = bit-not(eq) - node T_1597 = as-SInt(rs1) - node T_1598 = as-SInt(rs2) - node lt = lt(T_1597, T_1598) - node ge = bit-not(lt) - node ltu = lt(rs1, rs2) - node geu = bit-not(ltu) - node T_1599 = eq(br_type, UInt<3>(2)) - node T_1600 = bit-and(T_1599, eq) - node T_1601 = eq(br_type, UInt<3>(6)) - node T_1602 = bit-and(T_1601, neq) - node T_1603 = bit-or(T_1600, T_1602) - node T_1604 = eq(br_type, UInt<3>(1)) - node T_1605 = bit-and(T_1604, lt) - node T_1606 = bit-or(T_1603, T_1605) - node T_1607 = eq(br_type, UInt<3>(5)) - node T_1608 = bit-and(T_1607, ge) - node T_1609 = bit-or(T_1606, T_1608) - node T_1610 = eq(br_type, UInt<3>(0)) - node T_1611 = bit-and(T_1610, ltu) - node T_1612 = bit-or(T_1609, T_1611) - node T_1613 = eq(br_type, UInt<3>(4)) - node T_1614 = bit-and(T_1613, geu) - node T_1615 = bit-or(T_1612, T_1614) - taken := T_1615 - module RegFile : - input raddr1 : UInt<5> - input raddr2 : UInt<5> - output rdata1 : UInt<32> - output rdata2 : UInt<32> - input wen : UInt<1> - input waddr : UInt<5> - input wdata : UInt<32> - - cmem regs : UInt<32>[32] - node T_1616 = eq(raddr1, UInt<1>(0)) - node T_1617 = bit-not(T_1616) - infer accessor T_1618 = regs[raddr1] - node T_1619 = mux(T_1617, T_1618, UInt<1>(0)) - rdata1 := T_1619 - node T_1620 = eq(raddr2, UInt<1>(0)) - node T_1621 = bit-not(T_1620) - infer accessor T_1622 = regs[raddr2] - node T_1623 = mux(T_1621, T_1622, UInt<1>(0)) - rdata2 := T_1623 - node T_1624 = eq(waddr, UInt<1>(0)) - node T_1625 = bit-not(T_1624) - node T_1626 = bit-and(wen, T_1625) - when T_1626 : - infer accessor T_1627 = regs[waddr] - T_1627 := wdata - module ImmGenWire : - output out : UInt<32> - input inst : UInt<32> - input sel : UInt<3> - - node T_1628 = bits(inst, 31, 20) - node Iimm = as-SInt(T_1628) - node T_1629 = bits(inst, 31, 25) - node T_1630 = bits(inst, 11, 7) - node T_1631 = cat(T_1629, T_1630) - node Simm = as-SInt(T_1631) - node T_1632 = bit(inst, 31) - node T_1633 = bit(inst, 7) - node T_1634 = bits(inst, 30, 25) - node T_1635 = bits(inst, 11, 8) - node T_1636 = cat(T_1632, T_1633) - node T_1637 = cat(T_1635, UInt<1>(0)) - node T_1638 = cat(T_1634, T_1637) - node T_1639 = cat(T_1636, T_1638) - node Bimm = as-SInt(T_1639) - node T_1640 = bits(inst, 31, 12) - node T_1641 = cat(T_1640, UInt<12>(0)) - node Uimm = as-SInt(T_1641) - node T_1642 = bit(inst, 31) - node T_1643 = bits(inst, 19, 12) - node T_1644 = bit(inst, 20) - node T_1645 = bits(inst, 30, 25) - node T_1646 = bits(inst, 24, 21) - node T_1647 = cat(T_1643, T_1644) - node T_1648 = cat(T_1642, T_1647) - node T_1649 = cat(T_1646, UInt<1>(0)) - node T_1650 = cat(T_1645, T_1649) - node T_1651 = cat(T_1648, T_1650) - node Jimm = as-SInt(T_1651) - node T_1652 = bits(inst, 19, 15) - node T_1653 = pad(T_1652, 32) - node Zimm = as-SInt(T_1653) - node T_1654 = eq(UInt<3>(3), sel) - node T_1655 = mux(T_1654, Jimm, Zimm) - node T_1656 = eq(UInt<3>(2), sel) - node T_1657 = mux(T_1656, Uimm, T_1655) - node T_1658 = eq(UInt<3>(4), sel) - node T_1659 = mux(T_1658, Bimm, T_1657) - node T_1660 = eq(UInt<3>(1), sel) - node T_1661 = mux(T_1660, Simm, T_1659) - node T_1662 = eq(UInt<3>(0), sel) - node T_1663 = mux(T_1662, Iimm, T_1661) - node T_1664 = as-UInt(T_1663) - out := T_1664 - module CSR : - output host : {status : UInt<32>, flip hid : UInt<1>, tohost : UInt<32>} - input cmd : UInt<2> - input src : UInt<32> - output data : UInt<32> - input addr : UInt<12> - - reg reg_tohost : UInt<32> - on-reset reg_tohost := UInt<32>(0) - reg reg_status : UInt<32> - on-reset reg_status := UInt<32>(0) - host.tohost := reg_tohost - host.status := reg_status - node T_1665 = eq(UInt<12>(1291), addr) - node T_1666 = mux(T_1665, host.hid, UInt<1>(0)) - node T_1667 = eq(UInt<12>(1290), addr) - node T_1668 = mux(T_1667, reg_status, T_1666) - node T_1669 = eq(UInt<12>(1310), addr) - node T_1670 = mux(T_1669, reg_tohost, T_1668) - data := T_1670 - node T_1671 = eq(cmd, UInt<2>(1)) - when T_1671 : - node T_1672 = eq(addr, UInt<12>(1310)) - when T_1672 : reg_tohost := src - node T_1673 = eq(addr, UInt<12>(1290)) - when T_1673 : reg_status := src - node T_1674 = eq(cmd, UInt<2>(2)) - node T_1675 = neq(src, UInt<1>(0)) - node T_1676 = bit-and(T_1674, T_1675) - when T_1676 : - node T_1677 = eq(addr, UInt<12>(1310)) - when T_1677 : - node T_1678 = dshl(UInt<1>(1), bits(src,5,0)) - node T_1679 = bit-or(data, T_1678) - reg_tohost := T_1679 - node T_1680 = eq(addr, UInt<12>(1290)) - when T_1680 : - node T_1681 = dshl(UInt<1>(1), bits(src,5,0)) - node T_1682 = bit-or(data, T_1681) - reg_status := T_1682 - node T_1683 = eq(cmd, UInt<2>(3)) - node T_1684 = neq(src, UInt<1>(0)) - node T_1685 = bit-and(T_1683, T_1684) - when T_1685 : - node T_1686 = eq(addr, UInt<12>(1310)) - when T_1686 : - node T_1687 = dshl(UInt<1>(0), bits(src,5,0)) - node T_1688 = bit-and(data, T_1687) - reg_tohost := T_1688 - node T_1689 = eq(addr, UInt<12>(1290)) - when T_1689 : - node T_1690 = dshl(UInt<1>(0), bits(src,5,0)) - node T_1691 = bit-and(data, T_1690) - reg_status := T_1691 - module Datapath : - output host : {status : UInt<32>, flip hid : UInt<1>, tohost : UInt<32>} - input stall : UInt<1> - output icache : {re : UInt<1>, flip dout : UInt<32>, we : UInt<4>, addr : UInt<32>, din : UInt<32>} - output dcache : {re : UInt<1>, flip dout : UInt<32>, we : UInt<4>, addr : UInt<32>, din : UInt<32>} - input ctrl : {flip inst : UInt<32>, flip stall : UInt<1>, inst_re : UInt<1>, inst_type : UInt<1>, pc_sel : UInt<1>, A_sel : UInt<1>, B_sel : UInt<1>, imm_sel : UInt<3>, alu_op : UInt<4>, br_type : UInt<3>, data_re : UInt<1>, st_type : UInt<2>, ld_type : UInt<3>, wb_sel : UInt<2>, wb_en : UInt<1>, csr_cmd : UInt<2>} - - inst alu of ALU - inst brCond of BrCond - inst regFile of RegFile - inst immGen of ImmGenWire - reg fe_inst : UInt<32> - on-reset fe_inst := UInt<32>(0) - reg fe_pc : UInt - reg ew_inst : UInt<32> - on-reset ew_inst := UInt<32>(0) - reg ew_pc : UInt - reg ew_alu : UInt - node T_1692 = sub-wrap(UInt<14>(8192), UInt<32>(4)) - reg pc : UInt<32> - on-reset pc := T_1692 - node T_1693 = eq(ctrl.pc_sel, UInt<1>(1)) - node T_1694 = bit-or(T_1693, brCond.taken) - node T_1695 = add-wrap(pc, UInt<3>(4)) - node iaddr = mux(T_1694, alu.sum, T_1695) - node T_1696 = eq(ctrl.inst_type, UInt<1>(1)) - node T_1697 = bit-or(T_1696, brCond.taken) - node inst = mux(T_1697, UInt<32>(19), icache.dout) - icache.we := UInt<1>(0) - icache.din := UInt<1>(0) - icache.addr := iaddr - icache.re := ctrl.inst_re - node T_1698 = eq(dcache.we, UInt<1>(0)) - node T_1699 = bit-not(T_1698) - node T_1700 = bit-not(T_1699) - node T_1701 = bit-and(icache.re, T_1700) - node T_1702 = mux(T_1701, iaddr, pc) - pc := T_1702 - node T_1703 = bit-not(stall) - when T_1703 : - fe_pc := pc - fe_inst := inst - ctrl.inst := fe_inst - ctrl.stall := stall - node rd_addr = bits(fe_inst, 11, 7) - node rs1_addr = bits(fe_inst, 19, 15) - node rs2_addr = bits(fe_inst, 24, 20) - regFile.raddr1 := rs1_addr - regFile.raddr2 := rs2_addr - immGen.inst := fe_inst - immGen.sel := ctrl.imm_sel - node T_1704 = eq(rs1_addr, UInt<1>(0)) - node rs1NotZero = bit-not(T_1704) - node T_1705 = eq(rs2_addr, UInt<1>(0)) - node rs2NotZero = bit-not(T_1705) - node T_1706 = eq(ctrl.wb_sel, UInt<2>(0)) - node alutype = bit-and(ctrl.wb_en, T_1706) - node ex_rd_addr = bits(ew_inst, 11, 7) - node T_1707 = bit-and(alutype, rs1NotZero) - node T_1708 = eq(rs1_addr, ex_rd_addr) - node T_1709 = bit-and(T_1707, T_1708) - node rs1 = mux(T_1709, ew_alu, regFile.rdata1) - node T_1710 = bit-and(alutype, rs2NotZero) - node T_1711 = eq(rs2_addr, ex_rd_addr) - node T_1712 = bit-and(T_1710, T_1711) - node rs2 = mux(T_1712, ew_alu, regFile.rdata2) - node T_1713 = eq(ctrl.A_sel, UInt<1>(0)) - node T_1714 = mux(T_1713, rs1, fe_pc) - alu.A := T_1714 - node T_1715 = eq(ctrl.B_sel, UInt<1>(0)) - node T_1716 = mux(T_1715, rs2, immGen.out) - alu.B := T_1716 - alu.alu_op := ctrl.alu_op - brCond.rs1 := rs1 - brCond.rs2 := rs2 - brCond.br_type := ctrl.br_type - node T_1717 = bit(alu.sum, 1) - node T_1718 = dshl(T_1717, UInt<3>(4)) - node T_1719 = bit(alu.sum, 0) - node T_1720 = dshl(T_1719, UInt<2>(3)) - node woffset = bit-or(T_1718, T_1720) - dcache.re := ctrl.data_re - node T_1721 = mux(stall, ew_alu, alu.sum) - dcache.addr := T_1721 - node T_1722 = bits(alu.sum, 1, 0) - node T_1723 = dshl(UInt<2>(3), T_1722) - node T_1724 = bits(T_1723, 3, 0) - node T_1725 = bits(alu.sum, 1, 0) - node T_1726 = dshl(UInt<1>(1), T_1725) - node T_1727 = bits(T_1726, 3, 0) - node T_1728 = eq(UInt<2>(2), ctrl.st_type) - node T_1729 = mux(T_1728, T_1727, UInt<4>(0)) - node T_1730 = eq(UInt<2>(1), ctrl.st_type) - node T_1731 = mux(T_1730, T_1724, T_1729) - node T_1732 = eq(UInt<2>(0), ctrl.st_type) - node T_1733 = mux(T_1732, UInt<4>(15), T_1731) - node T_1734 = mux(stall, UInt<4>(0), T_1733) - dcache.we := T_1734 - node T_1735 = dshl(rs2, woffset) - node T_1736 = bits(T_1735, 31, 0) - dcache.din := T_1736 - node T_1737 = bit-not(stall) - when T_1737 : - ew_pc := fe_pc - ew_inst := fe_inst - ew_alu := alu.out - node T_1738 = bit(ew_alu, 1) - node T_1739 = dshl(T_1738, UInt<3>(4)) - node T_1740 = bit(ew_alu, 0) - node T_1741 = dshl(T_1740, UInt<2>(3)) - node loffset = bit-or(T_1739, T_1741) - node lshift = dshr(dcache.dout, loffset) - node T_1742 = bits(lshift, 15, 0) - node T_1743 = as-SInt(T_1742) - node T_1744 = pad(T_1743, 32) - node T_1745 = as-UInt(T_1744) - node T_1746 = bits(lshift, 7, 0) - node T_1747 = as-SInt(T_1746) - node T_1748 = pad(T_1747, 32) - node T_1749 = as-UInt(T_1748) - node T_1750 = bits(lshift, 15, 0) - node T_1751 = bits(lshift, 7, 0) - node T_1752 = eq(UInt<3>(4), ctrl.ld_type) - node T_1753 = mux(T_1752, T_1751, dcache.dout) - node T_1754 = eq(UInt<3>(3), ctrl.ld_type) - node T_1755 = mux(T_1754, T_1750, T_1753) - node T_1756 = eq(UInt<3>(2), ctrl.ld_type) - node T_1757 = mux(T_1756, T_1749, T_1755) - node T_1758 = eq(UInt<3>(1), ctrl.ld_type) - node load = mux(T_1758, T_1745, T_1757) - inst csr of CSR - host := csr.host - csr.src := ew_alu - node T_1759 = bits(ew_inst, 31, 20) - csr.addr := T_1759 - csr.cmd := ctrl.csr_cmd - node T_1760 = add-wrap(ew_pc, UInt<3>(4)) - node T_1761 = eq(UInt<2>(3), ctrl.wb_sel) - node T_1762 = mux(T_1761, csr.data, ew_alu) - node T_1763 = eq(UInt<2>(2), ctrl.wb_sel) - node T_1764 = mux(T_1763, T_1760, T_1762) - node T_1765 = eq(UInt<2>(1), ctrl.wb_sel) - node regWrite = mux(T_1765, load, T_1764) - regFile.wen := ctrl.wb_en - regFile.waddr := ex_rd_addr - regFile.wdata := regWrite - module Control : - output ctrl : {flip inst : UInt<32>, flip stall : UInt<1>, inst_re : UInt<1>, inst_type : UInt<1>, pc_sel : UInt<1>, A_sel : UInt<1>, B_sel : UInt<1>, imm_sel : UInt<3>, alu_op : UInt<4>, br_type : UInt<3>, data_re : UInt<1>, st_type : UInt<2>, ld_type : UInt<3>, wb_sel : UInt<2>, wb_en : UInt<1>, csr_cmd : UInt<2>} - - node T_1766 = bit-and(UInt<7>(127), ctrl.inst) - node T_1767 = eq(T_1766, UInt<6>(55)) - node T_1768 = bit-and(UInt<7>(127), ctrl.inst) - node T_1769 = eq(T_1768, UInt<5>(23)) - node T_1770 = bit-and(UInt<7>(127), ctrl.inst) - node T_1771 = eq(T_1770, UInt<7>(111)) - node T_1772 = bit-and(UInt<15>(28799), ctrl.inst) - node T_1773 = eq(T_1772, UInt<7>(103)) - node T_1774 = bit-and(UInt<15>(28799), ctrl.inst) - node T_1775 = eq(T_1774, UInt<7>(99)) - node T_1776 = bit-and(UInt<15>(28799), ctrl.inst) - node T_1777 = eq(T_1776, UInt<13>(4195)) - node T_1778 = bit-and(UInt<15>(28799), ctrl.inst) - node T_1779 = eq(T_1778, UInt<15>(16483)) - node T_1780 = bit-and(UInt<15>(28799), ctrl.inst) - node T_1781 = eq(T_1780, UInt<15>(20579)) - node T_1782 = bit-and(UInt<15>(28799), ctrl.inst) - node T_1783 = eq(T_1782, UInt<15>(24675)) - node T_1784 = bit-and(UInt<15>(28799), ctrl.inst) - node T_1785 = eq(T_1784, UInt<15>(28771)) - node T_1786 = bit-and(UInt<15>(28799), ctrl.inst) - node T_1787 = eq(T_1786, UInt<2>(3)) - node T_1788 = bit-and(UInt<15>(28799), ctrl.inst) - node T_1789 = eq(T_1788, UInt<13>(4099)) - node T_1790 = bit-and(UInt<15>(28799), ctrl.inst) - node T_1791 = eq(T_1790, UInt<14>(8195)) - node T_1792 = bit-and(UInt<15>(28799), ctrl.inst) - node T_1793 = eq(T_1792, UInt<15>(16387)) - node T_1794 = bit-and(UInt<15>(28799), ctrl.inst) - node T_1795 = eq(T_1794, UInt<15>(20483)) - node T_1796 = bit-and(UInt<15>(28799), ctrl.inst) - node T_1797 = eq(T_1796, UInt<6>(35)) - node T_1798 = bit-and(UInt<15>(28799), ctrl.inst) - node T_1799 = eq(T_1798, UInt<13>(4131)) - node T_1800 = bit-and(UInt<15>(28799), ctrl.inst) - node T_1801 = eq(T_1800, UInt<14>(8227)) - node T_1802 = bit-and(UInt<15>(28799), ctrl.inst) - node T_1803 = eq(T_1802, UInt<5>(19)) - node T_1804 = bit-and(UInt<15>(28799), ctrl.inst) - node T_1805 = eq(T_1804, UInt<14>(8211)) - node T_1806 = bit-and(UInt<15>(28799), ctrl.inst) - node T_1807 = eq(T_1806, UInt<14>(12307)) - node T_1808 = bit-and(UInt<15>(28799), ctrl.inst) - node T_1809 = eq(T_1808, UInt<15>(16403)) - node T_1810 = bit-and(UInt<15>(28799), ctrl.inst) - node T_1811 = eq(T_1810, UInt<15>(24595)) - node T_1812 = bit-and(UInt<15>(28799), ctrl.inst) - node T_1813 = eq(T_1812, UInt<15>(28691)) - node T_1814 = bit-and(UInt<32>(4261441663), ctrl.inst) - node T_1815 = eq(T_1814, UInt<13>(4115)) - node T_1816 = bit-and(UInt<32>(4261441663), ctrl.inst) - node T_1817 = eq(T_1816, UInt<15>(20499)) - node T_1818 = bit-and(UInt<32>(4261441663), ctrl.inst) - node T_1819 = eq(T_1818, UInt<31>(1073762323)) - node T_1820 = bit-and(UInt<32>(4261441663), ctrl.inst) - node T_1821 = eq(T_1820, UInt<6>(51)) - node T_1822 = bit-and(UInt<32>(4261441663), ctrl.inst) - node T_1823 = eq(T_1822, UInt<31>(1073741875)) - node T_1824 = bit-and(UInt<32>(4261441663), ctrl.inst) - node T_1825 = eq(T_1824, UInt<13>(4147)) - node T_1826 = bit-and(UInt<32>(4261441663), ctrl.inst) - node T_1827 = eq(T_1826, UInt<14>(8243)) - node T_1828 = bit-and(UInt<32>(4261441663), ctrl.inst) - node T_1829 = eq(T_1828, UInt<14>(12339)) - node T_1830 = bit-and(UInt<32>(4261441663), ctrl.inst) - node T_1831 = eq(T_1830, UInt<15>(16435)) - node T_1832 = bit-and(UInt<32>(4261441663), ctrl.inst) - node T_1833 = eq(T_1832, UInt<15>(20531)) - node T_1834 = bit-and(UInt<32>(4261441663), ctrl.inst) - node T_1835 = eq(T_1834, UInt<31>(1073762355)) - node T_1836 = bit-and(UInt<32>(4261441663), ctrl.inst) - node T_1837 = eq(T_1836, UInt<15>(24627)) - node T_1838 = bit-and(UInt<32>(4261441663), ctrl.inst) - node T_1839 = eq(T_1838, UInt<15>(28723)) - node T_1840 = bit-and(UInt<15>(28799), ctrl.inst) - node T_1841 = eq(T_1840, UInt<13>(4211)) - node T_1842 = bit-and(UInt<15>(28799), ctrl.inst) - node T_1843 = eq(T_1842, UInt<14>(8307)) - node T_1844 = bit-and(UInt<15>(28799), ctrl.inst) - node T_1845 = eq(T_1844, UInt<14>(12403)) - node T_1846 = bit-and(UInt<15>(28799), ctrl.inst) - node T_1847 = eq(T_1846, UInt<15>(20595)) - node T_1848 = bit-and(UInt<15>(28799), ctrl.inst) - node T_1849 = eq(T_1848, UInt<15>(24691)) - node T_1850 = bit-and(UInt<15>(28799), ctrl.inst) - node T_1851 = eq(T_1850, UInt<15>(28787)) - node T_1852 = mux(T_1851, UInt<1>(0), UInt<1>(0)) - node T_1853 = mux(T_1849, UInt<1>(0), T_1852) - node T_1854 = mux(T_1847, UInt<1>(0), T_1853) - node T_1855 = mux(T_1845, UInt<1>(0), T_1854) - node T_1856 = mux(T_1843, UInt<1>(0), T_1855) - node T_1857 = mux(T_1841, UInt<1>(0), T_1856) - node T_1858 = mux(T_1839, UInt<1>(0), T_1857) - node T_1859 = mux(T_1837, UInt<1>(0), T_1858) - node T_1860 = mux(T_1835, UInt<1>(0), T_1859) - node T_1861 = mux(T_1833, UInt<1>(0), T_1860) - node T_1862 = mux(T_1831, UInt<1>(0), T_1861) - node T_1863 = mux(T_1829, UInt<1>(0), T_1862) - node T_1864 = mux(T_1827, UInt<1>(0), T_1863) - node T_1865 = mux(T_1825, UInt<1>(0), T_1864) - node T_1866 = mux(T_1823, UInt<1>(0), T_1865) - node T_1867 = mux(T_1821, UInt<1>(0), T_1866) - node T_1868 = mux(T_1819, UInt<1>(0), T_1867) - node T_1869 = mux(T_1817, UInt<1>(0), T_1868) - node T_1870 = mux(T_1815, UInt<1>(0), T_1869) - node T_1871 = mux(T_1813, UInt<1>(0), T_1870) - node T_1872 = mux(T_1811, UInt<1>(0), T_1871) - node T_1873 = mux(T_1809, UInt<1>(0), T_1872) - node T_1874 = mux(T_1807, UInt<1>(0), T_1873) - node T_1875 = mux(T_1805, UInt<1>(0), T_1874) - node T_1876 = mux(T_1803, UInt<1>(0), T_1875) - node T_1877 = mux(T_1801, UInt<1>(0), T_1876) - node T_1878 = mux(T_1799, UInt<1>(0), T_1877) - node T_1879 = mux(T_1797, UInt<1>(0), T_1878) - node T_1880 = mux(T_1795, UInt<1>(0), T_1879) - node T_1881 = mux(T_1793, UInt<1>(0), T_1880) - node T_1882 = mux(T_1791, UInt<1>(0), T_1881) - node T_1883 = mux(T_1789, UInt<1>(0), T_1882) - node T_1884 = mux(T_1787, UInt<1>(0), T_1883) - node T_1885 = mux(T_1785, UInt<1>(0), T_1884) - node T_1886 = mux(T_1783, UInt<1>(0), T_1885) - node T_1887 = mux(T_1781, UInt<1>(0), T_1886) - node T_1888 = mux(T_1779, UInt<1>(0), T_1887) - node T_1889 = mux(T_1777, UInt<1>(0), T_1888) - node T_1890 = mux(T_1775, UInt<1>(0), T_1889) - node T_1891 = mux(T_1773, UInt<1>(1), T_1890) - node T_1892 = mux(T_1771, UInt<1>(1), T_1891) - node T_1893 = mux(T_1769, UInt<1>(0), T_1892) - node T_1894 = mux(T_1767, UInt<1>(0), T_1893) - node T_1895 = mux(T_1851, UInt<1>(1), UInt<1>(1)) - node T_1896 = mux(T_1849, UInt<1>(1), T_1895) - node T_1897 = mux(T_1847, UInt<1>(1), T_1896) - node T_1898 = mux(T_1845, UInt<1>(0), T_1897) - node T_1899 = mux(T_1843, UInt<1>(0), T_1898) - node T_1900 = mux(T_1841, UInt<1>(0), T_1899) - node T_1901 = mux(T_1839, UInt<1>(0), T_1900) - node T_1902 = mux(T_1837, UInt<1>(0), T_1901) - node T_1903 = mux(T_1835, UInt<1>(0), T_1902) - node T_1904 = mux(T_1833, UInt<1>(0), T_1903) - node T_1905 = mux(T_1831, UInt<1>(0), T_1904) - node T_1906 = mux(T_1829, UInt<1>(0), T_1905) - node T_1907 = mux(T_1827, UInt<1>(0), T_1906) - node T_1908 = mux(T_1825, UInt<1>(0), T_1907) - node T_1909 = mux(T_1823, UInt<1>(0), T_1908) - node T_1910 = mux(T_1821, UInt<1>(0), T_1909) - node T_1911 = mux(T_1819, UInt<1>(0), T_1910) - node T_1912 = mux(T_1817, UInt<1>(0), T_1911) - node T_1913 = mux(T_1815, UInt<1>(0), T_1912) - node T_1914 = mux(T_1813, UInt<1>(0), T_1913) - node T_1915 = mux(T_1811, UInt<1>(0), T_1914) - node T_1916 = mux(T_1809, UInt<1>(0), T_1915) - node T_1917 = mux(T_1807, UInt<1>(0), T_1916) - node T_1918 = mux(T_1805, UInt<1>(0), T_1917) - node T_1919 = mux(T_1803, UInt<1>(0), T_1918) - node T_1920 = mux(T_1801, UInt<1>(0), T_1919) - node T_1921 = mux(T_1799, UInt<1>(0), T_1920) - node T_1922 = mux(T_1797, UInt<1>(0), T_1921) - node T_1923 = mux(T_1795, UInt<1>(0), T_1922) - node T_1924 = mux(T_1793, UInt<1>(0), T_1923) - node T_1925 = mux(T_1791, UInt<1>(0), T_1924) - node T_1926 = mux(T_1789, UInt<1>(0), T_1925) - node T_1927 = mux(T_1787, UInt<1>(0), T_1926) - node T_1928 = mux(T_1785, UInt<1>(1), T_1927) - node T_1929 = mux(T_1783, UInt<1>(1), T_1928) - node T_1930 = mux(T_1781, UInt<1>(1), T_1929) - node T_1931 = mux(T_1779, UInt<1>(1), T_1930) - node T_1932 = mux(T_1777, UInt<1>(1), T_1931) - node T_1933 = mux(T_1775, UInt<1>(1), T_1932) - node T_1934 = mux(T_1773, UInt<1>(0), T_1933) - node T_1935 = mux(T_1771, UInt<1>(1), T_1934) - node T_1936 = mux(T_1769, UInt<1>(1), T_1935) - node T_1937 = mux(T_1767, UInt<1>(1), T_1936) - node T_1938 = mux(T_1851, UInt<1>(1), UInt<1>(0)) - node T_1939 = mux(T_1849, UInt<1>(1), T_1938) - node T_1940 = mux(T_1847, UInt<1>(1), T_1939) - node T_1941 = mux(T_1845, UInt<1>(0), T_1940) - node T_1942 = mux(T_1843, UInt<1>(0), T_1941) - node T_1943 = mux(T_1841, UInt<1>(0), T_1942) - node T_1944 = mux(T_1839, UInt<1>(0), T_1943) - node T_1945 = mux(T_1837, UInt<1>(0), T_1944) - node T_1946 = mux(T_1835, UInt<1>(0), T_1945) - node T_1947 = mux(T_1833, UInt<1>(0), T_1946) - node T_1948 = mux(T_1831, UInt<1>(0), T_1947) - node T_1949 = mux(T_1829, UInt<1>(0), T_1948) - node T_1950 = mux(T_1827, UInt<1>(0), T_1949) - node T_1951 = mux(T_1825, UInt<1>(0), T_1950) - node T_1952 = mux(T_1823, UInt<1>(0), T_1951) - node T_1953 = mux(T_1821, UInt<1>(0), T_1952) - node T_1954 = mux(T_1819, UInt<1>(1), T_1953) - node T_1955 = mux(T_1817, UInt<1>(1), T_1954) - node T_1956 = mux(T_1815, UInt<1>(1), T_1955) - node T_1957 = mux(T_1813, UInt<1>(1), T_1956) - node T_1958 = mux(T_1811, UInt<1>(1), T_1957) - node T_1959 = mux(T_1809, UInt<1>(1), T_1958) - node T_1960 = mux(T_1807, UInt<1>(1), T_1959) - node T_1961 = mux(T_1805, UInt<1>(1), T_1960) - node T_1962 = mux(T_1803, UInt<1>(1), T_1961) - node T_1963 = mux(T_1801, UInt<1>(1), T_1962) - node T_1964 = mux(T_1799, UInt<1>(1), T_1963) - node T_1965 = mux(T_1797, UInt<1>(1), T_1964) - node T_1966 = mux(T_1795, UInt<1>(1), T_1965) - node T_1967 = mux(T_1793, UInt<1>(1), T_1966) - node T_1968 = mux(T_1791, UInt<1>(1), T_1967) - node T_1969 = mux(T_1789, UInt<1>(1), T_1968) - node T_1970 = mux(T_1787, UInt<1>(1), T_1969) - node T_1971 = mux(T_1785, UInt<1>(1), T_1970) - node T_1972 = mux(T_1783, UInt<1>(1), T_1971) - node T_1973 = mux(T_1781, UInt<1>(1), T_1972) - node T_1974 = mux(T_1779, UInt<1>(1), T_1973) - node T_1975 = mux(T_1777, UInt<1>(1), T_1974) - node T_1976 = mux(T_1775, UInt<1>(1), T_1975) - node T_1977 = mux(T_1773, UInt<1>(1), T_1976) - node T_1978 = mux(T_1771, UInt<1>(1), T_1977) - node T_1979 = mux(T_1769, UInt<1>(1), T_1978) - node T_1980 = mux(T_1767, UInt<1>(1), T_1979) - node T_1981 = mux(T_1851, UInt<3>(5), UInt<3>(7)) - node T_1982 = mux(T_1849, UInt<3>(5), T_1981) - node T_1983 = mux(T_1847, UInt<3>(5), T_1982) - node T_1984 = mux(T_1845, UInt<3>(5), T_1983) - node T_1985 = mux(T_1843, UInt<3>(5), T_1984) - node T_1986 = mux(T_1841, UInt<3>(5), T_1985) - node T_1987 = mux(T_1839, UInt<3>(7), T_1986) - node T_1988 = mux(T_1837, UInt<3>(7), T_1987) - node T_1989 = mux(T_1835, UInt<3>(7), T_1988) - node T_1990 = mux(T_1833, UInt<3>(7), T_1989) - node T_1991 = mux(T_1831, UInt<3>(7), T_1990) - node T_1992 = mux(T_1829, UInt<3>(7), T_1991) - node T_1993 = mux(T_1827, UInt<3>(7), T_1992) - node T_1994 = mux(T_1825, UInt<3>(7), T_1993) - node T_1995 = mux(T_1823, UInt<3>(7), T_1994) - node T_1996 = mux(T_1821, UInt<3>(7), T_1995) - node T_1997 = mux(T_1819, UInt<3>(0), T_1996) - node T_1998 = mux(T_1817, UInt<3>(0), T_1997) - node T_1999 = mux(T_1815, UInt<3>(0), T_1998) - node T_2000 = mux(T_1813, UInt<3>(0), T_1999) - node T_2001 = mux(T_1811, UInt<3>(0), T_2000) - node T_2002 = mux(T_1809, UInt<3>(0), T_2001) - node T_2003 = mux(T_1807, UInt<3>(0), T_2002) - node T_2004 = mux(T_1805, UInt<3>(0), T_2003) - node T_2005 = mux(T_1803, UInt<3>(0), T_2004) - node T_2006 = mux(T_1801, UInt<3>(1), T_2005) - node T_2007 = mux(T_1799, UInt<3>(1), T_2006) - node T_2008 = mux(T_1797, UInt<3>(1), T_2007) - node T_2009 = mux(T_1795, UInt<3>(0), T_2008) - node T_2010 = mux(T_1793, UInt<3>(0), T_2009) - node T_2011 = mux(T_1791, UInt<3>(0), T_2010) - node T_2012 = mux(T_1789, UInt<3>(0), T_2011) - node T_2013 = mux(T_1787, UInt<3>(0), T_2012) - node T_2014 = mux(T_1785, UInt<3>(4), T_2013) - node T_2015 = mux(T_1783, UInt<3>(4), T_2014) - node T_2016 = mux(T_1781, UInt<3>(4), T_2015) - node T_2017 = mux(T_1779, UInt<3>(4), T_2016) - node T_2018 = mux(T_1777, UInt<3>(4), T_2017) - node T_2019 = mux(T_1775, UInt<3>(4), T_2018) - node T_2020 = mux(T_1773, UInt<3>(0), T_2019) - node T_2021 = mux(T_1771, UInt<3>(3), T_2020) - node T_2022 = mux(T_1769, UInt<3>(2), T_2021) - node T_2023 = mux(T_1767, UInt<3>(2), T_2022) - node T_2024 = mux(T_1851, UInt<4>(11), UInt<4>(15)) - node T_2025 = mux(T_1849, UInt<4>(11), T_2024) - node T_2026 = mux(T_1847, UInt<4>(11), T_2025) - node T_2027 = mux(T_1845, UInt<4>(10), T_2026) - node T_2028 = mux(T_1843, UInt<4>(10), T_2027) - node T_2029 = mux(T_1841, UInt<4>(10), T_2028) - node T_2030 = mux(T_1839, UInt<4>(2), T_2029) - node T_2031 = mux(T_1837, UInt<4>(3), T_2030) - node T_2032 = mux(T_1835, UInt<4>(9), T_2031) - node T_2033 = mux(T_1833, UInt<4>(8), T_2032) - node T_2034 = mux(T_1831, UInt<4>(4), T_2033) - node T_2035 = mux(T_1829, UInt<4>(7), T_2034) - node T_2036 = mux(T_1827, UInt<4>(5), T_2035) - node T_2037 = mux(T_1825, UInt<4>(6), T_2036) - node T_2038 = mux(T_1823, UInt<4>(1), T_2037) - node T_2039 = mux(T_1821, UInt<4>(0), T_2038) - node T_2040 = mux(T_1819, UInt<4>(9), T_2039) - node T_2041 = mux(T_1817, UInt<4>(8), T_2040) - node T_2042 = mux(T_1815, UInt<4>(6), T_2041) - node T_2043 = mux(T_1813, UInt<4>(2), T_2042) - node T_2044 = mux(T_1811, UInt<4>(3), T_2043) - node T_2045 = mux(T_1809, UInt<4>(4), T_2044) - node T_2046 = mux(T_1807, UInt<4>(7), T_2045) - node T_2047 = mux(T_1805, UInt<4>(5), T_2046) - node T_2048 = mux(T_1803, UInt<4>(0), T_2047) - node T_2049 = mux(T_1801, UInt<4>(0), T_2048) - node T_2050 = mux(T_1799, UInt<4>(0), T_2049) - node T_2051 = mux(T_1797, UInt<4>(0), T_2050) - node T_2052 = mux(T_1795, UInt<4>(0), T_2051) - node T_2053 = mux(T_1793, UInt<4>(0), T_2052) - node T_2054 = mux(T_1791, UInt<4>(0), T_2053) - node T_2055 = mux(T_1789, UInt<4>(0), T_2054) - node T_2056 = mux(T_1787, UInt<4>(0), T_2055) - node T_2057 = mux(T_1785, UInt<4>(0), T_2056) - node T_2058 = mux(T_1783, UInt<4>(0), T_2057) - node T_2059 = mux(T_1781, UInt<4>(0), T_2058) - node T_2060 = mux(T_1779, UInt<4>(0), T_2059) - node T_2061 = mux(T_1777, UInt<4>(0), T_2060) - node T_2062 = mux(T_1775, UInt<4>(0), T_2061) - node T_2063 = mux(T_1773, UInt<4>(0), T_2062) - node T_2064 = mux(T_1771, UInt<4>(0), T_2063) - node T_2065 = mux(T_1769, UInt<4>(0), T_2064) - node T_2066 = mux(T_1767, UInt<4>(11), T_2065) - node T_2067 = mux(T_1851, UInt<3>(7), UInt<3>(7)) - node T_2068 = mux(T_1849, UInt<3>(7), T_2067) - node T_2069 = mux(T_1847, UInt<3>(7), T_2068) - node T_2070 = mux(T_1845, UInt<3>(7), T_2069) - node T_2071 = mux(T_1843, UInt<3>(7), T_2070) - node T_2072 = mux(T_1841, UInt<3>(7), T_2071) - node T_2073 = mux(T_1839, UInt<3>(7), T_2072) - node T_2074 = mux(T_1837, UInt<3>(7), T_2073) - node T_2075 = mux(T_1835, UInt<3>(7), T_2074) - node T_2076 = mux(T_1833, UInt<3>(7), T_2075) - node T_2077 = mux(T_1831, UInt<3>(7), T_2076) - node T_2078 = mux(T_1829, UInt<3>(7), T_2077) - node T_2079 = mux(T_1827, UInt<3>(7), T_2078) - node T_2080 = mux(T_1825, UInt<3>(7), T_2079) - node T_2081 = mux(T_1823, UInt<3>(7), T_2080) - node T_2082 = mux(T_1821, UInt<3>(7), T_2081) - node T_2083 = mux(T_1819, UInt<3>(7), T_2082) - node T_2084 = mux(T_1817, UInt<3>(7), T_2083) - node T_2085 = mux(T_1815, UInt<3>(7), T_2084) - node T_2086 = mux(T_1813, UInt<3>(7), T_2085) - node T_2087 = mux(T_1811, UInt<3>(7), T_2086) - node T_2088 = mux(T_1809, UInt<3>(7), T_2087) - node T_2089 = mux(T_1807, UInt<3>(7), T_2088) - node T_2090 = mux(T_1805, UInt<3>(7), T_2089) - node T_2091 = mux(T_1803, UInt<3>(7), T_2090) - node T_2092 = mux(T_1801, UInt<3>(7), T_2091) - node T_2093 = mux(T_1799, UInt<3>(7), T_2092) - node T_2094 = mux(T_1797, UInt<3>(7), T_2093) - node T_2095 = mux(T_1795, UInt<3>(7), T_2094) - node T_2096 = mux(T_1793, UInt<3>(7), T_2095) - node T_2097 = mux(T_1791, UInt<3>(7), T_2096) - node T_2098 = mux(T_1789, UInt<3>(7), T_2097) - node T_2099 = mux(T_1787, UInt<3>(7), T_2098) - node T_2100 = mux(T_1785, UInt<3>(4), T_2099) - node T_2101 = mux(T_1783, UInt<3>(0), T_2100) - node T_2102 = mux(T_1781, UInt<3>(5), T_2101) - node T_2103 = mux(T_1779, UInt<3>(1), T_2102) - node T_2104 = mux(T_1777, UInt<3>(6), T_2103) - node T_2105 = mux(T_1775, UInt<3>(2), T_2104) - node T_2106 = mux(T_1773, UInt<3>(7), T_2105) - node T_2107 = mux(T_1771, UInt<3>(7), T_2106) - node T_2108 = mux(T_1769, UInt<3>(7), T_2107) - node T_2109 = mux(T_1767, UInt<3>(7), T_2108) - node T_2110 = mux(T_1851, UInt<1>(0), UInt<1>(0)) - node T_2111 = mux(T_1849, UInt<1>(0), T_2110) - node T_2112 = mux(T_1847, UInt<1>(0), T_2111) - node T_2113 = mux(T_1845, UInt<1>(0), T_2112) - node T_2114 = mux(T_1843, UInt<1>(0), T_2113) - node T_2115 = mux(T_1841, UInt<1>(0), T_2114) - node T_2116 = mux(T_1839, UInt<1>(0), T_2115) - node T_2117 = mux(T_1837, UInt<1>(0), T_2116) - node T_2118 = mux(T_1835, UInt<1>(0), T_2117) - node T_2119 = mux(T_1833, UInt<1>(0), T_2118) - node T_2120 = mux(T_1831, UInt<1>(0), T_2119) - node T_2121 = mux(T_1829, UInt<1>(0), T_2120) - node T_2122 = mux(T_1827, UInt<1>(0), T_2121) - node T_2123 = mux(T_1825, UInt<1>(0), T_2122) - node T_2124 = mux(T_1823, UInt<1>(0), T_2123) - node T_2125 = mux(T_1821, UInt<1>(0), T_2124) - node T_2126 = mux(T_1819, UInt<1>(0), T_2125) - node T_2127 = mux(T_1817, UInt<1>(0), T_2126) - node T_2128 = mux(T_1815, UInt<1>(0), T_2127) - node T_2129 = mux(T_1813, UInt<1>(0), T_2128) - node T_2130 = mux(T_1811, UInt<1>(0), T_2129) - node T_2131 = mux(T_1809, UInt<1>(0), T_2130) - node T_2132 = mux(T_1807, UInt<1>(0), T_2131) - node T_2133 = mux(T_1805, UInt<1>(0), T_2132) - node T_2134 = mux(T_1803, UInt<1>(0), T_2133) - node T_2135 = mux(T_1801, UInt<1>(0), T_2134) - node T_2136 = mux(T_1799, UInt<1>(0), T_2135) - node T_2137 = mux(T_1797, UInt<1>(0), T_2136) - node T_2138 = mux(T_1795, UInt<1>(0), T_2137) - node T_2139 = mux(T_1793, UInt<1>(0), T_2138) - node T_2140 = mux(T_1791, UInt<1>(0), T_2139) - node T_2141 = mux(T_1789, UInt<1>(0), T_2140) - node T_2142 = mux(T_1787, UInt<1>(0), T_2141) - node T_2143 = mux(T_1785, UInt<1>(0), T_2142) - node T_2144 = mux(T_1783, UInt<1>(0), T_2143) - node T_2145 = mux(T_1781, UInt<1>(0), T_2144) - node T_2146 = mux(T_1779, UInt<1>(0), T_2145) - node T_2147 = mux(T_1777, UInt<1>(0), T_2146) - node T_2148 = mux(T_1775, UInt<1>(0), T_2147) - node T_2149 = mux(T_1773, UInt<1>(1), T_2148) - node T_2150 = mux(T_1771, UInt<1>(1), T_2149) - node T_2151 = mux(T_1769, UInt<1>(0), T_2150) - node T_2152 = mux(T_1767, UInt<1>(0), T_2151) - node T_2153 = mux(T_1851, UInt<2>(3), UInt<2>(3)) - node T_2154 = mux(T_1849, UInt<2>(3), T_2153) - node T_2155 = mux(T_1847, UInt<2>(3), T_2154) - node T_2156 = mux(T_1845, UInt<2>(3), T_2155) - node T_2157 = mux(T_1843, UInt<2>(3), T_2156) - node T_2158 = mux(T_1841, UInt<2>(3), T_2157) - node T_2159 = mux(T_1839, UInt<2>(3), T_2158) - node T_2160 = mux(T_1837, UInt<2>(3), T_2159) - node T_2161 = mux(T_1835, UInt<2>(3), T_2160) - node T_2162 = mux(T_1833, UInt<2>(3), T_2161) - node T_2163 = mux(T_1831, UInt<2>(3), T_2162) - node T_2164 = mux(T_1829, UInt<2>(3), T_2163) - node T_2165 = mux(T_1827, UInt<2>(3), T_2164) - node T_2166 = mux(T_1825, UInt<2>(3), T_2165) - node T_2167 = mux(T_1823, UInt<2>(3), T_2166) - node T_2168 = mux(T_1821, UInt<2>(3), T_2167) - node T_2169 = mux(T_1819, UInt<2>(3), T_2168) - node T_2170 = mux(T_1817, UInt<2>(3), T_2169) - node T_2171 = mux(T_1815, UInt<2>(3), T_2170) - node T_2172 = mux(T_1813, UInt<2>(3), T_2171) - node T_2173 = mux(T_1811, UInt<2>(3), T_2172) - node T_2174 = mux(T_1809, UInt<2>(3), T_2173) - node T_2175 = mux(T_1807, UInt<2>(3), T_2174) - node T_2176 = mux(T_1805, UInt<2>(3), T_2175) - node T_2177 = mux(T_1803, UInt<2>(3), T_2176) - node T_2178 = mux(T_1801, UInt<2>(0), T_2177) - node T_2179 = mux(T_1799, UInt<2>(1), T_2178) - node T_2180 = mux(T_1797, UInt<2>(2), T_2179) - node T_2181 = mux(T_1795, UInt<2>(3), T_2180) - node T_2182 = mux(T_1793, UInt<2>(3), T_2181) - node T_2183 = mux(T_1791, UInt<2>(3), T_2182) - node T_2184 = mux(T_1789, UInt<2>(3), T_2183) - node T_2185 = mux(T_1787, UInt<2>(3), T_2184) - node T_2186 = mux(T_1785, UInt<2>(3), T_2185) - node T_2187 = mux(T_1783, UInt<2>(3), T_2186) - node T_2188 = mux(T_1781, UInt<2>(3), T_2187) - node T_2189 = mux(T_1779, UInt<2>(3), T_2188) - node T_2190 = mux(T_1777, UInt<2>(3), T_2189) - node T_2191 = mux(T_1775, UInt<2>(3), T_2190) - node T_2192 = mux(T_1773, UInt<2>(3), T_2191) - node T_2193 = mux(T_1771, UInt<2>(3), T_2192) - node T_2194 = mux(T_1769, UInt<2>(3), T_2193) - node T_2195 = mux(T_1767, UInt<2>(3), T_2194) - node T_2196 = mux(T_1851, UInt<3>(7), UInt<3>(7)) - node T_2197 = mux(T_1849, UInt<3>(7), T_2196) - node T_2198 = mux(T_1847, UInt<3>(7), T_2197) - node T_2199 = mux(T_1845, UInt<3>(7), T_2198) - node T_2200 = mux(T_1843, UInt<3>(7), T_2199) - node T_2201 = mux(T_1841, UInt<3>(7), T_2200) - node T_2202 = mux(T_1839, UInt<3>(7), T_2201) - node T_2203 = mux(T_1837, UInt<3>(7), T_2202) - node T_2204 = mux(T_1835, UInt<3>(7), T_2203) - node T_2205 = mux(T_1833, UInt<3>(7), T_2204) - node T_2206 = mux(T_1831, UInt<3>(7), T_2205) - node T_2207 = mux(T_1829, UInt<3>(7), T_2206) - node T_2208 = mux(T_1827, UInt<3>(7), T_2207) - node T_2209 = mux(T_1825, UInt<3>(7), T_2208) - node T_2210 = mux(T_1823, UInt<3>(7), T_2209) - node T_2211 = mux(T_1821, UInt<3>(7), T_2210) - node T_2212 = mux(T_1819, UInt<3>(7), T_2211) - node T_2213 = mux(T_1817, UInt<3>(7), T_2212) - node T_2214 = mux(T_1815, UInt<3>(7), T_2213) - node T_2215 = mux(T_1813, UInt<3>(7), T_2214) - node T_2216 = mux(T_1811, UInt<3>(7), T_2215) - node T_2217 = mux(T_1809, UInt<3>(7), T_2216) - node T_2218 = mux(T_1807, UInt<3>(7), T_2217) - node T_2219 = mux(T_1805, UInt<3>(7), T_2218) - node T_2220 = mux(T_1803, UInt<3>(7), T_2219) - node T_2221 = mux(T_1801, UInt<3>(7), T_2220) - node T_2222 = mux(T_1799, UInt<3>(7), T_2221) - node T_2223 = mux(T_1797, UInt<3>(7), T_2222) - node T_2224 = mux(T_1795, UInt<3>(3), T_2223) - node T_2225 = mux(T_1793, UInt<3>(4), T_2224) - node T_2226 = mux(T_1791, UInt<3>(0), T_2225) - node T_2227 = mux(T_1789, UInt<3>(1), T_2226) - node T_2228 = mux(T_1787, UInt<3>(2), T_2227) - node T_2229 = mux(T_1785, UInt<3>(7), T_2228) - node T_2230 = mux(T_1783, UInt<3>(7), T_2229) - node T_2231 = mux(T_1781, UInt<3>(7), T_2230) - node T_2232 = mux(T_1779, UInt<3>(7), T_2231) - node T_2233 = mux(T_1777, UInt<3>(7), T_2232) - node T_2234 = mux(T_1775, UInt<3>(7), T_2233) - node T_2235 = mux(T_1773, UInt<3>(7), T_2234) - node T_2236 = mux(T_1771, UInt<3>(7), T_2235) - node T_2237 = mux(T_1769, UInt<3>(7), T_2236) - node T_2238 = mux(T_1767, UInt<3>(7), T_2237) - node T_2239 = mux(T_1851, UInt<2>(3), UInt<2>(0)) - node T_2240 = mux(T_1849, UInt<2>(3), T_2239) - node T_2241 = mux(T_1847, UInt<2>(3), T_2240) - node T_2242 = mux(T_1845, UInt<2>(3), T_2241) - node T_2243 = mux(T_1843, UInt<2>(3), T_2242) - node T_2244 = mux(T_1841, UInt<2>(3), T_2243) - node T_2245 = mux(T_1839, UInt<2>(0), T_2244) - node T_2246 = mux(T_1837, UInt<2>(0), T_2245) - node T_2247 = mux(T_1835, UInt<2>(0), T_2246) - node T_2248 = mux(T_1833, UInt<2>(0), T_2247) - node T_2249 = mux(T_1831, UInt<2>(0), T_2248) - node T_2250 = mux(T_1829, UInt<2>(0), T_2249) - node T_2251 = mux(T_1827, UInt<2>(0), T_2250) - node T_2252 = mux(T_1825, UInt<2>(0), T_2251) - node T_2253 = mux(T_1823, UInt<2>(0), T_2252) - node T_2254 = mux(T_1821, UInt<2>(0), T_2253) - node T_2255 = mux(T_1819, UInt<2>(0), T_2254) - node T_2256 = mux(T_1817, UInt<2>(0), T_2255) - node T_2257 = mux(T_1815, UInt<2>(0), T_2256) - node T_2258 = mux(T_1813, UInt<2>(0), T_2257) - node T_2259 = mux(T_1811, UInt<2>(0), T_2258) - node T_2260 = mux(T_1809, UInt<2>(0), T_2259) - node T_2261 = mux(T_1807, UInt<2>(0), T_2260) - node T_2262 = mux(T_1805, UInt<2>(0), T_2261) - node T_2263 = mux(T_1803, UInt<2>(0), T_2262) - node T_2264 = mux(T_1801, UInt<2>(0), T_2263) - node T_2265 = mux(T_1799, UInt<2>(0), T_2264) - node T_2266 = mux(T_1797, UInt<2>(0), T_2265) - node T_2267 = mux(T_1795, UInt<2>(1), T_2266) - node T_2268 = mux(T_1793, UInt<2>(1), T_2267) - node T_2269 = mux(T_1791, UInt<2>(1), T_2268) - node T_2270 = mux(T_1789, UInt<2>(1), T_2269) - node T_2271 = mux(T_1787, UInt<2>(1), T_2270) - node T_2272 = mux(T_1785, UInt<2>(0), T_2271) - node T_2273 = mux(T_1783, UInt<2>(0), T_2272) - node T_2274 = mux(T_1781, UInt<2>(0), T_2273) - node T_2275 = mux(T_1779, UInt<2>(0), T_2274) - node T_2276 = mux(T_1777, UInt<2>(0), T_2275) - node T_2277 = mux(T_1775, UInt<2>(0), T_2276) - node T_2278 = mux(T_1773, UInt<2>(2), T_2277) - node T_2279 = mux(T_1771, UInt<2>(2), T_2278) - node T_2280 = mux(T_1769, UInt<2>(0), T_2279) - node T_2281 = mux(T_1767, UInt<2>(0), T_2280) - node T_2282 = mux(T_1851, UInt<1>(0), UInt<1>(0)) - node T_2283 = mux(T_1849, UInt<1>(0), T_2282) - node T_2284 = mux(T_1847, UInt<1>(0), T_2283) - node T_2285 = mux(T_1845, UInt<1>(0), T_2284) - node T_2286 = mux(T_1843, UInt<1>(0), T_2285) - node T_2287 = mux(T_1841, UInt<1>(0), T_2286) - node T_2288 = mux(T_1839, UInt<1>(1), T_2287) - node T_2289 = mux(T_1837, UInt<1>(1), T_2288) - node T_2290 = mux(T_1835, UInt<1>(1), T_2289) - node T_2291 = mux(T_1833, UInt<1>(1), T_2290) - node T_2292 = mux(T_1831, UInt<1>(1), T_2291) - node T_2293 = mux(T_1829, UInt<1>(1), T_2292) - node T_2294 = mux(T_1827, UInt<1>(1), T_2293) - node T_2295 = mux(T_1825, UInt<1>(1), T_2294) - node T_2296 = mux(T_1823, UInt<1>(1), T_2295) - node T_2297 = mux(T_1821, UInt<1>(1), T_2296) - node T_2298 = mux(T_1819, UInt<1>(1), T_2297) - node T_2299 = mux(T_1817, UInt<1>(1), T_2298) - node T_2300 = mux(T_1815, UInt<1>(1), T_2299) - node T_2301 = mux(T_1813, UInt<1>(1), T_2300) - node T_2302 = mux(T_1811, UInt<1>(1), T_2301) - node T_2303 = mux(T_1809, UInt<1>(1), T_2302) - node T_2304 = mux(T_1807, UInt<1>(1), T_2303) - node T_2305 = mux(T_1805, UInt<1>(1), T_2304) - node T_2306 = mux(T_1803, UInt<1>(1), T_2305) - node T_2307 = mux(T_1801, UInt<1>(0), T_2306) - node T_2308 = mux(T_1799, UInt<1>(0), T_2307) - node T_2309 = mux(T_1797, UInt<1>(0), T_2308) - node T_2310 = mux(T_1795, UInt<1>(1), T_2309) - node T_2311 = mux(T_1793, UInt<1>(1), T_2310) - node T_2312 = mux(T_1791, UInt<1>(1), T_2311) - node T_2313 = mux(T_1789, UInt<1>(1), T_2312) - node T_2314 = mux(T_1787, UInt<1>(1), T_2313) - node T_2315 = mux(T_1785, UInt<1>(0), T_2314) - node T_2316 = mux(T_1783, UInt<1>(0), T_2315) - node T_2317 = mux(T_1781, UInt<1>(0), T_2316) - node T_2318 = mux(T_1779, UInt<1>(0), T_2317) - node T_2319 = mux(T_1777, UInt<1>(0), T_2318) - node T_2320 = mux(T_1775, UInt<1>(0), T_2319) - node T_2321 = mux(T_1773, UInt<1>(1), T_2320) - node T_2322 = mux(T_1771, UInt<1>(1), T_2321) - node T_2323 = mux(T_1769, UInt<1>(1), T_2322) - node T_2324 = mux(T_1767, UInt<1>(1), T_2323) - node T_2325 = mux(T_1851, UInt<2>(3), UInt<2>(0)) - node T_2326 = mux(T_1849, UInt<2>(2), T_2325) - node T_2327 = mux(T_1847, UInt<2>(1), T_2326) - node T_2328 = mux(T_1845, UInt<2>(3), T_2327) - node T_2329 = mux(T_1843, UInt<2>(2), T_2328) - node T_2330 = mux(T_1841, UInt<2>(1), T_2329) - node T_2331 = mux(T_1839, UInt<2>(0), T_2330) - node T_2332 = mux(T_1837, UInt<2>(0), T_2331) - node T_2333 = mux(T_1835, UInt<2>(0), T_2332) - node T_2334 = mux(T_1833, UInt<2>(0), T_2333) - node T_2335 = mux(T_1831, UInt<2>(0), T_2334) - node T_2336 = mux(T_1829, UInt<2>(0), T_2335) - node T_2337 = mux(T_1827, UInt<2>(0), T_2336) - node T_2338 = mux(T_1825, UInt<2>(0), T_2337) - node T_2339 = mux(T_1823, UInt<2>(0), T_2338) - node T_2340 = mux(T_1821, UInt<2>(0), T_2339) - node T_2341 = mux(T_1819, UInt<2>(0), T_2340) - node T_2342 = mux(T_1817, UInt<2>(0), T_2341) - node T_2343 = mux(T_1815, UInt<2>(0), T_2342) - node T_2344 = mux(T_1813, UInt<2>(0), T_2343) - node T_2345 = mux(T_1811, UInt<2>(0), T_2344) - node T_2346 = mux(T_1809, UInt<2>(0), T_2345) - node T_2347 = mux(T_1807, UInt<2>(0), T_2346) - node T_2348 = mux(T_1805, UInt<2>(0), T_2347) - node T_2349 = mux(T_1803, UInt<2>(0), T_2348) - node T_2350 = mux(T_1801, UInt<2>(0), T_2349) - node T_2351 = mux(T_1799, UInt<2>(0), T_2350) - node T_2352 = mux(T_1797, UInt<2>(0), T_2351) - node T_2353 = mux(T_1795, UInt<2>(0), T_2352) - node T_2354 = mux(T_1793, UInt<2>(0), T_2353) - node T_2355 = mux(T_1791, UInt<2>(0), T_2354) - node T_2356 = mux(T_1789, UInt<2>(0), T_2355) - node T_2357 = mux(T_1787, UInt<2>(0), T_2356) - node T_2358 = mux(T_1785, UInt<2>(0), T_2357) - node T_2359 = mux(T_1783, UInt<2>(0), T_2358) - node T_2360 = mux(T_1781, UInt<2>(0), T_2359) - node T_2361 = mux(T_1779, UInt<2>(0), T_2360) - node T_2362 = mux(T_1777, UInt<2>(0), T_2361) - node T_2363 = mux(T_1775, UInt<2>(0), T_2362) - node T_2364 = mux(T_1773, UInt<2>(0), T_2363) - node T_2365 = mux(T_1771, UInt<2>(0), T_2364) - node T_2366 = mux(T_1769, UInt<2>(0), T_2365) - node T_2367 = mux(T_1767, UInt<2>(0), T_2366) - node rs1_addr = bits(ctrl.inst, 19, 15) - node rs2_addr = bits(ctrl.inst, 24, 20) - reg st_type : UInt<2> - reg ld_type : UInt<3> - reg wb_sel : UInt<2> - node T_2368 = bit(T_2324, 0) - reg wb_en : UInt<1> - reg csr_cmd : UInt<2> - ctrl.pc_sel := T_1894 - node T_2369 = bit-not(ctrl.stall) - node T_2370 = bit-not(ctrl.data_re) - node T_2371 = bit-and(T_2369, T_2370) - ctrl.inst_re := T_2371 - node T_2372 = neq(T_2238, UInt<3>(7)) - node T_2373 = bit(T_2152, 0) - node T_2374 = bit-or(T_2372, T_2373) - node T_2375 = mux(T_2374, UInt<1>(1), UInt<1>(0)) - ctrl.inst_type := T_2375 - ctrl.A_sel := T_1937 - ctrl.B_sel := T_1980 - ctrl.imm_sel := T_2023 - ctrl.alu_op := T_2066 - ctrl.br_type := T_2109 - ctrl.st_type := T_2195 - node T_2376 = bit-not(ctrl.stall) - when T_2376 : - st_type := ctrl.st_type - ld_type := T_2238 - wb_sel := T_2281 - node T_2377 = bit(T_2324, 0) - wb_en := T_2377 - csr_cmd := T_2367 - node T_2378 = neq(ctrl.ld_type, UInt<3>(7)) - node T_2379 = neq(T_2238, UInt<3>(7)) - node T_2380 = mux(ctrl.stall, T_2378, T_2379) - ctrl.data_re := T_2380 - ctrl.ld_type := ld_type - ctrl.wb_en := wb_en - ctrl.wb_sel := wb_sel - ctrl.csr_cmd := csr_cmd - module Core : - output host : {status : UInt<32>, flip hid : UInt<1>, tohost : UInt<32>} - input stall : UInt<1> - output icache : {re : UInt<1>, flip dout : UInt<32>, we : UInt<4>, addr : UInt<32>, din : UInt<32>} - output dcache : {re : UInt<1>, flip dout : UInt<32>, we : UInt<4>, addr : UInt<32>, din : UInt<32>} - - inst dpath of Datapath - inst ctrl of Control - host := dpath.host - icache := dpath.icache - dcache := dpath.dcache - dpath.ctrl := ctrl.ctrl - dpath.stall := stall - module Queue : - output count : UInt<3> - input enq : {valid : UInt<1>, flip ready : UInt<1>, bits : {mask : UInt<4>, tag : UInt<5>, rw : UInt<1>, addr : UInt<32>}} - output deq : {valid : UInt<1>, flip ready : UInt<1>, bits : {mask : UInt<4>, tag : UInt<5>, rw : UInt<1>, addr : UInt<32>}} - - cmem ram : {mask : UInt<4>, tag : UInt<5>, rw : UInt<1>, addr : UInt<32>}[4] - reg T_2381 : UInt<2> - on-reset T_2381 := UInt<2>(0) - reg T_2382 : UInt<2> - on-reset T_2382 := UInt<2>(0) - reg maybe_full : UInt<1> - on-reset maybe_full := UInt<1>(0) - node ptr_match = eq(T_2381, T_2382) - node T_2383 = bit-not(maybe_full) - node empty = bit-and(ptr_match, T_2383) - node full = bit-and(ptr_match, maybe_full) - node maybe_flow = bit-and(UInt<1>(0), empty) - node do_flow = bit-and(maybe_flow, deq.ready) - node T_2384 = bit-and(enq.ready, enq.valid) - node T_2385 = bit-not(do_flow) - node do_enq = bit-and(T_2384, T_2385) - node T_2386 = bit-and(deq.ready, deq.valid) - node T_2387 = bit-not(do_flow) - node do_deq = bit-and(T_2386, T_2387) - when do_enq : - infer accessor T_2388 = ram[T_2381] - T_2388 := enq.bits - node T_2389 = eq(T_2381, UInt<2>(3)) - node T_2390 = bit-and(UInt<1>(0), T_2389) - node T_2391 = add-wrap(T_2381, UInt<1>(1)) - node T_2392 = mux(T_2390, UInt<1>(0), T_2391) - T_2381 := T_2392 - when do_deq : - node T_2393 = eq(T_2382, UInt<2>(3)) - node T_2394 = bit-and(UInt<1>(0), T_2393) - node T_2395 = add-wrap(T_2382, UInt<1>(1)) - node T_2396 = mux(T_2394, UInt<1>(0), T_2395) - T_2382 := T_2396 - node T_2397 = neq(do_enq, do_deq) - when T_2397 : maybe_full := do_enq - node T_2398 = bit-not(empty) - node T_2399 = bit-and(UInt<1>(0), enq.valid) - node T_2400 = bit-or(T_2398, T_2399) - deq.valid := T_2400 - node T_2401 = bit-not(full) - node T_2402 = bit-and(UInt<1>(0), deq.ready) - node T_2403 = bit-or(T_2401, T_2402) - enq.ready := T_2403 - infer accessor T_2404 = ram[T_2382] - wire T_2405 : {mask : UInt<4>, tag : UInt<5>, rw : UInt<1>, addr : UInt<32>} - node T_2406 = mux(maybe_flow, enq.bits.mask, T_2404.mask) - T_2405.mask := T_2406 - node T_2407 = mux(maybe_flow, enq.bits.tag, T_2404.tag) - T_2405.tag := T_2407 - node T_2408 = mux(maybe_flow, enq.bits.rw, T_2404.rw) - T_2405.rw := T_2408 - node T_2409 = mux(maybe_flow, enq.bits.addr, T_2404.addr) - T_2405.addr := T_2409 - deq.bits := T_2405 - node ptr_diff = sub-wrap(T_2381, T_2382) - node T_2410 = bit-and(maybe_full, ptr_match) - node T_2411 = cat(T_2410, ptr_diff) - count := T_2411 - module Queue_1490 : - output count : UInt<3> - input enq : {valid : UInt<1>, flip ready : UInt<1>, bits : {data : UInt<32>}} - output deq : {valid : UInt<1>, flip ready : UInt<1>, bits : {data : UInt<32>}} - - cmem ram : {data : UInt<32>}[4] - reg T_2412 : UInt<2> - on-reset T_2412 := UInt<2>(0) - reg T_2413 : UInt<2> - on-reset T_2413 := UInt<2>(0) - reg maybe_full : UInt<1> - on-reset maybe_full := UInt<1>(0) - node ptr_match = eq(T_2412, T_2413) - node T_2414 = bit-not(maybe_full) - node empty = bit-and(ptr_match, T_2414) - node full = bit-and(ptr_match, maybe_full) - node maybe_flow = bit-and(UInt<1>(0), empty) - node do_flow = bit-and(maybe_flow, deq.ready) - node T_2415 = bit-and(enq.ready, enq.valid) - node T_2416 = bit-not(do_flow) - node do_enq = bit-and(T_2415, T_2416) - node T_2417 = bit-and(deq.ready, deq.valid) - node T_2418 = bit-not(do_flow) - node do_deq = bit-and(T_2417, T_2418) - when do_enq : - infer accessor T_2419 = ram[T_2412] - T_2419 := enq.bits - node T_2420 = eq(T_2412, UInt<2>(3)) - node T_2421 = bit-and(UInt<1>(0), T_2420) - node T_2422 = add-wrap(T_2412, UInt<1>(1)) - node T_2423 = mux(T_2421, UInt<1>(0), T_2422) - T_2412 := T_2423 - when do_deq : - node T_2424 = eq(T_2413, UInt<2>(3)) - node T_2425 = bit-and(UInt<1>(0), T_2424) - node T_2426 = add-wrap(T_2413, UInt<1>(1)) - node T_2427 = mux(T_2425, UInt<1>(0), T_2426) - T_2413 := T_2427 - node T_2428 = neq(do_enq, do_deq) - when T_2428 : maybe_full := do_enq - node T_2429 = bit-not(empty) - node T_2430 = bit-and(UInt<1>(0), enq.valid) - node T_2431 = bit-or(T_2429, T_2430) - deq.valid := T_2431 - node T_2432 = bit-not(full) - node T_2433 = bit-and(UInt<1>(0), deq.ready) - node T_2434 = bit-or(T_2432, T_2433) - enq.ready := T_2434 - infer accessor T_2435 = ram[T_2413] - wire T_2436 : {data : UInt<32>} - node T_2437 = mux(maybe_flow, enq.bits.data, T_2435.data) - T_2436.data := T_2437 - deq.bits := T_2436 - node ptr_diff = sub-wrap(T_2412, T_2413) - node T_2438 = bit-and(maybe_full, ptr_match) - node T_2439 = cat(T_2438, ptr_diff) - count := T_2439 - module Memory : - output memory : {req_cmd : {valid : UInt<1>, flip ready : UInt<1>, bits : {mask : UInt<4>, tag : UInt<5>, rw : UInt<1>, addr : UInt<32>}}, req_data : {valid : UInt<1>, flip ready : UInt<1>, bits : {data : UInt<32>}}, flip resp : {valid : UInt<1>, flip ready : UInt<1>, bits : {tag : UInt<5>, data : UInt<32>}}} - output stall : UInt<1> - input icache : {re : UInt<1>, flip dout : UInt<32>, we : UInt<4>, addr : UInt<32>, din : UInt<32>} - input dcache : {re : UInt<1>, flip dout : UInt<32>, we : UInt<4>, addr : UInt<32>, din : UInt<32>} - - inst memReqCmdQueue of Queue - inst memReqDataQueue of Queue_1490 - reg state : UInt<1> - on-reset state := UInt<1>(0) - reg tag : UInt<5> - on-reset tag := UInt<5>(0) - node T_2440 = eq(state, UInt<1>(0)) - node T_2441 = bit-or(icache.re, dcache.re) - node T_2442 = eq(dcache.we, UInt<1>(0)) - node T_2443 = bit-not(T_2442) - node T_2444 = bit-or(T_2441, T_2443) - node cpuReq = bit-and(T_2440, T_2444) - node T_2445 = bits(icache.addr, 31, 2) - node iaddr = cat(T_2445, UInt<2>(0)) - node T_2446 = bits(dcache.addr, 31, 2) - node daddr = cat(T_2446, UInt<2>(0)) - reg idata : UInt - reg ddata : UInt - reg ire : UInt<1> - reg dre : UInt<1> - icache.dout := idata - dcache.dout := ddata - memory.req_cmd := memReqCmdQueue.deq - memory.req_data := memReqDataQueue.deq - memory.resp.ready := UInt<1>(0) - node T_2447 = eq(state, UInt<1>(1)) - node T_2448 = bit-not(memReqCmdQueue.enq.ready) - node T_2449 = bit-or(T_2447, T_2448) - node T_2450 = bit-not(memReqDataQueue.enq.ready) - node T_2451 = bit-or(T_2449, T_2450) - stall := T_2451 - node T_2452 = eq(dcache.we, UInt<1>(0)) - node T_2453 = bit-not(T_2452) - memReqCmdQueue.enq.bits.rw := T_2453 - memReqCmdQueue.enq.bits.tag := tag - node T_2454 = eq(dcache.we, UInt<1>(0)) - node T_2455 = bit-not(T_2454) - node T_2456 = bit-not(icache.re) - node T_2457 = bit-or(T_2455, T_2456) - node T_2458 = mux(T_2457, daddr, iaddr) - memReqCmdQueue.enq.bits.addr := T_2458 - memReqCmdQueue.enq.bits.mask := dcache.we - node T_2459 = bit-and(memReqDataQueue.enq.ready, cpuReq) - memReqCmdQueue.enq.valid := T_2459 - memReqDataQueue.enq.bits.data := dcache.din - node T_2460 = bit-and(memReqCmdQueue.enq.ready, cpuReq) - node T_2461 = eq(dcache.we, UInt<1>(0)) - node T_2462 = bit-not(T_2461) - node T_2463 = bit-and(T_2460, T_2462) - memReqDataQueue.enq.valid := T_2463 - node T_2464 = eq(UInt<1>(0), state) - when T_2464 : - node T_2465 = bit-or(icache.re, dcache.re) - node T_2466 = eq(dcache.we, UInt<1>(0)) - node T_2467 = bit-not(T_2466) - node T_2468 = bit-not(T_2467) - node T_2469 = bit-and(T_2465, T_2468) - node T_2470 = bit-and(T_2469, memReqCmdQueue.enq.ready) - when T_2470 : - ire := icache.re - dre := dcache.re - state := UInt<1>(1) - node T_2471 = eq(UInt<1>(1), state) - when T_2471 : - memory.resp.ready := UInt<1>(1) - node T_2472 = eq(memory.resp.bits.tag, tag) - node T_2473 = bit-and(memory.resp.valid, T_2472) - when T_2473 : - state := UInt<1>(0) - node T_2474 = add-wrap(tag, UInt<1>(1)) - tag := T_2474 - memory.resp.ready := UInt<1>(0) - when ire : idata := memory.resp.bits.data - when dre : ddata := memory.resp.bits.data - module Tile : - output htif : {host : {status : UInt<32>, flip hid : UInt<1>, tohost : UInt<32>}} - output memory : {req_cmd : {valid : UInt<1>, flip ready : UInt<1>, bits : {mask : UInt<4>, tag : UInt<5>, rw : UInt<1>, addr : UInt<32>}}, req_data : {valid : UInt<1>, flip ready : UInt<1>, bits : {data : UInt<32>}}, flip resp : {valid : UInt<1>, flip ready : UInt<1>, bits : {tag : UInt<5>, data : UInt<32>}}} - - inst core of Core - inst memmod of Memory - htif.host := core.host - memory := memmod.memory - core.stall := memmod.stall - memmod.icache := core.icache - memmod.dcache := core.dcache diff --git a/test/chisel3/UIntOps.fir b/test/chisel3/UIntOps.fir deleted file mode 100644 index 1707bbee..00000000 --- a/test/chisel3/UIntOps.fir +++ /dev/null @@ -1,51 +0,0 @@ -; RUN: firrtl -i %s -o %s.v -X verilog -p c | tee %s.out | FileCheck %s -;CHECK: Done! - -circuit UIntOps : - module UIntOps : - input a : UInt<16> - input b : UInt<16> - output addout : UInt<16> - output subout : UInt<16> - output timesout : UInt<16> - output divout : UInt<16> - output modout : UInt<16> - output lshiftout : UInt<16> - output rshiftout : UInt<16> - output lessout : UInt<1> - output greatout : UInt<1> - output eqout : UInt<1> - output noteqout : UInt<1> - output lesseqout : UInt<1> - output greateqout : UInt<1> - - node T_38 = add-wrap(a, b) - addout := T_38 - node T_39 = sub-wrap(a, b) - subout := T_39 - node T_40 = mul(a, b) - node T_41 = bits(T_40, 15, 0) - timesout := T_41 - node T_42 = eq(b, UInt<1>(0)) - node T_43 = mux(T_42, UInt<1>(1), b) - node T_44 = div(a, T_43) - divout := T_44 - modout := UInt<1>(0) - node T_45 = bits(b, 3, 0) - node T_46 = dshl(a, T_45) - node T_47 = bits(T_46, 15, 0) - lshiftout := T_47 - node T_48 = dshr(a, b) - rshiftout := T_48 - node T_49 = lt(a, b) - lessout := T_49 - node T_50 = gt(a, b) - greatout := T_50 - node T_51 = eq(a, b) - eqout := T_51 - node T_52 = neq(a, b) - noteqout := T_52 - node T_53 = leq(a, b) - lesseqout := T_53 - node T_54 = geq(a, b) - greateqout := T_54 diff --git a/test/chisel3/VendingMachine.fir b/test/chisel3/VendingMachine.fir deleted file mode 100644 index 39723b05..00000000 --- a/test/chisel3/VendingMachine.fir +++ /dev/null @@ -1,31 +0,0 @@ -; RUN: firrtl -i %s -o %s.v -X verilog -p c | tee %s.out | FileCheck %s -;CHECK: Done! - -circuit VendingMachine : - module VendingMachine : - output valid : UInt<1> - input nickel : UInt<1> - input dime : UInt<1> - - reg state : UInt<3> - on-reset state := UInt<3>(0) - node T_22 = eq(state, UInt<3>(0)) - when T_22 : - when nickel : state := UInt<3>(1) - when dime : state := UInt<3>(2) - node T_23 = eq(state, UInt<3>(1)) - when T_23 : - when nickel : state := UInt<3>(2) - when dime : state := UInt<3>(3) - node T_24 = eq(state, UInt<3>(2)) - when T_24 : - when nickel : state := UInt<3>(3) - when dime : state := UInt<3>(4) - node T_25 = eq(state, UInt<3>(3)) - when T_25 : - when nickel : state := UInt<3>(4) - when dime : state := UInt<3>(4) - node T_26 = eq(state, UInt<3>(4)) - when T_26 : state := UInt<3>(0) - node T_27 = eq(state, UInt<3>(4)) - valid := T_27 |