diff options
| author | Aditya Naik | 2021-08-27 13:07:37 -0400 |
|---|---|---|
| committer | Aditya Naik | 2021-08-27 13:07:37 -0400 |
| commit | 663e24a3d8f45b4b184b3a4bc3a57bc0f3d6cd78 (patch) | |
| tree | 62a699a6065bea9f4bcefda93d227209fec4a154 | |
Initial; working SAIL RISC-V regs
The register definition along with read/write functions for registers
are lowered to Coq. The FIRRTL annotation does not work as expected.
76 files changed, 18489 insertions, 0 deletions
diff --git a/Makefile b/Makefile new file mode 100644 index 0000000..0be4eae --- /dev/null +++ b/Makefile @@ -0,0 +1,30 @@ +SRCS = riscv_reg_type.sail riscv_regs.sail + +SAIL_DIR:=$(shell opam config var sail:share) +SAIL:=sail +SAIL_LIB_DIR:=$(SAIL_DIR)/lib +export SAIL_LIB_DIR +SAIL_SRC_DIR:=$(SAIL_DIR)/src + +EXPLICIT_COQ_BBV = $(shell if opam config var coq-bbv:share >/dev/null 2>/dev/null; then echo no; else echo yes; fi) + +COQ_LIBS += -Q $(BBV_DIR)/src/bbv bbv +COQ_LIBS += -Q $(SAIL_LIB_DIR)/coq Sail +COQ_LIBS = -R generated_definitions/coq/$(ARCH) '' -R generated_definitions/coq '' -R handwritten_support '' + +riscv_coq: $(addprefix build/,riscv.v riscv_types.v) +riscv_coq_build: build/riscv.vo +.PHONY: riscv_coq riscv_coq_build + +# %.vo: %.v +# coqc $(COQ_LIBS) $< + +$(addprefix build/,riscv.v riscv_types.v): $(SRCS) Makefile + mkdir -p build + $(SAIL) $(SAIL_FLAGS) -dcoq_undef_axioms -coq -coq_output_dir build/ -o riscv $(SRCS) +# $(SAIL) $(SAIL_FLAGS) -dcoq_undef_axioms -coq -coq_output_dir build/ -o riscv -coq_lib riscv_extras -coq_lib mem_metadata $(SRCS) + + +# build/riscv.vo: build/riscv_types.vo handwritten_support/riscv_extras.vo handwritten_support/mem_metadata.vo + +default:riscv_coq diff --git a/build/.Makefile.d b/build/.Makefile.d new file mode 100644 index 0000000..e6650b7 --- /dev/null +++ b/build/.Makefile.d @@ -0,0 +1,6 @@ +riscv_types.vo riscv_types.glob riscv_types.v.beautified riscv_types.required_vo: riscv_types.v /home/aditya/.opam/default/share/sail/lib/coq/Base.vo /home/aditya/.opam/default/share/sail/lib/coq/Real.vo +riscv_types.vio: riscv_types.v /home/aditya/.opam/default/share/sail/lib/coq/Base.vio /home/aditya/.opam/default/share/sail/lib/coq/Real.vio +riscv_types.vos riscv_types.vok riscv_types.required_vos: riscv_types.v /home/aditya/.opam/default/share/sail/lib/coq/Base.vos /home/aditya/.opam/default/share/sail/lib/coq/Real.vos +riscv.vo riscv.glob riscv.v.beautified riscv.required_vo: riscv.v /home/aditya/.opam/default/share/sail/lib/coq/Base.vo /home/aditya/.opam/default/share/sail/lib/coq/Real.vo riscv_types.vo +riscv.vio: riscv.v /home/aditya/.opam/default/share/sail/lib/coq/Base.vio /home/aditya/.opam/default/share/sail/lib/coq/Real.vio riscv_types.vio +riscv.vos riscv.vok riscv.required_vos: riscv.v /home/aditya/.opam/default/share/sail/lib/coq/Base.vos /home/aditya/.opam/default/share/sail/lib/coq/Real.vos riscv_types.vos diff --git a/build/.lia.cache b/build/.lia.cache Binary files differnew file mode 100644 index 0000000..21e5075 --- /dev/null +++ b/build/.lia.cache diff --git a/build/.riscv.aux b/build/.riscv.aux new file mode 100644 index 0000000..06dda63 --- /dev/null +++ b/build/.riscv.aux @@ -0,0 +1,9 @@ +COQAUX1 c6db294320f7a6b05e7783002664d787 /home/aditya/dev/firrtl-proof/sail-simple-test/build/riscv.v +515 646 context_used "" +1345 1557 context_used "" +1345 1557 context_used "" +1345 1557 context_used "" +1644 1897 context_used "" +8826 8916 context_used "" +8918 9026 context_used "" +0 0 vo_compile_time "0.649" diff --git a/build/.riscv_types.aux b/build/.riscv_types.aux new file mode 100644 index 0000000..3dea1e8 --- /dev/null +++ b/build/.riscv_types.aux @@ -0,0 +1,2 @@ +COQAUX1 23addcfb4a3be3458f693a2ed5b20df5 /home/aditya/dev/firrtl-proof/sail-simple-test/build/riscv_types.v +0 0 vo_compile_time "0.639" diff --git a/build/Makefile b/build/Makefile new file mode 100644 index 0000000..8bfc468 --- /dev/null +++ b/build/Makefile @@ -0,0 +1,870 @@ +########################################################################## +## # The Coq Proof Assistant / The Coq Development Team ## +## v # Copyright INRIA, CNRS and contributors ## +## <O___,, # (see version control and CREDITS file for authors & dates) ## +## \VV/ ############################################################### +## // # This file is distributed under the terms of the ## +## # GNU Lesser General Public License Version 2.1 ## +## # (see LICENSE file for the text of the license) ## +########################################################################## +## GNUMakefile for Coq 8.13.2 + +# For debugging purposes (must stay here, don't move below) +INITIAL_VARS := $(.VARIABLES) +# To implement recursion we save the name of the main Makefile +SELF := $(lastword $(MAKEFILE_LIST)) +PARENT := $(firstword $(MAKEFILE_LIST)) + +# This file is generated by coq_makefile and contains many variable +# definitions, like the list of .v files or the path to Coq +include Makefile.conf + +# Put in place old names +VFILES := $(COQMF_VFILES) +MLIFILES := $(COQMF_MLIFILES) +MLFILES := $(COQMF_MLFILES) +MLGFILES := $(COQMF_MLGFILES) +MLPACKFILES := $(COQMF_MLPACKFILES) +MLLIBFILES := $(COQMF_MLLIBFILES) +CMDLINE_VFILES := $(COQMF_CMDLINE_VFILES) +INSTALLCOQDOCROOT := $(COQMF_INSTALLCOQDOCROOT) +OTHERFLAGS := $(COQMF_OTHERFLAGS) +COQ_SRC_SUBDIRS := $(COQMF_COQ_SRC_SUBDIRS) +OCAMLLIBS := $(COQMF_OCAMLLIBS) +SRC_SUBDIRS := $(COQMF_SRC_SUBDIRS) +COQLIBS := $(COQMF_COQLIBS) +COQLIBS_NOML := $(COQMF_COQLIBS_NOML) +CMDLINE_COQLIBS := $(COQMF_CMDLINE_COQLIBS) +LOCAL := $(COQMF_LOCAL) +COQLIB := $(COQMF_COQLIB) +DOCDIR := $(COQMF_DOCDIR) +OCAMLFIND := $(COQMF_OCAMLFIND) +CAMLFLAGS := $(COQMF_CAMLFLAGS) +HASNATDYNLINK := $(COQMF_HASNATDYNLINK) +OCAMLWARN := $(COQMF_WARN) + +Makefile.conf: _CoqProject + coq_makefile -f _CoqProject riscv_types.v riscv.v -o Makefile + +# This file can be created by the user to hook into double colon rules or +# add any other Makefile code he may need +-include Makefile.local + +# Parameters ################################################################## +# +# Parameters are make variable assignments. +# They can be passed to (each call to) make on the command line. +# They can also be put in Makefile.local once and for all. +# For retro-compatibility reasons they can be put in the _CoqProject, but this +# practice is discouraged since _CoqProject better not contain make specific +# code (be nice to user interfaces). + +# Print shell commands (set to non empty) +VERBOSE ?= + +# Time the Coq process (set to non empty), and how (see default value) +TIMED?= +TIMECMD?= +# Use command time on linux, gtime on Mac OS +TIMEFMT?="$@ (real: %e, user: %U, sys: %S, mem: %M ko)" +ifneq (,$(TIMED)) +ifeq (0,$(shell command time -f "" true >/dev/null 2>/dev/null; echo $$?)) +STDTIME?=command time -f $(TIMEFMT) +else +ifeq (0,$(shell gtime -f "" true >/dev/null 2>/dev/null; echo $$?)) +STDTIME?=gtime -f $(TIMEFMT) +else +STDTIME?=command time +endif +endif +else +STDTIME?=command time -f $(TIMEFMT) +endif + +ifneq (,$(COQBIN)) +# add an ending / +COQBIN:=$(COQBIN)/ +endif + +# Coq binaries +COQC ?= "$(COQBIN)coqc" +COQTOP ?= "$(COQBIN)coqtop" +COQCHK ?= "$(COQBIN)coqchk" +COQDEP ?= "$(COQBIN)coqdep" +COQDOC ?= "$(COQBIN)coqdoc" +COQPP ?= "$(COQBIN)coqpp" +COQMKFILE ?= "$(COQBIN)coq_makefile" +OCAMLLIBDEP ?= "$(COQBIN)ocamllibdep" + +# Timing scripts +COQMAKE_ONE_TIME_FILE ?= "$(COQLIB)/tools/make-one-time-file.py" +COQMAKE_BOTH_TIME_FILES ?= "$(COQLIB)/tools/make-both-time-files.py" +COQMAKE_BOTH_SINGLE_TIMING_FILES ?= "$(COQLIB)/tools/make-both-single-timing-files.py" +BEFORE ?= +AFTER ?= + +# FIXME this should be generated by Coq (modules already linked by Coq) +CAMLDONTLINK=str,unix,dynlink,threads,zarith + +# OCaml binaries +CAMLC ?= "$(OCAMLFIND)" ocamlc -c +CAMLOPTC ?= "$(OCAMLFIND)" opt -c +CAMLLINK ?= "$(OCAMLFIND)" ocamlc -linkpkg -dontlink $(CAMLDONTLINK) +CAMLOPTLINK ?= "$(OCAMLFIND)" opt -linkpkg -dontlink $(CAMLDONTLINK) +CAMLDOC ?= "$(OCAMLFIND)" ocamldoc +CAMLDEP ?= "$(OCAMLFIND)" ocamldep -slash -ml-synonym .mlpack + +# DESTDIR is prepended to all installation paths +DESTDIR ?= + +# Debug builds, typically -g to OCaml, -debug to Coq. +CAMLDEBUG ?= +COQDEBUG ?= + +# Extra packages to be linked in (as in findlib -package) +CAMLPKGS ?= + +# Option for making timing files +TIMING?= +# Option for changing sorting of timing output file +TIMING_SORT_BY ?= auto +# Option for changing the fuzz parameter on the output file +TIMING_FUZZ ?= 0 +# Option for changing whether to use real or user time for timing tables +TIMING_REAL?= +# Option for including the memory column(s) +TIMING_INCLUDE_MEM?= +# Option for sorting by the memory column +TIMING_SORT_BY_MEM?= +# Output file names for timed builds +TIME_OF_BUILD_FILE ?= time-of-build.log +TIME_OF_BUILD_BEFORE_FILE ?= time-of-build-before.log +TIME_OF_BUILD_AFTER_FILE ?= time-of-build-after.log +TIME_OF_PRETTY_BUILD_FILE ?= time-of-build-pretty.log +TIME_OF_PRETTY_BOTH_BUILD_FILE ?= time-of-build-both.log +TIME_OF_PRETTY_BUILD_EXTRA_FILES ?= - # also output to the command line + +TGTS ?= + +# Retro compatibility (DESTDIR is standard on Unix, DSTROOT is not) +ifdef DSTROOT +DESTDIR := $(DSTROOT) +endif + +# Substitution of the path by appending $(DESTDIR) if needed. +# The variable $(COQMF_WINDRIVE) can be needed for Cygwin environments. +windrive_path = $(if $(COQMF_WINDRIVE),$(subst $(COQMF_WINDRIVE),/,$(1)),$(1)) +destination_path = $(if $(DESTDIR),$(DESTDIR)/$(call windrive_path,$(1)),$(1)) + +# Installation paths of libraries and documentation. +COQLIBINSTALL ?= $(call destination_path,$(COQLIB)/user-contrib) +COQDOCINSTALL ?= $(call destination_path,$(DOCDIR)/user-contrib) +COQTOPINSTALL ?= $(call destination_path,$(COQLIB)/toploop) # FIXME: Unused variable? + +########## End of parameters ################################################## +# What follows may be relevant to you only if you need to +# extend this Makefile. If so, look for 'Extension point' here and +# put in Makefile.local double colon rules accordingly. +# E.g. to perform some work after the all target completes you can write +# +# post-all:: +# echo "All done!" +# +# in Makefile.local +# +############################################################################### + + + + +# Flags ####################################################################### +# +# We define a bunch of variables combining the parameters. +# To add additional flags to coq, coqchk or coqdoc, set the +# {COQ,COQCHK,COQDOC}EXTRAFLAGS variable to whatever you want to add. +# To overwrite the default choice and set your own flags entirely, set the +# {COQ,COQCHK,COQDOC}FLAGS variable. + +SHOW := $(if $(VERBOSE),@true "",@echo "") +HIDE := $(if $(VERBOSE),,@) + +TIMER=$(if $(TIMED), $(STDTIME), $(TIMECMD)) + +OPT?= + +# The DYNOBJ and DYNLIB variables are used by "coqdep -dyndep var" in .v.d +ifeq '$(OPT)' '-byte' +USEBYTE:=true +DYNOBJ:=.cma +DYNLIB:=.cma +else +USEBYTE:= +DYNOBJ:=.cmxs +DYNLIB:=.cmxs +endif + +# these variables are meant to be overridden if you want to add *extra* flags +COQEXTRAFLAGS?= +COQCHKEXTRAFLAGS?= +COQDOCEXTRAFLAGS?= + +# these flags do NOT contain the libraries, to make them easier to overwrite +COQFLAGS?=-q $(OTHERFLAGS) $(COQEXTRAFLAGS) +COQCHKFLAGS?=-silent -o $(COQCHKEXTRAFLAGS) +COQDOCFLAGS?=-interpolate -utf8 $(COQDOCEXTRAFLAGS) + +COQDOCLIBS?=$(COQLIBS_NOML) + +# The version of Coq being run and the version of coq_makefile that +# generated this makefile +COQ_VERSION:=$(shell $(COQC) --print-version | cut -d " " -f 1) +COQMAKEFILE_VERSION:=8.13.2 + +COQSRCLIBS?= $(foreach d,$(COQ_SRC_SUBDIRS), -I "$(COQLIB)/$(d)") + +CAMLFLAGS+=$(OCAMLLIBS) $(COQSRCLIBS) +# ocamldoc fails with unknown argument otherwise +CAMLDOCFLAGS:=$(filter-out -annot, $(filter-out -bin-annot, $(CAMLFLAGS))) +CAMLFLAGS+=$(OCAMLWARN) + +ifneq (,$(TIMING)) +TIMING_ARG=-time +ifeq (after,$(TIMING)) +TIMING_EXT=after-timing +else +ifeq (before,$(TIMING)) +TIMING_EXT=before-timing +else +TIMING_EXT=timing +endif +endif +else +TIMING_ARG= +endif + +# Files ####################################################################### +# +# We here define a bunch of variables about the files being part of the +# Coq project in order to ease the writing of build target and build rules + +VDFILE := .Makefile.d + +ALLSRCFILES := \ + $(MLGFILES) \ + $(MLFILES) \ + $(MLPACKFILES) \ + $(MLLIBFILES) \ + $(MLIFILES) + +# helpers +vo_to_obj = $(addsuffix .o,\ + $(filter-out Warning: Error:,\ + $(shell $(COQTOP) -q -noinit -batch -quiet -print-mod-uid $(1)))) +strip_dotslash = $(patsubst ./%,%,$(1)) + +# without this we get undefined variables in the expansion for the +# targets of the [deprecated,use-mllib-or-mlpack] rule +with_undef = $(if $(filter-out undefined, $(origin $(1))),$($(1))) + +VO = vo +VOS = vos + +VOFILES = $(VFILES:.v=.$(VO)) +GLOBFILES = $(VFILES:.v=.glob) +HTMLFILES = $(VFILES:.v=.html) +GHTMLFILES = $(VFILES:.v=.g.html) +BEAUTYFILES = $(addsuffix .beautified,$(VFILES)) +TEXFILES = $(VFILES:.v=.tex) +GTEXFILES = $(VFILES:.v=.g.tex) +CMOFILES = \ + $(MLGFILES:.mlg=.cmo) \ + $(MLFILES:.ml=.cmo) \ + $(MLPACKFILES:.mlpack=.cmo) +CMXFILES = $(CMOFILES:.cmo=.cmx) +OFILES = $(CMXFILES:.cmx=.o) +CMAFILES = $(MLLIBFILES:.mllib=.cma) $(MLPACKFILES:.mlpack=.cma) +CMXAFILES = $(CMAFILES:.cma=.cmxa) +CMIFILES = \ + $(CMOFILES:.cmo=.cmi) \ + $(MLIFILES:.mli=.cmi) +# the /if/ is because old _CoqProject did not list a .ml(pack|lib) but just +# a .mlg file +CMXSFILES = \ + $(MLPACKFILES:.mlpack=.cmxs) \ + $(CMXAFILES:.cmxa=.cmxs) \ + $(if $(MLPACKFILES)$(CMXAFILES),,\ + $(MLGFILES:.mlg=.cmxs) $(MLFILES:.ml=.cmxs)) + +# files that are packed into a plugin (no extension) +PACKEDFILES = \ + $(call strip_dotslash, \ + $(foreach lib, \ + $(call strip_dotslash, \ + $(MLPACKFILES:.mlpack=_MLPACK_DEPENDENCIES)),$(call with_undef,$(lib)))) +# files that are archived into a .cma (mllib) +LIBEDFILES = \ + $(call strip_dotslash, \ + $(foreach lib, \ + $(call strip_dotslash, \ + $(MLLIBFILES:.mllib=_MLLIB_DEPENDENCIES)),$(call with_undef,$(lib)))) +CMIFILESTOINSTALL = $(filter-out $(addsuffix .cmi,$(PACKEDFILES)),$(CMIFILES)) +CMOFILESTOINSTALL = $(filter-out $(addsuffix .cmo,$(PACKEDFILES)),$(CMOFILES)) +OBJFILES = $(call vo_to_obj,$(VOFILES)) +ALLNATIVEFILES = \ + $(OBJFILES:.o=.cmi) \ + $(OBJFILES:.o=.cmx) \ + $(OBJFILES:.o=.cmxs) +# trick: wildcard filters out non-existing files, so that `install` doesn't show +# warnings and `clean` doesn't pass to rm a list of files that is too long for +# the shell. +NATIVEFILES = $(wildcard $(ALLNATIVEFILES)) +FILESTOINSTALL = \ + $(VOFILES) \ + $(VFILES) \ + $(GLOBFILES) \ + $(NATIVEFILES) \ + $(CMIFILESTOINSTALL) +BYTEFILESTOINSTALL = \ + $(CMOFILESTOINSTALL) \ + $(CMAFILES) +ifeq '$(HASNATDYNLINK)' 'true' +DO_NATDYNLINK = yes +FILESTOINSTALL += $(CMXSFILES) $(CMXAFILES) $(CMOFILESTOINSTALL:.cmo=.cmx) +else +DO_NATDYNLINK = +endif + +ALLDFILES = $(addsuffix .d,$(ALLSRCFILES)) $(VDFILE) + +# Compilation targets ######################################################### + +all: + $(HIDE)$(MAKE) --no-print-directory -f "$(SELF)" pre-all + $(HIDE)$(MAKE) --no-print-directory -f "$(SELF)" real-all + $(HIDE)$(MAKE) --no-print-directory -f "$(SELF)" post-all +.PHONY: all + +all.timing.diff: + $(HIDE)$(MAKE) --no-print-directory -f "$(SELF)" pre-all + $(HIDE)$(MAKE) --no-print-directory -f "$(SELF)" real-all.timing.diff TIME_OF_PRETTY_BUILD_EXTRA_FILES="" + $(HIDE)$(MAKE) --no-print-directory -f "$(SELF)" post-all +.PHONY: all.timing.diff + +ifeq (0,$(TIMING_REAL)) +TIMING_REAL_ARG := +TIMING_USER_ARG := --user +else +ifeq (1,$(TIMING_REAL)) +TIMING_REAL_ARG := --real +TIMING_USER_ARG := +else +TIMING_REAL_ARG := +TIMING_USER_ARG := +endif +endif + +ifeq (0,$(TIMING_INCLUDE_MEM)) +TIMING_INCLUDE_MEM_ARG := --no-include-mem +else +TIMING_INCLUDE_MEM_ARG := +endif + +ifeq (1,$(TIMING_SORT_BY_MEM)) +TIMING_SORT_BY_MEM_ARG := --sort-by-mem +else +TIMING_SORT_BY_MEM_ARG := +endif + +make-pretty-timed-before:: TIME_OF_BUILD_FILE=$(TIME_OF_BUILD_BEFORE_FILE) +make-pretty-timed-after:: TIME_OF_BUILD_FILE=$(TIME_OF_BUILD_AFTER_FILE) +make-pretty-timed make-pretty-timed-before make-pretty-timed-after:: + $(HIDE)rm -f pretty-timed-success.ok + $(HIDE)($(MAKE) --no-print-directory -f "$(PARENT)" $(TGTS) TIMED=1 2>&1 && touch pretty-timed-success.ok) | tee -a $(TIME_OF_BUILD_FILE) + $(HIDE)rm pretty-timed-success.ok # must not be -f; must fail if the touch failed +print-pretty-timed:: + $(HIDE)$(COQMAKE_ONE_TIME_FILE) $(TIMING_INCLUDE_MEM_ARG) $(TIMING_SORT_BY_MEM_ARG) $(TIMING_REAL_ARG) $(TIME_OF_BUILD_FILE) $(TIME_OF_PRETTY_BUILD_FILE) $(TIME_OF_PRETTY_BUILD_EXTRA_FILES) +print-pretty-timed-diff:: + $(HIDE)$(COQMAKE_BOTH_TIME_FILES) --sort-by=$(TIMING_SORT_BY) $(TIMING_INCLUDE_MEM_ARG) $(TIMING_SORT_BY_MEM_ARG) $(TIMING_REAL_ARG) $(TIME_OF_BUILD_AFTER_FILE) $(TIME_OF_BUILD_BEFORE_FILE) $(TIME_OF_PRETTY_BOTH_BUILD_FILE) $(TIME_OF_PRETTY_BUILD_EXTRA_FILES) +ifeq (,$(BEFORE)) +print-pretty-single-time-diff:: + @echo 'Error: Usage: $(MAKE) print-pretty-single-time-diff AFTER=path/to/file.v.after-timing BEFORE=path/to/file.v.before-timing' + $(HIDE)false +else +ifeq (,$(AFTER)) +print-pretty-single-time-diff:: + @echo 'Error: Usage: $(MAKE) print-pretty-single-time-diff AFTER=path/to/file.v.after-timing BEFORE=path/to/file.v.before-timing' + $(HIDE)false +else +print-pretty-single-time-diff:: + $(HIDE)$(COQMAKE_BOTH_SINGLE_TIMING_FILES) --fuzz=$(TIMING_FUZZ) --sort-by=$(TIMING_SORT_BY) $(TIMING_USER_ARG) $(AFTER) $(BEFORE) $(TIME_OF_PRETTY_BUILD_FILE) $(TIME_OF_PRETTY_BUILD_EXTRA_FILES) +endif +endif +pretty-timed: + $(HIDE)$(MAKE) --no-print-directory -f "$(PARENT)" make-pretty-timed + $(HIDE)$(MAKE) --no-print-directory -f "$(SELF)" print-pretty-timed +.PHONY: pretty-timed make-pretty-timed make-pretty-timed-before make-pretty-timed-after print-pretty-timed print-pretty-timed-diff print-pretty-single-time-diff + +# Extension points for actions to be performed before/after the all target +pre-all:: + @# Extension point + $(HIDE)if [ "$(COQMAKEFILE_VERSION)" != "$(COQ_VERSION)" ]; then\ + echo "W: This Makefile was generated by Coq $(COQMAKEFILE_VERSION)";\ + echo "W: while the current Coq version is $(COQ_VERSION)";\ + fi +.PHONY: pre-all + +post-all:: + @# Extension point +.PHONY: post-all + +real-all: $(VOFILES) $(if $(USEBYTE),bytefiles,optfiles) +.PHONY: real-all + +real-all.timing.diff: $(VOFILES:.vo=.v.timing.diff) +.PHONY: real-all.timing.diff + +bytefiles: $(CMOFILES) $(CMAFILES) +.PHONY: bytefiles + +optfiles: $(if $(DO_NATDYNLINK),$(CMXSFILES)) +.PHONY: optfiles + +# FIXME, see Ralf's bugreport +# quick is deprecated, now renamed vio +vio: $(VOFILES:.vo=.vio) +.PHONY: vio +quick: vio + $(warning "'make quick' is deprecated, use 'make vio' or consider using 'vos' files") +.PHONY: quick + +vio2vo: + $(TIMER) $(COQC) $(COQDEBUG) $(COQFLAGS) $(COQLIBS) \ + -schedule-vio2vo $(J) $(VOFILES:%.vo=%.vio) +.PHONY: vio2vo + +# quick2vo is undocumented +quick2vo: + $(HIDE)make -j $(J) vio + $(HIDE)VIOFILES=$$(for vofile in $(VOFILES); do \ + viofile="$$(echo "$$vofile" | sed "s/\.vo$$/.vio/")"; \ + if [ "$$vofile" -ot "$$viofile" -o ! -e "$$vofile" ]; then printf "$$viofile "; fi; \ + done); \ + echo "VIO2VO: $$VIOFILES"; \ + if [ -n "$$VIOFILES" ]; then \ + $(TIMER) $(COQC) $(COQDEBUG) $(COQFLAGS) $(COQLIBS) -schedule-vio2vo $(J) $$VIOFILES; \ + fi +.PHONY: quick2vo + +checkproofs: + $(TIMER) $(COQC) $(COQDEBUG) $(COQFLAGS) $(COQLIBS) \ + -schedule-vio-checking $(J) $(VOFILES:%.vo=%.vio) +.PHONY: checkproofs + +vos: $(VOFILES:%.vo=%.vos) +.PHONY: vos + +vok: $(VOFILES:%.vo=%.vok) +.PHONY: vok + +validate: $(VOFILES) + $(TIMER) $(COQCHK) $(COQCHKFLAGS) $(COQLIBS_NOML) $^ +.PHONY: validate + +only: $(TGTS) +.PHONY: only + +# Documentation targets ####################################################### + +html: $(GLOBFILES) $(VFILES) + $(SHOW)'COQDOC -d html $(GAL)' + $(HIDE)mkdir -p html + $(HIDE)$(COQDOC) \ + -toc $(COQDOCFLAGS) -html $(GAL) $(COQDOCLIBS) -d html $(VFILES) + +mlihtml: $(MLIFILES:.mli=.cmi) + $(SHOW)'CAMLDOC -d $@' + $(HIDE)mkdir $@ || rm -rf $@/* + $(HIDE)$(CAMLDOC) -html \ + -d $@ -m A $(CAMLDEBUG) $(CAMLDOCFLAGS) $(MLIFILES) + +all-mli.tex: $(MLIFILES:.mli=.cmi) + $(SHOW)'CAMLDOC -latex $@' + $(HIDE)$(CAMLDOC) -latex \ + -o $@ -m A $(CAMLDEBUG) $(CAMLDOCFLAGS) $(MLIFILES) + +all.ps: $(VFILES) + $(SHOW)'COQDOC -ps $(GAL)' + $(HIDE)$(COQDOC) \ + -toc $(COQDOCFLAGS) -ps $(GAL) $(COQDOCLIBS) \ + -o $@ `$(COQDEP) -sort $(VFILES)` + +all.pdf: $(VFILES) + $(SHOW)'COQDOC -pdf $(GAL)' + $(HIDE)$(COQDOC) \ + -toc $(COQDOCFLAGS) -pdf $(GAL) $(COQDOCLIBS) \ + -o $@ `$(COQDEP) -sort $(VFILES)` + +# FIXME: not quite right, since the output name is different +gallinahtml: GAL=-g +gallinahtml: html + +all-gal.ps: GAL=-g +all-gal.ps: all.ps + +all-gal.pdf: GAL=-g +all-gal.pdf: all.pdf + +# ? +beautify: $(BEAUTYFILES) + for file in $^; do mv $${file%.beautified} $${file%beautified}old && mv $${file} $${file%.beautified}; done + @echo 'Do not do "make clean" until you are sure that everything went well!' + @echo 'If there were a problem, execute "for file in $$(find . -name \*.v.old -print); do mv $${file} $${file%.old}; done" in your shell/' +.PHONY: beautify + +# Installation targets ######################################################## +# +# There rules can be extended in Makefile.local +# Extensions can't assume when they run. + +install: + $(HIDE)code=0; for f in $(FILESTOINSTALL); do\ + if ! [ -f "$$f" ]; then >&2 echo $$f does not exist; code=1; fi \ + done; exit $$code + $(HIDE)for f in $(FILESTOINSTALL); do\ + df="`$(COQMKFILE) -destination-of "$$f" $(COQLIBS)`";\ + if [ "$$?" != "0" -o -z "$$df" ]; then\ + echo SKIP "$$f" since it has no logical path;\ + else\ + install -d "$(COQLIBINSTALL)/$$df" &&\ + install -m 0644 "$$f" "$(COQLIBINSTALL)/$$df" &&\ + echo INSTALL "$$f" "$(COQLIBINSTALL)/$$df";\ + fi;\ + done + $(HIDE)$(MAKE) install-extra -f "$(SELF)" +install-extra:: + @# Extension point +.PHONY: install install-extra + +install-byte: + $(HIDE)for f in $(BYTEFILESTOINSTALL); do\ + df="`$(COQMKFILE) -destination-of "$$f" $(COQLIBS)`";\ + if [ "$$?" != "0" -o -z "$$df" ]; then\ + echo SKIP "$$f" since it has no logical path;\ + else\ + install -d "$(COQLIBINSTALL)/$$df" &&\ + install -m 0644 "$$f" "$(COQLIBINSTALL)/$$df" &&\ + echo INSTALL "$$f" "$(COQLIBINSTALL)/$$df";\ + fi;\ + done + +install-doc:: html mlihtml + @# Extension point + $(HIDE)install -d "$(COQDOCINSTALL)/$(INSTALLCOQDOCROOT)/html" + $(HIDE)for i in html/*; do \ + dest="$(COQDOCINSTALL)/$(INSTALLCOQDOCROOT)/$$i";\ + install -m 0644 "$$i" "$$dest";\ + echo INSTALL "$$i" "$$dest";\ + done + $(HIDE)install -d \ + "$(COQDOCINSTALL)/$(INSTALLCOQDOCROOT)/mlihtml" + $(HIDE)for i in mlihtml/*; do \ + dest="$(COQDOCINSTALL)/$(INSTALLCOQDOCROOT)/$$i";\ + install -m 0644 "$$i" "$$dest";\ + echo INSTALL "$$i" "$$dest";\ + done +.PHONY: install-doc + +uninstall:: + @# Extension point + $(HIDE)for f in $(FILESTOINSTALL); do \ + df="`$(COQMKFILE) -destination-of "$$f" $(COQLIBS)`" &&\ + instf="$(COQLIBINSTALL)/$$df/`basename $$f`" &&\ + rm -f "$$instf" &&\ + echo RM "$$instf" &&\ + (rmdir "$(COQLIBINSTALL)/$$df/" 2>/dev/null || true); \ + done +.PHONY: uninstall + +uninstall-doc:: + @# Extension point + $(SHOW)'RM $(COQDOCINSTALL)/$(INSTALLCOQDOCROOT)/html' + $(HIDE)rm -rf "$(COQDOCINSTALL)/$(INSTALLCOQDOCROOT)/html" + $(SHOW)'RM $(COQDOCINSTALL)/$(INSTALLCOQDOCROOT)/mlihtml' + $(HIDE)rm -rf "$(COQDOCINSTALL)/$(INSTALLCOQDOCROOT)/mlihtml" + $(HIDE) rmdir "$(COQDOCINSTALL)/$(INSTALLCOQDOCROOT)/" || true +.PHONY: uninstall-doc + +# Cleaning #################################################################### +# +# There rules can be extended in Makefile.local +# Extensions can't assume when they run. + +clean:: + @# Extension point + $(SHOW)'CLEAN' + $(HIDE)rm -f $(CMOFILES) + $(HIDE)rm -f $(CMIFILES) + $(HIDE)rm -f $(CMAFILES) + $(HIDE)rm -f $(CMOFILES:.cmo=.cmx) + $(HIDE)rm -f $(CMXAFILES) + $(HIDE)rm -f $(CMXSFILES) + $(HIDE)rm -f $(CMOFILES:.cmo=.o) + $(HIDE)rm -f $(CMXAFILES:.cmxa=.a) + $(HIDE)rm -f $(MLGFILES:.mlg=.ml) + $(HIDE)rm -f $(ALLDFILES) + $(HIDE)rm -f $(NATIVEFILES) + $(HIDE)find . -name .coq-native -type d -empty -delete + $(HIDE)rm -f $(VOFILES) + $(HIDE)rm -f $(VOFILES:.vo=.vio) + $(HIDE)rm -f $(VOFILES:.vo=.vos) + $(HIDE)rm -f $(VOFILES:.vo=.vok) + $(HIDE)rm -f $(BEAUTYFILES) $(VFILES:=.old) + $(HIDE)rm -f all.ps all-gal.ps all.pdf all-gal.pdf all.glob all-mli.tex + $(HIDE)rm -f $(VFILES:.v=.glob) + $(HIDE)rm -f $(VFILES:.v=.tex) + $(HIDE)rm -f $(VFILES:.v=.g.tex) + $(HIDE)rm -f pretty-timed-success.ok + $(HIDE)rm -rf html mlihtml +.PHONY: clean + +cleanall:: clean + @# Extension point + $(SHOW)'CLEAN *.aux *.timing' + $(HIDE)rm -f $(foreach f,$(VFILES:.v=),$(dir $(f)).$(notdir $(f)).aux) + $(HIDE)rm -f $(TIME_OF_BUILD_FILE) $(TIME_OF_BUILD_BEFORE_FILE) $(TIME_OF_BUILD_AFTER_FILE) $(TIME_OF_PRETTY_BUILD_FILE) $(TIME_OF_PRETTY_BOTH_BUILD_FILE) + $(HIDE)rm -f $(VOFILES:.vo=.v.timing) + $(HIDE)rm -f $(VOFILES:.vo=.v.before-timing) + $(HIDE)rm -f $(VOFILES:.vo=.v.after-timing) + $(HIDE)rm -f $(VOFILES:.vo=.v.timing.diff) + $(HIDE)rm -f .lia.cache .nia.cache +.PHONY: cleanall + +archclean:: + @# Extension point + $(SHOW)'CLEAN *.cmx *.o' + $(HIDE)rm -f $(NATIVEFILES) + $(HIDE)rm -f $(CMOFILES:%.cmo=%.cmx) +.PHONY: archclean + + +# Compilation rules ########################################################### + +$(MLIFILES:.mli=.cmi): %.cmi: %.mli + $(SHOW)'CAMLC -c $<' + $(HIDE)$(TIMER) $(CAMLC) $(CAMLDEBUG) $(CAMLFLAGS) $(CAMLPKGS) $< + +$(MLGFILES:.mlg=.ml): %.ml: %.mlg + $(SHOW)'COQPP $<' + $(HIDE)$(COQPP) $< + +# Stupid hack around a deficient syntax: we cannot concatenate two expansions +$(filter %.cmo, $(MLFILES:.ml=.cmo) $(MLGFILES:.mlg=.cmo)): %.cmo: %.ml + $(SHOW)'CAMLC -c $<' + $(HIDE)$(TIMER) $(CAMLC) $(CAMLDEBUG) $(CAMLFLAGS) $(CAMLPKGS) $< + +# Same hack +$(filter %.cmx, $(MLFILES:.ml=.cmx) $(MLGFILES:.mlg=.cmx)): %.cmx: %.ml + $(SHOW)'CAMLOPT -c $(FOR_PACK) $<' + $(HIDE)$(TIMER) $(CAMLOPTC) $(CAMLDEBUG) $(CAMLFLAGS) $(CAMLPKGS) $(FOR_PACK) $< + + +$(MLLIBFILES:.mllib=.cmxs): %.cmxs: %.cmxa + $(SHOW)'CAMLOPT -shared -o $@' + $(HIDE)$(TIMER) $(CAMLOPTLINK) $(CAMLDEBUG) $(CAMLFLAGS) $(CAMLPKGS) \ + -linkall -shared -o $@ $< + +$(MLLIBFILES:.mllib=.cma): %.cma: | %.mllib + $(SHOW)'CAMLC -a -o $@' + $(HIDE)$(TIMER) $(CAMLLINK) $(CAMLDEBUG) $(CAMLFLAGS) $(CAMLPKGS) -a -o $@ $^ + +$(MLLIBFILES:.mllib=.cmxa): %.cmxa: | %.mllib + $(SHOW)'CAMLOPT -a -o $@' + $(HIDE)$(TIMER) $(CAMLOPTLINK) $(CAMLDEBUG) $(CAMLFLAGS) -a -o $@ $^ + + +$(MLPACKFILES:.mlpack=.cmxs): %.cmxs: %.cmxa + $(SHOW)'CAMLOPT -shared -o $@' + $(HIDE)$(TIMER) $(CAMLOPTLINK) $(CAMLDEBUG) $(CAMLFLAGS) $(CAMLPKGS) \ + -shared -linkall -o $@ $< + +$(MLPACKFILES:.mlpack=.cmxa): %.cmxa: %.cmx + $(SHOW)'CAMLOPT -a -o $@' + $(HIDE)$(TIMER) $(CAMLOPTLINK) $(CAMLDEBUG) $(CAMLFLAGS) -a -o $@ $< + +$(MLPACKFILES:.mlpack=.cma): %.cma: %.cmo | %.mlpack + $(SHOW)'CAMLC -a -o $@' + $(HIDE)$(TIMER) $(CAMLLINK) $(CAMLDEBUG) $(CAMLFLAGS) $(CAMLPKGS) -a -o $@ $^ + +$(MLPACKFILES:.mlpack=.cmo): %.cmo: | %.mlpack + $(SHOW)'CAMLC -pack -o $@' + $(HIDE)$(TIMER) $(CAMLLINK) $(CAMLDEBUG) $(CAMLFLAGS) -pack -o $@ $^ + +$(MLPACKFILES:.mlpack=.cmx): %.cmx: | %.mlpack + $(SHOW)'CAMLOPT -pack -o $@' + $(HIDE)$(TIMER) $(CAMLOPTLINK) $(CAMLDEBUG) $(CAMLFLAGS) -pack -o $@ $^ + +# This rule is for _CoqProject with no .mllib nor .mlpack +$(filter-out $(MLLIBFILES:.mllib=.cmxs) $(MLPACKFILES:.mlpack=.cmxs) $(addsuffix .cmxs,$(PACKEDFILES)) $(addsuffix .cmxs,$(LIBEDFILES)),$(MLFILES:.ml=.cmxs) $(MLGFILES:.mlg=.cmxs)): %.cmxs: %.cmx + $(SHOW)'[deprecated,use-mllib-or-mlpack] CAMLOPT -shared -o $@' + $(HIDE)$(TIMER) $(CAMLOPTLINK) $(CAMLDEBUG) $(CAMLFLAGS) $(CAMLPKGS) \ + -shared -o $@ $< + +ifneq (,$(TIMING)) +TIMING_EXTRA = > $<.$(TIMING_EXT) +else +TIMING_EXTRA = +endif + +$(VOFILES): %.vo: %.v + $(SHOW)COQC $< + $(HIDE)$(TIMER) $(COQC) $(COQDEBUG) $(TIMING_ARG) $(COQFLAGS) $(COQLIBS) $< $(TIMING_EXTRA) + +# FIXME ?merge with .vo / .vio ? +$(GLOBFILES): %.glob: %.v + $(TIMER) $(COQC) $(COQDEBUG) $(COQFLAGS) $(COQLIBS) $< + +$(VFILES:.v=.vio): %.vio: %.v + $(SHOW)COQC -vio $< + $(HIDE)$(TIMER) $(COQC) -vio $(COQDEBUG) $(COQFLAGS) $(COQLIBS) $< + +$(VFILES:.v=.vos): %.vos: %.v + $(SHOW)COQC -vos $< + $(HIDE)$(TIMER) $(COQC) -vos $(COQDEBUG) $(COQFLAGS) $(COQLIBS) $< + +$(VFILES:.v=.vok): %.vok: %.v + $(SHOW)COQC -vok $< + $(HIDE)$(TIMER) $(COQC) -vok $(COQDEBUG) $(COQFLAGS) $(COQLIBS) $< + +$(addsuffix .timing.diff,$(VFILES)): %.timing.diff : %.before-timing %.after-timing + $(SHOW)PYTHON TIMING-DIFF $*.{before,after}-timing + $(HIDE)$(MAKE) --no-print-directory -f "$(SELF)" print-pretty-single-time-diff BEFORE=$*.before-timing AFTER=$*.after-timing TIME_OF_PRETTY_BUILD_FILE="$@" + +$(BEAUTYFILES): %.v.beautified: %.v + $(SHOW)'BEAUTIFY $<' + $(HIDE)$(TIMER) $(COQC) $(COQDEBUG) $(COQFLAGS) $(COQLIBS) -beautify $< + +$(TEXFILES): %.tex: %.v + $(SHOW)'COQDOC -latex $<' + $(HIDE)$(COQDOC) $(COQDOCFLAGS) -latex $< -o $@ + +$(GTEXFILES): %.g.tex: %.v + $(SHOW)'COQDOC -latex -g $<' + $(HIDE)$(COQDOC) $(COQDOCFLAGS) -latex -g $< -o $@ + +$(HTMLFILES): %.html: %.v %.glob + $(SHOW)'COQDOC -html $<' + $(HIDE)$(COQDOC) $(COQDOCFLAGS) -html $< -o $@ + +$(GHTMLFILES): %.g.html: %.v %.glob + $(SHOW)'COQDOC -html -g $<' + $(HIDE)$(COQDOC) $(COQDOCFLAGS) -html -g $< -o $@ + +# Dependency files ############################################################ + +ifndef MAKECMDGOALS + -include $(ALLDFILES) +else + ifneq ($(filter-out archclean clean cleanall printenv make-pretty-timed make-pretty-timed-before make-pretty-timed-after print-pretty-timed print-pretty-timed-diff print-pretty-single-time-diff,$(MAKECMDGOALS)),) + -include $(ALLDFILES) + endif +endif + +.SECONDARY: $(ALLDFILES) + +redir_if_ok = > "$@" || ( RV=$$?; rm -f "$@"; exit $$RV ) + +GENMLFILES:=$(MLGFILES:.mlg=.ml) +$(addsuffix .d,$(ALLSRCFILES)): $(GENMLFILES) + +$(addsuffix .d,$(MLIFILES)): %.mli.d: %.mli + $(SHOW)'CAMLDEP $<' + $(HIDE)$(CAMLDEP) $(OCAMLLIBS) "$<" $(redir_if_ok) + +$(addsuffix .d,$(MLGFILES)): %.mlg.d: %.ml + $(SHOW)'CAMLDEP $<' + $(HIDE)$(CAMLDEP) $(OCAMLLIBS) "$<" $(redir_if_ok) + +$(addsuffix .d,$(MLFILES)): %.ml.d: %.ml + $(SHOW)'CAMLDEP $<' + $(HIDE)$(CAMLDEP) $(OCAMLLIBS) "$<" $(redir_if_ok) + +$(addsuffix .d,$(MLLIBFILES)): %.mllib.d: %.mllib + $(SHOW)'OCAMLLIBDEP $<' + $(HIDE)$(OCAMLLIBDEP) -c $(OCAMLLIBS) "$<" $(redir_if_ok) + +$(addsuffix .d,$(MLPACKFILES)): %.mlpack.d: %.mlpack + $(SHOW)'OCAMLLIBDEP $<' + $(HIDE)$(OCAMLLIBDEP) -c $(OCAMLLIBS) "$<" $(redir_if_ok) + +# If this makefile is created using a _CoqProject we have coqdep get +# options from it. This avoids argument length limits for pathological +# projects. Note that extra options might be on the command line. +VDFILE_FLAGS:=$(if _CoqProject,-f _CoqProject,) $(CMDLINE_COQLIBS) $(CMDLINE_VFILES) + +$(VDFILE): _CoqProject $(VFILES) + $(SHOW)'COQDEP VFILES' + $(HIDE)$(COQDEP) -vos -dyndep var $(VDFILE_FLAGS) $(redir_if_ok) + +# Misc ######################################################################## + +byte: + $(HIDE)$(MAKE) all "OPT:=-byte" -f "$(SELF)" +.PHONY: byte + +opt: + $(HIDE)$(MAKE) all "OPT:=-opt" -f "$(SELF)" +.PHONY: opt + +# This is deprecated. To extend this makefile use +# extension points and Makefile.local +printenv:: + $(warning printenv is deprecated) + $(warning write extensions in Makefile.local or include Makefile.conf) + @echo 'LOCAL = $(LOCAL)' + @echo 'COQLIB = $(COQLIB)' + @echo 'DOCDIR = $(DOCDIR)' + @echo 'OCAMLFIND = $(OCAMLFIND)' + @echo 'HASNATDYNLINK = $(HASNATDYNLINK)' + @echo 'SRC_SUBDIRS = $(SRC_SUBDIRS)' + @echo 'COQ_SRC_SUBDIRS = $(COQ_SRC_SUBDIRS)' + @echo 'OCAMLFIND = $(OCAMLFIND)' + @echo 'PP = $(PP)' + @echo 'COQFLAGS = $(COQFLAGS)' + @echo 'COQLIB = $(COQLIBS)' + @echo 'COQLIBINSTALL = $(COQLIBINSTALL)' + @echo 'COQDOCINSTALL = $(COQDOCINSTALL)' +.PHONY: printenv + +# Generate a .merlin file. If you need to append directives to this +# file you can extend the merlin-hook target in Makefile.local +.merlin: + $(SHOW)'FILL .merlin' + $(HIDE)echo 'FLG $(COQMF_CAMLFLAGS)' > .merlin + $(HIDE)echo 'B $(COQLIB)' >> .merlin + $(HIDE)echo 'S $(COQLIB)' >> .merlin + $(HIDE)$(foreach d,$(COQ_SRC_SUBDIRS), \ + echo 'B $(COQLIB)$(d)' >> .merlin;) + $(HIDE)$(foreach d,$(COQ_SRC_SUBDIRS), \ + echo 'S $(COQLIB)$(d)' >> .merlin;) + $(HIDE)$(foreach d,$(SRC_SUBDIRS), echo 'B $(d)' >> .merlin;) + $(HIDE)$(foreach d,$(SRC_SUBDIRS), echo 'S $(d)' >> .merlin;) + $(HIDE)$(MAKE) merlin-hook -f "$(SELF)" +.PHONY: merlin + +merlin-hook:: + @# Extension point +.PHONY: merlin-hook + +# prints all variables +debug: + $(foreach v,\ + $(sort $(filter-out $(INITIAL_VARS) INITIAL_VARS,\ + $(.VARIABLES))),\ + $(info $(v) = $($(v)))) +.PHONY: debug + +.DEFAULT_GOAL := all + +# Local Variables: +# mode: makefile-gmake +# End: diff --git a/build/Makefile.conf b/build/Makefile.conf new file mode 100644 index 0000000..db8f321 --- /dev/null +++ b/build/Makefile.conf @@ -0,0 +1,55 @@ +# This configuration file was generated by running: +# coq_makefile -f _CoqProject riscv_types.v riscv.v -o Makefile + + +############################################################################### +# # +# Project files. # +# # +############################################################################### + +COQMF_VFILES = riscv_types.v riscv.v +COQMF_MLIFILES = +COQMF_MLFILES = +COQMF_MLGFILES = +COQMF_MLPACKFILES = +COQMF_MLLIBFILES = +COQMF_CMDLINE_VFILES = riscv_types.v riscv.v + +############################################################################### +# # +# Path directives (-I, -R, -Q). # +# # +############################################################################### + +COQMF_OCAMLLIBS = +COQMF_SRC_SUBDIRS = +COQMF_COQLIBS = -R /home/aditya/.opam/default/share/sail/lib/coq/ Sail -R . '' -R ../handwritten_support '' +COQMF_COQLIBS_NOML = -R /home/aditya/.opam/default/share/sail/lib/coq/ Sail -R . '' -R ../handwritten_support '' +COQMF_CMDLINE_COQLIBS = + +############################################################################### +# # +# Coq configuration. # +# # +############################################################################### + +COQMF_LOCAL=0 +COQMF_COQLIB=/home/aditya/.opam/default/lib/coq/ +COQMF_DOCDIR=/home/aditya/.opam/default/doc/ +COQMF_OCAMLFIND=/home/aditya/.opam/default/bin/ocamlfind +COQMF_CAMLFLAGS=-thread -rectypes -w +a-4-9-27-41-42-44-45-48-58-67 -safe-string -strict-sequence +COQMF_WARN=-warn-error +a-3 +COQMF_HASNATDYNLINK=true +COQMF_COQ_SRC_SUBDIRS=config lib clib kernel library engine pretyping interp gramlib gramlib/.pack parsing proofs tactics toplevel printing ide stm vernac plugins/btauto plugins/cc plugins/derive plugins/extraction plugins/firstorder plugins/funind plugins/ltac plugins/micromega plugins/nsatz plugins/omega plugins/ring plugins/rtauto plugins/ssr plugins/ssrmatching plugins/ssrsearch plugins/syntax +COQMF_COQ_NATIVE_COMPILER_DEFAULT=no +COQMF_WINDRIVE= + +############################################################################### +# # +# Extra variables. # +# # +############################################################################### + +COQMF_OTHERFLAGS = +COQMF_INSTALLCOQDOCROOT = orphan_Sail__ diff --git a/build/_CoqProject b/build/_CoqProject new file mode 100644 index 0000000..b4438de --- /dev/null +++ b/build/_CoqProject @@ -0,0 +1,3 @@ +-R /home/aditya/.opam/default/share/sail/lib/coq/ Sail +-R . "" +-R ../handwritten_support ""
\ No newline at end of file diff --git a/build/riscv.glob b/build/riscv.glob new file mode 100644 index 0000000..7206a6e --- /dev/null +++ b/build/riscv.glob @@ -0,0 +1,1313 @@ +DIGEST c6db294320f7a6b05e7783002664d787 +Friscv +R49:57 Sail.Base <> <> lib +R75:83 Sail.Real <> <> lib +R101:111 riscv_types <> <> lib +def 199:205 <> is_none +binder 208:208 <> a:1 +R225:230 Coq.Init.Datatypes <> option ind +R232:232 riscv <> a:1 var +binder 219:221 <> opt:2 +R237:240 Coq.Init.Datatypes <> bool ind +R254:256 riscv <> opt:2 var +R265:268 Coq.Init.Datatypes <> Some constr +R275:279 Coq.Init.Datatypes <> false constr +R283:286 Coq.Init.Datatypes <> None constr +R291:294 Coq.Init.Datatypes <> true constr +def 313:319 <> is_some +binder 322:322 <> a:4 +R339:344 Coq.Init.Datatypes <> option ind +R346:346 riscv <> a:4 var +binder 333:335 <> opt:5 +R351:354 Coq.Init.Datatypes <> bool ind +R368:370 riscv <> opt:5 var +R379:382 Coq.Init.Datatypes <> Some constr +R389:392 Coq.Init.Datatypes <> true constr +R396:399 Coq.Init.Datatypes <> None constr +R404:408 Coq.Init.Datatypes <> false constr +def 427:433 <> eq_unit +R440:443 Coq.Init.Datatypes <> unit ind +R451:454 Coq.Init.Datatypes <> unit ind +R459:459 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R465:467 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R472:474 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R492:492 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R468:471 Coq.Init.Datatypes <> bool ind +binder 460:464 <> _bool:7 +R475:483 Sail.Values <> ArithFact class +R486:490 riscv <> _bool:7 var +R497:504 Sail.Values <> build_ex def +R507:510 Coq.Init.Datatypes <> true constr +def 526:532 <> neq_int +R539:539 Coq.Numbers.BinNums <> Z ind +binder 535:535 <> x:8 +R547:547 Coq.Numbers.BinNums <> Z ind +binder 543:543 <> y:9 +R552:552 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R558:560 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R565:567 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R610:610 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R561:564 Coq.Init.Datatypes <> bool ind +binder 553:557 <> _bool:10 +R568:576 Sail.Values <> ArithFact class +R579:586 Coq.Bool.Bool <> eqb def +R589:592 Coq.Init.Datatypes <> negb def +R596:599 Coq.ZArith.BinInt <> ::Z_scope:x_'=?'_x not +R595:595 riscv <> x:8 var +R600:600 riscv <> y:9 var +R604:608 riscv <> _bool:10 var +R618:625 Sail.Values <> build_ex def +R628:631 Coq.Init.Datatypes <> negb def +R634:638 Coq.ZArith.BinInt Z eqb def +R640:640 riscv <> x:8 var +R642:642 riscv <> y:9 var +def 659:666 <> neq_bool +R673:676 Coq.Init.Datatypes <> bool ind +binder 669:669 <> x:11 +R684:687 Coq.Init.Datatypes <> bool ind +binder 680:680 <> y:12 +R692:695 Coq.Init.Datatypes <> bool ind +R700:703 Coq.Init.Datatypes <> negb def +R706:713 Coq.Bool.Bool <> eqb def +R715:715 riscv <> x:11 var +R717:717 riscv <> y:12 var +def 733:736 <> __id +R743:743 Coq.Numbers.BinNums <> Z ind +binder 739:739 <> x:13 +R748:748 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R756:758 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R760:762 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R787:787 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R759:759 Coq.Numbers.BinNums <> Z ind +binder 749:755 <> _retval:14 +R763:771 Sail.Values <> ArithFact class +R781:784 Coq.ZArith.BinInt <> ::Z_scope:x_'=?'_x not +R774:780 riscv <> _retval:14 var +R785:785 riscv <> x:13 var +R792:799 Sail.Values <> build_ex def +R802:802 riscv <> x:13 var +def 818:825 <> fdiv_int +R832:832 Coq.Numbers.BinNums <> Z ind +binder 828:828 <> n:15 +R840:840 Coq.Numbers.BinNums <> Z ind +binder 836:836 <> m:16 +R845:845 Coq.Numbers.BinNums <> Z ind +R856:870 Coq.Bool.Sumbool <> sumbool_of_bool def +R873:876 Coq.Init.Datatypes <> andb def +R891:895 Coq.ZArith.BinInt Z gtb def +R897:897 riscv <> m:16 var +R879:883 Coq.ZArith.BinInt Z ltb def +R885:885 riscv <> n:15 var +R950:964 Coq.Bool.Sumbool <> sumbool_of_bool def +R967:970 Coq.Init.Datatypes <> andb def +R985:989 Coq.ZArith.BinInt Z ltb def +R991:991 riscv <> m:16 var +R973:977 Coq.ZArith.BinInt Z gtb def +R979:979 riscv <> n:15 var +R1041:1046 Coq.ZArith.BinInt Z quot def +R1048:1048 riscv <> n:15 var +R1050:1050 riscv <> m:16 var +R1002:1006 Coq.ZArith.BinInt Z sub def +R1009:1014 Coq.ZArith.BinInt Z quot def +R1017:1021 Coq.ZArith.BinInt Z sub def +R1023:1023 riscv <> n:15 var +R1028:1028 riscv <> m:16 var +R908:912 Coq.ZArith.BinInt Z sub def +R915:920 Coq.ZArith.BinInt Z quot def +R923:927 Coq.ZArith.BinInt Z add def +R929:929 riscv <> n:15 var +R934:934 riscv <> m:16 var +def 1065:1072 <> fmod_int +R1079:1079 Coq.Numbers.BinNums <> Z ind +binder 1075:1075 <> n:17 +R1087:1087 Coq.Numbers.BinNums <> Z ind +binder 1083:1083 <> m:18 +R1092:1092 Coq.Numbers.BinNums <> Z ind +R1097:1101 Coq.ZArith.BinInt Z sub def +R1103:1103 riscv <> n:17 var +R1106:1110 Coq.ZArith.BinInt Z mul def +R1112:1112 riscv <> m:18 var +R1115:1122 riscv <> fdiv_int def +R1124:1124 riscv <> n:17 var +R1126:1126 riscv <> m:18 var +def 1143:1157 <> concat_str_bits +R1164:1164 Coq.Numbers.BinNums <> Z ind +binder 1160:1160 <> n:19 +R1174:1179 Coq.Strings.String <> string ind +binder 1168:1170 <> str:20 +R1187:1191 Sail.Values <> mword def +R1193:1193 riscv <> n:19 var +binder 1183:1183 <> x:21 +R1198:1203 Coq.Strings.String <> string ind +R1211:1223 Coq.Strings.String <> append def +R1225:1227 riscv <> str:20 var +R1230:1243 Sail.Operators_mwords <> string_of_bits def +R1245:1245 riscv <> x:21 var +def 1261:1274 <> concat_str_dec +R1283:1288 Coq.Strings.String <> string ind +binder 1277:1279 <> str:22 +R1296:1296 Coq.Numbers.BinNums <> Z ind +binder 1292:1292 <> x:23 +R1301:1306 Coq.Strings.String <> string ind +R1311:1323 Coq.Strings.String <> append def +R1325:1327 riscv <> str:22 var +R1330:1336 Sail.String <> dec_str def +R1338:1338 riscv <> x:23 var +def 1356:1364 <> sail_mask +R1372:1372 Coq.Numbers.BinNums <> Z ind +binder 1367:1368 <> v0:24 +R1382:1382 Coq.Numbers.BinNums <> Z ind +binder 1376:1378 <> len:25 +R1390:1394 Sail.Values <> mword def +R1396:1397 riscv <> v0:24 var +binder 1386:1386 <> v:26 +R1402:1410 Sail.Values <> ArithFact class +R1413:1413 Coq.Init.Datatypes <> ::bool_scope:x_'&&'_x not +R1423:1428 Coq.Init.Datatypes <> ::bool_scope:x_'&&'_x not +R1437:1437 Coq.Init.Datatypes <> ::bool_scope:x_'&&'_x not +R1417:1421 Coq.ZArith.BinInt <> ::Z_scope:x_'>=?'_x not +R1414:1416 riscv <> len:25 var +R1431:1435 Coq.ZArith.BinInt <> ::Z_scope:x_'>=?'_x not +R1429:1430 riscv <> v0:24 var +binder 1402:1438 <> H:27 +R1443:1447 Sail.Values <> mword def +R1449:1451 riscv <> len:25 var +R1462:1476 Coq.Bool.Sumbool <> sumbool_of_bool def +R1479:1483 Coq.ZArith.BinInt Z leb def +R1485:1487 riscv <> len:25 var +R1490:1501 Sail.Values <> length_mword def +R1503:1503 riscv <> v:26 var +R1539:1549 Sail.Operators_mwords <> zero_extend def +R1553:1555 riscv <> len:25 var +R1551:1551 riscv <> v:26 var +R1512:1526 Sail.Operators_mwords <> vector_truncate def +R1530:1532 riscv <> len:25 var +R1528:1528 riscv <> v:26 var +def 1570:1578 <> sail_ones +R1585:1585 Coq.Numbers.BinNums <> Z ind +binder 1581:1581 <> n:28 +R1590:1598 Sail.Values <> ArithFact class +R1602:1606 Coq.ZArith.BinInt <> ::Z_scope:x_'>=?'_x not +R1601:1601 riscv <> n:28 var +binder 1590:1608 <> H:29 +R1613:1617 Sail.Values <> mword def +R1619:1619 riscv <> n:28 var +R1624:1630 Sail.Operators_mwords <> not_vec def +R1633:1637 Sail.Operators_mwords <> zeros def +R1639:1639 riscv <> n:28 var +def 1655:1664 <> slice_mask +R1671:1671 Coq.Numbers.BinNums <> Z ind +binder 1667:1667 <> n:30 +R1679:1679 Coq.Numbers.BinNums <> Z ind +binder 1675:1675 <> i:31 +R1687:1687 Coq.Numbers.BinNums <> Z ind +binder 1683:1683 <> l:32 +R1692:1700 Sail.Values <> ArithFact class +R1704:1708 Coq.ZArith.BinInt <> ::Z_scope:x_'>=?'_x not +R1703:1703 riscv <> n:30 var +binder 1692:1710 <> H:33 +R1715:1719 Sail.Values <> mword def +R1721:1721 riscv <> n:30 var +R1732:1746 Coq.Bool.Sumbool <> sumbool_of_bool def +R1749:1753 Coq.ZArith.BinInt Z geb def +R1755:1755 riscv <> l:32 var +R1757:1757 riscv <> n:30 var +R1821:1829 riscv <> sail_mask def +R1843:1846 riscv_types <> bits def +R1834:1835 bbv.HexNotationWord <> :::'''b'_x not +R1831:1831 riscv <> n:30 var +R1811:1814 riscv_types <> bits def +R1816:1816 riscv <> n:30 var +binder 1805:1807 <> one:34 +R1859:1864 Sail.Operators_mwords <> shiftl def +R1895:1895 riscv <> i:31 var +R1867:1873 Sail.Operators_mwords <> sub_vec def +R1890:1892 riscv <> one:34 var +R1876:1881 Sail.Operators_mwords <> shiftl def +R1887:1887 riscv <> l:32 var +R1883:1885 riscv <> one:34 var +R1765:1770 Sail.Operators_mwords <> shiftl def +R1786:1786 riscv <> i:31 var +R1773:1781 riscv <> sail_ones def +R1783:1783 riscv <> n:30 var +def 1910:1913 <> EXTS +R1920:1920 Coq.Numbers.BinNums <> Z ind +binder 1916:1916 <> n:35 +R1928:1928 Coq.Numbers.BinNums <> Z ind +binder 1924:1924 <> m:36 +R1936:1940 Sail.Values <> mword def +R1942:1942 riscv <> n:35 var +binder 1932:1932 <> v:37 +R1947:1955 Sail.Values <> ArithFact class +R1959:1963 Coq.ZArith.BinInt <> ::Z_scope:x_'>=?'_x not +R1958:1958 riscv <> m:36 var +R1964:1964 riscv <> n:35 var +binder 1947:1965 <> H:38 +R1970:1974 Sail.Values <> mword def +R1976:1976 riscv <> m:36 var +R1981:1991 Sail.Operators_mwords <> sign_extend def +R1995:1995 riscv <> m:36 var +R1993:1993 riscv <> v:37 var +def 2010:2013 <> EXTZ +R2020:2020 Coq.Numbers.BinNums <> Z ind +binder 2016:2016 <> n:39 +R2028:2028 Coq.Numbers.BinNums <> Z ind +binder 2024:2024 <> m:40 +R2036:2040 Sail.Values <> mword def +R2042:2042 riscv <> n:39 var +binder 2032:2032 <> v:41 +R2047:2055 Sail.Values <> ArithFact class +R2059:2063 Coq.ZArith.BinInt <> ::Z_scope:x_'>=?'_x not +R2058:2058 riscv <> m:40 var +R2064:2064 riscv <> n:39 var +binder 2047:2065 <> H:42 +R2070:2074 Sail.Values <> mword def +R2076:2076 riscv <> m:40 var +R2081:2091 Sail.Operators_mwords <> zero_extend def +R2095:2095 riscv <> m:40 var +R2093:2093 riscv <> v:41 var +def 2110:2117 <> zero_reg +R2121:2127 riscv_types <> regtype def +R2132:2135 riscv <> EXTZ def +R2150:2154 Sail.Values <> mword def +R2141:2142 bbv.HexNotationWord <> :::'Ox'_x not +R2172:2179 riscv <> zero_reg def +def 2200:2214 <> regval_from_reg +R2221:2225 Sail.Values <> mword def +binder 2217:2217 <> r:43 +R2233:2237 Sail.Values <> mword def +R2245:2245 riscv <> r:43 var +def 2260:2274 <> regval_into_reg +R2281:2285 Sail.Values <> mword def +binder 2277:2277 <> v:44 +R2293:2297 Sail.Values <> mword def +R2305:2305 riscv <> v:44 var +def 2320:2321 <> rX +R2328:2328 Coq.Numbers.BinNums <> Z ind +binder 2324:2324 <> r:45 +R2333:2341 Sail.Values <> ArithFact class +R2344:2344 Coq.Init.Datatypes <> ::bool_scope:x_'&&'_x not +R2352:2357 Coq.Init.Datatypes <> ::bool_scope:x_'&&'_x not +R2365:2365 Coq.Init.Datatypes <> ::bool_scope:x_'&&'_x not +R2346:2350 Coq.ZArith.BinInt <> ::Z_scope:x_'<=?'_x not +R2351:2351 riscv <> r:45 var +R2359:2362 Coq.ZArith.BinInt <> ::Z_scope:x_'<?'_x not +R2358:2358 riscv <> r:45 var +binder 2333:2366 <> H:46 +R2371:2371 riscv_types <> M def +R2374:2378 Sail.Values <> mword def +R2403:2403 riscv <> r:45 var +binder 2394:2398 <> l__32:47 +R2411:2411 Sail.Prompt_monad <> :::x_'>>='_x not +R5981:5986 Sail.Prompt_monad <> :::x_'>>='_x not +R2415:2429 Coq.Bool.Sumbool <> sumbool_of_bool def +R2432:2436 Coq.ZArith.BinInt Z eqb def +R2438:2442 riscv <> l__32:47 var +R2481:2495 Coq.Bool.Sumbool <> sumbool_of_bool def +R2498:2502 Coq.ZArith.BinInt Z eqb def +R2504:2508 riscv <> l__32:47 var +R2582:2596 Coq.Bool.Sumbool <> sumbool_of_bool def +R2599:2603 Coq.ZArith.BinInt Z eqb def +R2605:2609 riscv <> l__32:47 var +R2683:2697 Coq.Bool.Sumbool <> sumbool_of_bool def +R2700:2704 Coq.ZArith.BinInt Z eqb def +R2706:2710 riscv <> l__32:47 var +R2784:2798 Coq.Bool.Sumbool <> sumbool_of_bool def +R2801:2805 Coq.ZArith.BinInt Z eqb def +R2807:2811 riscv <> l__32:47 var +R2885:2899 Coq.Bool.Sumbool <> sumbool_of_bool def +R2902:2906 Coq.ZArith.BinInt Z eqb def +R2908:2912 riscv <> l__32:47 var +R2986:3000 Coq.Bool.Sumbool <> sumbool_of_bool def +R3003:3007 Coq.ZArith.BinInt Z eqb def +R3009:3013 riscv <> l__32:47 var +R3087:3101 Coq.Bool.Sumbool <> sumbool_of_bool def +R3104:3108 Coq.ZArith.BinInt Z eqb def +R3110:3114 riscv <> l__32:47 var +R3188:3202 Coq.Bool.Sumbool <> sumbool_of_bool def +R3205:3209 Coq.ZArith.BinInt Z eqb def +R3211:3215 riscv <> l__32:47 var +R3289:3303 Coq.Bool.Sumbool <> sumbool_of_bool def +R3306:3310 Coq.ZArith.BinInt Z eqb def +R3312:3316 riscv <> l__32:47 var +R3390:3404 Coq.Bool.Sumbool <> sumbool_of_bool def +R3407:3411 Coq.ZArith.BinInt Z eqb def +R3413:3417 riscv <> l__32:47 var +R3505:3519 Coq.Bool.Sumbool <> sumbool_of_bool def +R3522:3526 Coq.ZArith.BinInt Z eqb def +R3528:3532 riscv <> l__32:47 var +R3620:3634 Coq.Bool.Sumbool <> sumbool_of_bool def +R3637:3641 Coq.ZArith.BinInt Z eqb def +R3643:3647 riscv <> l__32:47 var +R3735:3749 Coq.Bool.Sumbool <> sumbool_of_bool def +R3752:3756 Coq.ZArith.BinInt Z eqb def +R3758:3762 riscv <> l__32:47 var +R3850:3864 Coq.Bool.Sumbool <> sumbool_of_bool def +R3867:3871 Coq.ZArith.BinInt Z eqb def +R3873:3877 riscv <> l__32:47 var +R3965:3979 Coq.Bool.Sumbool <> sumbool_of_bool def +R3982:3986 Coq.ZArith.BinInt Z eqb def +R3988:3992 riscv <> l__32:47 var +R4080:4094 Coq.Bool.Sumbool <> sumbool_of_bool def +R4097:4101 Coq.ZArith.BinInt Z eqb def +R4103:4107 riscv <> l__32:47 var +R4195:4209 Coq.Bool.Sumbool <> sumbool_of_bool def +R4212:4216 Coq.ZArith.BinInt Z eqb def +R4218:4222 riscv <> l__32:47 var +R4310:4324 Coq.Bool.Sumbool <> sumbool_of_bool def +R4327:4331 Coq.ZArith.BinInt Z eqb def +R4333:4337 riscv <> l__32:47 var +R4425:4439 Coq.Bool.Sumbool <> sumbool_of_bool def +R4442:4446 Coq.ZArith.BinInt Z eqb def +R4448:4452 riscv <> l__32:47 var +R4540:4554 Coq.Bool.Sumbool <> sumbool_of_bool def +R4557:4561 Coq.ZArith.BinInt Z eqb def +R4563:4567 riscv <> l__32:47 var +R4655:4669 Coq.Bool.Sumbool <> sumbool_of_bool def +R4672:4676 Coq.ZArith.BinInt Z eqb def +R4678:4682 riscv <> l__32:47 var +R4770:4784 Coq.Bool.Sumbool <> sumbool_of_bool def +R4787:4791 Coq.ZArith.BinInt Z eqb def +R4793:4797 riscv <> l__32:47 var +R4885:4899 Coq.Bool.Sumbool <> sumbool_of_bool def +R4902:4906 Coq.ZArith.BinInt Z eqb def +R4908:4912 riscv <> l__32:47 var +R5000:5014 Coq.Bool.Sumbool <> sumbool_of_bool def +R5017:5021 Coq.ZArith.BinInt Z eqb def +R5023:5027 riscv <> l__32:47 var +R5115:5129 Coq.Bool.Sumbool <> sumbool_of_bool def +R5132:5136 Coq.ZArith.BinInt Z eqb def +R5138:5142 riscv <> l__32:47 var +R5230:5244 Coq.Bool.Sumbool <> sumbool_of_bool def +R5247:5251 Coq.ZArith.BinInt Z eqb def +R5253:5257 riscv <> l__32:47 var +R5345:5359 Coq.Bool.Sumbool <> sumbool_of_bool def +R5362:5366 Coq.ZArith.BinInt Z eqb def +R5368:5372 riscv <> l__32:47 var +R5460:5474 Coq.Bool.Sumbool <> sumbool_of_bool def +R5477:5481 Coq.ZArith.BinInt Z eqb def +R5483:5487 riscv <> l__32:47 var +R5575:5589 Coq.Bool.Sumbool <> sumbool_of_bool def +R5592:5596 Coq.ZArith.BinInt Z eqb def +R5598:5602 riscv <> l__32:47 var +R5690:5704 Coq.Bool.Sumbool <> sumbool_of_bool def +R5707:5711 Coq.ZArith.BinInt Z eqb def +R5713:5717 riscv <> l__32:47 var +R5805:5819 Coq.Bool.Sumbool <> sumbool_of_bool def +R5822:5826 Coq.ZArith.BinInt Z eqb def +R5828:5832 riscv <> l__32:47 var +R5960:5964 Sail.Prompt_monad <> :::x_'>>='_x not +R5917:5927 Sail.Prompt_monad <> assert_exp' def +R5929:5933 Coq.Init.Datatypes <> false constr +R5974:5977 Sail.Prompt_monad <> exit def +R5979:5980 Coq.Init.Datatypes <> tt constr +R5895:5895 riscv_types <> M def +R5898:5902 Sail.Values <> mword def +R5872:5872 riscv_types <> M def +R5875:5879 Sail.Values <> mword def +R5851:5858 Sail.Prompt_monad <> read_reg def +R5860:5866 riscv_types <> x31_ref def +R5780:5780 riscv_types <> M def +R5783:5787 Sail.Values <> mword def +R5757:5757 riscv_types <> M def +R5760:5764 Sail.Values <> mword def +R5736:5743 Sail.Prompt_monad <> read_reg def +R5745:5751 riscv_types <> x30_ref def +R5665:5665 riscv_types <> M def +R5668:5672 Sail.Values <> mword def +R5642:5642 riscv_types <> M def +R5645:5649 Sail.Values <> mword def +R5621:5628 Sail.Prompt_monad <> read_reg def +R5630:5636 riscv_types <> x29_ref def +R5550:5550 riscv_types <> M def +R5553:5557 Sail.Values <> mword def +R5527:5527 riscv_types <> M def +R5530:5534 Sail.Values <> mword def +R5506:5513 Sail.Prompt_monad <> read_reg def +R5515:5521 riscv_types <> x28_ref def +R5435:5435 riscv_types <> M def +R5438:5442 Sail.Values <> mword def +R5412:5412 riscv_types <> M def +R5415:5419 Sail.Values <> mword def +R5391:5398 Sail.Prompt_monad <> read_reg def +R5400:5406 riscv_types <> x27_ref def +R5320:5320 riscv_types <> M def +R5323:5327 Sail.Values <> mword def +R5297:5297 riscv_types <> M def +R5300:5304 Sail.Values <> mword def +R5276:5283 Sail.Prompt_monad <> read_reg def +R5285:5291 riscv_types <> x26_ref def +R5205:5205 riscv_types <> M def +R5208:5212 Sail.Values <> mword def +R5182:5182 riscv_types <> M def +R5185:5189 Sail.Values <> mword def +R5161:5168 Sail.Prompt_monad <> read_reg def +R5170:5176 riscv_types <> x25_ref def +R5090:5090 riscv_types <> M def +R5093:5097 Sail.Values <> mword def +R5067:5067 riscv_types <> M def +R5070:5074 Sail.Values <> mword def +R5046:5053 Sail.Prompt_monad <> read_reg def +R5055:5061 riscv_types <> x24_ref def +R4975:4975 riscv_types <> M def +R4978:4982 Sail.Values <> mword def +R4952:4952 riscv_types <> M def +R4955:4959 Sail.Values <> mword def +R4931:4938 Sail.Prompt_monad <> read_reg def +R4940:4946 riscv_types <> x23_ref def +R4860:4860 riscv_types <> M def +R4863:4867 Sail.Values <> mword def +R4837:4837 riscv_types <> M def +R4840:4844 Sail.Values <> mword def +R4816:4823 Sail.Prompt_monad <> read_reg def +R4825:4831 riscv_types <> x22_ref def +R4745:4745 riscv_types <> M def +R4748:4752 Sail.Values <> mword def +R4722:4722 riscv_types <> M def +R4725:4729 Sail.Values <> mword def +R4701:4708 Sail.Prompt_monad <> read_reg def +R4710:4716 riscv_types <> x21_ref def +R4630:4630 riscv_types <> M def +R4633:4637 Sail.Values <> mword def +R4607:4607 riscv_types <> M def +R4610:4614 Sail.Values <> mword def +R4586:4593 Sail.Prompt_monad <> read_reg def +R4595:4601 riscv_types <> x20_ref def +R4515:4515 riscv_types <> M def +R4518:4522 Sail.Values <> mword def +R4492:4492 riscv_types <> M def +R4495:4499 Sail.Values <> mword def +R4471:4478 Sail.Prompt_monad <> read_reg def +R4480:4486 riscv_types <> x19_ref def +R4400:4400 riscv_types <> M def +R4403:4407 Sail.Values <> mword def +R4377:4377 riscv_types <> M def +R4380:4384 Sail.Values <> mword def +R4356:4363 Sail.Prompt_monad <> read_reg def +R4365:4371 riscv_types <> x18_ref def +R4285:4285 riscv_types <> M def +R4288:4292 Sail.Values <> mword def +R4262:4262 riscv_types <> M def +R4265:4269 Sail.Values <> mword def +R4241:4248 Sail.Prompt_monad <> read_reg def +R4250:4256 riscv_types <> x17_ref def +R4170:4170 riscv_types <> M def +R4173:4177 Sail.Values <> mword def +R4147:4147 riscv_types <> M def +R4150:4154 Sail.Values <> mword def +R4126:4133 Sail.Prompt_monad <> read_reg def +R4135:4141 riscv_types <> x16_ref def +R4055:4055 riscv_types <> M def +R4058:4062 Sail.Values <> mword def +R4032:4032 riscv_types <> M def +R4035:4039 Sail.Values <> mword def +R4011:4018 Sail.Prompt_monad <> read_reg def +R4020:4026 riscv_types <> x15_ref def +R3940:3940 riscv_types <> M def +R3943:3947 Sail.Values <> mword def +R3917:3917 riscv_types <> M def +R3920:3924 Sail.Values <> mword def +R3896:3903 Sail.Prompt_monad <> read_reg def +R3905:3911 riscv_types <> x14_ref def +R3825:3825 riscv_types <> M def +R3828:3832 Sail.Values <> mword def +R3802:3802 riscv_types <> M def +R3805:3809 Sail.Values <> mword def +R3781:3788 Sail.Prompt_monad <> read_reg def +R3790:3796 riscv_types <> x13_ref def +R3710:3710 riscv_types <> M def +R3713:3717 Sail.Values <> mword def +R3687:3687 riscv_types <> M def +R3690:3694 Sail.Values <> mword def +R3666:3673 Sail.Prompt_monad <> read_reg def +R3675:3681 riscv_types <> x12_ref def +R3595:3595 riscv_types <> M def +R3598:3602 Sail.Values <> mword def +R3572:3572 riscv_types <> M def +R3575:3579 Sail.Values <> mword def +R3551:3558 Sail.Prompt_monad <> read_reg def +R3560:3566 riscv_types <> x11_ref def +R3480:3480 riscv_types <> M def +R3483:3487 Sail.Values <> mword def +R3457:3457 riscv_types <> M def +R3460:3464 Sail.Values <> mword def +R3436:3443 Sail.Prompt_monad <> read_reg def +R3445:3451 riscv_types <> x10_ref def +R3365:3365 riscv_types <> M def +R3368:3372 Sail.Values <> mword def +R3348:3348 riscv_types <> M def +R3351:3355 Sail.Values <> mword def +R3328:3335 Sail.Prompt_monad <> read_reg def +R3337:3342 riscv_types <> x9_ref def +R3264:3264 riscv_types <> M def +R3267:3271 Sail.Values <> mword def +R3247:3247 riscv_types <> M def +R3250:3254 Sail.Values <> mword def +R3227:3234 Sail.Prompt_monad <> read_reg def +R3236:3241 riscv_types <> x8_ref def +R3163:3163 riscv_types <> M def +R3166:3170 Sail.Values <> mword def +R3146:3146 riscv_types <> M def +R3149:3153 Sail.Values <> mword def +R3126:3133 Sail.Prompt_monad <> read_reg def +R3135:3140 riscv_types <> x7_ref def +R3062:3062 riscv_types <> M def +R3065:3069 Sail.Values <> mword def +R3045:3045 riscv_types <> M def +R3048:3052 Sail.Values <> mword def +R3025:3032 Sail.Prompt_monad <> read_reg def +R3034:3039 riscv_types <> x6_ref def +R2961:2961 riscv_types <> M def +R2964:2968 Sail.Values <> mword def +R2944:2944 riscv_types <> M def +R2947:2951 Sail.Values <> mword def +R2924:2931 Sail.Prompt_monad <> read_reg def +R2933:2938 riscv_types <> x5_ref def +R2860:2860 riscv_types <> M def +R2863:2867 Sail.Values <> mword def +R2843:2843 riscv_types <> M def +R2846:2850 Sail.Values <> mword def +R2823:2830 Sail.Prompt_monad <> read_reg def +R2832:2837 riscv_types <> x4_ref def +R2759:2759 riscv_types <> M def +R2762:2766 Sail.Values <> mword def +R2742:2742 riscv_types <> M def +R2745:2749 Sail.Values <> mword def +R2722:2729 Sail.Prompt_monad <> read_reg def +R2731:2736 riscv_types <> x3_ref def +R2658:2658 riscv_types <> M def +R2661:2665 Sail.Values <> mword def +R2641:2641 riscv_types <> M def +R2644:2648 Sail.Values <> mword def +R2621:2628 Sail.Prompt_monad <> read_reg def +R2630:2635 riscv_types <> x2_ref def +R2557:2557 riscv_types <> M def +R2560:2564 Sail.Values <> mword def +R2540:2540 riscv_types <> M def +R2543:2547 Sail.Values <> mword def +R2520:2527 Sail.Prompt_monad <> read_reg def +R2529:2534 riscv_types <> x1_ref def +R2452:2458 Sail.Prompt_monad <> returnm def +R2460:2467 riscv <> zero_reg def +R5995:6001 riscv_types <> regtype def +binder 5991:5991 <> v:48 +R6009:6015 Sail.Prompt_monad <> returnm def +R6018:6032 riscv <> regval_from_reg def +R6034:6034 riscv <> v:48 var +def 6050:6051 <> wX +R6058:6058 Coq.Numbers.BinNums <> Z ind +binder 6054:6054 <> r:49 +R6069:6073 Sail.Values <> mword def +binder 6062:6065 <> in_v:50 +R6081:6089 Sail.Values <> ArithFact class +R6092:6092 Coq.Init.Datatypes <> ::bool_scope:x_'&&'_x not +R6100:6105 Coq.Init.Datatypes <> ::bool_scope:x_'&&'_x not +R6113:6113 Coq.Init.Datatypes <> ::bool_scope:x_'&&'_x not +R6094:6098 Coq.ZArith.BinInt <> ::Z_scope:x_'<=?'_x not +R6099:6099 riscv <> r:49 var +R6107:6110 Coq.ZArith.BinInt <> ::Z_scope:x_'<?'_x not +R6106:6106 riscv <> r:49 var +binder 6081:6114 <> H:51 +R6119:6119 riscv_types <> M def +R6122:6125 Coq.Init.Datatypes <> unit ind +R6143:6157 riscv <> regval_into_reg def +R6159:6162 riscv <> in_v:50 var +binder 6138:6138 <> v:52 +R6182:6182 riscv <> r:49 var +binder 6174:6177 <> l__0:53 +R8815:8815 riscv_types <> M def +R8818:8821 Coq.Init.Datatypes <> unit ind +R6194:6208 Coq.Bool.Sumbool <> sumbool_of_bool def +R6211:6215 Coq.ZArith.BinInt Z eqb def +R6217:6220 riscv <> l__0:53 var +R6253:6267 Coq.Bool.Sumbool <> sumbool_of_bool def +R6270:6274 Coq.ZArith.BinInt Z eqb def +R6276:6279 riscv <> l__0:53 var +R6332:6346 Coq.Bool.Sumbool <> sumbool_of_bool def +R6349:6353 Coq.ZArith.BinInt Z eqb def +R6355:6358 riscv <> l__0:53 var +R6411:6425 Coq.Bool.Sumbool <> sumbool_of_bool def +R6428:6432 Coq.ZArith.BinInt Z eqb def +R6434:6437 riscv <> l__0:53 var +R6490:6504 Coq.Bool.Sumbool <> sumbool_of_bool def +R6507:6511 Coq.ZArith.BinInt Z eqb def +R6513:6516 riscv <> l__0:53 var +R6569:6583 Coq.Bool.Sumbool <> sumbool_of_bool def +R6586:6590 Coq.ZArith.BinInt Z eqb def +R6592:6595 riscv <> l__0:53 var +R6648:6662 Coq.Bool.Sumbool <> sumbool_of_bool def +R6665:6669 Coq.ZArith.BinInt Z eqb def +R6671:6674 riscv <> l__0:53 var +R6727:6741 Coq.Bool.Sumbool <> sumbool_of_bool def +R6744:6748 Coq.ZArith.BinInt Z eqb def +R6750:6753 riscv <> l__0:53 var +R6806:6820 Coq.Bool.Sumbool <> sumbool_of_bool def +R6823:6827 Coq.ZArith.BinInt Z eqb def +R6829:6832 riscv <> l__0:53 var +R6885:6899 Coq.Bool.Sumbool <> sumbool_of_bool def +R6902:6906 Coq.ZArith.BinInt Z eqb def +R6908:6911 riscv <> l__0:53 var +R6964:6978 Coq.Bool.Sumbool <> sumbool_of_bool def +R6981:6985 Coq.ZArith.BinInt Z eqb def +R6987:6990 riscv <> l__0:53 var +R7045:7059 Coq.Bool.Sumbool <> sumbool_of_bool def +R7062:7066 Coq.ZArith.BinInt Z eqb def +R7068:7071 riscv <> l__0:53 var +R7126:7140 Coq.Bool.Sumbool <> sumbool_of_bool def +R7143:7147 Coq.ZArith.BinInt Z eqb def +R7149:7152 riscv <> l__0:53 var +R7207:7221 Coq.Bool.Sumbool <> sumbool_of_bool def +R7224:7228 Coq.ZArith.BinInt Z eqb def +R7230:7233 riscv <> l__0:53 var +R7288:7302 Coq.Bool.Sumbool <> sumbool_of_bool def +R7305:7309 Coq.ZArith.BinInt Z eqb def +R7311:7314 riscv <> l__0:53 var +R7369:7383 Coq.Bool.Sumbool <> sumbool_of_bool def +R7386:7390 Coq.ZArith.BinInt Z eqb def +R7392:7395 riscv <> l__0:53 var +R7450:7464 Coq.Bool.Sumbool <> sumbool_of_bool def +R7467:7471 Coq.ZArith.BinInt Z eqb def +R7473:7476 riscv <> l__0:53 var +R7531:7545 Coq.Bool.Sumbool <> sumbool_of_bool def +R7548:7552 Coq.ZArith.BinInt Z eqb def +R7554:7557 riscv <> l__0:53 var +R7612:7626 Coq.Bool.Sumbool <> sumbool_of_bool def +R7629:7633 Coq.ZArith.BinInt Z eqb def +R7635:7638 riscv <> l__0:53 var +R7693:7707 Coq.Bool.Sumbool <> sumbool_of_bool def +R7710:7714 Coq.ZArith.BinInt Z eqb def +R7716:7719 riscv <> l__0:53 var +R7774:7788 Coq.Bool.Sumbool <> sumbool_of_bool def +R7791:7795 Coq.ZArith.BinInt Z eqb def +R7797:7800 riscv <> l__0:53 var +R7855:7869 Coq.Bool.Sumbool <> sumbool_of_bool def +R7872:7876 Coq.ZArith.BinInt Z eqb def +R7878:7881 riscv <> l__0:53 var +R7936:7950 Coq.Bool.Sumbool <> sumbool_of_bool def +R7953:7957 Coq.ZArith.BinInt Z eqb def +R7959:7962 riscv <> l__0:53 var +R8017:8031 Coq.Bool.Sumbool <> sumbool_of_bool def +R8034:8038 Coq.ZArith.BinInt Z eqb def +R8040:8043 riscv <> l__0:53 var +R8098:8112 Coq.Bool.Sumbool <> sumbool_of_bool def +R8115:8119 Coq.ZArith.BinInt Z eqb def +R8121:8124 riscv <> l__0:53 var +R8179:8193 Coq.Bool.Sumbool <> sumbool_of_bool def +R8196:8200 Coq.ZArith.BinInt Z eqb def +R8202:8205 riscv <> l__0:53 var +R8260:8274 Coq.Bool.Sumbool <> sumbool_of_bool def +R8277:8281 Coq.ZArith.BinInt Z eqb def +R8283:8286 riscv <> l__0:53 var +R8341:8355 Coq.Bool.Sumbool <> sumbool_of_bool def +R8358:8362 Coq.ZArith.BinInt Z eqb def +R8364:8367 riscv <> l__0:53 var +R8422:8436 Coq.Bool.Sumbool <> sumbool_of_bool def +R8439:8443 Coq.ZArith.BinInt Z eqb def +R8445:8448 riscv <> l__0:53 var +R8503:8517 Coq.Bool.Sumbool <> sumbool_of_bool def +R8520:8524 Coq.ZArith.BinInt Z eqb def +R8526:8529 riscv <> l__0:53 var +R8584:8598 Coq.Bool.Sumbool <> sumbool_of_bool def +R8601:8605 Coq.ZArith.BinInt Z eqb def +R8607:8610 riscv <> l__0:53 var +R8665:8679 Coq.Bool.Sumbool <> sumbool_of_bool def +R8682:8686 Coq.ZArith.BinInt Z eqb def +R8688:8691 riscv <> l__0:53 var +R8786:8790 Sail.Prompt_monad <> :::x_'>>='_x not +R8743:8753 Sail.Prompt_monad <> assert_exp' def +R8755:8759 Coq.Init.Datatypes <> false constr +R8800:8803 Sail.Prompt_monad <> exit def +R8805:8806 Coq.Init.Datatypes <> tt constr +R8725:8725 riscv_types <> M def +R8728:8731 Coq.Init.Datatypes <> unit ind +R8702:8710 Sail.Prompt_monad <> write_reg def +R8720:8720 riscv <> v:52 var +R8712:8718 riscv_types <> x31_ref def +R8644:8644 riscv_types <> M def +R8647:8650 Coq.Init.Datatypes <> unit ind +R8621:8629 Sail.Prompt_monad <> write_reg def +R8639:8639 riscv <> v:52 var +R8631:8637 riscv_types <> x30_ref def +R8563:8563 riscv_types <> M def +R8566:8569 Coq.Init.Datatypes <> unit ind +R8540:8548 Sail.Prompt_monad <> write_reg def +R8558:8558 riscv <> v:52 var +R8550:8556 riscv_types <> x29_ref def +R8482:8482 riscv_types <> M def +R8485:8488 Coq.Init.Datatypes <> unit ind +R8459:8467 Sail.Prompt_monad <> write_reg def +R8477:8477 riscv <> v:52 var +R8469:8475 riscv_types <> x28_ref def +R8401:8401 riscv_types <> M def +R8404:8407 Coq.Init.Datatypes <> unit ind +R8378:8386 Sail.Prompt_monad <> write_reg def +R8396:8396 riscv <> v:52 var +R8388:8394 riscv_types <> x27_ref def +R8320:8320 riscv_types <> M def +R8323:8326 Coq.Init.Datatypes <> unit ind +R8297:8305 Sail.Prompt_monad <> write_reg def +R8315:8315 riscv <> v:52 var +R8307:8313 riscv_types <> x26_ref def +R8239:8239 riscv_types <> M def +R8242:8245 Coq.Init.Datatypes <> unit ind +R8216:8224 Sail.Prompt_monad <> write_reg def +R8234:8234 riscv <> v:52 var +R8226:8232 riscv_types <> x25_ref def +R8158:8158 riscv_types <> M def +R8161:8164 Coq.Init.Datatypes <> unit ind +R8135:8143 Sail.Prompt_monad <> write_reg def +R8153:8153 riscv <> v:52 var +R8145:8151 riscv_types <> x24_ref def +R8077:8077 riscv_types <> M def +R8080:8083 Coq.Init.Datatypes <> unit ind +R8054:8062 Sail.Prompt_monad <> write_reg def +R8072:8072 riscv <> v:52 var +R8064:8070 riscv_types <> x23_ref def +R7996:7996 riscv_types <> M def +R7999:8002 Coq.Init.Datatypes <> unit ind +R7973:7981 Sail.Prompt_monad <> write_reg def +R7991:7991 riscv <> v:52 var +R7983:7989 riscv_types <> x22_ref def +R7915:7915 riscv_types <> M def +R7918:7921 Coq.Init.Datatypes <> unit ind +R7892:7900 Sail.Prompt_monad <> write_reg def +R7910:7910 riscv <> v:52 var +R7902:7908 riscv_types <> x21_ref def +R7834:7834 riscv_types <> M def +R7837:7840 Coq.Init.Datatypes <> unit ind +R7811:7819 Sail.Prompt_monad <> write_reg def +R7829:7829 riscv <> v:52 var +R7821:7827 riscv_types <> x20_ref def +R7753:7753 riscv_types <> M def +R7756:7759 Coq.Init.Datatypes <> unit ind +R7730:7738 Sail.Prompt_monad <> write_reg def +R7748:7748 riscv <> v:52 var +R7740:7746 riscv_types <> x19_ref def +R7672:7672 riscv_types <> M def +R7675:7678 Coq.Init.Datatypes <> unit ind +R7649:7657 Sail.Prompt_monad <> write_reg def +R7667:7667 riscv <> v:52 var +R7659:7665 riscv_types <> x18_ref def +R7591:7591 riscv_types <> M def +R7594:7597 Coq.Init.Datatypes <> unit ind +R7568:7576 Sail.Prompt_monad <> write_reg def +R7586:7586 riscv <> v:52 var +R7578:7584 riscv_types <> x17_ref def +R7510:7510 riscv_types <> M def +R7513:7516 Coq.Init.Datatypes <> unit ind +R7487:7495 Sail.Prompt_monad <> write_reg def +R7505:7505 riscv <> v:52 var +R7497:7503 riscv_types <> x16_ref def +R7429:7429 riscv_types <> M def +R7432:7435 Coq.Init.Datatypes <> unit ind +R7406:7414 Sail.Prompt_monad <> write_reg def +R7424:7424 riscv <> v:52 var +R7416:7422 riscv_types <> x15_ref def +R7348:7348 riscv_types <> M def +R7351:7354 Coq.Init.Datatypes <> unit ind +R7325:7333 Sail.Prompt_monad <> write_reg def +R7343:7343 riscv <> v:52 var +R7335:7341 riscv_types <> x14_ref def +R7267:7267 riscv_types <> M def +R7270:7273 Coq.Init.Datatypes <> unit ind +R7244:7252 Sail.Prompt_monad <> write_reg def +R7262:7262 riscv <> v:52 var +R7254:7260 riscv_types <> x13_ref def +R7186:7186 riscv_types <> M def +R7189:7192 Coq.Init.Datatypes <> unit ind +R7163:7171 Sail.Prompt_monad <> write_reg def +R7181:7181 riscv <> v:52 var +R7173:7179 riscv_types <> x12_ref def +R7105:7105 riscv_types <> M def +R7108:7111 Coq.Init.Datatypes <> unit ind +R7082:7090 Sail.Prompt_monad <> write_reg def +R7100:7100 riscv <> v:52 var +R7092:7098 riscv_types <> x11_ref def +R7024:7024 riscv_types <> M def +R7027:7030 Coq.Init.Datatypes <> unit ind +R7001:7009 Sail.Prompt_monad <> write_reg def +R7019:7019 riscv <> v:52 var +R7011:7017 riscv_types <> x10_ref def +R6943:6943 riscv_types <> M def +R6946:6949 Coq.Init.Datatypes <> unit ind +R6921:6929 Sail.Prompt_monad <> write_reg def +R6938:6938 riscv <> v:52 var +R6931:6936 riscv_types <> x9_ref def +R6864:6864 riscv_types <> M def +R6867:6870 Coq.Init.Datatypes <> unit ind +R6842:6850 Sail.Prompt_monad <> write_reg def +R6859:6859 riscv <> v:52 var +R6852:6857 riscv_types <> x8_ref def +R6785:6785 riscv_types <> M def +R6788:6791 Coq.Init.Datatypes <> unit ind +R6763:6771 Sail.Prompt_monad <> write_reg def +R6780:6780 riscv <> v:52 var +R6773:6778 riscv_types <> x7_ref def +R6706:6706 riscv_types <> M def +R6709:6712 Coq.Init.Datatypes <> unit ind +R6684:6692 Sail.Prompt_monad <> write_reg def +R6701:6701 riscv <> v:52 var +R6694:6699 riscv_types <> x6_ref def +R6627:6627 riscv_types <> M def +R6630:6633 Coq.Init.Datatypes <> unit ind +R6605:6613 Sail.Prompt_monad <> write_reg def +R6622:6622 riscv <> v:52 var +R6615:6620 riscv_types <> x5_ref def +R6548:6548 riscv_types <> M def +R6551:6554 Coq.Init.Datatypes <> unit ind +R6526:6534 Sail.Prompt_monad <> write_reg def +R6543:6543 riscv <> v:52 var +R6536:6541 riscv_types <> x4_ref def +R6469:6469 riscv_types <> M def +R6472:6475 Coq.Init.Datatypes <> unit ind +R6447:6455 Sail.Prompt_monad <> write_reg def +R6464:6464 riscv <> v:52 var +R6457:6462 riscv_types <> x3_ref def +R6390:6390 riscv_types <> M def +R6393:6396 Coq.Init.Datatypes <> unit ind +R6368:6376 Sail.Prompt_monad <> write_reg def +R6385:6385 riscv <> v:52 var +R6378:6383 riscv_types <> x2_ref def +R6311:6311 riscv_types <> M def +R6314:6317 Coq.Init.Datatypes <> unit ind +R6289:6297 Sail.Prompt_monad <> write_reg def +R6306:6306 riscv <> v:52 var +R6299:6304 riscv_types <> x1_ref def +R6230:6236 Sail.Prompt_monad <> returnm def +R6238:6239 Coq.Init.Datatypes <> tt constr +def 8837:8843 <> rX_bits +R8850:8854 Sail.Values <> mword def +binder 8846:8846 <> i:54 +R8861:8861 riscv_types <> M def +R8864:8868 Sail.Values <> mword def +R8903:8903 riscv_types <> M def +R8906:8910 Sail.Values <> mword def +R8878:8879 riscv <> rX def +R8882:8887 Coq.Init.Specif <> projT1 def +R8890:8893 Sail.Operators_mwords <> uint def +R8895:8895 riscv <> i:54 var +def 8929:8935 <> wX_bits +R8942:8946 Sail.Values <> mword def +binder 8938:8938 <> i:55 +R8959:8963 Sail.Values <> mword def +binder 8952:8955 <> data:56 +R8971:8971 riscv_types <> M def +R8974:8977 Coq.Init.Datatypes <> unit ind +R9017:9017 riscv_types <> M def +R9020:9023 Coq.Init.Datatypes <> unit ind +R8987:8988 riscv <> wX def +R9008:9011 riscv <> data:56 var +R8991:8996 Coq.Init.Specif <> projT1 def +R8999:9002 Sail.Operators_mwords <> uint def +R9004:9004 riscv <> i:55 var +def 9039:9050 <> reg_name_abi +R9057:9061 Sail.Values <> mword def +binder 9053:9053 <> r:57 +R9068:9068 riscv_types <> M def +R9071:9076 Coq.Strings.String <> string ind +R9097:9097 riscv <> r:57 var +binder 9089:9092 <> b__0:58 +R11305:11305 riscv_types <> M def +R11308:11313 Coq.Strings.String <> string ind +R9109:9114 Sail.Operators_mwords <> eq_vec def +R9135:9139 Sail.Values <> mword def +R9122:9123 bbv.HexNotationWord <> :::'''b'_x not +R9116:9119 riscv <> b__0:58 var +R9176:9181 Sail.Operators_mwords <> eq_vec def +R9202:9206 Sail.Values <> mword def +R9189:9190 bbv.HexNotationWord <> :::'''b'_x not +R9183:9186 riscv <> b__0:58 var +R9241:9246 Sail.Operators_mwords <> eq_vec def +R9267:9271 Sail.Values <> mword def +R9254:9255 bbv.HexNotationWord <> :::'''b'_x not +R9248:9251 riscv <> b__0:58 var +R9306:9311 Sail.Operators_mwords <> eq_vec def +R9332:9336 Sail.Values <> mword def +R9319:9320 bbv.HexNotationWord <> :::'''b'_x not +R9313:9316 riscv <> b__0:58 var +R9371:9376 Sail.Operators_mwords <> eq_vec def +R9397:9401 Sail.Values <> mword def +R9384:9385 bbv.HexNotationWord <> :::'''b'_x not +R9378:9381 riscv <> b__0:58 var +R9436:9441 Sail.Operators_mwords <> eq_vec def +R9462:9466 Sail.Values <> mword def +R9449:9450 bbv.HexNotationWord <> :::'''b'_x not +R9443:9446 riscv <> b__0:58 var +R9501:9506 Sail.Operators_mwords <> eq_vec def +R9527:9531 Sail.Values <> mword def +R9514:9515 bbv.HexNotationWord <> :::'''b'_x not +R9508:9511 riscv <> b__0:58 var +R9566:9571 Sail.Operators_mwords <> eq_vec def +R9592:9596 Sail.Values <> mword def +R9579:9580 bbv.HexNotationWord <> :::'''b'_x not +R9573:9576 riscv <> b__0:58 var +R9631:9636 Sail.Operators_mwords <> eq_vec def +R9657:9661 Sail.Values <> mword def +R9644:9645 bbv.HexNotationWord <> :::'''b'_x not +R9638:9641 riscv <> b__0:58 var +R9696:9701 Sail.Operators_mwords <> eq_vec def +R9722:9726 Sail.Values <> mword def +R9709:9710 bbv.HexNotationWord <> :::'''b'_x not +R9703:9706 riscv <> b__0:58 var +R9761:9766 Sail.Operators_mwords <> eq_vec def +R9787:9791 Sail.Values <> mword def +R9774:9775 bbv.HexNotationWord <> :::'''b'_x not +R9768:9771 riscv <> b__0:58 var +R9826:9831 Sail.Operators_mwords <> eq_vec def +R9852:9856 Sail.Values <> mword def +R9839:9840 bbv.HexNotationWord <> :::'''b'_x not +R9833:9836 riscv <> b__0:58 var +R9891:9896 Sail.Operators_mwords <> eq_vec def +R9917:9921 Sail.Values <> mword def +R9904:9905 bbv.HexNotationWord <> :::'''b'_x not +R9898:9901 riscv <> b__0:58 var +R9956:9961 Sail.Operators_mwords <> eq_vec def +R9982:9986 Sail.Values <> mword def +R9969:9970 bbv.HexNotationWord <> :::'''b'_x not +R9963:9966 riscv <> b__0:58 var +R10021:10026 Sail.Operators_mwords <> eq_vec def +R10047:10051 Sail.Values <> mword def +R10034:10035 bbv.HexNotationWord <> :::'''b'_x not +R10028:10031 riscv <> b__0:58 var +R10086:10091 Sail.Operators_mwords <> eq_vec def +R10112:10116 Sail.Values <> mword def +R10099:10100 bbv.HexNotationWord <> :::'''b'_x not +R10093:10096 riscv <> b__0:58 var +R10151:10156 Sail.Operators_mwords <> eq_vec def +R10177:10181 Sail.Values <> mword def +R10164:10165 bbv.HexNotationWord <> :::'''b'_x not +R10158:10161 riscv <> b__0:58 var +R10216:10221 Sail.Operators_mwords <> eq_vec def +R10242:10246 Sail.Values <> mword def +R10229:10230 bbv.HexNotationWord <> :::'''b'_x not +R10223:10226 riscv <> b__0:58 var +R10281:10286 Sail.Operators_mwords <> eq_vec def +R10307:10311 Sail.Values <> mword def +R10294:10295 bbv.HexNotationWord <> :::'''b'_x not +R10288:10291 riscv <> b__0:58 var +R10346:10351 Sail.Operators_mwords <> eq_vec def +R10372:10376 Sail.Values <> mword def +R10359:10360 bbv.HexNotationWord <> :::'''b'_x not +R10353:10356 riscv <> b__0:58 var +R10411:10416 Sail.Operators_mwords <> eq_vec def +R10437:10441 Sail.Values <> mword def +R10424:10425 bbv.HexNotationWord <> :::'''b'_x not +R10418:10421 riscv <> b__0:58 var +R10476:10481 Sail.Operators_mwords <> eq_vec def +R10502:10506 Sail.Values <> mword def +R10489:10490 bbv.HexNotationWord <> :::'''b'_x not +R10483:10486 riscv <> b__0:58 var +R10541:10546 Sail.Operators_mwords <> eq_vec def +R10567:10571 Sail.Values <> mword def +R10554:10555 bbv.HexNotationWord <> :::'''b'_x not +R10548:10551 riscv <> b__0:58 var +R10606:10611 Sail.Operators_mwords <> eq_vec def +R10632:10636 Sail.Values <> mword def +R10619:10620 bbv.HexNotationWord <> :::'''b'_x not +R10613:10616 riscv <> b__0:58 var +R10671:10676 Sail.Operators_mwords <> eq_vec def +R10697:10701 Sail.Values <> mword def +R10684:10685 bbv.HexNotationWord <> :::'''b'_x not +R10678:10681 riscv <> b__0:58 var +R10736:10741 Sail.Operators_mwords <> eq_vec def +R10762:10766 Sail.Values <> mword def +R10749:10750 bbv.HexNotationWord <> :::'''b'_x not +R10743:10746 riscv <> b__0:58 var +R10801:10806 Sail.Operators_mwords <> eq_vec def +R10827:10831 Sail.Values <> mword def +R10814:10815 bbv.HexNotationWord <> :::'''b'_x not +R10808:10811 riscv <> b__0:58 var +R10867:10872 Sail.Operators_mwords <> eq_vec def +R10893:10897 Sail.Values <> mword def +R10880:10881 bbv.HexNotationWord <> :::'''b'_x not +R10874:10877 riscv <> b__0:58 var +R10933:10938 Sail.Operators_mwords <> eq_vec def +R10959:10963 Sail.Values <> mword def +R10946:10947 bbv.HexNotationWord <> :::'''b'_x not +R10940:10943 riscv <> b__0:58 var +R10998:11003 Sail.Operators_mwords <> eq_vec def +R11024:11028 Sail.Values <> mword def +R11011:11012 bbv.HexNotationWord <> :::'''b'_x not +R11005:11008 riscv <> b__0:58 var +R11063:11068 Sail.Operators_mwords <> eq_vec def +R11089:11093 Sail.Values <> mword def +R11076:11077 bbv.HexNotationWord <> :::'''b'_x not +R11070:11073 riscv <> b__0:58 var +R11128:11133 Sail.Operators_mwords <> eq_vec def +R11154:11158 Sail.Values <> mword def +R11141:11142 bbv.HexNotationWord <> :::'''b'_x not +R11135:11138 riscv <> b__0:58 var +R11270:11274 Sail.Prompt_monad <> :::x_'>>='_x not +R11196:11206 Sail.Prompt_monad <> assert_exp' def +R11208:11212 Coq.Init.Datatypes <> false constr +R11290:11293 Sail.Prompt_monad <> exit def +R11295:11296 Coq.Init.Datatypes <> tt constr +R11168:11174 Sail.Prompt_monad <> returnm def +R11103:11109 Sail.Prompt_monad <> returnm def +R11038:11044 Sail.Prompt_monad <> returnm def +R10973:10979 Sail.Prompt_monad <> returnm def +R10907:10913 Sail.Prompt_monad <> returnm def +R10841:10847 Sail.Prompt_monad <> returnm def +R10776:10782 Sail.Prompt_monad <> returnm def +R10711:10717 Sail.Prompt_monad <> returnm def +R10646:10652 Sail.Prompt_monad <> returnm def +R10581:10587 Sail.Prompt_monad <> returnm def +R10516:10522 Sail.Prompt_monad <> returnm def +R10451:10457 Sail.Prompt_monad <> returnm def +R10386:10392 Sail.Prompt_monad <> returnm def +R10321:10327 Sail.Prompt_monad <> returnm def +R10256:10262 Sail.Prompt_monad <> returnm def +R10191:10197 Sail.Prompt_monad <> returnm def +R10126:10132 Sail.Prompt_monad <> returnm def +R10061:10067 Sail.Prompt_monad <> returnm def +R9996:10002 Sail.Prompt_monad <> returnm def +R9931:9937 Sail.Prompt_monad <> returnm def +R9866:9872 Sail.Prompt_monad <> returnm def +R9801:9807 Sail.Prompt_monad <> returnm def +R9736:9742 Sail.Prompt_monad <> returnm def +R9671:9677 Sail.Prompt_monad <> returnm def +R9606:9612 Sail.Prompt_monad <> returnm def +R9541:9547 Sail.Prompt_monad <> returnm def +R9476:9482 Sail.Prompt_monad <> returnm def +R9411:9417 Sail.Prompt_monad <> returnm def +R9346:9352 Sail.Prompt_monad <> returnm def +R9281:9287 Sail.Prompt_monad <> returnm def +R9216:9222 Sail.Prompt_monad <> returnm def +R9149:9155 Sail.Prompt_monad <> returnm def +def 11329:11342 <> init_base_regs +R11346:11347 Coq.Init.Datatypes <> tt constr +R11351:11354 Coq.Init.Datatypes <> unit ind +binder 11346:11354 <> pat:59 +R11359:11359 riscv_types <> M def +R11362:11365 Coq.Init.Datatypes <> unit ind +R12382:12382 riscv_types <> M def +R12385:12388 Coq.Init.Datatypes <> unit ind +R12348:12351 Sail.Prompt_monad <> :::x_'>>'_x not +R12315:12321 Sail.Prompt_monad <> :::x_'>>'_x not +R12282:12288 Sail.Prompt_monad <> :::x_'>>'_x not +R12249:12255 Sail.Prompt_monad <> :::x_'>>'_x not +R12216:12222 Sail.Prompt_monad <> :::x_'>>'_x not +R12183:12189 Sail.Prompt_monad <> :::x_'>>'_x not +R12150:12156 Sail.Prompt_monad <> :::x_'>>'_x not +R12117:12123 Sail.Prompt_monad <> :::x_'>>'_x not +R12084:12090 Sail.Prompt_monad <> :::x_'>>'_x not +R12051:12057 Sail.Prompt_monad <> :::x_'>>'_x not +R12018:12024 Sail.Prompt_monad <> :::x_'>>'_x not +R11985:11991 Sail.Prompt_monad <> :::x_'>>'_x not +R11952:11958 Sail.Prompt_monad <> :::x_'>>'_x not +R11919:11925 Sail.Prompt_monad <> :::x_'>>'_x not +R11886:11892 Sail.Prompt_monad <> :::x_'>>'_x not +R11853:11859 Sail.Prompt_monad <> :::x_'>>'_x not +R11820:11826 Sail.Prompt_monad <> :::x_'>>'_x not +R11787:11793 Sail.Prompt_monad <> :::x_'>>'_x not +R11754:11760 Sail.Prompt_monad <> :::x_'>>'_x not +R11721:11727 Sail.Prompt_monad <> :::x_'>>'_x not +R11688:11694 Sail.Prompt_monad <> :::x_'>>'_x not +R11655:11661 Sail.Prompt_monad <> :::x_'>>'_x not +R11623:11629 Sail.Prompt_monad <> :::x_'>>'_x not +R11591:11597 Sail.Prompt_monad <> :::x_'>>'_x not +R11559:11565 Sail.Prompt_monad <> :::x_'>>'_x not +R11527:11533 Sail.Prompt_monad <> :::x_'>>'_x not +R11495:11501 Sail.Prompt_monad <> :::x_'>>'_x not +R11463:11469 Sail.Prompt_monad <> :::x_'>>'_x not +R11431:11437 Sail.Prompt_monad <> :::x_'>>'_x not +R11399:11405 Sail.Prompt_monad <> :::x_'>>'_x not +R11374:11382 Sail.Prompt_monad <> write_reg def +R11391:11398 riscv <> zero_reg def +R11384:11389 riscv_types <> x1_ref def +R11406:11414 Sail.Prompt_monad <> write_reg def +R11423:11430 riscv <> zero_reg def +R11416:11421 riscv_types <> x2_ref def +R11438:11446 Sail.Prompt_monad <> write_reg def +R11455:11462 riscv <> zero_reg def +R11448:11453 riscv_types <> x3_ref def +R11470:11478 Sail.Prompt_monad <> write_reg def +R11487:11494 riscv <> zero_reg def +R11480:11485 riscv_types <> x4_ref def +R11502:11510 Sail.Prompt_monad <> write_reg def +R11519:11526 riscv <> zero_reg def +R11512:11517 riscv_types <> x5_ref def +R11534:11542 Sail.Prompt_monad <> write_reg def +R11551:11558 riscv <> zero_reg def +R11544:11549 riscv_types <> x6_ref def +R11566:11574 Sail.Prompt_monad <> write_reg def +R11583:11590 riscv <> zero_reg def +R11576:11581 riscv_types <> x7_ref def +R11598:11606 Sail.Prompt_monad <> write_reg def +R11615:11622 riscv <> zero_reg def +R11608:11613 riscv_types <> x8_ref def +R11630:11638 Sail.Prompt_monad <> write_reg def +R11647:11654 riscv <> zero_reg def +R11640:11645 riscv_types <> x9_ref def +R11662:11670 Sail.Prompt_monad <> write_reg def +R11680:11687 riscv <> zero_reg def +R11672:11678 riscv_types <> x10_ref def +R11695:11703 Sail.Prompt_monad <> write_reg def +R11713:11720 riscv <> zero_reg def +R11705:11711 riscv_types <> x11_ref def +R11728:11736 Sail.Prompt_monad <> write_reg def +R11746:11753 riscv <> zero_reg def +R11738:11744 riscv_types <> x12_ref def +R11761:11769 Sail.Prompt_monad <> write_reg def +R11779:11786 riscv <> zero_reg def +R11771:11777 riscv_types <> x13_ref def +R11794:11802 Sail.Prompt_monad <> write_reg def +R11812:11819 riscv <> zero_reg def +R11804:11810 riscv_types <> x14_ref def +R11827:11835 Sail.Prompt_monad <> write_reg def +R11845:11852 riscv <> zero_reg def +R11837:11843 riscv_types <> x15_ref def +R11860:11868 Sail.Prompt_monad <> write_reg def +R11878:11885 riscv <> zero_reg def +R11870:11876 riscv_types <> x16_ref def +R11893:11901 Sail.Prompt_monad <> write_reg def +R11911:11918 riscv <> zero_reg def +R11903:11909 riscv_types <> x17_ref def +R11926:11934 Sail.Prompt_monad <> write_reg def +R11944:11951 riscv <> zero_reg def +R11936:11942 riscv_types <> x18_ref def +R11959:11967 Sail.Prompt_monad <> write_reg def +R11977:11984 riscv <> zero_reg def +R11969:11975 riscv_types <> x19_ref def +R11992:12000 Sail.Prompt_monad <> write_reg def +R12010:12017 riscv <> zero_reg def +R12002:12008 riscv_types <> x20_ref def +R12025:12033 Sail.Prompt_monad <> write_reg def +R12043:12050 riscv <> zero_reg def +R12035:12041 riscv_types <> x21_ref def +R12058:12066 Sail.Prompt_monad <> write_reg def +R12076:12083 riscv <> zero_reg def +R12068:12074 riscv_types <> x22_ref def +R12091:12099 Sail.Prompt_monad <> write_reg def +R12109:12116 riscv <> zero_reg def +R12101:12107 riscv_types <> x23_ref def +R12124:12132 Sail.Prompt_monad <> write_reg def +R12142:12149 riscv <> zero_reg def +R12134:12140 riscv_types <> x24_ref def +R12157:12165 Sail.Prompt_monad <> write_reg def +R12175:12182 riscv <> zero_reg def +R12167:12173 riscv_types <> x25_ref def +R12190:12198 Sail.Prompt_monad <> write_reg def +R12208:12215 riscv <> zero_reg def +R12200:12206 riscv_types <> x26_ref def +R12223:12231 Sail.Prompt_monad <> write_reg def +R12241:12248 riscv <> zero_reg def +R12233:12239 riscv_types <> x27_ref def +R12256:12264 Sail.Prompt_monad <> write_reg def +R12274:12281 riscv <> zero_reg def +R12266:12272 riscv_types <> x28_ref def +R12289:12297 Sail.Prompt_monad <> write_reg def +R12307:12314 riscv <> zero_reg def +R12299:12305 riscv_types <> x29_ref def +R12322:12330 Sail.Prompt_monad <> write_reg def +R12340:12347 riscv <> zero_reg def +R12332:12338 riscv_types <> x30_ref def +R12352:12360 Sail.Prompt_monad <> write_reg def +R12370:12377 riscv <> zero_reg def +R12362:12368 riscv_types <> x31_ref def +def 12404:12419 <> initial_regstate +R12423:12430 riscv_types <> regstate rec +R12438:12440 riscv_types <> x31 proj +R12438:12440 riscv_types <> x31 proj +R12485:12487 riscv_types <> x30 proj +R12532:12534 riscv_types <> x29 proj +R12579:12581 riscv_types <> x28 proj +R12626:12628 riscv_types <> x27 proj +R12673:12675 riscv_types <> x26 proj +R12720:12722 riscv_types <> x25 proj +R12767:12769 riscv_types <> x24 proj +R12814:12816 riscv_types <> x23 proj +R12861:12863 riscv_types <> x22 proj +R12908:12910 riscv_types <> x21 proj +R12955:12957 riscv_types <> x20 proj +R13002:13004 riscv_types <> x19 proj +R13049:13051 riscv_types <> x18 proj +R13096:13098 riscv_types <> x17 proj +R13143:13145 riscv_types <> x16 proj +R13190:13192 riscv_types <> x15 proj +R13237:13239 riscv_types <> x14 proj +R13284:13286 riscv_types <> x13 proj +R13331:13333 riscv_types <> x12 proj +R13378:13380 riscv_types <> x11 proj +R13425:13427 riscv_types <> x10 proj +R13472:13473 riscv_types <> x9 proj +R13518:13519 riscv_types <> x8 proj +R13564:13565 riscv_types <> x7 proj +R13610:13611 riscv_types <> x6 proj +R13656:13657 riscv_types <> x5 proj +R13702:13703 riscv_types <> x4 proj +R13748:13749 riscv_types <> x3 proj +R13794:13795 riscv_types <> x2 proj +R13840:13841 riscv_types <> x1 proj +R13886:13893 riscv_types <> instbits proj +R13938:13943 riscv_types <> nextPC proj +R13988:13989 riscv_types <> PC proj +R12470:12474 Sail.Values <> mword def +R12446:12447 bbv.HexNotationWord <> :::'Ox'_x not +R12517:12521 Sail.Values <> mword def +R12493:12494 bbv.HexNotationWord <> :::'Ox'_x not +R12564:12568 Sail.Values <> mword def +R12540:12541 bbv.HexNotationWord <> :::'Ox'_x not +R12611:12615 Sail.Values <> mword def +R12587:12588 bbv.HexNotationWord <> :::'Ox'_x not +R12658:12662 Sail.Values <> mword def +R12634:12635 bbv.HexNotationWord <> :::'Ox'_x not +R12705:12709 Sail.Values <> mword def +R12681:12682 bbv.HexNotationWord <> :::'Ox'_x not +R12752:12756 Sail.Values <> mword def +R12728:12729 bbv.HexNotationWord <> :::'Ox'_x not +R12799:12803 Sail.Values <> mword def +R12775:12776 bbv.HexNotationWord <> :::'Ox'_x not +R12846:12850 Sail.Values <> mword def +R12822:12823 bbv.HexNotationWord <> :::'Ox'_x not +R12893:12897 Sail.Values <> mword def +R12869:12870 bbv.HexNotationWord <> :::'Ox'_x not +R12940:12944 Sail.Values <> mword def +R12916:12917 bbv.HexNotationWord <> :::'Ox'_x not +R12987:12991 Sail.Values <> mword def +R12963:12964 bbv.HexNotationWord <> :::'Ox'_x not +R13034:13038 Sail.Values <> mword def +R13010:13011 bbv.HexNotationWord <> :::'Ox'_x not +R13081:13085 Sail.Values <> mword def +R13057:13058 bbv.HexNotationWord <> :::'Ox'_x not +R13128:13132 Sail.Values <> mword def +R13104:13105 bbv.HexNotationWord <> :::'Ox'_x not +R13175:13179 Sail.Values <> mword def +R13151:13152 bbv.HexNotationWord <> :::'Ox'_x not +R13222:13226 Sail.Values <> mword def +R13198:13199 bbv.HexNotationWord <> :::'Ox'_x not +R13269:13273 Sail.Values <> mword def +R13245:13246 bbv.HexNotationWord <> :::'Ox'_x not +R13316:13320 Sail.Values <> mword def +R13292:13293 bbv.HexNotationWord <> :::'Ox'_x not +R13363:13367 Sail.Values <> mword def +R13339:13340 bbv.HexNotationWord <> :::'Ox'_x not +R13410:13414 Sail.Values <> mword def +R13386:13387 bbv.HexNotationWord <> :::'Ox'_x not +R13457:13461 Sail.Values <> mword def +R13433:13434 bbv.HexNotationWord <> :::'Ox'_x not +R13503:13507 Sail.Values <> mword def +R13479:13480 bbv.HexNotationWord <> :::'Ox'_x not +R13549:13553 Sail.Values <> mword def +R13525:13526 bbv.HexNotationWord <> :::'Ox'_x not +R13595:13599 Sail.Values <> mword def +R13571:13572 bbv.HexNotationWord <> :::'Ox'_x not +R13641:13645 Sail.Values <> mword def +R13617:13618 bbv.HexNotationWord <> :::'Ox'_x not +R13687:13691 Sail.Values <> mword def +R13663:13664 bbv.HexNotationWord <> :::'Ox'_x not +R13733:13737 Sail.Values <> mword def +R13709:13710 bbv.HexNotationWord <> :::'Ox'_x not +R13779:13783 Sail.Values <> mword def +R13755:13756 bbv.HexNotationWord <> :::'Ox'_x not +R13825:13829 Sail.Values <> mword def +R13801:13802 bbv.HexNotationWord <> :::'Ox'_x not +R13871:13875 Sail.Values <> mword def +R13847:13848 bbv.HexNotationWord <> :::'Ox'_x not +R13923:13927 Sail.Values <> mword def +R13899:13900 bbv.HexNotationWord <> :::'Ox'_x not +R13973:13977 Sail.Values <> mword def +R13949:13950 bbv.HexNotationWord <> :::'Ox'_x not +R14019:14023 Sail.Values <> mword def +R13995:13996 bbv.HexNotationWord <> :::'Ox'_x not +R14045:14060 riscv <> initial_regstate def diff --git a/build/riscv.v b/build/riscv.v new file mode 100644 index 0000000..09457da --- /dev/null +++ b/build/riscv.v @@ -0,0 +1,294 @@ +(*Generated by Sail from riscv.*) +Require Import Sail.Base. +Require Import Sail.Real. +Require Import riscv_types. +Import ListNotations. +Open Scope string. +Open Scope bool. +Open Scope Z. + + +Definition is_none {a : Type} (opt : option a) : bool := + match opt with | Some _ => false | None => true end. + +Definition is_some {a : Type} (opt : option a) : bool := + match opt with | Some _ => true | None => false end. + +Definition eq_unit (_ : unit) (_ : unit) : {_bool : bool & ArithFact (_bool)} := build_ex (true). + +Definition neq_int (x : Z) (y : Z) : {_bool : bool & ArithFact (Bool.eqb (negb (x =? y)) _bool)} := + build_ex (negb (Z.eqb x y)). + +Definition neq_bool (x : bool) (y : bool) : bool := negb (Bool.eqb x y). + +Definition __id (x : Z) : {_retval : Z & ArithFact (_retval =? x)} := build_ex (x). + +Definition fdiv_int (n : Z) (m : Z) : Z := + if sumbool_of_bool (andb (Z.ltb n 0) (Z.gtb m 0)) then Z.sub (Z.quot (Z.add n 1) m) 1 + else if sumbool_of_bool (andb (Z.gtb n 0) (Z.ltb m 0)) then Z.sub (Z.quot (Z.sub n 1) m) 1 + else Z.quot n m. + +Definition fmod_int (n : Z) (m : Z) : Z := Z.sub n (Z.mul m (fdiv_int n m)). + +Definition concat_str_bits {n : Z} (str : string) (x : mword n) : string := + String.append str (string_of_bits x). + +Definition concat_str_dec (str : string) (x : Z) : string := String.append str (dec_str x). + + + +Definition sail_mask {v0 : Z} (len : Z) (v : mword v0) `{ArithFact ((len >=? 0) && (v0 >=? 0))} +: mword len := + if sumbool_of_bool (Z.leb len (length_mword v)) then vector_truncate v len else zero_extend v len. + +Definition sail_ones (n : Z) `{ArithFact (n >=? 0)} : mword n := not_vec (zeros n). + +Definition slice_mask (n : Z) (i : Z) (l : Z) `{ArithFact (n >=? 0)} : mword n := + if sumbool_of_bool (Z.geb l n) then shiftl (sail_ones n) i + else + let one : bits n := sail_mask n ('b"1" : bits 1) in + shiftl (sub_vec (shiftl one l) one) i. + +Definition EXTS {n : Z} (m : Z) (v : mword n) `{ArithFact (m >=? n)} : mword m := sign_extend v m. + +Definition EXTZ {n : Z} (m : Z) (v : mword n) `{ArithFact (m >=? n)} : mword m := zero_extend v m. + +Definition zero_reg : regtype := EXTZ 64 (Ox"0" : mword 4). +Hint Unfold zero_reg : sail. +Definition regval_from_reg (r : mword 64) : mword 64 := r. + +Definition regval_into_reg (v : mword 64) : mword 64 := v. + +Definition rX (r : Z) `{ArithFact ((0 <=? r) && (r <? 32))} : M (mword 64) := + let l__32 := r in + (if sumbool_of_bool (Z.eqb l__32 0) then returnm zero_reg + else if sumbool_of_bool (Z.eqb l__32 1) then ((read_reg x1_ref) : M (mword 64)) : M (mword 64) + else if sumbool_of_bool (Z.eqb l__32 2) then ((read_reg x2_ref) : M (mword 64)) : M (mword 64) + else if sumbool_of_bool (Z.eqb l__32 3) then ((read_reg x3_ref) : M (mword 64)) : M (mword 64) + else if sumbool_of_bool (Z.eqb l__32 4) then ((read_reg x4_ref) : M (mword 64)) : M (mword 64) + else if sumbool_of_bool (Z.eqb l__32 5) then ((read_reg x5_ref) : M (mword 64)) : M (mword 64) + else if sumbool_of_bool (Z.eqb l__32 6) then ((read_reg x6_ref) : M (mword 64)) : M (mword 64) + else if sumbool_of_bool (Z.eqb l__32 7) then ((read_reg x7_ref) : M (mword 64)) : M (mword 64) + else if sumbool_of_bool (Z.eqb l__32 8) then ((read_reg x8_ref) : M (mword 64)) : M (mword 64) + else if sumbool_of_bool (Z.eqb l__32 9) then ((read_reg x9_ref) : M (mword 64)) : M (mword 64) + else if sumbool_of_bool (Z.eqb l__32 10) then + ((read_reg x10_ref) : M (mword 64)) + : M (mword 64) + else if sumbool_of_bool (Z.eqb l__32 11) then + ((read_reg x11_ref) : M (mword 64)) + : M (mword 64) + else if sumbool_of_bool (Z.eqb l__32 12) then + ((read_reg x12_ref) : M (mword 64)) + : M (mword 64) + else if sumbool_of_bool (Z.eqb l__32 13) then + ((read_reg x13_ref) : M (mword 64)) + : M (mword 64) + else if sumbool_of_bool (Z.eqb l__32 14) then + ((read_reg x14_ref) : M (mword 64)) + : M (mword 64) + else if sumbool_of_bool (Z.eqb l__32 15) then + ((read_reg x15_ref) : M (mword 64)) + : M (mword 64) + else if sumbool_of_bool (Z.eqb l__32 16) then + ((read_reg x16_ref) : M (mword 64)) + : M (mword 64) + else if sumbool_of_bool (Z.eqb l__32 17) then + ((read_reg x17_ref) : M (mword 64)) + : M (mword 64) + else if sumbool_of_bool (Z.eqb l__32 18) then + ((read_reg x18_ref) : M (mword 64)) + : M (mword 64) + else if sumbool_of_bool (Z.eqb l__32 19) then + ((read_reg x19_ref) : M (mword 64)) + : M (mword 64) + else if sumbool_of_bool (Z.eqb l__32 20) then + ((read_reg x20_ref) : M (mword 64)) + : M (mword 64) + else if sumbool_of_bool (Z.eqb l__32 21) then + ((read_reg x21_ref) : M (mword 64)) + : M (mword 64) + else if sumbool_of_bool (Z.eqb l__32 22) then + ((read_reg x22_ref) : M (mword 64)) + : M (mword 64) + else if sumbool_of_bool (Z.eqb l__32 23) then + ((read_reg x23_ref) : M (mword 64)) + : M (mword 64) + else if sumbool_of_bool (Z.eqb l__32 24) then + ((read_reg x24_ref) : M (mword 64)) + : M (mword 64) + else if sumbool_of_bool (Z.eqb l__32 25) then + ((read_reg x25_ref) : M (mword 64)) + : M (mword 64) + else if sumbool_of_bool (Z.eqb l__32 26) then + ((read_reg x26_ref) : M (mword 64)) + : M (mword 64) + else if sumbool_of_bool (Z.eqb l__32 27) then + ((read_reg x27_ref) : M (mword 64)) + : M (mword 64) + else if sumbool_of_bool (Z.eqb l__32 28) then + ((read_reg x28_ref) : M (mword 64)) + : M (mword 64) + else if sumbool_of_bool (Z.eqb l__32 29) then + ((read_reg x29_ref) : M (mword 64)) + : M (mword 64) + else if sumbool_of_bool (Z.eqb l__32 30) then + ((read_reg x30_ref) : M (mword 64)) + : M (mword 64) + else if sumbool_of_bool (Z.eqb l__32 31) then + ((read_reg x31_ref) : M (mword 64)) + : M (mword 64) + else assert_exp' false "invalid register number" >>= fun _ => exit tt) >>= fun v : regtype => + returnm (regval_from_reg v). + +Definition wX (r : Z) (in_v : mword 64) `{ArithFact ((0 <=? r) && (r <? 32))} : M (unit) := + let v := regval_into_reg in_v in + let l__0 := r in + (if sumbool_of_bool (Z.eqb l__0 0) then returnm tt + else if sumbool_of_bool (Z.eqb l__0 1) then write_reg x1_ref v : M (unit) + else if sumbool_of_bool (Z.eqb l__0 2) then write_reg x2_ref v : M (unit) + else if sumbool_of_bool (Z.eqb l__0 3) then write_reg x3_ref v : M (unit) + else if sumbool_of_bool (Z.eqb l__0 4) then write_reg x4_ref v : M (unit) + else if sumbool_of_bool (Z.eqb l__0 5) then write_reg x5_ref v : M (unit) + else if sumbool_of_bool (Z.eqb l__0 6) then write_reg x6_ref v : M (unit) + else if sumbool_of_bool (Z.eqb l__0 7) then write_reg x7_ref v : M (unit) + else if sumbool_of_bool (Z.eqb l__0 8) then write_reg x8_ref v : M (unit) + else if sumbool_of_bool (Z.eqb l__0 9) then write_reg x9_ref v : M (unit) + else if sumbool_of_bool (Z.eqb l__0 10) then write_reg x10_ref v : M (unit) + else if sumbool_of_bool (Z.eqb l__0 11) then write_reg x11_ref v : M (unit) + else if sumbool_of_bool (Z.eqb l__0 12) then write_reg x12_ref v : M (unit) + else if sumbool_of_bool (Z.eqb l__0 13) then write_reg x13_ref v : M (unit) + else if sumbool_of_bool (Z.eqb l__0 14) then write_reg x14_ref v : M (unit) + else if sumbool_of_bool (Z.eqb l__0 15) then write_reg x15_ref v : M (unit) + else if sumbool_of_bool (Z.eqb l__0 16) then write_reg x16_ref v : M (unit) + else if sumbool_of_bool (Z.eqb l__0 17) then write_reg x17_ref v : M (unit) + else if sumbool_of_bool (Z.eqb l__0 18) then write_reg x18_ref v : M (unit) + else if sumbool_of_bool (Z.eqb l__0 19) then write_reg x19_ref v : M (unit) + else if sumbool_of_bool (Z.eqb l__0 20) then write_reg x20_ref v : M (unit) + else if sumbool_of_bool (Z.eqb l__0 21) then write_reg x21_ref v : M (unit) + else if sumbool_of_bool (Z.eqb l__0 22) then write_reg x22_ref v : M (unit) + else if sumbool_of_bool (Z.eqb l__0 23) then write_reg x23_ref v : M (unit) + else if sumbool_of_bool (Z.eqb l__0 24) then write_reg x24_ref v : M (unit) + else if sumbool_of_bool (Z.eqb l__0 25) then write_reg x25_ref v : M (unit) + else if sumbool_of_bool (Z.eqb l__0 26) then write_reg x26_ref v : M (unit) + else if sumbool_of_bool (Z.eqb l__0 27) then write_reg x27_ref v : M (unit) + else if sumbool_of_bool (Z.eqb l__0 28) then write_reg x28_ref v : M (unit) + else if sumbool_of_bool (Z.eqb l__0 29) then write_reg x29_ref v : M (unit) + else if sumbool_of_bool (Z.eqb l__0 30) then write_reg x30_ref v : M (unit) + else if sumbool_of_bool (Z.eqb l__0 31) then write_reg x31_ref v : M (unit) + else assert_exp' false "invalid register number" >>= fun _ => exit tt) + : M (unit). + +Definition rX_bits (i : mword 5) : M (mword 64) := (rX (projT1 (uint i))) : M (mword 64). + +Definition wX_bits (i : mword 5) (data : mword 64) : M (unit) := + (wX (projT1 (uint i)) data) : M (unit). + +Definition reg_name_abi (r : mword 5) : M (string) := + let b__0 := r in + (if eq_vec b__0 ('b"00000" : mword 5) then returnm "zero" + else if eq_vec b__0 ('b"00001" : mword 5) then returnm "ra" + else if eq_vec b__0 ('b"00010" : mword 5) then returnm "sp" + else if eq_vec b__0 ('b"00011" : mword 5) then returnm "gp" + else if eq_vec b__0 ('b"00100" : mword 5) then returnm "tp" + else if eq_vec b__0 ('b"00101" : mword 5) then returnm "t0" + else if eq_vec b__0 ('b"00110" : mword 5) then returnm "t1" + else if eq_vec b__0 ('b"00111" : mword 5) then returnm "t2" + else if eq_vec b__0 ('b"01000" : mword 5) then returnm "fp" + else if eq_vec b__0 ('b"01001" : mword 5) then returnm "s1" + else if eq_vec b__0 ('b"01010" : mword 5) then returnm "a0" + else if eq_vec b__0 ('b"01011" : mword 5) then returnm "a1" + else if eq_vec b__0 ('b"01100" : mword 5) then returnm "a2" + else if eq_vec b__0 ('b"01101" : mword 5) then returnm "a3" + else if eq_vec b__0 ('b"01110" : mword 5) then returnm "a4" + else if eq_vec b__0 ('b"01111" : mword 5) then returnm "a5" + else if eq_vec b__0 ('b"10000" : mword 5) then returnm "a6" + else if eq_vec b__0 ('b"10001" : mword 5) then returnm "a7" + else if eq_vec b__0 ('b"10010" : mword 5) then returnm "s2" + else if eq_vec b__0 ('b"10011" : mword 5) then returnm "s3" + else if eq_vec b__0 ('b"10100" : mword 5) then returnm "s4" + else if eq_vec b__0 ('b"10101" : mword 5) then returnm "s5" + else if eq_vec b__0 ('b"10110" : mword 5) then returnm "s6" + else if eq_vec b__0 ('b"10111" : mword 5) then returnm "s7" + else if eq_vec b__0 ('b"11000" : mword 5) then returnm "s8" + else if eq_vec b__0 ('b"11001" : mword 5) then returnm "s9" + else if eq_vec b__0 ('b"11010" : mword 5) then returnm "s10" + else if eq_vec b__0 ('b"11011" : mword 5) then returnm "s11" + else if eq_vec b__0 ('b"11100" : mword 5) then returnm "t3" + else if eq_vec b__0 ('b"11101" : mword 5) then returnm "t4" + else if eq_vec b__0 ('b"11110" : mword 5) then returnm "t5" + else if eq_vec b__0 ('b"11111" : mword 5) then returnm "t6" + else + assert_exp' false "Pattern match failure at riscv_regs.sail 160:2 - 193:3" >>= fun _ => + exit tt) + : M (string). + +Definition init_base_regs '(tt : unit) : M (unit) := + write_reg x1_ref zero_reg >> + write_reg x2_ref zero_reg >> + write_reg x3_ref zero_reg >> + write_reg x4_ref zero_reg >> + write_reg x5_ref zero_reg >> + write_reg x6_ref zero_reg >> + write_reg x7_ref zero_reg >> + write_reg x8_ref zero_reg >> + write_reg x9_ref zero_reg >> + write_reg x10_ref zero_reg >> + write_reg x11_ref zero_reg >> + write_reg x12_ref zero_reg >> + write_reg x13_ref zero_reg >> + write_reg x14_ref zero_reg >> + write_reg x15_ref zero_reg >> + write_reg x16_ref zero_reg >> + write_reg x17_ref zero_reg >> + write_reg x18_ref zero_reg >> + write_reg x19_ref zero_reg >> + write_reg x20_ref zero_reg >> + write_reg x21_ref zero_reg >> + write_reg x22_ref zero_reg >> + write_reg x23_ref zero_reg >> + write_reg x24_ref zero_reg >> + write_reg x25_ref zero_reg >> + write_reg x26_ref zero_reg >> + write_reg x27_ref zero_reg >> + write_reg x28_ref zero_reg >> + write_reg x29_ref zero_reg >> + write_reg x30_ref zero_reg >> write_reg x31_ref zero_reg : M (unit). + +Definition initial_regstate : regstate := +{| x31 := (Ox"0000000000000000" : mword 64); + x30 := (Ox"0000000000000000" : mword 64); + x29 := (Ox"0000000000000000" : mword 64); + x28 := (Ox"0000000000000000" : mword 64); + x27 := (Ox"0000000000000000" : mword 64); + x26 := (Ox"0000000000000000" : mword 64); + x25 := (Ox"0000000000000000" : mword 64); + x24 := (Ox"0000000000000000" : mword 64); + x23 := (Ox"0000000000000000" : mword 64); + x22 := (Ox"0000000000000000" : mword 64); + x21 := (Ox"0000000000000000" : mword 64); + x20 := (Ox"0000000000000000" : mword 64); + x19 := (Ox"0000000000000000" : mword 64); + x18 := (Ox"0000000000000000" : mword 64); + x17 := (Ox"0000000000000000" : mword 64); + x16 := (Ox"0000000000000000" : mword 64); + x15 := (Ox"0000000000000000" : mword 64); + x14 := (Ox"0000000000000000" : mword 64); + x13 := (Ox"0000000000000000" : mword 64); + x12 := (Ox"0000000000000000" : mword 64); + x11 := (Ox"0000000000000000" : mword 64); + x10 := (Ox"0000000000000000" : mword 64); + x9 := (Ox"0000000000000000" : mword 64); + x8 := (Ox"0000000000000000" : mword 64); + x7 := (Ox"0000000000000000" : mword 64); + x6 := (Ox"0000000000000000" : mword 64); + x5 := (Ox"0000000000000000" : mword 64); + x4 := (Ox"0000000000000000" : mword 64); + x3 := (Ox"0000000000000000" : mword 64); + x2 := (Ox"0000000000000000" : mword 64); + x1 := (Ox"0000000000000000" : mword 64); + instbits := (Ox"0000000000000000" : mword 64); + nextPC := (Ox"0000000000000000" : mword 64); + PC := (Ox"0000000000000000" : mword 64) |}. +Hint Unfold initial_regstate : sail. + + diff --git a/build/riscv.vo b/build/riscv.vo Binary files differnew file mode 100644 index 0000000..2bbe4d2 --- /dev/null +++ b/build/riscv.vo diff --git a/build/riscv.vok b/build/riscv.vok new file mode 100644 index 0000000..e69de29 --- /dev/null +++ b/build/riscv.vok diff --git a/build/riscv.vos b/build/riscv.vos new file mode 100644 index 0000000..e69de29 --- /dev/null +++ b/build/riscv.vos diff --git a/build/riscv_types.glob b/build/riscv_types.glob new file mode 100644 index 0000000..75c986b --- /dev/null +++ b/build/riscv_types.glob @@ -0,0 +1,1839 @@ +DIGEST 23addcfb4a3be3458f693a2ed5b20df5 +Friscv_types +R49:57 Sail.Base <> <> lib +R75:83 Sail.Real <> <> lib +def 170:173 <> bits +R180:180 Coq.Numbers.BinNums <> Z ind +binder 176:176 <> n:1 +R193:197 Sail.Values <> mword def +R199:199 riscv_types <> n:1 var +def 214:217 <> xlen +R222:222 Coq.Numbers.BinNums <> Z ind +R243:246 riscv_types <> xlen def +def 268:277 <> xlen_bytes +R282:282 Coq.Numbers.BinNums <> Z ind +R302:311 riscv_types <> xlen_bytes def +def 333:340 <> xlenbits +R353:356 riscv_types <> bits def +def 374:380 <> regtype +R393:400 riscv_types <> xlenbits def +def 415:419 <> regno +R426:426 Coq.Numbers.BinNums <> Z ind +binder 422:422 <> n:2 +R430:438 Sail.Values <> ArithFact class +R441:441 Coq.Init.Datatypes <> ::bool_scope:x_'&&'_x not +R449:454 Coq.Init.Datatypes <> ::bool_scope:x_'&&'_x not +R462:462 Coq.Init.Datatypes <> ::bool_scope:x_'&&'_x not +R443:447 Coq.ZArith.BinInt <> ::Z_scope:x_'<=?'_x not +R448:448 riscv_types <> n:2 var +R456:459 Coq.ZArith.BinInt <> ::Z_scope:x_'<?'_x not +R455:455 riscv_types <> n:2 var +binder 430:463 <> H:3 +R476:476 Coq.Numbers.BinNums <> Z ind +def 491:496 <> regidx +R509:512 riscv_types <> bits def +def 529:535 <> cregidx +R548:551 riscv_types <> bits def +def 568:572 <> csreg +R585:588 riscv_types <> bits def +ind 605:618 <> register_value +constr 628:640 <> Regval_vector +constr 686:696 <> Regval_list +constr 742:754 <> Regval_option +constr 802:811 <> Regval_bit +constr 842:864 <> Regval_bitvector_64_dec +R663:666 Coq.Init.Logic <> ::type_scope:x_'->'_x not +R644:647 Coq.Init.Datatypes <> list ind +R649:662 riscv_types <> register_value:4 ind +R667:680 riscv_types <> register_value:4 ind +R719:722 Coq.Init.Logic <> ::type_scope:x_'->'_x not +R700:703 Coq.Init.Datatypes <> list ind +R705:718 riscv_types <> register_value:4 ind +R723:736 riscv_types <> register_value:4 ind +R779:782 Coq.Init.Logic <> ::type_scope:x_'->'_x not +R758:763 Coq.Init.Datatypes <> option ind +R765:778 riscv_types <> register_value:4 ind +R783:796 riscv_types <> register_value:4 ind +R819:822 Coq.Init.Logic <> ::type_scope:x_'->'_x not +R815:818 Sail.Values <> bitU ind +R823:836 riscv_types <> register_value:4 ind +R876:879 Coq.Init.Logic <> ::type_scope:x_'->'_x not +R868:872 Sail.Values <> mword def +R880:893 riscv_types <> register_value:4 ind +R907:920 riscv_types <> register_value ind +R907:920 riscv_types <> register_value ind +rec 949:956 <> regstate +proj 966:968 <> x31 +proj 986:988 <> x30 +proj 1006:1008 <> x29 +proj 1026:1028 <> x28 +proj 1046:1048 <> x27 +proj 1066:1068 <> x26 +proj 1086:1088 <> x25 +proj 1106:1108 <> x24 +proj 1126:1128 <> x23 +proj 1146:1148 <> x22 +proj 1166:1168 <> x21 +proj 1186:1188 <> x20 +proj 1206:1208 <> x19 +proj 1226:1228 <> x18 +proj 1246:1248 <> x17 +proj 1266:1268 <> x16 +proj 1286:1288 <> x15 +proj 1306:1308 <> x14 +proj 1326:1328 <> x13 +proj 1346:1348 <> x12 +proj 1366:1368 <> x11 +proj 1386:1388 <> x10 +proj 1406:1407 <> x9 +proj 1425:1426 <> x8 +proj 1444:1445 <> x7 +proj 1463:1464 <> x6 +proj 1482:1483 <> x5 +proj 1501:1502 <> x4 +proj 1520:1521 <> x3 +proj 1539:1540 <> x2 +proj 1558:1559 <> x1 +proj 1577:1584 <> instbits +proj 1602:1607 <> nextPC +proj 1625:1626 <> PC +R972:976 Sail.Values <> mword def +R992:996 Sail.Values <> mword def +R1012:1016 Sail.Values <> mword def +R1032:1036 Sail.Values <> mword def +R1052:1056 Sail.Values <> mword def +R1072:1076 Sail.Values <> mword def +R1092:1096 Sail.Values <> mword def +R1112:1116 Sail.Values <> mword def +R1132:1136 Sail.Values <> mword def +R1152:1156 Sail.Values <> mword def +R1172:1176 Sail.Values <> mword def +R1192:1196 Sail.Values <> mword def +R1212:1216 Sail.Values <> mword def +R1232:1236 Sail.Values <> mword def +R1252:1256 Sail.Values <> mword def +R1272:1276 Sail.Values <> mword def +R1292:1296 Sail.Values <> mword def +R1312:1316 Sail.Values <> mword def +R1332:1336 Sail.Values <> mword def +R1352:1356 Sail.Values <> mword def +R1372:1376 Sail.Values <> mword def +R1392:1396 Sail.Values <> mword def +R1411:1415 Sail.Values <> mword def +R1430:1434 Sail.Values <> mword def +R1449:1453 Sail.Values <> mword def +R1468:1472 Sail.Values <> mword def +R1487:1491 Sail.Values <> mword def +R1506:1510 Sail.Values <> mword def +R1525:1529 Sail.Values <> mword def +R1544:1548 Sail.Values <> mword def +R1563:1567 Sail.Values <> mword def +R1588:1592 Sail.Values <> mword def +R1611:1615 Sail.Values <> mword def +R1630:1634 Sail.Values <> mword def +R1654:1661 riscv_types <> regstate rec +R1654:1661 riscv_types <> regstate rec +R1738:1751 riscv_types <> Build_regstate constr +R1885:1898 riscv_types <> Build_regstate constr +not 1692:1692 <> :::'{['_x_'with'_'x31'_':='_x_']}' +R2091:2104 riscv_types <> Build_regstate constr +R2238:2251 riscv_types <> Build_regstate constr +not 2045:2045 <> :::'{['_x_'with'_'x30'_':='_x_']}' +R2444:2457 riscv_types <> Build_regstate constr +R2591:2604 riscv_types <> Build_regstate constr +not 2398:2398 <> :::'{['_x_'with'_'x29'_':='_x_']}' +R2797:2810 riscv_types <> Build_regstate constr +R2944:2957 riscv_types <> Build_regstate constr +not 2751:2751 <> :::'{['_x_'with'_'x28'_':='_x_']}' +R3150:3163 riscv_types <> Build_regstate constr +R3297:3310 riscv_types <> Build_regstate constr +not 3104:3104 <> :::'{['_x_'with'_'x27'_':='_x_']}' +R3503:3516 riscv_types <> Build_regstate constr +R3650:3663 riscv_types <> Build_regstate constr +not 3457:3457 <> :::'{['_x_'with'_'x26'_':='_x_']}' +R3856:3869 riscv_types <> Build_regstate constr +R4003:4016 riscv_types <> Build_regstate constr +not 3810:3810 <> :::'{['_x_'with'_'x25'_':='_x_']}' +R4209:4222 riscv_types <> Build_regstate constr +R4356:4369 riscv_types <> Build_regstate constr +not 4163:4163 <> :::'{['_x_'with'_'x24'_':='_x_']}' +R4562:4575 riscv_types <> Build_regstate constr +R4709:4722 riscv_types <> Build_regstate constr +not 4516:4516 <> :::'{['_x_'with'_'x23'_':='_x_']}' +R4915:4928 riscv_types <> Build_regstate constr +R5062:5075 riscv_types <> Build_regstate constr +not 4869:4869 <> :::'{['_x_'with'_'x22'_':='_x_']}' +R5268:5281 riscv_types <> Build_regstate constr +R5414:5427 riscv_types <> Build_regstate constr +not 5222:5222 <> :::'{['_x_'with'_'x21'_':='_x_']}' +R5619:5632 riscv_types <> Build_regstate constr +R5765:5778 riscv_types <> Build_regstate constr +not 5573:5573 <> :::'{['_x_'with'_'x20'_':='_x_']}' +R5970:5983 riscv_types <> Build_regstate constr +R6116:6129 riscv_types <> Build_regstate constr +not 5924:5924 <> :::'{['_x_'with'_'x19'_':='_x_']}' +R6321:6334 riscv_types <> Build_regstate constr +R6467:6480 riscv_types <> Build_regstate constr +not 6275:6275 <> :::'{['_x_'with'_'x18'_':='_x_']}' +R6672:6685 riscv_types <> Build_regstate constr +R6818:6831 riscv_types <> Build_regstate constr +not 6626:6626 <> :::'{['_x_'with'_'x17'_':='_x_']}' +R7023:7036 riscv_types <> Build_regstate constr +R7169:7182 riscv_types <> Build_regstate constr +not 6977:6977 <> :::'{['_x_'with'_'x16'_':='_x_']}' +R7374:7387 riscv_types <> Build_regstate constr +R7520:7533 riscv_types <> Build_regstate constr +not 7328:7328 <> :::'{['_x_'with'_'x15'_':='_x_']}' +R7725:7738 riscv_types <> Build_regstate constr +R7871:7884 riscv_types <> Build_regstate constr +not 7679:7679 <> :::'{['_x_'with'_'x14'_':='_x_']}' +R8076:8089 riscv_types <> Build_regstate constr +R8222:8235 riscv_types <> Build_regstate constr +not 8030:8030 <> :::'{['_x_'with'_'x13'_':='_x_']}' +R8427:8440 riscv_types <> Build_regstate constr +R8573:8586 riscv_types <> Build_regstate constr +not 8381:8381 <> :::'{['_x_'with'_'x12'_':='_x_']}' +R8778:8791 riscv_types <> Build_regstate constr +R8924:8937 riscv_types <> Build_regstate constr +not 8732:8732 <> :::'{['_x_'with'_'x11'_':='_x_']}' +R9129:9142 riscv_types <> Build_regstate constr +R9275:9288 riscv_types <> Build_regstate constr +not 9083:9083 <> :::'{['_x_'with'_'x10'_':='_x_']}' +R9479:9492 riscv_types <> Build_regstate constr +R9625:9638 riscv_types <> Build_regstate constr +not 9434:9434 <> :::'{['_x_'with'_'x9'_':='_x_']}' +R9829:9842 riscv_types <> Build_regstate constr +R9975:9988 riscv_types <> Build_regstate constr +not 9784:9784 <> :::'{['_x_'with'_'x8'_':='_x_']}' +R10179:10192 riscv_types <> Build_regstate constr +R10325:10338 riscv_types <> Build_regstate constr +not 10134:10134 <> :::'{['_x_'with'_'x7'_':='_x_']}' +R10529:10542 riscv_types <> Build_regstate constr +R10675:10688 riscv_types <> Build_regstate constr +not 10484:10484 <> :::'{['_x_'with'_'x6'_':='_x_']}' +R10879:10892 riscv_types <> Build_regstate constr +R11025:11038 riscv_types <> Build_regstate constr +not 10834:10834 <> :::'{['_x_'with'_'x5'_':='_x_']}' +R11229:11242 riscv_types <> Build_regstate constr +R11375:11388 riscv_types <> Build_regstate constr +not 11184:11184 <> :::'{['_x_'with'_'x4'_':='_x_']}' +R11579:11592 riscv_types <> Build_regstate constr +R11725:11738 riscv_types <> Build_regstate constr +not 11534:11534 <> :::'{['_x_'with'_'x3'_':='_x_']}' +R11929:11942 riscv_types <> Build_regstate constr +R12075:12088 riscv_types <> Build_regstate constr +not 11884:11884 <> :::'{['_x_'with'_'x2'_':='_x_']}' +R12279:12292 riscv_types <> Build_regstate constr +R12425:12438 riscv_types <> Build_regstate constr +not 12234:12234 <> :::'{['_x_'with'_'x1'_':='_x_']}' +R12635:12648 riscv_types <> Build_regstate constr +R12781:12794 riscv_types <> Build_regstate constr +not 12584:12584 <> :::'{['_x_'with'_'instbits'_':='_x_']}' +R12989:13002 riscv_types <> Build_regstate constr +R13135:13148 riscv_types <> Build_regstate constr +not 12940:12940 <> :::'{['_x_'with'_'nextPC'_':='_x_']}' +R13339:13352 riscv_types <> Build_regstate constr +R13485:13498 riscv_types <> Build_regstate constr +not 13294:13294 <> :::'{['_x_'with'_'PC'_':='_x_']}' +def 13649:13661 <> bit_of_regval +R13676:13689 riscv_types <> register_value ind +binder 13664:13672 <> merge_var:41 +R13694:13699 Coq.Init.Datatypes <> option ind +R13701:13704 Sail.Values <> bitU ind +R13718:13726 riscv_types <> merge_var:41 var +R13735:13744 riscv_types <> Regval_bit constr +R13751:13754 Coq.Init.Datatypes <> Some constr +R13765:13768 Coq.Init.Datatypes <> None constr +def 13787:13799 <> regval_of_bit +R13806:13809 Sail.Values <> bitU ind +binder 13802:13802 <> v:43 +R13814:13827 riscv_types <> register_value ind +R13832:13841 riscv_types <> Regval_bit constr +R13843:13843 riscv_types <> v:43 var +def 13858:13883 <> bitvector_64_dec_of_regval +R13898:13911 riscv_types <> register_value ind +binder 13886:13894 <> merge_var:44 +R13918:13923 Coq.Init.Datatypes <> option ind +R13926:13930 Sail.Values <> mword def +R13948:13956 riscv_types <> merge_var:44 var +R13965:13987 riscv_types <> Regval_bitvector_64_dec constr +R13994:13997 Coq.Init.Datatypes <> Some constr +R14008:14011 Coq.Init.Datatypes <> None constr +def 14031:14056 <> regval_of_bitvector_64_dec +R14063:14067 Sail.Values <> mword def +binder 14059:14059 <> v:46 +R14075:14088 riscv_types <> register_value ind +R14095:14117 riscv_types <> Regval_bitvector_64_dec constr +R14119:14119 riscv_types <> v:46 var +def 14135:14150 <> vector_of_regval +binder 14153:14153 <> a:47 +binder 14156:14156 <> n:48 +R14185:14188 Coq.Init.Logic <> ::type_scope:x_'->'_x not +R14171:14184 riscv_types <> register_value ind +R14189:14194 Coq.Init.Datatypes <> option ind +R14196:14196 riscv_types <> a:47 var +binder 14159:14167 <> of_regval:49 +R14216:14229 riscv_types <> register_value ind +binder 14211:14212 <> rv:50 +R14234:14239 Coq.Init.Datatypes <> option ind +R14242:14244 Sail.Values <> vec def +R14246:14246 riscv_types <> a:47 var +R14248:14248 riscv_types <> n:48 var +R14262:14263 riscv_types <> rv:50 var +R14274:14286 riscv_types <> Regval_vector constr +R14301:14304 Coq.ZArith.BinInt <> ::Z_scope:x_'=?'_x not +R14300:14300 riscv_types <> n:48 var +R14305:14315 Sail.Values <> length_list def +R14399:14402 Coq.Init.Datatypes <> None constr +R14330:14337 Sail.Values <> map_bind def +R14356:14364 Sail.Values <> just_list def +R14367:14374 Coq.Lists.List <> map def +R14376:14384 riscv_types <> of_regval:49 var +R14340:14350 Sail.Values <> vec_of_list def +R14352:14352 riscv_types <> n:48 var +R14413:14416 Coq.Init.Datatypes <> None constr +def 14435:14450 <> regval_of_vector +binder 14453:14453 <> a:52 +binder 14455:14458 <> size:53 +R14475:14478 Coq.Init.Logic <> ::type_scope:x_'->'_x not +R14474:14474 riscv_types <> a:52 var +R14479:14492 riscv_types <> register_value ind +binder 14462:14470 <> regval_of:54 +R14501:14503 Sail.Values <> vec def +R14505:14505 riscv_types <> a:52 var +R14507:14510 riscv_types <> size:53 var +binder 14496:14497 <> xs:55 +R14515:14528 riscv_types <> register_value ind +R14533:14545 riscv_types <> Regval_vector constr +R14548:14555 Coq.Lists.List <> map def +R14568:14578 Sail.Values <> list_of_vec def +R14580:14581 riscv_types <> xs:55 var +R14557:14565 riscv_types <> regval_of:54 var +def 14598:14611 <> list_of_regval +binder 14614:14614 <> a:56 +R14644:14647 Coq.Init.Logic <> ::type_scope:x_'->'_x not +R14630:14643 riscv_types <> register_value ind +R14648:14653 Coq.Init.Datatypes <> option ind +R14655:14655 riscv_types <> a:56 var +binder 14618:14626 <> of_regval:57 +R14675:14688 riscv_types <> register_value ind +binder 14670:14671 <> rv:58 +R14693:14698 Coq.Init.Datatypes <> option ind +R14701:14704 Coq.Init.Datatypes <> list ind +R14706:14706 riscv_types <> a:56 var +R14720:14721 riscv_types <> rv:58 var +R14732:14742 riscv_types <> Regval_list constr +R14749:14757 Sail.Values <> just_list def +R14760:14767 Coq.Lists.List <> map def +R14769:14777 riscv_types <> of_regval:57 var +R14791:14794 Coq.Init.Datatypes <> None constr +def 14813:14826 <> regval_of_list +binder 14829:14829 <> a:60 +R14846:14849 Coq.Init.Logic <> ::type_scope:x_'->'_x not +R14845:14845 riscv_types <> a:60 var +R14850:14863 riscv_types <> register_value ind +binder 14833:14841 <> regval_of:61 +R14883:14886 Coq.Init.Datatypes <> list ind +R14888:14888 riscv_types <> a:60 var +binder 14878:14879 <> xs:62 +R14893:14906 riscv_types <> register_value ind +R14913:14923 riscv_types <> Regval_list constr +R14926:14933 Coq.Lists.List <> map def +R14945:14946 riscv_types <> xs:62 var +R14935:14943 riscv_types <> regval_of:61 var +def 14962:14977 <> option_of_regval +binder 14980:14980 <> a:63 +R15010:15013 Coq.Init.Logic <> ::type_scope:x_'->'_x not +R14996:15009 riscv_types <> register_value ind +R15014:15019 Coq.Init.Datatypes <> option ind +R15021:15021 riscv_types <> a:63 var +binder 14984:14992 <> of_regval:64 +R15041:15054 riscv_types <> register_value ind +binder 15036:15037 <> rv:65 +R15059:15064 Coq.Init.Datatypes <> option ind +R15067:15072 Coq.Init.Datatypes <> option ind +R15074:15074 riscv_types <> a:63 var +R15088:15089 riscv_types <> rv:65 var +R15100:15112 riscv_types <> Regval_option constr +R15119:15128 Coq.Init.Datatypes <> option_map def +R15130:15138 riscv_types <> of_regval:64 var +R15151:15154 Coq.Init.Datatypes <> None constr +def 15173:15188 <> regval_of_option +binder 15191:15191 <> a:67 +R15208:15211 Coq.Init.Logic <> ::type_scope:x_'->'_x not +R15207:15207 riscv_types <> a:67 var +R15212:15225 riscv_types <> register_value ind +binder 15195:15203 <> regval_of:68 +R15244:15249 Coq.Init.Datatypes <> option ind +R15251:15251 riscv_types <> a:67 var +binder 15240:15240 <> v:69 +R15257:15269 riscv_types <> Regval_option constr +R15272:15281 Coq.Init.Datatypes <> option_map def +R15293:15293 riscv_types <> v:69 var +R15283:15291 riscv_types <> regval_of:68 var +def 15310:15316 <> x31_ref +R15326:15329 Sail.Values <> name proj +R15326:15329 Sail.Values <> name proj +R15343:15351 Sail.Values <> read_from proj +R15378:15385 Sail.Values <> write_to proj +R15430:15438 Sail.Values <> of_regval proj +R15486:15494 Sail.Values <> regval_of proj +binder 15361:15361 <> s:70 +R15369:15371 riscv_types <> x31 proj +R15366:15366 riscv_types <> s:70 var +binder 15395:15395 <> v:71 +binder 15397:15397 <> s:72 +R15403:15405 riscv_types <> :::'{['_x_'with'_'x31'_':='_x_']}' not +R15407:15419 riscv_types <> :::'{['_x_'with'_'x31'_':='_x_']}' not +R15421:15423 riscv_types <> :::'{['_x_'with'_'x31'_':='_x_']}' not +R15406:15406 riscv_types <> s:72 var +R15420:15420 riscv_types <> v:71 var +binder 15448:15448 <> v:73 +R15453:15478 riscv_types <> bitvector_64_dec_of_regval def +R15480:15480 riscv_types <> v:73 var +binder 15504:15504 <> v:74 +R15509:15534 riscv_types <> regval_of_bitvector_64_dec def +R15536:15536 riscv_types <> v:74 var +def 15555:15561 <> x30_ref +R15571:15574 Sail.Values <> name proj +R15571:15574 Sail.Values <> name proj +R15588:15596 Sail.Values <> read_from proj +R15623:15630 Sail.Values <> write_to proj +R15675:15683 Sail.Values <> of_regval proj +R15731:15739 Sail.Values <> regval_of proj +binder 15606:15606 <> s:75 +R15614:15616 riscv_types <> x30 proj +R15611:15611 riscv_types <> s:75 var +binder 15640:15640 <> v:76 +binder 15642:15642 <> s:77 +R15648:15650 riscv_types <> :::'{['_x_'with'_'x30'_':='_x_']}' not +R15652:15664 riscv_types <> :::'{['_x_'with'_'x30'_':='_x_']}' not +R15666:15668 riscv_types <> :::'{['_x_'with'_'x30'_':='_x_']}' not +R15651:15651 riscv_types <> s:77 var +R15665:15665 riscv_types <> v:76 var +binder 15693:15693 <> v:78 +R15698:15723 riscv_types <> bitvector_64_dec_of_regval def +R15725:15725 riscv_types <> v:78 var +binder 15749:15749 <> v:79 +R15754:15779 riscv_types <> regval_of_bitvector_64_dec def +R15781:15781 riscv_types <> v:79 var +def 15800:15806 <> x29_ref +R15816:15819 Sail.Values <> name proj +R15816:15819 Sail.Values <> name proj +R15833:15841 Sail.Values <> read_from proj +R15868:15875 Sail.Values <> write_to proj +R15920:15928 Sail.Values <> of_regval proj +R15976:15984 Sail.Values <> regval_of proj +binder 15851:15851 <> s:80 +R15859:15861 riscv_types <> x29 proj +R15856:15856 riscv_types <> s:80 var +binder 15885:15885 <> v:81 +binder 15887:15887 <> s:82 +R15893:15895 riscv_types <> :::'{['_x_'with'_'x29'_':='_x_']}' not +R15897:15909 riscv_types <> :::'{['_x_'with'_'x29'_':='_x_']}' not +R15911:15913 riscv_types <> :::'{['_x_'with'_'x29'_':='_x_']}' not +R15896:15896 riscv_types <> s:82 var +R15910:15910 riscv_types <> v:81 var +binder 15938:15938 <> v:83 +R15943:15968 riscv_types <> bitvector_64_dec_of_regval def +R15970:15970 riscv_types <> v:83 var +binder 15994:15994 <> v:84 +R15999:16024 riscv_types <> regval_of_bitvector_64_dec def +R16026:16026 riscv_types <> v:84 var +def 16045:16051 <> x28_ref +R16061:16064 Sail.Values <> name proj +R16061:16064 Sail.Values <> name proj +R16078:16086 Sail.Values <> read_from proj +R16113:16120 Sail.Values <> write_to proj +R16165:16173 Sail.Values <> of_regval proj +R16221:16229 Sail.Values <> regval_of proj +binder 16096:16096 <> s:85 +R16104:16106 riscv_types <> x28 proj +R16101:16101 riscv_types <> s:85 var +binder 16130:16130 <> v:86 +binder 16132:16132 <> s:87 +R16138:16140 riscv_types <> :::'{['_x_'with'_'x28'_':='_x_']}' not +R16142:16154 riscv_types <> :::'{['_x_'with'_'x28'_':='_x_']}' not +R16156:16158 riscv_types <> :::'{['_x_'with'_'x28'_':='_x_']}' not +R16141:16141 riscv_types <> s:87 var +R16155:16155 riscv_types <> v:86 var +binder 16183:16183 <> v:88 +R16188:16213 riscv_types <> bitvector_64_dec_of_regval def +R16215:16215 riscv_types <> v:88 var +binder 16239:16239 <> v:89 +R16244:16269 riscv_types <> regval_of_bitvector_64_dec def +R16271:16271 riscv_types <> v:89 var +def 16290:16296 <> x27_ref +R16306:16309 Sail.Values <> name proj +R16306:16309 Sail.Values <> name proj +R16323:16331 Sail.Values <> read_from proj +R16358:16365 Sail.Values <> write_to proj +R16410:16418 Sail.Values <> of_regval proj +R16466:16474 Sail.Values <> regval_of proj +binder 16341:16341 <> s:90 +R16349:16351 riscv_types <> x27 proj +R16346:16346 riscv_types <> s:90 var +binder 16375:16375 <> v:91 +binder 16377:16377 <> s:92 +R16383:16385 riscv_types <> :::'{['_x_'with'_'x27'_':='_x_']}' not +R16387:16399 riscv_types <> :::'{['_x_'with'_'x27'_':='_x_']}' not +R16401:16403 riscv_types <> :::'{['_x_'with'_'x27'_':='_x_']}' not +R16386:16386 riscv_types <> s:92 var +R16400:16400 riscv_types <> v:91 var +binder 16428:16428 <> v:93 +R16433:16458 riscv_types <> bitvector_64_dec_of_regval def +R16460:16460 riscv_types <> v:93 var +binder 16484:16484 <> v:94 +R16489:16514 riscv_types <> regval_of_bitvector_64_dec def +R16516:16516 riscv_types <> v:94 var +def 16535:16541 <> x26_ref +R16551:16554 Sail.Values <> name proj +R16551:16554 Sail.Values <> name proj +R16568:16576 Sail.Values <> read_from proj +R16603:16610 Sail.Values <> write_to proj +R16655:16663 Sail.Values <> of_regval proj +R16711:16719 Sail.Values <> regval_of proj +binder 16586:16586 <> s:95 +R16594:16596 riscv_types <> x26 proj +R16591:16591 riscv_types <> s:95 var +binder 16620:16620 <> v:96 +binder 16622:16622 <> s:97 +R16628:16630 riscv_types <> :::'{['_x_'with'_'x26'_':='_x_']}' not +R16632:16644 riscv_types <> :::'{['_x_'with'_'x26'_':='_x_']}' not +R16646:16648 riscv_types <> :::'{['_x_'with'_'x26'_':='_x_']}' not +R16631:16631 riscv_types <> s:97 var +R16645:16645 riscv_types <> v:96 var +binder 16673:16673 <> v:98 +R16678:16703 riscv_types <> bitvector_64_dec_of_regval def +R16705:16705 riscv_types <> v:98 var +binder 16729:16729 <> v:99 +R16734:16759 riscv_types <> regval_of_bitvector_64_dec def +R16761:16761 riscv_types <> v:99 var +def 16780:16786 <> x25_ref +R16796:16799 Sail.Values <> name proj +R16796:16799 Sail.Values <> name proj +R16813:16821 Sail.Values <> read_from proj +R16848:16855 Sail.Values <> write_to proj +R16900:16908 Sail.Values <> of_regval proj +R16956:16964 Sail.Values <> regval_of proj +binder 16831:16831 <> s:100 +R16839:16841 riscv_types <> x25 proj +R16836:16836 riscv_types <> s:100 var +binder 16865:16865 <> v:101 +binder 16867:16867 <> s:102 +R16873:16875 riscv_types <> :::'{['_x_'with'_'x25'_':='_x_']}' not +R16877:16889 riscv_types <> :::'{['_x_'with'_'x25'_':='_x_']}' not +R16891:16893 riscv_types <> :::'{['_x_'with'_'x25'_':='_x_']}' not +R16876:16876 riscv_types <> s:102 var +R16890:16890 riscv_types <> v:101 var +binder 16918:16918 <> v:103 +R16923:16948 riscv_types <> bitvector_64_dec_of_regval def +R16950:16950 riscv_types <> v:103 var +binder 16974:16974 <> v:104 +R16979:17004 riscv_types <> regval_of_bitvector_64_dec def +R17006:17006 riscv_types <> v:104 var +def 17025:17031 <> x24_ref +R17041:17044 Sail.Values <> name proj +R17041:17044 Sail.Values <> name proj +R17058:17066 Sail.Values <> read_from proj +R17093:17100 Sail.Values <> write_to proj +R17145:17153 Sail.Values <> of_regval proj +R17201:17209 Sail.Values <> regval_of proj +binder 17076:17076 <> s:105 +R17084:17086 riscv_types <> x24 proj +R17081:17081 riscv_types <> s:105 var +binder 17110:17110 <> v:106 +binder 17112:17112 <> s:107 +R17118:17120 riscv_types <> :::'{['_x_'with'_'x24'_':='_x_']}' not +R17122:17134 riscv_types <> :::'{['_x_'with'_'x24'_':='_x_']}' not +R17136:17138 riscv_types <> :::'{['_x_'with'_'x24'_':='_x_']}' not +R17121:17121 riscv_types <> s:107 var +R17135:17135 riscv_types <> v:106 var +binder 17163:17163 <> v:108 +R17168:17193 riscv_types <> bitvector_64_dec_of_regval def +R17195:17195 riscv_types <> v:108 var +binder 17219:17219 <> v:109 +R17224:17249 riscv_types <> regval_of_bitvector_64_dec def +R17251:17251 riscv_types <> v:109 var +def 17270:17276 <> x23_ref +R17286:17289 Sail.Values <> name proj +R17286:17289 Sail.Values <> name proj +R17303:17311 Sail.Values <> read_from proj +R17338:17345 Sail.Values <> write_to proj +R17390:17398 Sail.Values <> of_regval proj +R17446:17454 Sail.Values <> regval_of proj +binder 17321:17321 <> s:110 +R17329:17331 riscv_types <> x23 proj +R17326:17326 riscv_types <> s:110 var +binder 17355:17355 <> v:111 +binder 17357:17357 <> s:112 +R17363:17365 riscv_types <> :::'{['_x_'with'_'x23'_':='_x_']}' not +R17367:17379 riscv_types <> :::'{['_x_'with'_'x23'_':='_x_']}' not +R17381:17383 riscv_types <> :::'{['_x_'with'_'x23'_':='_x_']}' not +R17366:17366 riscv_types <> s:112 var +R17380:17380 riscv_types <> v:111 var +binder 17408:17408 <> v:113 +R17413:17438 riscv_types <> bitvector_64_dec_of_regval def +R17440:17440 riscv_types <> v:113 var +binder 17464:17464 <> v:114 +R17469:17494 riscv_types <> regval_of_bitvector_64_dec def +R17496:17496 riscv_types <> v:114 var +def 17515:17521 <> x22_ref +R17531:17534 Sail.Values <> name proj +R17531:17534 Sail.Values <> name proj +R17548:17556 Sail.Values <> read_from proj +R17583:17590 Sail.Values <> write_to proj +R17635:17643 Sail.Values <> of_regval proj +R17691:17699 Sail.Values <> regval_of proj +binder 17566:17566 <> s:115 +R17574:17576 riscv_types <> x22 proj +R17571:17571 riscv_types <> s:115 var +binder 17600:17600 <> v:116 +binder 17602:17602 <> s:117 +R17608:17610 riscv_types <> :::'{['_x_'with'_'x22'_':='_x_']}' not +R17612:17624 riscv_types <> :::'{['_x_'with'_'x22'_':='_x_']}' not +R17626:17628 riscv_types <> :::'{['_x_'with'_'x22'_':='_x_']}' not +R17611:17611 riscv_types <> s:117 var +R17625:17625 riscv_types <> v:116 var +binder 17653:17653 <> v:118 +R17658:17683 riscv_types <> bitvector_64_dec_of_regval def +R17685:17685 riscv_types <> v:118 var +binder 17709:17709 <> v:119 +R17714:17739 riscv_types <> regval_of_bitvector_64_dec def +R17741:17741 riscv_types <> v:119 var +def 17760:17766 <> x21_ref +R17776:17779 Sail.Values <> name proj +R17776:17779 Sail.Values <> name proj +R17793:17801 Sail.Values <> read_from proj +R17828:17835 Sail.Values <> write_to proj +R17880:17888 Sail.Values <> of_regval proj +R17936:17944 Sail.Values <> regval_of proj +binder 17811:17811 <> s:120 +R17819:17821 riscv_types <> x21 proj +R17816:17816 riscv_types <> s:120 var +binder 17845:17845 <> v:121 +binder 17847:17847 <> s:122 +R17853:17855 riscv_types <> :::'{['_x_'with'_'x21'_':='_x_']}' not +R17857:17869 riscv_types <> :::'{['_x_'with'_'x21'_':='_x_']}' not +R17871:17873 riscv_types <> :::'{['_x_'with'_'x21'_':='_x_']}' not +R17856:17856 riscv_types <> s:122 var +R17870:17870 riscv_types <> v:121 var +binder 17898:17898 <> v:123 +R17903:17928 riscv_types <> bitvector_64_dec_of_regval def +R17930:17930 riscv_types <> v:123 var +binder 17954:17954 <> v:124 +R17959:17984 riscv_types <> regval_of_bitvector_64_dec def +R17986:17986 riscv_types <> v:124 var +def 18005:18011 <> x20_ref +R18021:18024 Sail.Values <> name proj +R18021:18024 Sail.Values <> name proj +R18038:18046 Sail.Values <> read_from proj +R18073:18080 Sail.Values <> write_to proj +R18125:18133 Sail.Values <> of_regval proj +R18181:18189 Sail.Values <> regval_of proj +binder 18056:18056 <> s:125 +R18064:18066 riscv_types <> x20 proj +R18061:18061 riscv_types <> s:125 var +binder 18090:18090 <> v:126 +binder 18092:18092 <> s:127 +R18098:18100 riscv_types <> :::'{['_x_'with'_'x20'_':='_x_']}' not +R18102:18114 riscv_types <> :::'{['_x_'with'_'x20'_':='_x_']}' not +R18116:18118 riscv_types <> :::'{['_x_'with'_'x20'_':='_x_']}' not +R18101:18101 riscv_types <> s:127 var +R18115:18115 riscv_types <> v:126 var +binder 18143:18143 <> v:128 +R18148:18173 riscv_types <> bitvector_64_dec_of_regval def +R18175:18175 riscv_types <> v:128 var +binder 18199:18199 <> v:129 +R18204:18229 riscv_types <> regval_of_bitvector_64_dec def +R18231:18231 riscv_types <> v:129 var +def 18250:18256 <> x19_ref +R18266:18269 Sail.Values <> name proj +R18266:18269 Sail.Values <> name proj +R18283:18291 Sail.Values <> read_from proj +R18318:18325 Sail.Values <> write_to proj +R18370:18378 Sail.Values <> of_regval proj +R18426:18434 Sail.Values <> regval_of proj +binder 18301:18301 <> s:130 +R18309:18311 riscv_types <> x19 proj +R18306:18306 riscv_types <> s:130 var +binder 18335:18335 <> v:131 +binder 18337:18337 <> s:132 +R18343:18345 riscv_types <> :::'{['_x_'with'_'x19'_':='_x_']}' not +R18347:18359 riscv_types <> :::'{['_x_'with'_'x19'_':='_x_']}' not +R18361:18363 riscv_types <> :::'{['_x_'with'_'x19'_':='_x_']}' not +R18346:18346 riscv_types <> s:132 var +R18360:18360 riscv_types <> v:131 var +binder 18388:18388 <> v:133 +R18393:18418 riscv_types <> bitvector_64_dec_of_regval def +R18420:18420 riscv_types <> v:133 var +binder 18444:18444 <> v:134 +R18449:18474 riscv_types <> regval_of_bitvector_64_dec def +R18476:18476 riscv_types <> v:134 var +def 18495:18501 <> x18_ref +R18511:18514 Sail.Values <> name proj +R18511:18514 Sail.Values <> name proj +R18528:18536 Sail.Values <> read_from proj +R18563:18570 Sail.Values <> write_to proj +R18615:18623 Sail.Values <> of_regval proj +R18671:18679 Sail.Values <> regval_of proj +binder 18546:18546 <> s:135 +R18554:18556 riscv_types <> x18 proj +R18551:18551 riscv_types <> s:135 var +binder 18580:18580 <> v:136 +binder 18582:18582 <> s:137 +R18588:18590 riscv_types <> :::'{['_x_'with'_'x18'_':='_x_']}' not +R18592:18604 riscv_types <> :::'{['_x_'with'_'x18'_':='_x_']}' not +R18606:18608 riscv_types <> :::'{['_x_'with'_'x18'_':='_x_']}' not +R18591:18591 riscv_types <> s:137 var +R18605:18605 riscv_types <> v:136 var +binder 18633:18633 <> v:138 +R18638:18663 riscv_types <> bitvector_64_dec_of_regval def +R18665:18665 riscv_types <> v:138 var +binder 18689:18689 <> v:139 +R18694:18719 riscv_types <> regval_of_bitvector_64_dec def +R18721:18721 riscv_types <> v:139 var +def 18740:18746 <> x17_ref +R18756:18759 Sail.Values <> name proj +R18756:18759 Sail.Values <> name proj +R18773:18781 Sail.Values <> read_from proj +R18808:18815 Sail.Values <> write_to proj +R18860:18868 Sail.Values <> of_regval proj +R18916:18924 Sail.Values <> regval_of proj +binder 18791:18791 <> s:140 +R18799:18801 riscv_types <> x17 proj +R18796:18796 riscv_types <> s:140 var +binder 18825:18825 <> v:141 +binder 18827:18827 <> s:142 +R18833:18835 riscv_types <> :::'{['_x_'with'_'x17'_':='_x_']}' not +R18837:18849 riscv_types <> :::'{['_x_'with'_'x17'_':='_x_']}' not +R18851:18853 riscv_types <> :::'{['_x_'with'_'x17'_':='_x_']}' not +R18836:18836 riscv_types <> s:142 var +R18850:18850 riscv_types <> v:141 var +binder 18878:18878 <> v:143 +R18883:18908 riscv_types <> bitvector_64_dec_of_regval def +R18910:18910 riscv_types <> v:143 var +binder 18934:18934 <> v:144 +R18939:18964 riscv_types <> regval_of_bitvector_64_dec def +R18966:18966 riscv_types <> v:144 var +def 18985:18991 <> x16_ref +R19001:19004 Sail.Values <> name proj +R19001:19004 Sail.Values <> name proj +R19018:19026 Sail.Values <> read_from proj +R19053:19060 Sail.Values <> write_to proj +R19105:19113 Sail.Values <> of_regval proj +R19161:19169 Sail.Values <> regval_of proj +binder 19036:19036 <> s:145 +R19044:19046 riscv_types <> x16 proj +R19041:19041 riscv_types <> s:145 var +binder 19070:19070 <> v:146 +binder 19072:19072 <> s:147 +R19078:19080 riscv_types <> :::'{['_x_'with'_'x16'_':='_x_']}' not +R19082:19094 riscv_types <> :::'{['_x_'with'_'x16'_':='_x_']}' not +R19096:19098 riscv_types <> :::'{['_x_'with'_'x16'_':='_x_']}' not +R19081:19081 riscv_types <> s:147 var +R19095:19095 riscv_types <> v:146 var +binder 19123:19123 <> v:148 +R19128:19153 riscv_types <> bitvector_64_dec_of_regval def +R19155:19155 riscv_types <> v:148 var +binder 19179:19179 <> v:149 +R19184:19209 riscv_types <> regval_of_bitvector_64_dec def +R19211:19211 riscv_types <> v:149 var +def 19230:19236 <> x15_ref +R19246:19249 Sail.Values <> name proj +R19246:19249 Sail.Values <> name proj +R19263:19271 Sail.Values <> read_from proj +R19298:19305 Sail.Values <> write_to proj +R19350:19358 Sail.Values <> of_regval proj +R19406:19414 Sail.Values <> regval_of proj +binder 19281:19281 <> s:150 +R19289:19291 riscv_types <> x15 proj +R19286:19286 riscv_types <> s:150 var +binder 19315:19315 <> v:151 +binder 19317:19317 <> s:152 +R19323:19325 riscv_types <> :::'{['_x_'with'_'x15'_':='_x_']}' not +R19327:19339 riscv_types <> :::'{['_x_'with'_'x15'_':='_x_']}' not +R19341:19343 riscv_types <> :::'{['_x_'with'_'x15'_':='_x_']}' not +R19326:19326 riscv_types <> s:152 var +R19340:19340 riscv_types <> v:151 var +binder 19368:19368 <> v:153 +R19373:19398 riscv_types <> bitvector_64_dec_of_regval def +R19400:19400 riscv_types <> v:153 var +binder 19424:19424 <> v:154 +R19429:19454 riscv_types <> regval_of_bitvector_64_dec def +R19456:19456 riscv_types <> v:154 var +def 19475:19481 <> x14_ref +R19491:19494 Sail.Values <> name proj +R19491:19494 Sail.Values <> name proj +R19508:19516 Sail.Values <> read_from proj +R19543:19550 Sail.Values <> write_to proj +R19595:19603 Sail.Values <> of_regval proj +R19651:19659 Sail.Values <> regval_of proj +binder 19526:19526 <> s:155 +R19534:19536 riscv_types <> x14 proj +R19531:19531 riscv_types <> s:155 var +binder 19560:19560 <> v:156 +binder 19562:19562 <> s:157 +R19568:19570 riscv_types <> :::'{['_x_'with'_'x14'_':='_x_']}' not +R19572:19584 riscv_types <> :::'{['_x_'with'_'x14'_':='_x_']}' not +R19586:19588 riscv_types <> :::'{['_x_'with'_'x14'_':='_x_']}' not +R19571:19571 riscv_types <> s:157 var +R19585:19585 riscv_types <> v:156 var +binder 19613:19613 <> v:158 +R19618:19643 riscv_types <> bitvector_64_dec_of_regval def +R19645:19645 riscv_types <> v:158 var +binder 19669:19669 <> v:159 +R19674:19699 riscv_types <> regval_of_bitvector_64_dec def +R19701:19701 riscv_types <> v:159 var +def 19720:19726 <> x13_ref +R19736:19739 Sail.Values <> name proj +R19736:19739 Sail.Values <> name proj +R19753:19761 Sail.Values <> read_from proj +R19788:19795 Sail.Values <> write_to proj +R19840:19848 Sail.Values <> of_regval proj +R19896:19904 Sail.Values <> regval_of proj +binder 19771:19771 <> s:160 +R19779:19781 riscv_types <> x13 proj +R19776:19776 riscv_types <> s:160 var +binder 19805:19805 <> v:161 +binder 19807:19807 <> s:162 +R19813:19815 riscv_types <> :::'{['_x_'with'_'x13'_':='_x_']}' not +R19817:19829 riscv_types <> :::'{['_x_'with'_'x13'_':='_x_']}' not +R19831:19833 riscv_types <> :::'{['_x_'with'_'x13'_':='_x_']}' not +R19816:19816 riscv_types <> s:162 var +R19830:19830 riscv_types <> v:161 var +binder 19858:19858 <> v:163 +R19863:19888 riscv_types <> bitvector_64_dec_of_regval def +R19890:19890 riscv_types <> v:163 var +binder 19914:19914 <> v:164 +R19919:19944 riscv_types <> regval_of_bitvector_64_dec def +R19946:19946 riscv_types <> v:164 var +def 19965:19971 <> x12_ref +R19981:19984 Sail.Values <> name proj +R19981:19984 Sail.Values <> name proj +R19998:20006 Sail.Values <> read_from proj +R20033:20040 Sail.Values <> write_to proj +R20085:20093 Sail.Values <> of_regval proj +R20141:20149 Sail.Values <> regval_of proj +binder 20016:20016 <> s:165 +R20024:20026 riscv_types <> x12 proj +R20021:20021 riscv_types <> s:165 var +binder 20050:20050 <> v:166 +binder 20052:20052 <> s:167 +R20058:20060 riscv_types <> :::'{['_x_'with'_'x12'_':='_x_']}' not +R20062:20074 riscv_types <> :::'{['_x_'with'_'x12'_':='_x_']}' not +R20076:20078 riscv_types <> :::'{['_x_'with'_'x12'_':='_x_']}' not +R20061:20061 riscv_types <> s:167 var +R20075:20075 riscv_types <> v:166 var +binder 20103:20103 <> v:168 +R20108:20133 riscv_types <> bitvector_64_dec_of_regval def +R20135:20135 riscv_types <> v:168 var +binder 20159:20159 <> v:169 +R20164:20189 riscv_types <> regval_of_bitvector_64_dec def +R20191:20191 riscv_types <> v:169 var +def 20210:20216 <> x11_ref +R20226:20229 Sail.Values <> name proj +R20226:20229 Sail.Values <> name proj +R20243:20251 Sail.Values <> read_from proj +R20278:20285 Sail.Values <> write_to proj +R20330:20338 Sail.Values <> of_regval proj +R20386:20394 Sail.Values <> regval_of proj +binder 20261:20261 <> s:170 +R20269:20271 riscv_types <> x11 proj +R20266:20266 riscv_types <> s:170 var +binder 20295:20295 <> v:171 +binder 20297:20297 <> s:172 +R20303:20305 riscv_types <> :::'{['_x_'with'_'x11'_':='_x_']}' not +R20307:20319 riscv_types <> :::'{['_x_'with'_'x11'_':='_x_']}' not +R20321:20323 riscv_types <> :::'{['_x_'with'_'x11'_':='_x_']}' not +R20306:20306 riscv_types <> s:172 var +R20320:20320 riscv_types <> v:171 var +binder 20348:20348 <> v:173 +R20353:20378 riscv_types <> bitvector_64_dec_of_regval def +R20380:20380 riscv_types <> v:173 var +binder 20404:20404 <> v:174 +R20409:20434 riscv_types <> regval_of_bitvector_64_dec def +R20436:20436 riscv_types <> v:174 var +def 20455:20461 <> x10_ref +R20471:20474 Sail.Values <> name proj +R20471:20474 Sail.Values <> name proj +R20488:20496 Sail.Values <> read_from proj +R20523:20530 Sail.Values <> write_to proj +R20575:20583 Sail.Values <> of_regval proj +R20631:20639 Sail.Values <> regval_of proj +binder 20506:20506 <> s:175 +R20514:20516 riscv_types <> x10 proj +R20511:20511 riscv_types <> s:175 var +binder 20540:20540 <> v:176 +binder 20542:20542 <> s:177 +R20548:20550 riscv_types <> :::'{['_x_'with'_'x10'_':='_x_']}' not +R20552:20564 riscv_types <> :::'{['_x_'with'_'x10'_':='_x_']}' not +R20566:20568 riscv_types <> :::'{['_x_'with'_'x10'_':='_x_']}' not +R20551:20551 riscv_types <> s:177 var +R20565:20565 riscv_types <> v:176 var +binder 20593:20593 <> v:178 +R20598:20623 riscv_types <> bitvector_64_dec_of_regval def +R20625:20625 riscv_types <> v:178 var +binder 20649:20649 <> v:179 +R20654:20679 riscv_types <> regval_of_bitvector_64_dec def +R20681:20681 riscv_types <> v:179 var +def 20700:20705 <> x9_ref +R20715:20718 Sail.Values <> name proj +R20715:20718 Sail.Values <> name proj +R20731:20739 Sail.Values <> read_from proj +R20765:20772 Sail.Values <> write_to proj +R20816:20824 Sail.Values <> of_regval proj +R20872:20880 Sail.Values <> regval_of proj +binder 20749:20749 <> s:180 +R20757:20758 riscv_types <> x9 proj +R20754:20754 riscv_types <> s:180 var +binder 20782:20782 <> v:181 +binder 20784:20784 <> s:182 +R20790:20792 riscv_types <> :::'{['_x_'with'_'x9'_':='_x_']}' not +R20794:20805 riscv_types <> :::'{['_x_'with'_'x9'_':='_x_']}' not +R20807:20809 riscv_types <> :::'{['_x_'with'_'x9'_':='_x_']}' not +R20793:20793 riscv_types <> s:182 var +R20806:20806 riscv_types <> v:181 var +binder 20834:20834 <> v:183 +R20839:20864 riscv_types <> bitvector_64_dec_of_regval def +R20866:20866 riscv_types <> v:183 var +binder 20890:20890 <> v:184 +R20895:20920 riscv_types <> regval_of_bitvector_64_dec def +R20922:20922 riscv_types <> v:184 var +def 20941:20946 <> x8_ref +R20956:20959 Sail.Values <> name proj +R20956:20959 Sail.Values <> name proj +R20972:20980 Sail.Values <> read_from proj +R21006:21013 Sail.Values <> write_to proj +R21057:21065 Sail.Values <> of_regval proj +R21113:21121 Sail.Values <> regval_of proj +binder 20990:20990 <> s:185 +R20998:20999 riscv_types <> x8 proj +R20995:20995 riscv_types <> s:185 var +binder 21023:21023 <> v:186 +binder 21025:21025 <> s:187 +R21031:21033 riscv_types <> :::'{['_x_'with'_'x8'_':='_x_']}' not +R21035:21046 riscv_types <> :::'{['_x_'with'_'x8'_':='_x_']}' not +R21048:21050 riscv_types <> :::'{['_x_'with'_'x8'_':='_x_']}' not +R21034:21034 riscv_types <> s:187 var +R21047:21047 riscv_types <> v:186 var +binder 21075:21075 <> v:188 +R21080:21105 riscv_types <> bitvector_64_dec_of_regval def +R21107:21107 riscv_types <> v:188 var +binder 21131:21131 <> v:189 +R21136:21161 riscv_types <> regval_of_bitvector_64_dec def +R21163:21163 riscv_types <> v:189 var +def 21182:21187 <> x7_ref +R21197:21200 Sail.Values <> name proj +R21197:21200 Sail.Values <> name proj +R21213:21221 Sail.Values <> read_from proj +R21247:21254 Sail.Values <> write_to proj +R21298:21306 Sail.Values <> of_regval proj +R21354:21362 Sail.Values <> regval_of proj +binder 21231:21231 <> s:190 +R21239:21240 riscv_types <> x7 proj +R21236:21236 riscv_types <> s:190 var +binder 21264:21264 <> v:191 +binder 21266:21266 <> s:192 +R21272:21274 riscv_types <> :::'{['_x_'with'_'x7'_':='_x_']}' not +R21276:21287 riscv_types <> :::'{['_x_'with'_'x7'_':='_x_']}' not +R21289:21291 riscv_types <> :::'{['_x_'with'_'x7'_':='_x_']}' not +R21275:21275 riscv_types <> s:192 var +R21288:21288 riscv_types <> v:191 var +binder 21316:21316 <> v:193 +R21321:21346 riscv_types <> bitvector_64_dec_of_regval def +R21348:21348 riscv_types <> v:193 var +binder 21372:21372 <> v:194 +R21377:21402 riscv_types <> regval_of_bitvector_64_dec def +R21404:21404 riscv_types <> v:194 var +def 21423:21428 <> x6_ref +R21438:21441 Sail.Values <> name proj +R21438:21441 Sail.Values <> name proj +R21454:21462 Sail.Values <> read_from proj +R21488:21495 Sail.Values <> write_to proj +R21539:21547 Sail.Values <> of_regval proj +R21595:21603 Sail.Values <> regval_of proj +binder 21472:21472 <> s:195 +R21480:21481 riscv_types <> x6 proj +R21477:21477 riscv_types <> s:195 var +binder 21505:21505 <> v:196 +binder 21507:21507 <> s:197 +R21513:21515 riscv_types <> :::'{['_x_'with'_'x6'_':='_x_']}' not +R21517:21528 riscv_types <> :::'{['_x_'with'_'x6'_':='_x_']}' not +R21530:21532 riscv_types <> :::'{['_x_'with'_'x6'_':='_x_']}' not +R21516:21516 riscv_types <> s:197 var +R21529:21529 riscv_types <> v:196 var +binder 21557:21557 <> v:198 +R21562:21587 riscv_types <> bitvector_64_dec_of_regval def +R21589:21589 riscv_types <> v:198 var +binder 21613:21613 <> v:199 +R21618:21643 riscv_types <> regval_of_bitvector_64_dec def +R21645:21645 riscv_types <> v:199 var +def 21664:21669 <> x5_ref +R21679:21682 Sail.Values <> name proj +R21679:21682 Sail.Values <> name proj +R21695:21703 Sail.Values <> read_from proj +R21729:21736 Sail.Values <> write_to proj +R21780:21788 Sail.Values <> of_regval proj +R21836:21844 Sail.Values <> regval_of proj +binder 21713:21713 <> s:200 +R21721:21722 riscv_types <> x5 proj +R21718:21718 riscv_types <> s:200 var +binder 21746:21746 <> v:201 +binder 21748:21748 <> s:202 +R21754:21756 riscv_types <> :::'{['_x_'with'_'x5'_':='_x_']}' not +R21758:21769 riscv_types <> :::'{['_x_'with'_'x5'_':='_x_']}' not +R21771:21773 riscv_types <> :::'{['_x_'with'_'x5'_':='_x_']}' not +R21757:21757 riscv_types <> s:202 var +R21770:21770 riscv_types <> v:201 var +binder 21798:21798 <> v:203 +R21803:21828 riscv_types <> bitvector_64_dec_of_regval def +R21830:21830 riscv_types <> v:203 var +binder 21854:21854 <> v:204 +R21859:21884 riscv_types <> regval_of_bitvector_64_dec def +R21886:21886 riscv_types <> v:204 var +def 21905:21910 <> x4_ref +R21920:21923 Sail.Values <> name proj +R21920:21923 Sail.Values <> name proj +R21936:21944 Sail.Values <> read_from proj +R21970:21977 Sail.Values <> write_to proj +R22021:22029 Sail.Values <> of_regval proj +R22077:22085 Sail.Values <> regval_of proj +binder 21954:21954 <> s:205 +R21962:21963 riscv_types <> x4 proj +R21959:21959 riscv_types <> s:205 var +binder 21987:21987 <> v:206 +binder 21989:21989 <> s:207 +R21995:21997 riscv_types <> :::'{['_x_'with'_'x4'_':='_x_']}' not +R21999:22010 riscv_types <> :::'{['_x_'with'_'x4'_':='_x_']}' not +R22012:22014 riscv_types <> :::'{['_x_'with'_'x4'_':='_x_']}' not +R21998:21998 riscv_types <> s:207 var +R22011:22011 riscv_types <> v:206 var +binder 22039:22039 <> v:208 +R22044:22069 riscv_types <> bitvector_64_dec_of_regval def +R22071:22071 riscv_types <> v:208 var +binder 22095:22095 <> v:209 +R22100:22125 riscv_types <> regval_of_bitvector_64_dec def +R22127:22127 riscv_types <> v:209 var +def 22146:22151 <> x3_ref +R22161:22164 Sail.Values <> name proj +R22161:22164 Sail.Values <> name proj +R22177:22185 Sail.Values <> read_from proj +R22211:22218 Sail.Values <> write_to proj +R22262:22270 Sail.Values <> of_regval proj +R22318:22326 Sail.Values <> regval_of proj +binder 22195:22195 <> s:210 +R22203:22204 riscv_types <> x3 proj +R22200:22200 riscv_types <> s:210 var +binder 22228:22228 <> v:211 +binder 22230:22230 <> s:212 +R22236:22238 riscv_types <> :::'{['_x_'with'_'x3'_':='_x_']}' not +R22240:22251 riscv_types <> :::'{['_x_'with'_'x3'_':='_x_']}' not +R22253:22255 riscv_types <> :::'{['_x_'with'_'x3'_':='_x_']}' not +R22239:22239 riscv_types <> s:212 var +R22252:22252 riscv_types <> v:211 var +binder 22280:22280 <> v:213 +R22285:22310 riscv_types <> bitvector_64_dec_of_regval def +R22312:22312 riscv_types <> v:213 var +binder 22336:22336 <> v:214 +R22341:22366 riscv_types <> regval_of_bitvector_64_dec def +R22368:22368 riscv_types <> v:214 var +def 22387:22392 <> x2_ref +R22402:22405 Sail.Values <> name proj +R22402:22405 Sail.Values <> name proj +R22418:22426 Sail.Values <> read_from proj +R22452:22459 Sail.Values <> write_to proj +R22503:22511 Sail.Values <> of_regval proj +R22559:22567 Sail.Values <> regval_of proj +binder 22436:22436 <> s:215 +R22444:22445 riscv_types <> x2 proj +R22441:22441 riscv_types <> s:215 var +binder 22469:22469 <> v:216 +binder 22471:22471 <> s:217 +R22477:22479 riscv_types <> :::'{['_x_'with'_'x2'_':='_x_']}' not +R22481:22492 riscv_types <> :::'{['_x_'with'_'x2'_':='_x_']}' not +R22494:22496 riscv_types <> :::'{['_x_'with'_'x2'_':='_x_']}' not +R22480:22480 riscv_types <> s:217 var +R22493:22493 riscv_types <> v:216 var +binder 22521:22521 <> v:218 +R22526:22551 riscv_types <> bitvector_64_dec_of_regval def +R22553:22553 riscv_types <> v:218 var +binder 22577:22577 <> v:219 +R22582:22607 riscv_types <> regval_of_bitvector_64_dec def +R22609:22609 riscv_types <> v:219 var +def 22628:22633 <> x1_ref +R22643:22646 Sail.Values <> name proj +R22643:22646 Sail.Values <> name proj +R22659:22667 Sail.Values <> read_from proj +R22693:22700 Sail.Values <> write_to proj +R22744:22752 Sail.Values <> of_regval proj +R22800:22808 Sail.Values <> regval_of proj +binder 22677:22677 <> s:220 +R22685:22686 riscv_types <> x1 proj +R22682:22682 riscv_types <> s:220 var +binder 22710:22710 <> v:221 +binder 22712:22712 <> s:222 +R22718:22720 riscv_types <> :::'{['_x_'with'_'x1'_':='_x_']}' not +R22722:22733 riscv_types <> :::'{['_x_'with'_'x1'_':='_x_']}' not +R22735:22737 riscv_types <> :::'{['_x_'with'_'x1'_':='_x_']}' not +R22721:22721 riscv_types <> s:222 var +R22734:22734 riscv_types <> v:221 var +binder 22762:22762 <> v:223 +R22767:22792 riscv_types <> bitvector_64_dec_of_regval def +R22794:22794 riscv_types <> v:223 var +binder 22818:22818 <> v:224 +R22823:22848 riscv_types <> regval_of_bitvector_64_dec def +R22850:22850 riscv_types <> v:224 var +def 22869:22880 <> instbits_ref +R22890:22893 Sail.Values <> name proj +R22890:22893 Sail.Values <> name proj +R22912:22920 Sail.Values <> read_from proj +R22952:22959 Sail.Values <> write_to proj +R23009:23017 Sail.Values <> of_regval proj +R23065:23073 Sail.Values <> regval_of proj +binder 22930:22930 <> s:225 +R22938:22945 riscv_types <> instbits proj +R22935:22935 riscv_types <> s:225 var +binder 22969:22969 <> v:226 +binder 22971:22971 <> s:227 +R22977:22979 riscv_types <> :::'{['_x_'with'_'instbits'_':='_x_']}' not +R22981:22998 riscv_types <> :::'{['_x_'with'_'instbits'_':='_x_']}' not +R23000:23002 riscv_types <> :::'{['_x_'with'_'instbits'_':='_x_']}' not +R22980:22980 riscv_types <> s:227 var +R22999:22999 riscv_types <> v:226 var +binder 23027:23027 <> v:228 +R23032:23057 riscv_types <> bitvector_64_dec_of_regval def +R23059:23059 riscv_types <> v:228 var +binder 23083:23083 <> v:229 +R23088:23113 riscv_types <> regval_of_bitvector_64_dec def +R23115:23115 riscv_types <> v:229 var +def 23134:23143 <> nextPC_ref +R23153:23156 Sail.Values <> name proj +R23153:23156 Sail.Values <> name proj +R23173:23181 Sail.Values <> read_from proj +R23211:23218 Sail.Values <> write_to proj +R23266:23274 Sail.Values <> of_regval proj +R23322:23330 Sail.Values <> regval_of proj +binder 23191:23191 <> s:230 +R23199:23204 riscv_types <> nextPC proj +R23196:23196 riscv_types <> s:230 var +binder 23228:23228 <> v:231 +binder 23230:23230 <> s:232 +R23236:23238 riscv_types <> :::'{['_x_'with'_'nextPC'_':='_x_']}' not +R23240:23255 riscv_types <> :::'{['_x_'with'_'nextPC'_':='_x_']}' not +R23257:23259 riscv_types <> :::'{['_x_'with'_'nextPC'_':='_x_']}' not +R23239:23239 riscv_types <> s:232 var +R23256:23256 riscv_types <> v:231 var +binder 23284:23284 <> v:233 +R23289:23314 riscv_types <> bitvector_64_dec_of_regval def +R23316:23316 riscv_types <> v:233 var +binder 23340:23340 <> v:234 +R23345:23370 riscv_types <> regval_of_bitvector_64_dec def +R23372:23372 riscv_types <> v:234 var +def 23391:23396 <> PC_ref +R23406:23409 Sail.Values <> name proj +R23406:23409 Sail.Values <> name proj +R23422:23430 Sail.Values <> read_from proj +R23456:23463 Sail.Values <> write_to proj +R23507:23515 Sail.Values <> of_regval proj +R23563:23571 Sail.Values <> regval_of proj +binder 23440:23440 <> s:235 +R23448:23449 riscv_types <> PC proj +R23445:23445 riscv_types <> s:235 var +binder 23473:23473 <> v:236 +binder 23475:23475 <> s:237 +R23481:23483 riscv_types <> :::'{['_x_'with'_'PC'_':='_x_']}' not +R23485:23496 riscv_types <> :::'{['_x_'with'_'PC'_':='_x_']}' not +R23498:23500 riscv_types <> :::'{['_x_'with'_'PC'_':='_x_']}' not +R23484:23484 riscv_types <> s:237 var +R23497:23497 riscv_types <> v:236 var +binder 23525:23525 <> v:238 +R23530:23555 riscv_types <> bitvector_64_dec_of_regval def +R23557:23557 riscv_types <> v:238 var +binder 23581:23581 <> v:239 +R23586:23611 riscv_types <> regval_of_bitvector_64_dec def +R23613:23613 riscv_types <> v:239 var +def 23657:23666 <> get_regval +R23680:23685 Coq.Strings.String <> string ind +binder 23669:23676 <> reg_name:240 +R23693:23700 riscv_types <> regstate rec +binder 23689:23689 <> s:241 +R23705:23710 Coq.Init.Datatypes <> option ind +R23712:23725 riscv_types <> register_value ind +R23735:23744 Coq.Strings.String <> string_dec def +R23746:23753 riscv_types <> reg_name:240 var +R23827:23836 Coq.Strings.String <> string_dec def +R23838:23845 riscv_types <> reg_name:240 var +R23919:23928 Coq.Strings.String <> string_dec def +R23930:23937 riscv_types <> reg_name:240 var +R24011:24020 Coq.Strings.String <> string_dec def +R24022:24029 riscv_types <> reg_name:240 var +R24103:24112 Coq.Strings.String <> string_dec def +R24114:24121 riscv_types <> reg_name:240 var +R24195:24204 Coq.Strings.String <> string_dec def +R24206:24213 riscv_types <> reg_name:240 var +R24287:24296 Coq.Strings.String <> string_dec def +R24298:24305 riscv_types <> reg_name:240 var +R24379:24388 Coq.Strings.String <> string_dec def +R24390:24397 riscv_types <> reg_name:240 var +R24471:24480 Coq.Strings.String <> string_dec def +R24482:24489 riscv_types <> reg_name:240 var +R24563:24572 Coq.Strings.String <> string_dec def +R24574:24581 riscv_types <> reg_name:240 var +R24655:24664 Coq.Strings.String <> string_dec def +R24666:24673 riscv_types <> reg_name:240 var +R24747:24756 Coq.Strings.String <> string_dec def +R24758:24765 riscv_types <> reg_name:240 var +R24839:24848 Coq.Strings.String <> string_dec def +R24850:24857 riscv_types <> reg_name:240 var +R24931:24940 Coq.Strings.String <> string_dec def +R24942:24949 riscv_types <> reg_name:240 var +R25023:25032 Coq.Strings.String <> string_dec def +R25034:25041 riscv_types <> reg_name:240 var +R25115:25124 Coq.Strings.String <> string_dec def +R25126:25133 riscv_types <> reg_name:240 var +R25207:25216 Coq.Strings.String <> string_dec def +R25218:25225 riscv_types <> reg_name:240 var +R25299:25308 Coq.Strings.String <> string_dec def +R25310:25317 riscv_types <> reg_name:240 var +R25391:25400 Coq.Strings.String <> string_dec def +R25402:25409 riscv_types <> reg_name:240 var +R25483:25492 Coq.Strings.String <> string_dec def +R25494:25501 riscv_types <> reg_name:240 var +R25575:25584 Coq.Strings.String <> string_dec def +R25586:25593 riscv_types <> reg_name:240 var +R25667:25676 Coq.Strings.String <> string_dec def +R25678:25685 riscv_types <> reg_name:240 var +R25759:25768 Coq.Strings.String <> string_dec def +R25770:25777 riscv_types <> reg_name:240 var +R25848:25857 Coq.Strings.String <> string_dec def +R25859:25866 riscv_types <> reg_name:240 var +R25937:25946 Coq.Strings.String <> string_dec def +R25948:25955 riscv_types <> reg_name:240 var +R26026:26035 Coq.Strings.String <> string_dec def +R26037:26044 riscv_types <> reg_name:240 var +R26115:26124 Coq.Strings.String <> string_dec def +R26126:26133 riscv_types <> reg_name:240 var +R26204:26213 Coq.Strings.String <> string_dec def +R26215:26222 riscv_types <> reg_name:240 var +R26293:26302 Coq.Strings.String <> string_dec def +R26304:26311 riscv_types <> reg_name:240 var +R26382:26391 Coq.Strings.String <> string_dec def +R26393:26400 riscv_types <> reg_name:240 var +R26471:26480 Coq.Strings.String <> string_dec def +R26482:26489 riscv_types <> reg_name:240 var +R26560:26569 Coq.Strings.String <> string_dec def +R26571:26578 riscv_types <> reg_name:240 var +R26667:26676 Coq.Strings.String <> string_dec def +R26678:26685 riscv_types <> reg_name:240 var +R26768:26777 Coq.Strings.String <> string_dec def +R26779:26786 riscv_types <> reg_name:240 var +R26854:26857 Coq.Init.Datatypes <> None constr +R26798:26801 Coq.Init.Datatypes <> Some constr +R26812:26820 Sail.Values <> regval_of proj +R26832:26840 Sail.Values <> read_from proj +R26843:26843 riscv_types <> s:241 var +R26824:26829 riscv_types <> PC_ref def +R26804:26809 riscv_types <> PC_ref def +R26701:26704 Coq.Init.Datatypes <> Some constr +R26719:26727 Sail.Values <> regval_of proj +R26743:26751 Sail.Values <> read_from proj +R26754:26754 riscv_types <> s:241 var +R26731:26740 riscv_types <> nextPC_ref def +R26707:26716 riscv_types <> nextPC_ref def +R26596:26599 Coq.Init.Datatypes <> Some constr +R26616:26624 Sail.Values <> regval_of proj +R26642:26650 Sail.Values <> read_from proj +R26653:26653 riscv_types <> s:241 var +R26628:26639 riscv_types <> instbits_ref def +R26602:26613 riscv_types <> instbits_ref def +R26501:26504 Coq.Init.Datatypes <> Some constr +R26515:26523 Sail.Values <> regval_of proj +R26535:26543 Sail.Values <> read_from proj +R26546:26546 riscv_types <> s:241 var +R26527:26532 riscv_types <> x1_ref def +R26507:26512 riscv_types <> x1_ref def +R26412:26415 Coq.Init.Datatypes <> Some constr +R26426:26434 Sail.Values <> regval_of proj +R26446:26454 Sail.Values <> read_from proj +R26457:26457 riscv_types <> s:241 var +R26438:26443 riscv_types <> x2_ref def +R26418:26423 riscv_types <> x2_ref def +R26323:26326 Coq.Init.Datatypes <> Some constr +R26337:26345 Sail.Values <> regval_of proj +R26357:26365 Sail.Values <> read_from proj +R26368:26368 riscv_types <> s:241 var +R26349:26354 riscv_types <> x3_ref def +R26329:26334 riscv_types <> x3_ref def +R26234:26237 Coq.Init.Datatypes <> Some constr +R26248:26256 Sail.Values <> regval_of proj +R26268:26276 Sail.Values <> read_from proj +R26279:26279 riscv_types <> s:241 var +R26260:26265 riscv_types <> x4_ref def +R26240:26245 riscv_types <> x4_ref def +R26145:26148 Coq.Init.Datatypes <> Some constr +R26159:26167 Sail.Values <> regval_of proj +R26179:26187 Sail.Values <> read_from proj +R26190:26190 riscv_types <> s:241 var +R26171:26176 riscv_types <> x5_ref def +R26151:26156 riscv_types <> x5_ref def +R26056:26059 Coq.Init.Datatypes <> Some constr +R26070:26078 Sail.Values <> regval_of proj +R26090:26098 Sail.Values <> read_from proj +R26101:26101 riscv_types <> s:241 var +R26082:26087 riscv_types <> x6_ref def +R26062:26067 riscv_types <> x6_ref def +R25967:25970 Coq.Init.Datatypes <> Some constr +R25981:25989 Sail.Values <> regval_of proj +R26001:26009 Sail.Values <> read_from proj +R26012:26012 riscv_types <> s:241 var +R25993:25998 riscv_types <> x7_ref def +R25973:25978 riscv_types <> x7_ref def +R25878:25881 Coq.Init.Datatypes <> Some constr +R25892:25900 Sail.Values <> regval_of proj +R25912:25920 Sail.Values <> read_from proj +R25923:25923 riscv_types <> s:241 var +R25904:25909 riscv_types <> x8_ref def +R25884:25889 riscv_types <> x8_ref def +R25789:25792 Coq.Init.Datatypes <> Some constr +R25803:25811 Sail.Values <> regval_of proj +R25823:25831 Sail.Values <> read_from proj +R25834:25834 riscv_types <> s:241 var +R25815:25820 riscv_types <> x9_ref def +R25795:25800 riscv_types <> x9_ref def +R25698:25701 Coq.Init.Datatypes <> Some constr +R25713:25721 Sail.Values <> regval_of proj +R25734:25742 Sail.Values <> read_from proj +R25745:25745 riscv_types <> s:241 var +R25725:25731 riscv_types <> x10_ref def +R25704:25710 riscv_types <> x10_ref def +R25606:25609 Coq.Init.Datatypes <> Some constr +R25621:25629 Sail.Values <> regval_of proj +R25642:25650 Sail.Values <> read_from proj +R25653:25653 riscv_types <> s:241 var +R25633:25639 riscv_types <> x11_ref def +R25612:25618 riscv_types <> x11_ref def +R25514:25517 Coq.Init.Datatypes <> Some constr +R25529:25537 Sail.Values <> regval_of proj +R25550:25558 Sail.Values <> read_from proj +R25561:25561 riscv_types <> s:241 var +R25541:25547 riscv_types <> x12_ref def +R25520:25526 riscv_types <> x12_ref def +R25422:25425 Coq.Init.Datatypes <> Some constr +R25437:25445 Sail.Values <> regval_of proj +R25458:25466 Sail.Values <> read_from proj +R25469:25469 riscv_types <> s:241 var +R25449:25455 riscv_types <> x13_ref def +R25428:25434 riscv_types <> x13_ref def +R25330:25333 Coq.Init.Datatypes <> Some constr +R25345:25353 Sail.Values <> regval_of proj +R25366:25374 Sail.Values <> read_from proj +R25377:25377 riscv_types <> s:241 var +R25357:25363 riscv_types <> x14_ref def +R25336:25342 riscv_types <> x14_ref def +R25238:25241 Coq.Init.Datatypes <> Some constr +R25253:25261 Sail.Values <> regval_of proj +R25274:25282 Sail.Values <> read_from proj +R25285:25285 riscv_types <> s:241 var +R25265:25271 riscv_types <> x15_ref def +R25244:25250 riscv_types <> x15_ref def +R25146:25149 Coq.Init.Datatypes <> Some constr +R25161:25169 Sail.Values <> regval_of proj +R25182:25190 Sail.Values <> read_from proj +R25193:25193 riscv_types <> s:241 var +R25173:25179 riscv_types <> x16_ref def +R25152:25158 riscv_types <> x16_ref def +R25054:25057 Coq.Init.Datatypes <> Some constr +R25069:25077 Sail.Values <> regval_of proj +R25090:25098 Sail.Values <> read_from proj +R25101:25101 riscv_types <> s:241 var +R25081:25087 riscv_types <> x17_ref def +R25060:25066 riscv_types <> x17_ref def +R24962:24965 Coq.Init.Datatypes <> Some constr +R24977:24985 Sail.Values <> regval_of proj +R24998:25006 Sail.Values <> read_from proj +R25009:25009 riscv_types <> s:241 var +R24989:24995 riscv_types <> x18_ref def +R24968:24974 riscv_types <> x18_ref def +R24870:24873 Coq.Init.Datatypes <> Some constr +R24885:24893 Sail.Values <> regval_of proj +R24906:24914 Sail.Values <> read_from proj +R24917:24917 riscv_types <> s:241 var +R24897:24903 riscv_types <> x19_ref def +R24876:24882 riscv_types <> x19_ref def +R24778:24781 Coq.Init.Datatypes <> Some constr +R24793:24801 Sail.Values <> regval_of proj +R24814:24822 Sail.Values <> read_from proj +R24825:24825 riscv_types <> s:241 var +R24805:24811 riscv_types <> x20_ref def +R24784:24790 riscv_types <> x20_ref def +R24686:24689 Coq.Init.Datatypes <> Some constr +R24701:24709 Sail.Values <> regval_of proj +R24722:24730 Sail.Values <> read_from proj +R24733:24733 riscv_types <> s:241 var +R24713:24719 riscv_types <> x21_ref def +R24692:24698 riscv_types <> x21_ref def +R24594:24597 Coq.Init.Datatypes <> Some constr +R24609:24617 Sail.Values <> regval_of proj +R24630:24638 Sail.Values <> read_from proj +R24641:24641 riscv_types <> s:241 var +R24621:24627 riscv_types <> x22_ref def +R24600:24606 riscv_types <> x22_ref def +R24502:24505 Coq.Init.Datatypes <> Some constr +R24517:24525 Sail.Values <> regval_of proj +R24538:24546 Sail.Values <> read_from proj +R24549:24549 riscv_types <> s:241 var +R24529:24535 riscv_types <> x23_ref def +R24508:24514 riscv_types <> x23_ref def +R24410:24413 Coq.Init.Datatypes <> Some constr +R24425:24433 Sail.Values <> regval_of proj +R24446:24454 Sail.Values <> read_from proj +R24457:24457 riscv_types <> s:241 var +R24437:24443 riscv_types <> x24_ref def +R24416:24422 riscv_types <> x24_ref def +R24318:24321 Coq.Init.Datatypes <> Some constr +R24333:24341 Sail.Values <> regval_of proj +R24354:24362 Sail.Values <> read_from proj +R24365:24365 riscv_types <> s:241 var +R24345:24351 riscv_types <> x25_ref def +R24324:24330 riscv_types <> x25_ref def +R24226:24229 Coq.Init.Datatypes <> Some constr +R24241:24249 Sail.Values <> regval_of proj +R24262:24270 Sail.Values <> read_from proj +R24273:24273 riscv_types <> s:241 var +R24253:24259 riscv_types <> x26_ref def +R24232:24238 riscv_types <> x26_ref def +R24134:24137 Coq.Init.Datatypes <> Some constr +R24149:24157 Sail.Values <> regval_of proj +R24170:24178 Sail.Values <> read_from proj +R24181:24181 riscv_types <> s:241 var +R24161:24167 riscv_types <> x27_ref def +R24140:24146 riscv_types <> x27_ref def +R24042:24045 Coq.Init.Datatypes <> Some constr +R24057:24065 Sail.Values <> regval_of proj +R24078:24086 Sail.Values <> read_from proj +R24089:24089 riscv_types <> s:241 var +R24069:24075 riscv_types <> x28_ref def +R24048:24054 riscv_types <> x28_ref def +R23950:23953 Coq.Init.Datatypes <> Some constr +R23965:23973 Sail.Values <> regval_of proj +R23986:23994 Sail.Values <> read_from proj +R23997:23997 riscv_types <> s:241 var +R23977:23983 riscv_types <> x29_ref def +R23956:23962 riscv_types <> x29_ref def +R23858:23861 Coq.Init.Datatypes <> Some constr +R23873:23881 Sail.Values <> regval_of proj +R23894:23902 Sail.Values <> read_from proj +R23905:23905 riscv_types <> s:241 var +R23885:23891 riscv_types <> x30_ref def +R23864:23870 riscv_types <> x30_ref def +R23766:23769 Coq.Init.Datatypes <> Some constr +R23781:23789 Sail.Values <> regval_of proj +R23802:23810 Sail.Values <> read_from proj +R23813:23813 riscv_types <> s:241 var +R23793:23799 riscv_types <> x31_ref def +R23772:23778 riscv_types <> x31_ref def +def 26872:26881 <> set_regval +R26895:26900 Coq.Strings.String <> string ind +binder 26884:26891 <> reg_name:242 +R26908:26921 riscv_types <> register_value ind +binder 26904:26904 <> v:243 +R26929:26936 riscv_types <> regstate rec +binder 26925:26925 <> s:244 +R26941:26946 Coq.Init.Datatypes <> option ind +R26948:26955 riscv_types <> regstate rec +R26965:26974 Coq.Strings.String <> string_dec def +R26976:26983 riscv_types <> reg_name:242 var +R27075:27084 Coq.Strings.String <> string_dec def +R27086:27093 riscv_types <> reg_name:242 var +R27185:27194 Coq.Strings.String <> string_dec def +R27196:27203 riscv_types <> reg_name:242 var +R27295:27304 Coq.Strings.String <> string_dec def +R27306:27313 riscv_types <> reg_name:242 var +R27405:27414 Coq.Strings.String <> string_dec def +R27416:27423 riscv_types <> reg_name:242 var +R27515:27524 Coq.Strings.String <> string_dec def +R27526:27533 riscv_types <> reg_name:242 var +R27625:27634 Coq.Strings.String <> string_dec def +R27636:27643 riscv_types <> reg_name:242 var +R27735:27744 Coq.Strings.String <> string_dec def +R27746:27753 riscv_types <> reg_name:242 var +R27845:27854 Coq.Strings.String <> string_dec def +R27856:27863 riscv_types <> reg_name:242 var +R27955:27964 Coq.Strings.String <> string_dec def +R27966:27973 riscv_types <> reg_name:242 var +R28065:28074 Coq.Strings.String <> string_dec def +R28076:28083 riscv_types <> reg_name:242 var +R28175:28184 Coq.Strings.String <> string_dec def +R28186:28193 riscv_types <> reg_name:242 var +R28285:28294 Coq.Strings.String <> string_dec def +R28296:28303 riscv_types <> reg_name:242 var +R28395:28404 Coq.Strings.String <> string_dec def +R28406:28413 riscv_types <> reg_name:242 var +R28505:28514 Coq.Strings.String <> string_dec def +R28516:28523 riscv_types <> reg_name:242 var +R28615:28624 Coq.Strings.String <> string_dec def +R28626:28633 riscv_types <> reg_name:242 var +R28725:28734 Coq.Strings.String <> string_dec def +R28736:28743 riscv_types <> reg_name:242 var +R28835:28844 Coq.Strings.String <> string_dec def +R28846:28853 riscv_types <> reg_name:242 var +R28945:28954 Coq.Strings.String <> string_dec def +R28956:28963 riscv_types <> reg_name:242 var +R29055:29064 Coq.Strings.String <> string_dec def +R29066:29073 riscv_types <> reg_name:242 var +R29165:29174 Coq.Strings.String <> string_dec def +R29176:29183 riscv_types <> reg_name:242 var +R29275:29284 Coq.Strings.String <> string_dec def +R29286:29293 riscv_types <> reg_name:242 var +R29385:29394 Coq.Strings.String <> string_dec def +R29396:29403 riscv_types <> reg_name:242 var +R29492:29501 Coq.Strings.String <> string_dec def +R29503:29510 riscv_types <> reg_name:242 var +R29599:29608 Coq.Strings.String <> string_dec def +R29610:29617 riscv_types <> reg_name:242 var +R29706:29715 Coq.Strings.String <> string_dec def +R29717:29724 riscv_types <> reg_name:242 var +R29813:29822 Coq.Strings.String <> string_dec def +R29824:29831 riscv_types <> reg_name:242 var +R29920:29929 Coq.Strings.String <> string_dec def +R29931:29938 riscv_types <> reg_name:242 var +R30027:30036 Coq.Strings.String <> string_dec def +R30038:30045 riscv_types <> reg_name:242 var +R30134:30143 Coq.Strings.String <> string_dec def +R30145:30152 riscv_types <> reg_name:242 var +R30241:30250 Coq.Strings.String <> string_dec def +R30252:30259 riscv_types <> reg_name:242 var +R30348:30357 Coq.Strings.String <> string_dec def +R30359:30366 riscv_types <> reg_name:242 var +R30473:30482 Coq.Strings.String <> string_dec def +R30484:30491 riscv_types <> reg_name:242 var +R30592:30601 Coq.Strings.String <> string_dec def +R30603:30610 riscv_types <> reg_name:242 var +R30696:30699 Coq.Init.Datatypes <> None constr +R30622:30631 Coq.Init.Datatypes <> option_map def +R30675:30683 Sail.Values <> of_regval proj +R30686:30686 riscv_types <> v:243 var +R30667:30672 riscv_types <> PC_ref def +binder 30638:30638 <> v:245 +R30651:30658 Sail.Values <> write_to proj +R30663:30663 riscv_types <> s:244 var +R30661:30661 riscv_types <> v:245 var +R30643:30648 riscv_types <> PC_ref def +R30507:30516 Coq.Init.Datatypes <> option_map def +R30568:30576 Sail.Values <> of_regval proj +R30579:30579 riscv_types <> v:243 var +R30556:30565 riscv_types <> nextPC_ref def +binder 30523:30523 <> v:246 +R30540:30547 Sail.Values <> write_to proj +R30552:30552 riscv_types <> s:244 var +R30550:30550 riscv_types <> v:246 var +R30528:30537 riscv_types <> nextPC_ref def +R30384:30393 Coq.Init.Datatypes <> option_map def +R30449:30457 Sail.Values <> of_regval proj +R30460:30460 riscv_types <> v:243 var +R30435:30446 riscv_types <> instbits_ref def +binder 30400:30400 <> v:247 +R30419:30426 Sail.Values <> write_to proj +R30431:30431 riscv_types <> s:244 var +R30429:30429 riscv_types <> v:247 var +R30405:30416 riscv_types <> instbits_ref def +R30271:30280 Coq.Init.Datatypes <> option_map def +R30324:30332 Sail.Values <> of_regval proj +R30335:30335 riscv_types <> v:243 var +R30316:30321 riscv_types <> x1_ref def +binder 30287:30287 <> v:248 +R30300:30307 Sail.Values <> write_to proj +R30312:30312 riscv_types <> s:244 var +R30310:30310 riscv_types <> v:248 var +R30292:30297 riscv_types <> x1_ref def +R30164:30173 Coq.Init.Datatypes <> option_map def +R30217:30225 Sail.Values <> of_regval proj +R30228:30228 riscv_types <> v:243 var +R30209:30214 riscv_types <> x2_ref def +binder 30180:30180 <> v:249 +R30193:30200 Sail.Values <> write_to proj +R30205:30205 riscv_types <> s:244 var +R30203:30203 riscv_types <> v:249 var +R30185:30190 riscv_types <> x2_ref def +R30057:30066 Coq.Init.Datatypes <> option_map def +R30110:30118 Sail.Values <> of_regval proj +R30121:30121 riscv_types <> v:243 var +R30102:30107 riscv_types <> x3_ref def +binder 30073:30073 <> v:250 +R30086:30093 Sail.Values <> write_to proj +R30098:30098 riscv_types <> s:244 var +R30096:30096 riscv_types <> v:250 var +R30078:30083 riscv_types <> x3_ref def +R29950:29959 Coq.Init.Datatypes <> option_map def +R30003:30011 Sail.Values <> of_regval proj +R30014:30014 riscv_types <> v:243 var +R29995:30000 riscv_types <> x4_ref def +binder 29966:29966 <> v:251 +R29979:29986 Sail.Values <> write_to proj +R29991:29991 riscv_types <> s:244 var +R29989:29989 riscv_types <> v:251 var +R29971:29976 riscv_types <> x4_ref def +R29843:29852 Coq.Init.Datatypes <> option_map def +R29896:29904 Sail.Values <> of_regval proj +R29907:29907 riscv_types <> v:243 var +R29888:29893 riscv_types <> x5_ref def +binder 29859:29859 <> v:252 +R29872:29879 Sail.Values <> write_to proj +R29884:29884 riscv_types <> s:244 var +R29882:29882 riscv_types <> v:252 var +R29864:29869 riscv_types <> x5_ref def +R29736:29745 Coq.Init.Datatypes <> option_map def +R29789:29797 Sail.Values <> of_regval proj +R29800:29800 riscv_types <> v:243 var +R29781:29786 riscv_types <> x6_ref def +binder 29752:29752 <> v:253 +R29765:29772 Sail.Values <> write_to proj +R29777:29777 riscv_types <> s:244 var +R29775:29775 riscv_types <> v:253 var +R29757:29762 riscv_types <> x6_ref def +R29629:29638 Coq.Init.Datatypes <> option_map def +R29682:29690 Sail.Values <> of_regval proj +R29693:29693 riscv_types <> v:243 var +R29674:29679 riscv_types <> x7_ref def +binder 29645:29645 <> v:254 +R29658:29665 Sail.Values <> write_to proj +R29670:29670 riscv_types <> s:244 var +R29668:29668 riscv_types <> v:254 var +R29650:29655 riscv_types <> x7_ref def +R29522:29531 Coq.Init.Datatypes <> option_map def +R29575:29583 Sail.Values <> of_regval proj +R29586:29586 riscv_types <> v:243 var +R29567:29572 riscv_types <> x8_ref def +binder 29538:29538 <> v:255 +R29551:29558 Sail.Values <> write_to proj +R29563:29563 riscv_types <> s:244 var +R29561:29561 riscv_types <> v:255 var +R29543:29548 riscv_types <> x8_ref def +R29415:29424 Coq.Init.Datatypes <> option_map def +R29468:29476 Sail.Values <> of_regval proj +R29479:29479 riscv_types <> v:243 var +R29460:29465 riscv_types <> x9_ref def +binder 29431:29431 <> v:256 +R29444:29451 Sail.Values <> write_to proj +R29456:29456 riscv_types <> s:244 var +R29454:29454 riscv_types <> v:256 var +R29436:29441 riscv_types <> x9_ref def +R29306:29315 Coq.Init.Datatypes <> option_map def +R29361:29369 Sail.Values <> of_regval proj +R29372:29372 riscv_types <> v:243 var +R29352:29358 riscv_types <> x10_ref def +binder 29322:29322 <> v:257 +R29336:29343 Sail.Values <> write_to proj +R29348:29348 riscv_types <> s:244 var +R29346:29346 riscv_types <> v:257 var +R29327:29333 riscv_types <> x10_ref def +R29196:29205 Coq.Init.Datatypes <> option_map def +R29251:29259 Sail.Values <> of_regval proj +R29262:29262 riscv_types <> v:243 var +R29242:29248 riscv_types <> x11_ref def +binder 29212:29212 <> v:258 +R29226:29233 Sail.Values <> write_to proj +R29238:29238 riscv_types <> s:244 var +R29236:29236 riscv_types <> v:258 var +R29217:29223 riscv_types <> x11_ref def +R29086:29095 Coq.Init.Datatypes <> option_map def +R29141:29149 Sail.Values <> of_regval proj +R29152:29152 riscv_types <> v:243 var +R29132:29138 riscv_types <> x12_ref def +binder 29102:29102 <> v:259 +R29116:29123 Sail.Values <> write_to proj +R29128:29128 riscv_types <> s:244 var +R29126:29126 riscv_types <> v:259 var +R29107:29113 riscv_types <> x12_ref def +R28976:28985 Coq.Init.Datatypes <> option_map def +R29031:29039 Sail.Values <> of_regval proj +R29042:29042 riscv_types <> v:243 var +R29022:29028 riscv_types <> x13_ref def +binder 28992:28992 <> v:260 +R29006:29013 Sail.Values <> write_to proj +R29018:29018 riscv_types <> s:244 var +R29016:29016 riscv_types <> v:260 var +R28997:29003 riscv_types <> x13_ref def +R28866:28875 Coq.Init.Datatypes <> option_map def +R28921:28929 Sail.Values <> of_regval proj +R28932:28932 riscv_types <> v:243 var +R28912:28918 riscv_types <> x14_ref def +binder 28882:28882 <> v:261 +R28896:28903 Sail.Values <> write_to proj +R28908:28908 riscv_types <> s:244 var +R28906:28906 riscv_types <> v:261 var +R28887:28893 riscv_types <> x14_ref def +R28756:28765 Coq.Init.Datatypes <> option_map def +R28811:28819 Sail.Values <> of_regval proj +R28822:28822 riscv_types <> v:243 var +R28802:28808 riscv_types <> x15_ref def +binder 28772:28772 <> v:262 +R28786:28793 Sail.Values <> write_to proj +R28798:28798 riscv_types <> s:244 var +R28796:28796 riscv_types <> v:262 var +R28777:28783 riscv_types <> x15_ref def +R28646:28655 Coq.Init.Datatypes <> option_map def +R28701:28709 Sail.Values <> of_regval proj +R28712:28712 riscv_types <> v:243 var +R28692:28698 riscv_types <> x16_ref def +binder 28662:28662 <> v:263 +R28676:28683 Sail.Values <> write_to proj +R28688:28688 riscv_types <> s:244 var +R28686:28686 riscv_types <> v:263 var +R28667:28673 riscv_types <> x16_ref def +R28536:28545 Coq.Init.Datatypes <> option_map def +R28591:28599 Sail.Values <> of_regval proj +R28602:28602 riscv_types <> v:243 var +R28582:28588 riscv_types <> x17_ref def +binder 28552:28552 <> v:264 +R28566:28573 Sail.Values <> write_to proj +R28578:28578 riscv_types <> s:244 var +R28576:28576 riscv_types <> v:264 var +R28557:28563 riscv_types <> x17_ref def +R28426:28435 Coq.Init.Datatypes <> option_map def +R28481:28489 Sail.Values <> of_regval proj +R28492:28492 riscv_types <> v:243 var +R28472:28478 riscv_types <> x18_ref def +binder 28442:28442 <> v:265 +R28456:28463 Sail.Values <> write_to proj +R28468:28468 riscv_types <> s:244 var +R28466:28466 riscv_types <> v:265 var +R28447:28453 riscv_types <> x18_ref def +R28316:28325 Coq.Init.Datatypes <> option_map def +R28371:28379 Sail.Values <> of_regval proj +R28382:28382 riscv_types <> v:243 var +R28362:28368 riscv_types <> x19_ref def +binder 28332:28332 <> v:266 +R28346:28353 Sail.Values <> write_to proj +R28358:28358 riscv_types <> s:244 var +R28356:28356 riscv_types <> v:266 var +R28337:28343 riscv_types <> x19_ref def +R28206:28215 Coq.Init.Datatypes <> option_map def +R28261:28269 Sail.Values <> of_regval proj +R28272:28272 riscv_types <> v:243 var +R28252:28258 riscv_types <> x20_ref def +binder 28222:28222 <> v:267 +R28236:28243 Sail.Values <> write_to proj +R28248:28248 riscv_types <> s:244 var +R28246:28246 riscv_types <> v:267 var +R28227:28233 riscv_types <> x20_ref def +R28096:28105 Coq.Init.Datatypes <> option_map def +R28151:28159 Sail.Values <> of_regval proj +R28162:28162 riscv_types <> v:243 var +R28142:28148 riscv_types <> x21_ref def +binder 28112:28112 <> v:268 +R28126:28133 Sail.Values <> write_to proj +R28138:28138 riscv_types <> s:244 var +R28136:28136 riscv_types <> v:268 var +R28117:28123 riscv_types <> x21_ref def +R27986:27995 Coq.Init.Datatypes <> option_map def +R28041:28049 Sail.Values <> of_regval proj +R28052:28052 riscv_types <> v:243 var +R28032:28038 riscv_types <> x22_ref def +binder 28002:28002 <> v:269 +R28016:28023 Sail.Values <> write_to proj +R28028:28028 riscv_types <> s:244 var +R28026:28026 riscv_types <> v:269 var +R28007:28013 riscv_types <> x22_ref def +R27876:27885 Coq.Init.Datatypes <> option_map def +R27931:27939 Sail.Values <> of_regval proj +R27942:27942 riscv_types <> v:243 var +R27922:27928 riscv_types <> x23_ref def +binder 27892:27892 <> v:270 +R27906:27913 Sail.Values <> write_to proj +R27918:27918 riscv_types <> s:244 var +R27916:27916 riscv_types <> v:270 var +R27897:27903 riscv_types <> x23_ref def +R27766:27775 Coq.Init.Datatypes <> option_map def +R27821:27829 Sail.Values <> of_regval proj +R27832:27832 riscv_types <> v:243 var +R27812:27818 riscv_types <> x24_ref def +binder 27782:27782 <> v:271 +R27796:27803 Sail.Values <> write_to proj +R27808:27808 riscv_types <> s:244 var +R27806:27806 riscv_types <> v:271 var +R27787:27793 riscv_types <> x24_ref def +R27656:27665 Coq.Init.Datatypes <> option_map def +R27711:27719 Sail.Values <> of_regval proj +R27722:27722 riscv_types <> v:243 var +R27702:27708 riscv_types <> x25_ref def +binder 27672:27672 <> v:272 +R27686:27693 Sail.Values <> write_to proj +R27698:27698 riscv_types <> s:244 var +R27696:27696 riscv_types <> v:272 var +R27677:27683 riscv_types <> x25_ref def +R27546:27555 Coq.Init.Datatypes <> option_map def +R27601:27609 Sail.Values <> of_regval proj +R27612:27612 riscv_types <> v:243 var +R27592:27598 riscv_types <> x26_ref def +binder 27562:27562 <> v:273 +R27576:27583 Sail.Values <> write_to proj +R27588:27588 riscv_types <> s:244 var +R27586:27586 riscv_types <> v:273 var +R27567:27573 riscv_types <> x26_ref def +R27436:27445 Coq.Init.Datatypes <> option_map def +R27491:27499 Sail.Values <> of_regval proj +R27502:27502 riscv_types <> v:243 var +R27482:27488 riscv_types <> x27_ref def +binder 27452:27452 <> v:274 +R27466:27473 Sail.Values <> write_to proj +R27478:27478 riscv_types <> s:244 var +R27476:27476 riscv_types <> v:274 var +R27457:27463 riscv_types <> x27_ref def +R27326:27335 Coq.Init.Datatypes <> option_map def +R27381:27389 Sail.Values <> of_regval proj +R27392:27392 riscv_types <> v:243 var +R27372:27378 riscv_types <> x28_ref def +binder 27342:27342 <> v:275 +R27356:27363 Sail.Values <> write_to proj +R27368:27368 riscv_types <> s:244 var +R27366:27366 riscv_types <> v:275 var +R27347:27353 riscv_types <> x28_ref def +R27216:27225 Coq.Init.Datatypes <> option_map def +R27271:27279 Sail.Values <> of_regval proj +R27282:27282 riscv_types <> v:243 var +R27262:27268 riscv_types <> x29_ref def +binder 27232:27232 <> v:276 +R27246:27253 Sail.Values <> write_to proj +R27258:27258 riscv_types <> s:244 var +R27256:27256 riscv_types <> v:276 var +R27237:27243 riscv_types <> x29_ref def +R27106:27115 Coq.Init.Datatypes <> option_map def +R27161:27169 Sail.Values <> of_regval proj +R27172:27172 riscv_types <> v:243 var +R27152:27158 riscv_types <> x30_ref def +binder 27122:27122 <> v:277 +R27136:27143 Sail.Values <> write_to proj +R27148:27148 riscv_types <> s:244 var +R27146:27146 riscv_types <> v:277 var +R27127:27133 riscv_types <> x30_ref def +R26996:27005 Coq.Init.Datatypes <> option_map def +R27051:27059 Sail.Values <> of_regval proj +R27062:27062 riscv_types <> v:243 var +R27042:27048 riscv_types <> x31_ref def +binder 27012:27012 <> v:278 +R27026:27033 Sail.Values <> write_to proj +R27038:27038 riscv_types <> s:244 var +R27036:27036 riscv_types <> v:278 var +R27017:27023 riscv_types <> x31_ref def +def 30714:30731 <> register_accessors +R30736:30736 Coq.Init.Datatypes <> ::core_scope:'('_x_','_x_','_'..'_','_x_')' not +R30747:30748 Coq.Init.Datatypes <> ::core_scope:'('_x_','_x_','_'..'_','_x_')' not +R30759:30759 Coq.Init.Datatypes <> ::core_scope:'('_x_','_x_','_'..'_','_x_')' not +R30737:30746 riscv_types <> get_regval def +R30749:30758 riscv_types <> set_regval def +def 30775:30776 <> MR +binder 30778:30778 <> a:279 +binder 30780:30780 <> r:280 +R30785:30790 Sail.Prompt_monad <> monadR def +R30792:30805 riscv_types <> register_value ind +R30807:30807 riscv_types <> a:279 var +R30809:30809 riscv_types <> r:280 var +R30811:30814 Coq.Init.Datatypes <> unit ind +def 30828:30828 <> M +binder 30830:30830 <> a:281 +R30835:30839 Sail.Prompt_monad <> monad ind +R30841:30854 riscv_types <> register_value ind +R30856:30856 riscv_types <> a:281 var +R30858:30861 Coq.Init.Datatypes <> unit ind diff --git a/build/riscv_types.v b/build/riscv_types.v new file mode 100644 index 0000000..2b32fd2 --- /dev/null +++ b/build/riscv_types.v @@ -0,0 +1,599 @@ +(*Generated by Sail from riscv.*) +Require Import Sail.Base. +Require Import Sail.Real. +Import ListNotations. +Open Scope string. +Open Scope bool. +Open Scope Z. + +Definition bits (n : Z) : Type := mword n. + +Definition xlen : Z := 64. +Hint Unfold xlen : sail. + +Definition xlen_bytes : Z := 8. +Hint Unfold xlen_bytes : sail. + +Definition xlenbits : Type := bits 64. + +Definition regtype : Type := xlenbits. + +Definition regno (n : Z)`{ArithFact ((0 <=? n) && (n <? 32))} : Type := Z. + +Definition regidx : Type := bits 5. + +Definition cregidx : Type := bits 3. + +Definition csreg : Type := bits 12. + +Inductive register_value := + | Regval_vector : list register_value -> register_value + | Regval_list : list register_value -> register_value + | Regval_option : option register_value -> register_value + | Regval_bit : bitU -> register_value + | Regval_bitvector_64_dec : mword 64 -> register_value. + +Arguments register_value : clear implicits. + +Record regstate := + { x31 : mword 64; + x30 : mword 64; + x29 : mword 64; + x28 : mword 64; + x27 : mword 64; + x26 : mword 64; + x25 : mword 64; + x24 : mword 64; + x23 : mword 64; + x22 : mword 64; + x21 : mword 64; + x20 : mword 64; + x19 : mword 64; + x18 : mword 64; + x17 : mword 64; + x16 : mword 64; + x15 : mword 64; + x14 : mword 64; + x13 : mword 64; + x12 : mword 64; + x11 : mword 64; + x10 : mword 64; + x9 : mword 64; + x8 : mword 64; + x7 : mword 64; + x6 : mword 64; + x5 : mword 64; + x4 : mword 64; + x3 : mword 64; + x2 : mword 64; + x1 : mword 64; + instbits : mword 64; + nextPC : mword 64; + PC : mword 64; }. + +Arguments regstate : clear implicits. + +Notation "{[ r 'with' 'x31' := e ]}" := + match r with Build_regstate _ f1 f2 f3 f4 f5 f6 f7 f8 f9 f10 f11 f12 f13 f14 f15 f16 f17 f18 f19 f20 f21 f22 f23 f24 f25 f26 f27 f28 f29 f30 f31 f32 f33 => + Build_regstate e f1 f2 f3 f4 f5 f6 f7 f8 f9 f10 f11 f12 f13 f14 f15 f16 f17 f18 f19 f20 f21 f22 f23 f24 f25 f26 f27 f28 f29 f30 f31 f32 f33 + end. +Notation "{[ r 'with' 'x30' := e ]}" := + match r with Build_regstate f0 _ f2 f3 f4 f5 f6 f7 f8 f9 f10 f11 f12 f13 f14 f15 f16 f17 f18 f19 f20 f21 f22 f23 f24 f25 f26 f27 f28 f29 f30 f31 f32 f33 => + Build_regstate f0 e f2 f3 f4 f5 f6 f7 f8 f9 f10 f11 f12 f13 f14 f15 f16 f17 f18 f19 f20 f21 f22 f23 f24 f25 f26 f27 f28 f29 f30 f31 f32 f33 + end. +Notation "{[ r 'with' 'x29' := e ]}" := + match r with Build_regstate f0 f1 _ f3 f4 f5 f6 f7 f8 f9 f10 f11 f12 f13 f14 f15 f16 f17 f18 f19 f20 f21 f22 f23 f24 f25 f26 f27 f28 f29 f30 f31 f32 f33 => + Build_regstate f0 f1 e f3 f4 f5 f6 f7 f8 f9 f10 f11 f12 f13 f14 f15 f16 f17 f18 f19 f20 f21 f22 f23 f24 f25 f26 f27 f28 f29 f30 f31 f32 f33 + end. +Notation "{[ r 'with' 'x28' := e ]}" := + match r with Build_regstate f0 f1 f2 _ f4 f5 f6 f7 f8 f9 f10 f11 f12 f13 f14 f15 f16 f17 f18 f19 f20 f21 f22 f23 f24 f25 f26 f27 f28 f29 f30 f31 f32 f33 => + Build_regstate f0 f1 f2 e f4 f5 f6 f7 f8 f9 f10 f11 f12 f13 f14 f15 f16 f17 f18 f19 f20 f21 f22 f23 f24 f25 f26 f27 f28 f29 f30 f31 f32 f33 + end. +Notation "{[ r 'with' 'x27' := e ]}" := + match r with Build_regstate f0 f1 f2 f3 _ f5 f6 f7 f8 f9 f10 f11 f12 f13 f14 f15 f16 f17 f18 f19 f20 f21 f22 f23 f24 f25 f26 f27 f28 f29 f30 f31 f32 f33 => + Build_regstate f0 f1 f2 f3 e f5 f6 f7 f8 f9 f10 f11 f12 f13 f14 f15 f16 f17 f18 f19 f20 f21 f22 f23 f24 f25 f26 f27 f28 f29 f30 f31 f32 f33 + end. +Notation "{[ r 'with' 'x26' := e ]}" := + match r with Build_regstate f0 f1 f2 f3 f4 _ f6 f7 f8 f9 f10 f11 f12 f13 f14 f15 f16 f17 f18 f19 f20 f21 f22 f23 f24 f25 f26 f27 f28 f29 f30 f31 f32 f33 => + Build_regstate f0 f1 f2 f3 f4 e f6 f7 f8 f9 f10 f11 f12 f13 f14 f15 f16 f17 f18 f19 f20 f21 f22 f23 f24 f25 f26 f27 f28 f29 f30 f31 f32 f33 + end. +Notation "{[ r 'with' 'x25' := e ]}" := + match r with Build_regstate f0 f1 f2 f3 f4 f5 _ f7 f8 f9 f10 f11 f12 f13 f14 f15 f16 f17 f18 f19 f20 f21 f22 f23 f24 f25 f26 f27 f28 f29 f30 f31 f32 f33 => + Build_regstate f0 f1 f2 f3 f4 f5 e f7 f8 f9 f10 f11 f12 f13 f14 f15 f16 f17 f18 f19 f20 f21 f22 f23 f24 f25 f26 f27 f28 f29 f30 f31 f32 f33 + end. +Notation "{[ r 'with' 'x24' := e ]}" := + match r with Build_regstate f0 f1 f2 f3 f4 f5 f6 _ f8 f9 f10 f11 f12 f13 f14 f15 f16 f17 f18 f19 f20 f21 f22 f23 f24 f25 f26 f27 f28 f29 f30 f31 f32 f33 => + Build_regstate f0 f1 f2 f3 f4 f5 f6 e f8 f9 f10 f11 f12 f13 f14 f15 f16 f17 f18 f19 f20 f21 f22 f23 f24 f25 f26 f27 f28 f29 f30 f31 f32 f33 + end. +Notation "{[ r 'with' 'x23' := e ]}" := + match r with Build_regstate f0 f1 f2 f3 f4 f5 f6 f7 _ f9 f10 f11 f12 f13 f14 f15 f16 f17 f18 f19 f20 f21 f22 f23 f24 f25 f26 f27 f28 f29 f30 f31 f32 f33 => + Build_regstate f0 f1 f2 f3 f4 f5 f6 f7 e f9 f10 f11 f12 f13 f14 f15 f16 f17 f18 f19 f20 f21 f22 f23 f24 f25 f26 f27 f28 f29 f30 f31 f32 f33 + end. +Notation "{[ r 'with' 'x22' := e ]}" := + match r with Build_regstate f0 f1 f2 f3 f4 f5 f6 f7 f8 _ f10 f11 f12 f13 f14 f15 f16 f17 f18 f19 f20 f21 f22 f23 f24 f25 f26 f27 f28 f29 f30 f31 f32 f33 => + Build_regstate f0 f1 f2 f3 f4 f5 f6 f7 f8 e f10 f11 f12 f13 f14 f15 f16 f17 f18 f19 f20 f21 f22 f23 f24 f25 f26 f27 f28 f29 f30 f31 f32 f33 + end. +Notation "{[ r 'with' 'x21' := e ]}" := + match r with Build_regstate f0 f1 f2 f3 f4 f5 f6 f7 f8 f9 _ f11 f12 f13 f14 f15 f16 f17 f18 f19 f20 f21 f22 f23 f24 f25 f26 f27 f28 f29 f30 f31 f32 f33 => + Build_regstate f0 f1 f2 f3 f4 f5 f6 f7 f8 f9 e f11 f12 f13 f14 f15 f16 f17 f18 f19 f20 f21 f22 f23 f24 f25 f26 f27 f28 f29 f30 f31 f32 f33 + end. +Notation "{[ r 'with' 'x20' := e ]}" := + match r with Build_regstate f0 f1 f2 f3 f4 f5 f6 f7 f8 f9 f10 _ f12 f13 f14 f15 f16 f17 f18 f19 f20 f21 f22 f23 f24 f25 f26 f27 f28 f29 f30 f31 f32 f33 => + Build_regstate f0 f1 f2 f3 f4 f5 f6 f7 f8 f9 f10 e f12 f13 f14 f15 f16 f17 f18 f19 f20 f21 f22 f23 f24 f25 f26 f27 f28 f29 f30 f31 f32 f33 + end. +Notation "{[ r 'with' 'x19' := e ]}" := + match r with Build_regstate f0 f1 f2 f3 f4 f5 f6 f7 f8 f9 f10 f11 _ f13 f14 f15 f16 f17 f18 f19 f20 f21 f22 f23 f24 f25 f26 f27 f28 f29 f30 f31 f32 f33 => + Build_regstate f0 f1 f2 f3 f4 f5 f6 f7 f8 f9 f10 f11 e f13 f14 f15 f16 f17 f18 f19 f20 f21 f22 f23 f24 f25 f26 f27 f28 f29 f30 f31 f32 f33 + end. +Notation "{[ r 'with' 'x18' := e ]}" := + match r with Build_regstate f0 f1 f2 f3 f4 f5 f6 f7 f8 f9 f10 f11 f12 _ f14 f15 f16 f17 f18 f19 f20 f21 f22 f23 f24 f25 f26 f27 f28 f29 f30 f31 f32 f33 => + Build_regstate f0 f1 f2 f3 f4 f5 f6 f7 f8 f9 f10 f11 f12 e f14 f15 f16 f17 f18 f19 f20 f21 f22 f23 f24 f25 f26 f27 f28 f29 f30 f31 f32 f33 + end. +Notation "{[ r 'with' 'x17' := e ]}" := + match r with Build_regstate f0 f1 f2 f3 f4 f5 f6 f7 f8 f9 f10 f11 f12 f13 _ f15 f16 f17 f18 f19 f20 f21 f22 f23 f24 f25 f26 f27 f28 f29 f30 f31 f32 f33 => + Build_regstate f0 f1 f2 f3 f4 f5 f6 f7 f8 f9 f10 f11 f12 f13 e f15 f16 f17 f18 f19 f20 f21 f22 f23 f24 f25 f26 f27 f28 f29 f30 f31 f32 f33 + end. +Notation "{[ r 'with' 'x16' := e ]}" := + match r with Build_regstate f0 f1 f2 f3 f4 f5 f6 f7 f8 f9 f10 f11 f12 f13 f14 _ f16 f17 f18 f19 f20 f21 f22 f23 f24 f25 f26 f27 f28 f29 f30 f31 f32 f33 => + Build_regstate f0 f1 f2 f3 f4 f5 f6 f7 f8 f9 f10 f11 f12 f13 f14 e f16 f17 f18 f19 f20 f21 f22 f23 f24 f25 f26 f27 f28 f29 f30 f31 f32 f33 + end. +Notation "{[ r 'with' 'x15' := e ]}" := + match r with Build_regstate f0 f1 f2 f3 f4 f5 f6 f7 f8 f9 f10 f11 f12 f13 f14 f15 _ f17 f18 f19 f20 f21 f22 f23 f24 f25 f26 f27 f28 f29 f30 f31 f32 f33 => + Build_regstate f0 f1 f2 f3 f4 f5 f6 f7 f8 f9 f10 f11 f12 f13 f14 f15 e f17 f18 f19 f20 f21 f22 f23 f24 f25 f26 f27 f28 f29 f30 f31 f32 f33 + end. +Notation "{[ r 'with' 'x14' := e ]}" := + match r with Build_regstate f0 f1 f2 f3 f4 f5 f6 f7 f8 f9 f10 f11 f12 f13 f14 f15 f16 _ f18 f19 f20 f21 f22 f23 f24 f25 f26 f27 f28 f29 f30 f31 f32 f33 => + Build_regstate f0 f1 f2 f3 f4 f5 f6 f7 f8 f9 f10 f11 f12 f13 f14 f15 f16 e f18 f19 f20 f21 f22 f23 f24 f25 f26 f27 f28 f29 f30 f31 f32 f33 + end. +Notation "{[ r 'with' 'x13' := e ]}" := + match r with Build_regstate f0 f1 f2 f3 f4 f5 f6 f7 f8 f9 f10 f11 f12 f13 f14 f15 f16 f17 _ f19 f20 f21 f22 f23 f24 f25 f26 f27 f28 f29 f30 f31 f32 f33 => + Build_regstate f0 f1 f2 f3 f4 f5 f6 f7 f8 f9 f10 f11 f12 f13 f14 f15 f16 f17 e f19 f20 f21 f22 f23 f24 f25 f26 f27 f28 f29 f30 f31 f32 f33 + end. +Notation "{[ r 'with' 'x12' := e ]}" := + match r with Build_regstate f0 f1 f2 f3 f4 f5 f6 f7 f8 f9 f10 f11 f12 f13 f14 f15 f16 f17 f18 _ f20 f21 f22 f23 f24 f25 f26 f27 f28 f29 f30 f31 f32 f33 => + Build_regstate f0 f1 f2 f3 f4 f5 f6 f7 f8 f9 f10 f11 f12 f13 f14 f15 f16 f17 f18 e f20 f21 f22 f23 f24 f25 f26 f27 f28 f29 f30 f31 f32 f33 + end. +Notation "{[ r 'with' 'x11' := e ]}" := + match r with Build_regstate f0 f1 f2 f3 f4 f5 f6 f7 f8 f9 f10 f11 f12 f13 f14 f15 f16 f17 f18 f19 _ f21 f22 f23 f24 f25 f26 f27 f28 f29 f30 f31 f32 f33 => + Build_regstate f0 f1 f2 f3 f4 f5 f6 f7 f8 f9 f10 f11 f12 f13 f14 f15 f16 f17 f18 f19 e f21 f22 f23 f24 f25 f26 f27 f28 f29 f30 f31 f32 f33 + end. +Notation "{[ r 'with' 'x10' := e ]}" := + match r with Build_regstate f0 f1 f2 f3 f4 f5 f6 f7 f8 f9 f10 f11 f12 f13 f14 f15 f16 f17 f18 f19 f20 _ f22 f23 f24 f25 f26 f27 f28 f29 f30 f31 f32 f33 => + Build_regstate f0 f1 f2 f3 f4 f5 f6 f7 f8 f9 f10 f11 f12 f13 f14 f15 f16 f17 f18 f19 f20 e f22 f23 f24 f25 f26 f27 f28 f29 f30 f31 f32 f33 + end. +Notation "{[ r 'with' 'x9' := e ]}" := + match r with Build_regstate f0 f1 f2 f3 f4 f5 f6 f7 f8 f9 f10 f11 f12 f13 f14 f15 f16 f17 f18 f19 f20 f21 _ f23 f24 f25 f26 f27 f28 f29 f30 f31 f32 f33 => + Build_regstate f0 f1 f2 f3 f4 f5 f6 f7 f8 f9 f10 f11 f12 f13 f14 f15 f16 f17 f18 f19 f20 f21 e f23 f24 f25 f26 f27 f28 f29 f30 f31 f32 f33 + end. +Notation "{[ r 'with' 'x8' := e ]}" := + match r with Build_regstate f0 f1 f2 f3 f4 f5 f6 f7 f8 f9 f10 f11 f12 f13 f14 f15 f16 f17 f18 f19 f20 f21 f22 _ f24 f25 f26 f27 f28 f29 f30 f31 f32 f33 => + Build_regstate f0 f1 f2 f3 f4 f5 f6 f7 f8 f9 f10 f11 f12 f13 f14 f15 f16 f17 f18 f19 f20 f21 f22 e f24 f25 f26 f27 f28 f29 f30 f31 f32 f33 + end. +Notation "{[ r 'with' 'x7' := e ]}" := + match r with Build_regstate f0 f1 f2 f3 f4 f5 f6 f7 f8 f9 f10 f11 f12 f13 f14 f15 f16 f17 f18 f19 f20 f21 f22 f23 _ f25 f26 f27 f28 f29 f30 f31 f32 f33 => + Build_regstate f0 f1 f2 f3 f4 f5 f6 f7 f8 f9 f10 f11 f12 f13 f14 f15 f16 f17 f18 f19 f20 f21 f22 f23 e f25 f26 f27 f28 f29 f30 f31 f32 f33 + end. +Notation "{[ r 'with' 'x6' := e ]}" := + match r with Build_regstate f0 f1 f2 f3 f4 f5 f6 f7 f8 f9 f10 f11 f12 f13 f14 f15 f16 f17 f18 f19 f20 f21 f22 f23 f24 _ f26 f27 f28 f29 f30 f31 f32 f33 => + Build_regstate f0 f1 f2 f3 f4 f5 f6 f7 f8 f9 f10 f11 f12 f13 f14 f15 f16 f17 f18 f19 f20 f21 f22 f23 f24 e f26 f27 f28 f29 f30 f31 f32 f33 + end. +Notation "{[ r 'with' 'x5' := e ]}" := + match r with Build_regstate f0 f1 f2 f3 f4 f5 f6 f7 f8 f9 f10 f11 f12 f13 f14 f15 f16 f17 f18 f19 f20 f21 f22 f23 f24 f25 _ f27 f28 f29 f30 f31 f32 f33 => + Build_regstate f0 f1 f2 f3 f4 f5 f6 f7 f8 f9 f10 f11 f12 f13 f14 f15 f16 f17 f18 f19 f20 f21 f22 f23 f24 f25 e f27 f28 f29 f30 f31 f32 f33 + end. +Notation "{[ r 'with' 'x4' := e ]}" := + match r with Build_regstate f0 f1 f2 f3 f4 f5 f6 f7 f8 f9 f10 f11 f12 f13 f14 f15 f16 f17 f18 f19 f20 f21 f22 f23 f24 f25 f26 _ f28 f29 f30 f31 f32 f33 => + Build_regstate f0 f1 f2 f3 f4 f5 f6 f7 f8 f9 f10 f11 f12 f13 f14 f15 f16 f17 f18 f19 f20 f21 f22 f23 f24 f25 f26 e f28 f29 f30 f31 f32 f33 + end. +Notation "{[ r 'with' 'x3' := e ]}" := + match r with Build_regstate f0 f1 f2 f3 f4 f5 f6 f7 f8 f9 f10 f11 f12 f13 f14 f15 f16 f17 f18 f19 f20 f21 f22 f23 f24 f25 f26 f27 _ f29 f30 f31 f32 f33 => + Build_regstate f0 f1 f2 f3 f4 f5 f6 f7 f8 f9 f10 f11 f12 f13 f14 f15 f16 f17 f18 f19 f20 f21 f22 f23 f24 f25 f26 f27 e f29 f30 f31 f32 f33 + end. +Notation "{[ r 'with' 'x2' := e ]}" := + match r with Build_regstate f0 f1 f2 f3 f4 f5 f6 f7 f8 f9 f10 f11 f12 f13 f14 f15 f16 f17 f18 f19 f20 f21 f22 f23 f24 f25 f26 f27 f28 _ f30 f31 f32 f33 => + Build_regstate f0 f1 f2 f3 f4 f5 f6 f7 f8 f9 f10 f11 f12 f13 f14 f15 f16 f17 f18 f19 f20 f21 f22 f23 f24 f25 f26 f27 f28 e f30 f31 f32 f33 + end. +Notation "{[ r 'with' 'x1' := e ]}" := + match r with Build_regstate f0 f1 f2 f3 f4 f5 f6 f7 f8 f9 f10 f11 f12 f13 f14 f15 f16 f17 f18 f19 f20 f21 f22 f23 f24 f25 f26 f27 f28 f29 _ f31 f32 f33 => + Build_regstate f0 f1 f2 f3 f4 f5 f6 f7 f8 f9 f10 f11 f12 f13 f14 f15 f16 f17 f18 f19 f20 f21 f22 f23 f24 f25 f26 f27 f28 f29 e f31 f32 f33 + end. +Notation "{[ r 'with' 'instbits' := e ]}" := + match r with Build_regstate f0 f1 f2 f3 f4 f5 f6 f7 f8 f9 f10 f11 f12 f13 f14 f15 f16 f17 f18 f19 f20 f21 f22 f23 f24 f25 f26 f27 f28 f29 f30 _ f32 f33 => + Build_regstate f0 f1 f2 f3 f4 f5 f6 f7 f8 f9 f10 f11 f12 f13 f14 f15 f16 f17 f18 f19 f20 f21 f22 f23 f24 f25 f26 f27 f28 f29 f30 e f32 f33 + end. +Notation "{[ r 'with' 'nextPC' := e ]}" := + match r with Build_regstate f0 f1 f2 f3 f4 f5 f6 f7 f8 f9 f10 f11 f12 f13 f14 f15 f16 f17 f18 f19 f20 f21 f22 f23 f24 f25 f26 f27 f28 f29 f30 f31 _ f33 => + Build_regstate f0 f1 f2 f3 f4 f5 f6 f7 f8 f9 f10 f11 f12 f13 f14 f15 f16 f17 f18 f19 f20 f21 f22 f23 f24 f25 f26 f27 f28 f29 f30 f31 e f33 + end. +Notation "{[ r 'with' 'PC' := e ]}" := + match r with Build_regstate f0 f1 f2 f3 f4 f5 f6 f7 f8 f9 f10 f11 f12 f13 f14 f15 f16 f17 f18 f19 f20 f21 f22 f23 f24 f25 f26 f27 f28 f29 f30 f31 f32 _ => + Build_regstate f0 f1 f2 f3 f4 f5 f6 f7 f8 f9 f10 f11 f12 f13 f14 f15 f16 f17 f18 f19 f20 f21 f22 f23 f24 f25 f26 f27 f28 f29 f30 f31 f32 e + end. + + + +Definition bit_of_regval (merge_var : register_value) : option bitU := + match merge_var with | Regval_bit v => Some v | _ => None end. + +Definition regval_of_bit (v : bitU) : register_value := Regval_bit v. + +Definition bitvector_64_dec_of_regval (merge_var : register_value) : + option (mword 64) := + match merge_var with | Regval_bitvector_64_dec v => Some v | _ => None end. + + +Definition regval_of_bitvector_64_dec (v : mword 64) : register_value := + Regval_bitvector_64_dec v. + + +Definition vector_of_regval {a} n (of_regval : register_value -> option a) + (rv : register_value) : option (vec a n) := + match rv with + | Regval_vector v => + if n =? length_list v then + map_bind (vec_of_list n) (just_list (List.map of_regval v)) + else None + | _ => None +end. + +Definition regval_of_vector {a size} (regval_of : a -> register_value) (xs : vec a size) : register_value := Regval_vector (List.map regval_of (list_of_vec xs)). + +Definition list_of_regval {a} (of_regval : register_value -> option a) + (rv : register_value) : option (list a) := + match rv with + | Regval_list v => just_list (List.map of_regval v) + | _ => None +end. + +Definition regval_of_list {a} (regval_of : a -> register_value) + (xs : list a) : register_value := + Regval_list (List.map regval_of xs). + +Definition option_of_regval {a} (of_regval : register_value -> option a) + (rv : register_value) : option (option a) := + match rv with + | Regval_option v => option_map of_regval v + | _ => None +end. + +Definition regval_of_option {a} (regval_of : a -> register_value) + (v : option a) := Regval_option (option_map regval_of v). + + +Definition x31_ref := {| + name := "x31"; + read_from := (fun s => s.(x31)); + write_to := (fun v s => ({[ s with x31 := v ]})); + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. + +Definition x30_ref := {| + name := "x30"; + read_from := (fun s => s.(x30)); + write_to := (fun v s => ({[ s with x30 := v ]})); + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. + +Definition x29_ref := {| + name := "x29"; + read_from := (fun s => s.(x29)); + write_to := (fun v s => ({[ s with x29 := v ]})); + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. + +Definition x28_ref := {| + name := "x28"; + read_from := (fun s => s.(x28)); + write_to := (fun v s => ({[ s with x28 := v ]})); + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. + +Definition x27_ref := {| + name := "x27"; + read_from := (fun s => s.(x27)); + write_to := (fun v s => ({[ s with x27 := v ]})); + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. + +Definition x26_ref := {| + name := "x26"; + read_from := (fun s => s.(x26)); + write_to := (fun v s => ({[ s with x26 := v ]})); + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. + +Definition x25_ref := {| + name := "x25"; + read_from := (fun s => s.(x25)); + write_to := (fun v s => ({[ s with x25 := v ]})); + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. + +Definition x24_ref := {| + name := "x24"; + read_from := (fun s => s.(x24)); + write_to := (fun v s => ({[ s with x24 := v ]})); + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. + +Definition x23_ref := {| + name := "x23"; + read_from := (fun s => s.(x23)); + write_to := (fun v s => ({[ s with x23 := v ]})); + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. + +Definition x22_ref := {| + name := "x22"; + read_from := (fun s => s.(x22)); + write_to := (fun v s => ({[ s with x22 := v ]})); + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. + +Definition x21_ref := {| + name := "x21"; + read_from := (fun s => s.(x21)); + write_to := (fun v s => ({[ s with x21 := v ]})); + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. + +Definition x20_ref := {| + name := "x20"; + read_from := (fun s => s.(x20)); + write_to := (fun v s => ({[ s with x20 := v ]})); + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. + +Definition x19_ref := {| + name := "x19"; + read_from := (fun s => s.(x19)); + write_to := (fun v s => ({[ s with x19 := v ]})); + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. + +Definition x18_ref := {| + name := "x18"; + read_from := (fun s => s.(x18)); + write_to := (fun v s => ({[ s with x18 := v ]})); + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. + +Definition x17_ref := {| + name := "x17"; + read_from := (fun s => s.(x17)); + write_to := (fun v s => ({[ s with x17 := v ]})); + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. + +Definition x16_ref := {| + name := "x16"; + read_from := (fun s => s.(x16)); + write_to := (fun v s => ({[ s with x16 := v ]})); + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. + +Definition x15_ref := {| + name := "x15"; + read_from := (fun s => s.(x15)); + write_to := (fun v s => ({[ s with x15 := v ]})); + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. + +Definition x14_ref := {| + name := "x14"; + read_from := (fun s => s.(x14)); + write_to := (fun v s => ({[ s with x14 := v ]})); + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. + +Definition x13_ref := {| + name := "x13"; + read_from := (fun s => s.(x13)); + write_to := (fun v s => ({[ s with x13 := v ]})); + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. + +Definition x12_ref := {| + name := "x12"; + read_from := (fun s => s.(x12)); + write_to := (fun v s => ({[ s with x12 := v ]})); + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. + +Definition x11_ref := {| + name := "x11"; + read_from := (fun s => s.(x11)); + write_to := (fun v s => ({[ s with x11 := v ]})); + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. + +Definition x10_ref := {| + name := "x10"; + read_from := (fun s => s.(x10)); + write_to := (fun v s => ({[ s with x10 := v ]})); + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. + +Definition x9_ref := {| + name := "x9"; + read_from := (fun s => s.(x9)); + write_to := (fun v s => ({[ s with x9 := v ]})); + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. + +Definition x8_ref := {| + name := "x8"; + read_from := (fun s => s.(x8)); + write_to := (fun v s => ({[ s with x8 := v ]})); + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. + +Definition x7_ref := {| + name := "x7"; + read_from := (fun s => s.(x7)); + write_to := (fun v s => ({[ s with x7 := v ]})); + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. + +Definition x6_ref := {| + name := "x6"; + read_from := (fun s => s.(x6)); + write_to := (fun v s => ({[ s with x6 := v ]})); + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. + +Definition x5_ref := {| + name := "x5"; + read_from := (fun s => s.(x5)); + write_to := (fun v s => ({[ s with x5 := v ]})); + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. + +Definition x4_ref := {| + name := "x4"; + read_from := (fun s => s.(x4)); + write_to := (fun v s => ({[ s with x4 := v ]})); + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. + +Definition x3_ref := {| + name := "x3"; + read_from := (fun s => s.(x3)); + write_to := (fun v s => ({[ s with x3 := v ]})); + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. + +Definition x2_ref := {| + name := "x2"; + read_from := (fun s => s.(x2)); + write_to := (fun v s => ({[ s with x2 := v ]})); + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. + +Definition x1_ref := {| + name := "x1"; + read_from := (fun s => s.(x1)); + write_to := (fun v s => ({[ s with x1 := v ]})); + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. + +Definition instbits_ref := {| + name := "instbits"; + read_from := (fun s => s.(instbits)); + write_to := (fun v s => ({[ s with instbits := v ]})); + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. + +(* These should get generated from anno.json... *) +Definition Xtype (X: Type) := + match X with + | x1_ref => true + | x2_ref => true + | x3_ref => true + | x4_ref => true + (* ... *) + end. +Inductive typing_result (A : Type) := +| Checked (a : A) +| TypeError (t : type_error). + +Check Xtype(x1_ref). +Check Xtype(x2_ref). +Check Xtype(x3_ref). +Check Xtype(x4_ref). + +Definition nextPC_ref := {| + name := "nextPC"; + read_from := (fun s => s.(nextPC)); + write_to := (fun v s => ({[ s with nextPC := v ]})); + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. + +Definition PC_ref := {| + name := "PC"; + read_from := (fun s => s.(PC)); + write_to := (fun v s => ({[ s with PC := v ]})); + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. + + +Local Open Scope string. +Definition get_regval (reg_name : string) (s : regstate) : option register_value := + if string_dec reg_name "x31" then Some (x31_ref.(regval_of) (x31_ref.(read_from) s)) else + if string_dec reg_name "x30" then Some (x30_ref.(regval_of) (x30_ref.(read_from) s)) else + if string_dec reg_name "x29" then Some (x29_ref.(regval_of) (x29_ref.(read_from) s)) else + if string_dec reg_name "x28" then Some (x28_ref.(regval_of) (x28_ref.(read_from) s)) else + if string_dec reg_name "x27" then Some (x27_ref.(regval_of) (x27_ref.(read_from) s)) else + if string_dec reg_name "x26" then Some (x26_ref.(regval_of) (x26_ref.(read_from) s)) else + if string_dec reg_name "x25" then Some (x25_ref.(regval_of) (x25_ref.(read_from) s)) else + if string_dec reg_name "x24" then Some (x24_ref.(regval_of) (x24_ref.(read_from) s)) else + if string_dec reg_name "x23" then Some (x23_ref.(regval_of) (x23_ref.(read_from) s)) else + if string_dec reg_name "x22" then Some (x22_ref.(regval_of) (x22_ref.(read_from) s)) else + if string_dec reg_name "x21" then Some (x21_ref.(regval_of) (x21_ref.(read_from) s)) else + if string_dec reg_name "x20" then Some (x20_ref.(regval_of) (x20_ref.(read_from) s)) else + if string_dec reg_name "x19" then Some (x19_ref.(regval_of) (x19_ref.(read_from) s)) else + if string_dec reg_name "x18" then Some (x18_ref.(regval_of) (x18_ref.(read_from) s)) else + if string_dec reg_name "x17" then Some (x17_ref.(regval_of) (x17_ref.(read_from) s)) else + if string_dec reg_name "x16" then Some (x16_ref.(regval_of) (x16_ref.(read_from) s)) else + if string_dec reg_name "x15" then Some (x15_ref.(regval_of) (x15_ref.(read_from) s)) else + if string_dec reg_name "x14" then Some (x14_ref.(regval_of) (x14_ref.(read_from) s)) else + if string_dec reg_name "x13" then Some (x13_ref.(regval_of) (x13_ref.(read_from) s)) else + if string_dec reg_name "x12" then Some (x12_ref.(regval_of) (x12_ref.(read_from) s)) else + if string_dec reg_name "x11" then Some (x11_ref.(regval_of) (x11_ref.(read_from) s)) else + if string_dec reg_name "x10" then Some (x10_ref.(regval_of) (x10_ref.(read_from) s)) else + if string_dec reg_name "x9" then Some (x9_ref.(regval_of) (x9_ref.(read_from) s)) else + if string_dec reg_name "x8" then Some (x8_ref.(regval_of) (x8_ref.(read_from) s)) else + if string_dec reg_name "x7" then Some (x7_ref.(regval_of) (x7_ref.(read_from) s)) else + if string_dec reg_name "x6" then Some (x6_ref.(regval_of) (x6_ref.(read_from) s)) else + if string_dec reg_name "x5" then Some (x5_ref.(regval_of) (x5_ref.(read_from) s)) else + if string_dec reg_name "x4" then Some (x4_ref.(regval_of) (x4_ref.(read_from) s)) else + if string_dec reg_name "x3" then Some (x3_ref.(regval_of) (x3_ref.(read_from) s)) else + if string_dec reg_name "x2" then Some (x2_ref.(regval_of) (x2_ref.(read_from) s)) else + if string_dec reg_name "x1" then Some (x1_ref.(regval_of) (x1_ref.(read_from) s)) else + if string_dec reg_name "instbits" then Some (instbits_ref.(regval_of) (instbits_ref.(read_from) s)) else + if string_dec reg_name "nextPC" then Some (nextPC_ref.(regval_of) (nextPC_ref.(read_from) s)) else + if string_dec reg_name "PC" then Some (PC_ref.(regval_of) (PC_ref.(read_from) s)) else + None. + +Definition set_regval (reg_name : string) (v : register_value) (s : regstate) : option regstate := + if string_dec reg_name "x31" then option_map (fun v => x31_ref.(write_to) v s) (x31_ref.(of_regval) v) else + if string_dec reg_name "x30" then option_map (fun v => x30_ref.(write_to) v s) (x30_ref.(of_regval) v) else + if string_dec reg_name "x29" then option_map (fun v => x29_ref.(write_to) v s) (x29_ref.(of_regval) v) else + if string_dec reg_name "x28" then option_map (fun v => x28_ref.(write_to) v s) (x28_ref.(of_regval) v) else + if string_dec reg_name "x27" then option_map (fun v => x27_ref.(write_to) v s) (x27_ref.(of_regval) v) else + if string_dec reg_name "x26" then option_map (fun v => x26_ref.(write_to) v s) (x26_ref.(of_regval) v) else + if string_dec reg_name "x25" then option_map (fun v => x25_ref.(write_to) v s) (x25_ref.(of_regval) v) else + if string_dec reg_name "x24" then option_map (fun v => x24_ref.(write_to) v s) (x24_ref.(of_regval) v) else + if string_dec reg_name "x23" then option_map (fun v => x23_ref.(write_to) v s) (x23_ref.(of_regval) v) else + if string_dec reg_name "x22" then option_map (fun v => x22_ref.(write_to) v s) (x22_ref.(of_regval) v) else + if string_dec reg_name "x21" then option_map (fun v => x21_ref.(write_to) v s) (x21_ref.(of_regval) v) else + if string_dec reg_name "x20" then option_map (fun v => x20_ref.(write_to) v s) (x20_ref.(of_regval) v) else + if string_dec reg_name "x19" then option_map (fun v => x19_ref.(write_to) v s) (x19_ref.(of_regval) v) else + if string_dec reg_name "x18" then option_map (fun v => x18_ref.(write_to) v s) (x18_ref.(of_regval) v) else + if string_dec reg_name "x17" then option_map (fun v => x17_ref.(write_to) v s) (x17_ref.(of_regval) v) else + if string_dec reg_name "x16" then option_map (fun v => x16_ref.(write_to) v s) (x16_ref.(of_regval) v) else + if string_dec reg_name "x15" then option_map (fun v => x15_ref.(write_to) v s) (x15_ref.(of_regval) v) else + if string_dec reg_name "x14" then option_map (fun v => x14_ref.(write_to) v s) (x14_ref.(of_regval) v) else + if string_dec reg_name "x13" then option_map (fun v => x13_ref.(write_to) v s) (x13_ref.(of_regval) v) else + if string_dec reg_name "x12" then option_map (fun v => x12_ref.(write_to) v s) (x12_ref.(of_regval) v) else + if string_dec reg_name "x11" then option_map (fun v => x11_ref.(write_to) v s) (x11_ref.(of_regval) v) else + if string_dec reg_name "x10" then option_map (fun v => x10_ref.(write_to) v s) (x10_ref.(of_regval) v) else + if string_dec reg_name "x9" then option_map (fun v => x9_ref.(write_to) v s) (x9_ref.(of_regval) v) else + if string_dec reg_name "x8" then option_map (fun v => x8_ref.(write_to) v s) (x8_ref.(of_regval) v) else + if string_dec reg_name "x7" then option_map (fun v => x7_ref.(write_to) v s) (x7_ref.(of_regval) v) else + if string_dec reg_name "x6" then option_map (fun v => x6_ref.(write_to) v s) (x6_ref.(of_regval) v) else + if string_dec reg_name "x5" then option_map (fun v => x5_ref.(write_to) v s) (x5_ref.(of_regval) v) else + if string_dec reg_name "x4" then option_map (fun v => x4_ref.(write_to) v s) (x4_ref.(of_regval) v) else + if string_dec reg_name "x3" then option_map (fun v => x3_ref.(write_to) v s) (x3_ref.(of_regval) v) else + if string_dec reg_name "x2" then option_map (fun v => x2_ref.(write_to) v s) (x2_ref.(of_regval) v) else + if string_dec reg_name "x1" then option_map (fun v => x1_ref.(write_to) v s) (x1_ref.(of_regval) v) else + if string_dec reg_name "instbits" then option_map (fun v => instbits_ref.(write_to) v s) (instbits_ref.(of_regval) v) else + if string_dec reg_name "nextPC" then option_map (fun v => nextPC_ref.(write_to) v s) (nextPC_ref.(of_regval) v) else + if string_dec reg_name "PC" then option_map (fun v => PC_ref.(write_to) v s) (PC_ref.(of_regval) v) else + None. + +Definition register_accessors := (get_regval, set_regval). + + +Definition MR a r := monadR register_value a r unit. +Definition M a := monad register_value a unit. diff --git a/build/riscv_types.vo b/build/riscv_types.vo Binary files differnew file mode 100644 index 0000000..641a150 --- /dev/null +++ b/build/riscv_types.vo diff --git a/build/riscv_types.vok b/build/riscv_types.vok new file mode 100644 index 0000000..e69de29 --- /dev/null +++ b/build/riscv_types.vok diff --git a/build/riscv_types.vos b/build/riscv_types.vos new file mode 100644 index 0000000..e69de29 --- /dev/null +++ b/build/riscv_types.vos diff --git a/components.scala b/components.scala new file mode 100644 index 0000000..9942e3a --- /dev/null +++ b/components.scala @@ -0,0 +1,107 @@ +import firrtl._ +import firrtl.annotations.{Annotation, SingleTargetAnnotation} +import firrtl.annotations.{CircuitTarget, ModuleTarget, InstanceTarget, ReferenceTarget, Target} + +import chisel3._ +import chisel3.experimental.{annotate, ChiselAnnotation, RunFirrtlTransform} +import chisel3.internal.InstanceId + +case class InfoAnnotation(target: Target, info: String) extends SingleTargetAnnotation[Target] { + def duplicate(newTarget: Target) = this.copy(target = newTarget) +} +object InfoAnnotator { + def info(component: InstanceId, info: String): Unit = { + annotate(new ChiselAnnotation with RunFirrtlTransform { + def toFirrtl: Annotation = InfoAnnotation(component.toTarget, info) + def transformClass = classOf[InfoTransform] + }) + } +} + +/** A transform that reads InfoAnnotations and prints information about them */ +class InfoTransform() extends Transform with DependencyAPIMigration { + + override def prerequisites = firrtl.stage.Forms.HighForm + + override def execute(state: CircuitState): CircuitState = { + println("Starting transform 'IdentityTransform'") + + // Add infoanno - a single format for all object types + val annotationsx = state.annotations.flatMap{ + case InfoAnnotation(a: CircuitTarget, info) | InfoAnnotation(a: ModuleTarget, info) | InfoAnnotation(a: InstanceTarget, info) | InfoAnnotation(a: ReferenceTarget, info) => + println(s"PROOF_MARKER {${a.serialize}, '$info'}") + None + case a => + Some(a) + } + + state.copy(annotations = annotationsx) + } +} + + +class RegisterFile() extends Module { + val io = IO(new Bundle { + val readreg1 = Input(UInt(5.W)) + val readreg2 = Input(UInt(5.W)) + val writereg = Input(UInt(5.W)) + val writedata = Input(UInt(32.W)) + val wen = Input(Bool()) + + val readdata1 = Output(UInt(32.W)) + val readdata2 = Output(UInt(32.W)) + }) + + // Required so the compiler doesn't optimize things away when testing + // incomplete designs. + dontTouch(io) + val regs = Reg(Vec(32, UInt(32.W))) + for (i <- 0 to regs.length-1) { + InfoAnnotator.info(regs(i), s"x$i") + } + // When the write enable is high, write the data + when (io.wen) { + regs(io.writereg) := io.writedata + } + + // *Always* read the data. This is required for the single cycle CPU since in a single cycle it + // might both read and write the registers (e.g., an add) + io.readdata1 := regs(io.readreg1) + io.readdata2 := regs(io.readreg2) + +} + +class ALU() extends Module { + val io = IO(new Bundle { + val op = Input(UInt(4.W)) + val in1 = Input(UInt(32.W)) + val in2 = Input(UInt(32.W)) + val out = Output(UInt(32.W)) + val output_valid = Output(Bool()) + }) + + io.out := 0.U + io.output_valid := false.B + when(io.op === 0.U) { + io.out := io.in1 & io.in2; + io.output_valid := true.B + }.elsewhen(io.op === 1.U) { + io.out := io.in1 | io.in2; + io.output_valid := true.B + }.elsewhen(io.op === 2.U) { + io.out := io.in1 + io.in2; + io.output_valid := true.B + }.elsewhen(io.op === 6.U) { + io.out := io.in1 - io.in2 + io.output_valid := true.B + }.otherwise { + io.output_valid := false.B + } +} + +println(getVerilog(new ALU)) + +// ChiselStage.emitChirrtl(new RegisterFile()) +import chisel3.stage.{ChiselStage, ChiselGeneratorAnnotation} +// TODO fix type error here + (new ChiselStage).execute(Array.empty, Seq(ChiselGeneratorAnnotation(() => new RegisterFile()))) diff --git a/handwritten_support/.mem_metadata.aux b/handwritten_support/.mem_metadata.aux new file mode 100644 index 0000000..cfce1c3 --- /dev/null +++ b/handwritten_support/.mem_metadata.aux @@ -0,0 +1,3 @@ +COQAUX1 693b57d74f776ae8bd215fbfc8b03df3 /home/aditya/dev/firrtl-proof/sail-riscv/handwritten_support/mem_metadata.v +183 386 context_used "" +0 0 vo_compile_time "0.304" diff --git a/handwritten_support/.riscv_extras.aux b/handwritten_support/.riscv_extras.aux new file mode 100644 index 0000000..d53d7e5 --- /dev/null +++ b/handwritten_support/.riscv_extras.aux @@ -0,0 +1,23 @@ +COQAUX1 9f6e940694efb436e57a7a26d0b1b3b3 /home/aditya/dev/firrtl-proof/sail-riscv/handwritten_support/riscv_extras.v +3801 3993 context_used "" +3994 4194 context_used "" +4195 4402 context_used "" +4403 4604 context_used "" +4605 4814 context_used "" +4815 5031 context_used "" +7223 7331 context_used "" +7333 7442 context_used "" +7444 7565 context_used "" +8744 8878 context_used "" +9948 9983 context_used "" +10049 10053 proof_build_time "0.017" +0 0 euclid_modulo "0.017" +10005 10048 context_used "" +10049 10053 proof_check_time "0.004" +10096 10182 context_used "" +10183 10267 context_used "" +11004 11008 proof_build_time "0.001" +0 0 n_leading_spaces_fact "0.001" +10997 11003 context_used "" +11004 11008 proof_check_time "0.001" +0 0 vo_compile_time "0.514" diff --git a/handwritten_support/0.11/mem_metadata.lem b/handwritten_support/0.11/mem_metadata.lem new file mode 100644 index 0000000..8a8c070 --- /dev/null +++ b/handwritten_support/0.11/mem_metadata.lem @@ -0,0 +1,16 @@ +open import Pervasives +open import Pervasives_extra +open import Sail2_instr_kinds +open import Sail2_values +open import Sail2_operators_mwords +open import Sail2_prompt_monad +open import Sail2_prompt + +val write_ram : forall 'rv 'e 'a 'n. Size 'a, Size 'n => write_kind -> mword 'a -> integer -> mword 'n -> unit -> monad 'rv bool 'e +let write_ram wk addr width data meta = + write_mem wk () addr width data + +val read_ram : forall 'rv 'e 'a 'n. Size 'a, Size 'n => read_kind -> mword 'a -> integer -> bool -> monad 'rv (mword 'n * unit) 'e +let read_ram rk addr width read_tag = + read_mem rk () addr width >>= (fun (data : mword 'n) -> + return (data, ())) diff --git a/handwritten_support/0.11/riscv_extras.lem b/handwritten_support/0.11/riscv_extras.lem new file mode 100644 index 0000000..db93001 --- /dev/null +++ b/handwritten_support/0.11/riscv_extras.lem @@ -0,0 +1,164 @@ +open import Pervasives +open import Pervasives_extra +open import Sail2_instr_kinds +open import Sail2_values +open import Sail2_operators_mwords +open import Sail2_prompt_monad +open import Sail2_prompt + +type bitvector 'a = mword 'a + +let MEM_fence_rw_rw () = barrier (Barrier_RISCV_rw_rw ()) +let MEM_fence_r_rw () = barrier (Barrier_RISCV_r_rw ()) +let MEM_fence_r_r () = barrier (Barrier_RISCV_r_r ()) +let MEM_fence_rw_w () = barrier (Barrier_RISCV_rw_w ()) +let MEM_fence_w_w () = barrier (Barrier_RISCV_w_w ()) +let MEM_fence_w_rw () = barrier (Barrier_RISCV_w_rw ()) +let MEM_fence_rw_r () = barrier (Barrier_RISCV_rw_r ()) +let MEM_fence_r_w () = barrier (Barrier_RISCV_r_w ()) +let MEM_fence_w_r () = barrier (Barrier_RISCV_w_r ()) +let MEM_fence_tso () = barrier (Barrier_RISCV_tso ()) +let MEM_fence_i () = barrier (Barrier_RISCV_i ()) + +val MEMea : forall 'rv 'a 'e. Size 'a => bitvector 'a -> integer -> monad 'rv unit 'e +val MEMea_release : forall 'rv 'a 'e. Size 'a => bitvector 'a -> integer -> monad 'rv unit 'e +val MEMea_strong_release : forall 'rv 'a 'e. Size 'a => bitvector 'a -> integer -> monad 'rv unit 'e +val MEMea_conditional : forall 'rv 'a 'e. Size 'a => bitvector 'a -> integer -> monad 'rv unit 'e +val MEMea_conditional_release : forall 'rv 'a 'e. Size 'a => bitvector 'a -> integer -> monad 'rv unit 'e +val MEMea_conditional_strong_release : forall 'rv 'a 'e. Size 'a => bitvector 'a -> integer -> monad 'rv unit 'e + +let MEMea addr size = write_mem_ea Write_plain () addr size +let MEMea_release addr size = write_mem_ea Write_RISCV_release () addr size +let MEMea_strong_release addr size = write_mem_ea Write_RISCV_strong_release () addr size +let MEMea_conditional addr size = write_mem_ea Write_RISCV_conditional () addr size +let MEMea_conditional_release addr size = write_mem_ea Write_RISCV_conditional_release () addr size +let MEMea_conditional_strong_release addr size + = write_mem_ea Write_RISCV_conditional_strong_release () addr size + +val MEMr : forall 'rv 'a 'b 'e. Size 'a, Size 'b => integer -> integer -> bitvector 'a -> bitvector 'a -> monad 'rv (bitvector 'b) 'e +val MEMr_acquire : forall 'rv 'a 'b 'e. Size 'a, Size 'b => integer -> integer -> bitvector 'a -> bitvector 'a -> monad 'rv (bitvector 'b) 'e +val MEMr_strong_acquire : forall 'rv 'a 'b 'e. Size 'a, Size 'b => integer -> integer -> bitvector 'a -> bitvector 'a -> monad 'rv (bitvector 'b) 'e +val MEMr_reserved : forall 'rv 'a 'b 'e. Size 'a, Size 'b => integer -> integer -> bitvector 'a -> bitvector 'a -> monad 'rv (bitvector 'b) 'e +val MEMr_reserved_acquire : forall 'rv 'a 'b 'e. Size 'a, Size 'b => integer -> integer -> bitvector 'a -> bitvector 'a -> monad 'rv (bitvector 'b) 'e +val MEMr_reserved_strong_acquire : forall 'rv 'a 'b 'e. Size 'a, Size 'b => integer -> integer -> bitvector 'a -> bitvector 'a -> monad 'rv (bitvector 'b) 'e + +let MEMr addrsize size hexRAM addr = read_mem Read_plain addrsize addr size +let MEMr_acquire addrsize size hexRAM addr = read_mem Read_RISCV_acquire addrsize addr size +let MEMr_strong_acquire addrsize size hexRAM addr = read_mem Read_RISCV_strong_acquire addrsize addr size +let MEMr_reserved addrsize size hexRAM addr = read_mem Read_RISCV_reserved addrsize addr size +let MEMr_reserved_acquire addrsize size hexRAM addr = read_mem Read_RISCV_reserved_acquire addrsize addr size +let MEMr_reserved_strong_acquire addrsize size hexRAM addr = read_mem Read_RISCV_reserved_strong_acquire addrsize addr size + +val MEMw : forall 'rv 'a 'b 'e. Size 'a, Size 'b => integer -> integer -> bitvector 'a -> bitvector 'a -> bitvector 'b -> monad 'rv bool 'e +val MEMw_release : forall 'rv 'a 'b 'e. Size 'a, Size 'b => integer -> integer -> bitvector 'a -> bitvector 'a -> bitvector 'b -> monad 'rv bool 'e +val MEMw_strong_release : forall 'rv 'a 'b 'e. Size 'a, Size 'b => integer -> integer -> bitvector 'a -> bitvector 'a -> bitvector 'b -> monad 'rv bool 'e +val MEMw_conditional : forall 'rv 'a 'b 'e. Size 'a, Size 'b => integer -> integer -> bitvector 'a -> bitvector 'a -> bitvector 'b -> monad 'rv bool 'e +val MEMw_conditional_release : forall 'rv 'a 'b 'e. Size 'a, Size 'b => integer -> integer -> bitvector 'a -> bitvector 'a -> bitvector 'b -> monad 'rv bool 'e +val MEMw_conditional_strong_release : forall 'rv 'a 'b 'e. Size 'a, Size 'b => integer -> integer -> bitvector 'a -> bitvector 'a -> bitvector 'b -> monad 'rv bool 'e + +let MEMw addrsize size hexRAM addr = write_mem Write_plain addrsize addr size +let MEMw_release addrsize size hexRAM addr = write_mem Write_RISCV_release addrsize addr size +let MEMw_strong_release addrsize size hexRAM addr = write_mem Write_RISCV_strong_release addrsize addr size +let MEMw_conditional addrsize size hexRAM addr = write_mem Write_RISCV_conditional addrsize addr size +let MEMw_conditional_release addrsize size hexRAM addr = write_mem Write_RISCV_conditional_release addrsize addr size +let MEMw_conditional_strong_release addrsize size hexRAM addr = write_mem Write_RISCV_conditional_strong_release addrsize addr size + +val load_reservation : forall 'a. Size 'a => bitvector 'a -> unit +let load_reservation addr = () + +let speculate_conditional_success () = excl_result () + +let match_reservation _ = true +let cancel_reservation () = () + +val sys_enable_writable_misa : unit -> bool +let sys_enable_writable_misa () = true +declare ocaml target_rep function sys_enable_writable_misa = `Platform.enable_writable_misa` + +val sys_enable_rvc : unit -> bool +let sys_enable_rvc () = true +declare ocaml target_rep function sys_enable_rvc = `Platform.enable_rvc` + +val sys_enable_next : unit -> bool +let sys_enable_next () = true +declare ocaml target_rep function sys_enable_next = `Platform.enable_next` + +val sys_enable_fdext : unit -> bool +let sys_enable_fdext () = true +declare ocaml target_rep function sys_enable_fdext = `Platform.enable_fdext` + +val plat_ram_base : forall 'a. Size 'a => unit -> bitvector 'a +let plat_ram_base () = wordFromInteger 0 +declare ocaml target_rep function plat_ram_base = `Platform.dram_base` + +val plat_ram_size : forall 'a. Size 'a => unit -> bitvector 'a +let plat_ram_size () = wordFromInteger 0 +declare ocaml target_rep function plat_ram_size = `Platform.dram_size` + +val plat_rom_base : forall 'a. Size 'a => unit -> bitvector 'a +let plat_rom_base () = wordFromInteger 0 +declare ocaml target_rep function plat_rom_base = `Platform.rom_base` + +val plat_rom_size : forall 'a. Size 'a => unit -> bitvector 'a +let plat_rom_size () = wordFromInteger 0 +declare ocaml target_rep function plat_rom_size = `Platform.rom_size` + +val plat_clint_base : forall 'a. Size 'a => unit -> bitvector 'a +let plat_clint_base () = wordFromInteger 0 +declare ocaml target_rep function plat_clint_base = `Platform.clint_base` + +val plat_clint_size : forall 'a. Size 'a => unit -> bitvector 'a +let plat_clint_size () = wordFromInteger 0 +declare ocaml target_rep function plat_clint_size = `Platform.clint_size` + +val plat_enable_dirty_update : unit -> bool +let plat_enable_dirty_update () = false +declare ocaml target_rep function plat_enable_dirty_update = `Platform.enable_dirty_update` + +val plat_enable_misaligned_access : unit -> bool +let plat_enable_misaligned_access () = false +declare ocaml target_rep function plat_enable_misaligned_access = `Platform.enable_misaligned_access` + +val plat_enable_pmp : unit -> bool +let plat_enable_pmp () = false +declare ocaml target_rep function plat_enable_pmp = `Platform.enable_pmp` + +val plat_mtval_has_illegal_inst_bits : unit -> bool +let plat_mtval_has_illegal_inst_bits () = false +declare ocaml target_rep function plat_mtval_has_illegal_inst_bits = `Platform.mtval_has_illegal_inst_bits` + +val plat_insns_per_tick : unit -> integer +let plat_insns_per_tick () = 1 +declare ocaml target_rep function plat_insns_per_tick = `Platform.insns_per_tick` + +val plat_htif_tohost : forall 'a. Size 'a => unit -> bitvector 'a +let plat_htif_tohost () = wordFromInteger 0 +declare ocaml target_rep function plat_htif_tohost = `Platform.htif_tohost` + +val plat_term_write : forall 'a. Size 'a => bitvector 'a -> unit +let plat_term_write _ = () +declare ocaml target_rep function plat_term_write = `Platform.term_write` + +val plat_term_read : forall 'a. Size 'a => unit -> bitvector 'a +let plat_term_read () = wordFromInteger 0 +declare ocaml target_rep function plat_term_read = `Platform.term_read` + +val shift_bits_right : forall 'a 'b. Size 'a, Size 'b => bitvector 'a -> bitvector 'b -> bitvector 'a +let shift_bits_right v m = shiftr v (uint m) +val shift_bits_left : forall 'a 'b. Size 'a, Size 'b => bitvector 'a -> bitvector 'b -> bitvector 'a +let shift_bits_left v m = shiftl v (uint m) + +val print_string : string -> string -> unit +let print_string msg s = () (* print_endline (msg ^ s) *) + +val prerr_string : string -> string -> unit +let prerr_string msg s = prerr_endline (msg ^ s) + +val prerr_bits : forall 'a. Size 'a => string -> bitvector 'a -> unit +let prerr_bits msg bs = prerr_endline (msg ^ (show_bitlist (bits_of bs))) + +val print_bits : forall 'a. Size 'a => string -> bitvector 'a -> unit +let print_bits msg bs = () (* print_endline (msg ^ (show_bitlist (bits_of bs))) *) + +val print_dbg : string -> unit +let print_dbg msg = () diff --git a/handwritten_support/0.11/riscv_extras_fdext.lem b/handwritten_support/0.11/riscv_extras_fdext.lem new file mode 100644 index 0000000..12cfe00 --- /dev/null +++ b/handwritten_support/0.11/riscv_extras_fdext.lem @@ -0,0 +1,125 @@ +open import Pervasives +open import Pervasives_extra +open import Sail2_instr_kinds +open import Sail2_values +open import Sail2_operators_mwords +open import Sail2_prompt_monad +open import Sail2_prompt + +type bitvector 'a = mword 'a + +(* stub functions emulating the C softfloat interface *) + +val softfloat_f32_add : forall 'rm 's. Size 'rm, Size 's => bitvector 'rm -> bitvector 's -> bitvector 's -> unit +let softfloat_f32_add _ _ _ = () + +val softfloat_f32_sub : forall 'rm 's. Size 'rm, Size 's => bitvector 'rm -> bitvector 's -> bitvector 's -> unit +let softfloat_f32_sub _ _ _ = () + +val softfloat_f32_mul : forall 'rm 's. Size 'rm, Size 's => bitvector 'rm -> bitvector 's -> bitvector 's -> unit +let softfloat_f32_mul _ _ _ = () + +val softfloat_f32_div : forall 'rm 's. Size 'rm, Size 's => bitvector 'rm -> bitvector 's -> bitvector 's -> unit +let softfloat_f32_div _ _ _ = () + +val softfloat_f64_add : forall 'rm 's. Size 'rm, Size 's => bitvector 'rm -> bitvector 's -> bitvector 's -> unit +let softfloat_f64_add _ _ _ = () + +val softfloat_f64_sub : forall 'rm 's. Size 'rm, Size 's => bitvector 'rm -> bitvector 's -> bitvector 's -> unit +let softfloat_f64_sub _ _ _ = () + +val softfloat_f64_mul : forall 'rm 's. Size 'rm, Size 's => bitvector 'rm -> bitvector 's -> bitvector 's -> unit +let softfloat_f64_mul _ _ _ = () + +val softfloat_f64_div : forall 'rm 's. Size 'rm, Size 's => bitvector 'rm -> bitvector 's -> bitvector 's -> unit +let softfloat_f64_div _ _ _ = () + + +val softfloat_f32_muladd : forall 'rm 's. Size 'rm, Size 's => bitvector 'rm -> bitvector 's -> bitvector 's -> bitvector 's -> unit +let softfloat_f32_muladd _ _ _ _ = () + +val softfloat_f64_muladd : forall 'rm 's. Size 'rm, Size 's => bitvector 'rm -> bitvector 's -> bitvector 's -> bitvector 's -> unit +let softfloat_f64_muladd _ _ _ _ = () + + +val softfloat_f32_sqrt : forall 'rm 's. Size 'rm, Size 's => bitvector 'rm -> bitvector 's -> unit +let softfloat_f32_sqrt _ _ = () + +val softfloat_f64_sqrt : forall 'rm 's. Size 'rm, Size 's => bitvector 'rm -> bitvector 's -> unit +let softfloat_f64_sqrt _ _ = () + + +val softfloat_f32_to_i32: forall 'rm 's. Size 'rm, Size 's => bitvector 'rm -> bitvector 's -> unit +let softfloat_f32_to_i32 _ _ = () + +val softfloat_f32_to_ui32: forall 'rm 's. Size 'rm, Size 's => bitvector 'rm -> bitvector 's -> unit +let softfloat_f32_to_ui32 _ _ = () + +val softfloat_i32_to_f32: forall 'rm 's. Size 'rm, Size 's => bitvector 'rm -> bitvector 's -> unit +let softfloat_i32_to_f32 _ _ = () + +val softfloat_ui32_to_f32: forall 'rm 's. Size 'rm, Size 's => bitvector 'rm -> bitvector 's -> unit +let softfloat_ui32_to_f32 _ _ = () + +val softfloat_f32_to_i64: forall 'rm 's. Size 'rm, Size 's => bitvector 'rm -> bitvector 's -> unit +let softfloat_f32_to_i64 _ _ = () + +val softfloat_f32_to_ui64: forall 'rm 's. Size 'rm, Size 's => bitvector 'rm -> bitvector 's -> unit +let softfloat_f32_to_ui64 _ _ = () + +val softfloat_i64_to_f32: forall 'rm 's. Size 'rm, Size 's => bitvector 'rm -> bitvector 's -> unit +let softfloat_i64_to_f32 _ _ = () + +val softfloat_ui64_to_f32: forall 'rm 's. Size 'rm, Size 's => bitvector 'rm -> bitvector 's -> unit +let softfloat_ui64_to_f32 _ _ = () + + +val softfloat_f64_to_i32: forall 'rm 's. Size 'rm, Size 's => bitvector 'rm -> bitvector 's -> unit +let softfloat_f64_to_i32 _ _ = () + +val softfloat_f64_to_ui32: forall 'rm 's. Size 'rm, Size 's => bitvector 'rm -> bitvector 's -> unit +let softfloat_f64_to_ui32 _ _ = () + +val softfloat_i32_to_f64: forall 'rm 's. Size 'rm, Size 's => bitvector 'rm -> bitvector 's -> unit +let softfloat_i32_to_f64 _ _ = () + +val softfloat_ui32_to_f64: forall 'rm 's. Size 'rm, Size 's => bitvector 'rm -> bitvector 's -> unit +let softfloat_ui32_to_f64 _ _ = () + +val softfloat_f64_to_i64: forall 'rm 's. Size 'rm, Size 's => bitvector 'rm -> bitvector 's -> unit +let softfloat_f64_to_i64 _ _ = () + +val softfloat_f64_to_ui64: forall 'rm 's. Size 'rm, Size 's => bitvector 'rm -> bitvector 's -> unit +let softfloat_f64_to_ui64 _ _ = () + +val softfloat_i64_to_f64: forall 'rm 's. Size 'rm, Size 's => bitvector 'rm -> bitvector 's -> unit +let softfloat_i64_to_f64 _ _ = () + +val softfloat_ui64_to_f64: forall 'rm 's. Size 'rm, Size 's => bitvector 'rm -> bitvector 's -> unit +let softfloat_ui64_to_f64 _ _ = () + + +val softfloat_f32_to_f64: forall 'rm 's. Size 'rm, Size 's => bitvector 'rm -> bitvector 's -> unit +let softfloat_f32_to_f64 _ _ = () + +val softfloat_f64_to_f32: forall 'rm 's. Size 'rm, Size 's => bitvector 'rm -> bitvector 's -> unit +let softfloat_f64_to_f32 _ _ = () + + +val softfloat_f32_lt : forall 's. Size 's => bitvector 's -> bitvector 's -> unit +let softfloat_f32_lt _ _ = () + +val softfloat_f32_le : forall 's. Size 's => bitvector 's -> bitvector 's -> unit +let softfloat_f32_le _ _ = () + +val softfloat_f32_eq : forall 's. Size 's => bitvector 's -> bitvector 's -> unit +let softfloat_f32_eq _ _ = () + +val softfloat_f64_lt : forall 's. Size 's => bitvector 's -> bitvector 's -> unit +let softfloat_f64_lt _ _ = () + +val softfloat_f64_le : forall 's. Size 's => bitvector 's -> bitvector 's -> unit +let softfloat_f64_le _ _ = () + +val softfloat_f64_eq : forall 's. Size 's => bitvector 's -> bitvector 's -> unit +let softfloat_f64_eq _ _ = () diff --git a/handwritten_support/0.11/riscv_extras_sequential.lem b/handwritten_support/0.11/riscv_extras_sequential.lem new file mode 100644 index 0000000..827f601 --- /dev/null +++ b/handwritten_support/0.11/riscv_extras_sequential.lem @@ -0,0 +1,156 @@ +open import Pervasives +open import Pervasives_extra +open import Sail2_instr_kinds +open import Sail2_values +open import Sail2_operators_mwords +open import Sail2_prompt_monad +open import Sail2_prompt + +type bitvector 'a = mword 'a + +let MEM_fence_rw_rw () = barrier (Barrier_RISCV_rw_rw ()) +let MEM_fence_r_rw () = barrier (Barrier_RISCV_r_rw ()) +let MEM_fence_r_r () = barrier (Barrier_RISCV_r_r ()) +let MEM_fence_rw_w () = barrier (Barrier_RISCV_rw_w ()) +let MEM_fence_w_w () = barrier (Barrier_RISCV_w_w ()) +let MEM_fence_w_rw () = barrier (Barrier_RISCV_w_rw ()) +let MEM_fence_rw_r () = barrier (Barrier_RISCV_rw_r ()) +let MEM_fence_r_w () = barrier (Barrier_RISCV_r_w ()) +let MEM_fence_w_r () = barrier (Barrier_RISCV_w_r ()) +let MEM_fence_tso () = barrier (Barrier_RISCV_tso ()) +let MEM_fence_i () = barrier (Barrier_RISCV_i ()) + +val MEMea : forall 'rv 'a 'e. Size 'a => bitvector 'a -> integer -> monad 'rv unit 'e +val MEMea_release : forall 'rv 'a 'e. Size 'a => bitvector 'a -> integer -> monad 'rv unit 'e +val MEMea_strong_release : forall 'rv 'a 'e. Size 'a => bitvector 'a -> integer -> monad 'rv unit 'e +val MEMea_conditional : forall 'rv 'a 'e. Size 'a => bitvector 'a -> integer -> monad 'rv unit 'e +val MEMea_conditional_release : forall 'rv 'a 'e. Size 'a => bitvector 'a -> integer -> monad 'rv unit 'e +val MEMea_conditional_strong_release : forall 'rv 'a 'e. Size 'a => bitvector 'a -> integer -> monad 'rv unit 'e + +let MEMea addr size = write_mem_ea Write_plain addr size +let MEMea_release addr size = write_mem_ea Write_RISCV_release addr size +let MEMea_strong_release addr size = write_mem_ea Write_RISCV_strong_release addr size +let MEMea_conditional addr size = write_mem_ea Write_RISCV_conditional addr size +let MEMea_conditional_release addr size = write_mem_ea Write_RISCV_conditional_release addr size +let MEMea_conditional_strong_release addr size + = write_mem_ea Write_RISCV_conditional_strong_release addr size + +val MEMr : forall 'rv 'a 'b 'e. Size 'a, Size 'b => integer -> integer -> bitvector 'a -> bitvector 'a -> monad 'rv (bitvector 'b) 'e +val MEMr_acquire : forall 'rv 'a 'b 'e. Size 'a, Size 'b => integer -> integer -> bitvector 'a -> bitvector 'a -> monad 'rv (bitvector 'b) 'e +val MEMr_strong_acquire : forall 'rv 'a 'b 'e. Size 'a, Size 'b => integer -> integer -> bitvector 'a -> bitvector 'a -> monad 'rv (bitvector 'b) 'e +val MEMr_reserved : forall 'rv 'a 'b 'e. Size 'a, Size 'b => integer -> integer -> bitvector 'a -> bitvector 'a -> monad 'rv (bitvector 'b) 'e +val MEMr_reserved_acquire : forall 'rv 'a 'b 'e. Size 'a, Size 'b => integer -> integer -> bitvector 'a -> bitvector 'a -> monad 'rv (bitvector 'b) 'e +val MEMr_reserved_strong_acquire : forall 'rv 'a 'b 'e. Size 'a, Size 'b => integer -> integer -> bitvector 'a -> bitvector 'a -> monad 'rv (bitvector 'b) 'e + +let MEMr addrsize size hexRAM addr = read_mem Read_plain addr size +let MEMr_acquire addrsize size hexRAM addr = read_mem Read_RISCV_acquire addr size +let MEMr_strong_acquire addrsize size hexRAM addr = read_mem Read_RISCV_strong_acquire addr size +let MEMr_reserved addrsize size hexRAM addr = read_mem Read_RISCV_reserved addr size +let MEMr_reserved_acquire addrsize size hexRAM addr = read_mem Read_RISCV_reserved_acquire addr size +let MEMr_reserved_strong_acquire addrsize size hexRAM addr = read_mem Read_RISCV_reserved_strong_acquire addr size + +val write_ram : forall 'rv 'a 'b 'e. Size 'a, Size 'b => + integer -> integer -> bitvector 'a -> bitvector 'a -> bitvector 'b -> monad 'rv bool 'e +let write_ram addrsize size hexRAM address value = + write_mem Write_plain address size value + +val read_ram : forall 'rv 'a 'b 'e. Size 'a, Size 'b => + integer -> integer -> bitvector 'a -> bitvector 'a -> monad 'rv (bitvector 'b) 'e +let read_ram addrsize size hexRAM address = + read_mem Read_plain address size + +val load_reservation : forall 'a. Size 'a => bitvector 'a -> unit +let load_reservation addr = () + +let speculate_conditional_success () = excl_result () + +let match_reservation _ = true +let cancel_reservation () = () + +val sys_enable_writable_misa : unit -> bool +let sys_enable_writable_misa () = true +declare ocaml target_rep function sys_enable_writable_misa = `Platform.enable_writable_misa` + +val sys_enable_rvc : unit -> bool +let sys_enable_rvc () = true +declare ocaml target_rep function sys_enable_rvc = `Platform.enable_rvc` + +val sys_enable_next : unit -> bool +let sys_enable_next () = true +declare ocaml target_rep function sys_enable_next = `Platform.enable_next` + +val plat_ram_base : forall 'a. Size 'a => unit -> bitvector 'a +let plat_ram_base () = wordFromInteger 0 +declare ocaml target_rep function plat_ram_base = `Platform.dram_base` + +val plat_ram_size : forall 'a. Size 'a => unit -> bitvector 'a +let plat_ram_size () = wordFromInteger 0 +declare ocaml target_rep function plat_ram_size = `Platform.dram_size` + +val plat_rom_base : forall 'a. Size 'a => unit -> bitvector 'a +let plat_rom_base () = wordFromInteger 0 +declare ocaml target_rep function plat_rom_base = `Platform.rom_base` + +val plat_rom_size : forall 'a. Size 'a => unit -> bitvector 'a +let plat_rom_size () = wordFromInteger 0 +declare ocaml target_rep function plat_rom_size = `Platform.rom_size` + +val plat_clint_base : forall 'a. Size 'a => unit -> bitvector 'a +let plat_clint_base () = wordFromInteger 0 +declare ocaml target_rep function plat_clint_base = `Platform.clint_base` + +val plat_clint_size : forall 'a. Size 'a => unit -> bitvector 'a +let plat_clint_size () = wordFromInteger 0 +declare ocaml target_rep function plat_clint_size = `Platform.clint_size` + +val plat_enable_dirty_update : unit -> bool +let plat_enable_dirty_update () = false +declare ocaml target_rep function plat_enable_dirty_update = `Platform.enable_dirty_update` + +val plat_enable_misaligned_access : unit -> bool +let plat_enable_misaligned_access () = false +declare ocaml target_rep function plat_enable_misaligned_access = `Platform.enable_misaligned_access` + +val plat_enable_pmp : unit -> bool +let plat_enable_pmp () = false +declare ocaml target_rep function plat_enable_pmp = `Platform.enable_pmp` + +val plat_mtval_has_illegal_inst_bits : unit -> bool +let plat_mtval_has_illegal_inst_bits () = false +declare ocaml target_rep function plat_mtval_has_illegal_inst_bits = `Platform.mtval_has_illegal_inst_bits` + +val plat_insns_per_tick : unit -> integer +let plat_insns_per_tick () = 1 +declare ocaml target_rep function plat_insns_per_tick = `Platform.insns_per_tick` + +val plat_htif_tohost : forall 'a. Size 'a => unit -> bitvector 'a +let plat_htif_tohost () = wordFromInteger 0 +declare ocaml target_rep function plat_htif_tohost = `Platform.htif_tohost` + +val plat_term_write : forall 'a. Size 'a => bitvector 'a -> unit +let plat_term_write _ = () +declare ocaml target_rep function plat_term_write = `Platform.term_write` + +val plat_term_read : forall 'a. Size 'a => unit -> bitvector 'a +let plat_term_read () = wordFromInteger 0 +declare ocaml target_rep function plat_term_read = `Platform.term_read` + +val shift_bits_right : forall 'a 'b. Size 'a, Size 'b => bitvector 'a -> bitvector 'b -> bitvector 'a +let shift_bits_right v m = shiftr v (uint m) +val shift_bits_left : forall 'a 'b. Size 'a, Size 'b => bitvector 'a -> bitvector 'b -> bitvector 'a +let shift_bits_left v m = shiftl v (uint m) + +val print_string : string -> string -> unit +let print_string msg s = () (* print_endline (msg ^ s) *) + +val prerr_string : string -> string -> unit +let prerr_string msg s = prerr_endline (msg ^ s) + +val prerr_bits : forall 'a. Size 'a => string -> bitvector 'a -> unit +let prerr_bits msg bs = prerr_endline (msg ^ (show_bitlist (bits_of bs))) + +val print_bits : forall 'a. Size 'a => string -> bitvector 'a -> unit +let print_bits msg bs = () (* print_endline (msg ^ (show_bitlist (bits_of bs))) *) + +val print_dbg : string -> unit +let print_dbg msg = () diff --git a/handwritten_support/Holmakefile b/handwritten_support/Holmakefile new file mode 100644 index 0000000..dd483e9 --- /dev/null +++ b/handwritten_support/Holmakefile @@ -0,0 +1,13 @@ +INCLUDES = $(LEM_DIR)/hol-lib $(SAIL_LIB_DIR)/hol + +SCRIPTS = riscv_extrasScript.sml riscv_typesScript.sml riscvScript.sml + +THYS = $(patsubst %Script.sml,%Theory.uo,$(SCRIPTS)) + +all: $(THYS) +.PHONY: all + +ifdef POLY +BASE_HEAP = $(SAIL_LIB_DIR)/hol/sail-heap + +endif diff --git a/handwritten_support/ROOT b/handwritten_support/ROOT new file mode 100644 index 0000000..281bd26 --- /dev/null +++ b/handwritten_support/ROOT @@ -0,0 +1,9 @@ +session "Sail-RISC-V" = "Sail" + + options [document = false] + theories + "Riscv_lemmas" + +session "Sail-RISC-V-Duopod" = "Sail" + + options [document = false] + theories + "Riscv_duopod_lemmas" diff --git a/handwritten_support/hgen/ast.hgen b/handwritten_support/hgen/ast.hgen new file mode 100644 index 0000000..25d19a4 --- /dev/null +++ b/handwritten_support/hgen/ast.hgen @@ -0,0 +1,22 @@ +| `RISCVStopFetching (* this is a special instruction used by rmem to + indicate the end of a litmus thread *) +| `RISCVThreadStart (* this instruction indicates a thread creation in ELF files *) + +| `RISCVUTYPE of bit20 * reg * riscvUop +| `RISCVJAL of bit20 * reg +| `RISCVJALR of bit12 * reg * reg +| `RISCVBType of bit12 * reg * reg * riscvBop +| `RISCVIType of bit12 * reg * reg * riscvIop +| `RISCVShiftIop of bit6 * reg * reg * riscvSop +| `RISCVRType of reg * reg * reg * riscvRop +| `RISCVLoad of bit12 * reg * reg * bool * wordWidth * bool * bool +| `RISCVStore of bit12 * reg * reg * wordWidth * bool * bool +| `RISCVADDIW of bit12 * reg * reg +| `RISCVSHIFTW of bit5 * reg * reg * riscvSop +| `RISCVRTYPEW of reg * reg * reg * riscvRopw +| `RISCVFENCE of bit4 * bit4 +| `RISCVFENCE_TSO of bit4 * bit4 +| `RISCVFENCEI +| `RISCVLoadRes of bool * bool * reg * wordWidth * reg +| `RISCVStoreCon of bool * bool * reg * reg * wordWidth * reg +| `RISCVAMO of riscvAmoop * bool * bool * reg * reg * wordWidth * reg diff --git a/handwritten_support/hgen/fold.hgen b/handwritten_support/hgen/fold.hgen new file mode 100644 index 0000000..7f9d05c --- /dev/null +++ b/handwritten_support/hgen/fold.hgen @@ -0,0 +1,21 @@ +| `RISCVThreadStart -> (y_reg, y_sreg) +| `RISCVStopFetching -> (y_reg, y_sreg) + +| `RISCVUTYPE (_, r0, _) -> fold_reg r0 (y_reg, y_sreg) +| `RISCVJAL (_, r0) -> fold_reg r0 (y_reg, y_sreg) +| `RISCVJALR (_, r0, r1) -> fold_reg r0 (fold_reg r1 (y_reg, y_sreg)) +| `RISCVBType (_, r0, r1, _) -> fold_reg r0 (fold_reg r1 (y_reg, y_sreg)) +| `RISCVIType (_, r0, r1, _) -> fold_reg r0 (fold_reg r1 (y_reg, y_sreg)) +| `RISCVShiftIop (_, r0, r1, _) -> fold_reg r0 (fold_reg r1 (y_reg, y_sreg)) +| `RISCVRType (r0, r1, r2, _) -> fold_reg r0 (fold_reg r1 (fold_reg r2 (y_reg, y_sreg))) +| `RISCVLoad (_, r0, r1, _, _, _, _) -> fold_reg r0 (fold_reg r1 (y_reg, y_sreg)) +| `RISCVStore (_, r0, r1, _, _, _) -> fold_reg r0 (fold_reg r1 (y_reg, y_sreg)) +| `RISCVADDIW (_, r0, r1) -> fold_reg r0 (fold_reg r1 (y_reg, y_sreg)) +| `RISCVSHIFTW (_, r0, r1, _) -> fold_reg r0 (fold_reg r1 (y_reg, y_sreg)) +| `RISCVRTYPEW (r0, r1, r2, _) -> fold_reg r0 (fold_reg r1 (fold_reg r2 (y_reg, y_sreg))) +| `RISCVFENCE (_, _) -> (y_reg, y_sreg) +| `RISCVFENCE_TSO (_, _) -> (y_reg, y_sreg) +| `RISCVFENCEI -> (y_reg, y_sreg) +| `RISCVLoadRes (_, _, rs1, _, rd) -> fold_reg rs1 (fold_reg rd (y_reg, y_sreg)) +| `RISCVStoreCon (_, _, rs2, rs1, _, rd) -> fold_reg rs2 (fold_reg rs1 (fold_reg rd (y_reg, y_sreg))) +| `RISCVAMO (_, _, _, rs2, rs1, _, rd) -> fold_reg rs2 (fold_reg rs1 (fold_reg rd (y_reg, y_sreg))) diff --git a/handwritten_support/hgen/herdtools_ast_to_shallow_ast.hgen b/handwritten_support/hgen/herdtools_ast_to_shallow_ast.hgen new file mode 100644 index 0000000..2ebef02 --- /dev/null +++ b/handwritten_support/hgen/herdtools_ast_to_shallow_ast.hgen @@ -0,0 +1,91 @@ +| `RISCVThreadStart -> THREAD_START() +| `RISCVStopFetching -> STOP_FETCHING() + +| `RISCVUTYPE(imm, rd, op) -> UTYPE( + translate_imm20 "imm" imm, + translate_reg "rd" rd, + translate_uop op) +| `RISCVJAL(imm, rd) -> RISCV_JAL( + translate_imm21 "imm" imm, + translate_reg "rd" rd) +| `RISCVJALR(imm, rs, rd) -> RISCV_JALR( + translate_imm12 "imm" imm, + translate_reg "rs" rd, + translate_reg "rd" rd) +| `RISCVBType(imm, rs2, rs1, op) -> BTYPE( + translate_imm13 "imm" imm, + translate_reg "rs2" rs2, + translate_reg "rs1" rs1, + translate_bop op) +| `RISCVIType(imm, rs1, rd, op) -> ITYPE( + translate_imm12 "imm" imm, + translate_reg "rs1" rs1, + translate_reg "rd" rd, + translate_iop op) +| `RISCVShiftIop(imm, rs, rd, op) -> SHIFTIOP( + translate_imm6 "imm" imm, + translate_reg "rs" rs, + translate_reg "rd" rd, + translate_sop op) +| `RISCVRType (rs2, rs1, rd, op) -> RTYPE ( + translate_reg "rs2" rs2, + translate_reg "rs1" rs1, + translate_reg "rd" rd, + translate_rop op) +| `RISCVLoad(imm, rs, rd, unsigned, width, aq, rl) -> LOAD( + translate_imm12 "imm" imm, + translate_reg "rs" rs, + translate_reg "rd" rd, + translate_bool "unsigned" unsigned, + translate_wordWidth width, + translate_bool "aq" aq, + translate_bool "rl" rl) +| `RISCVStore(imm, rs, rd, width, aq, rl) -> STORE ( + translate_imm12 "imm" imm, + translate_reg "rs" rs, + translate_reg "rd" rd, + translate_wordWidth width, + translate_bool "aq" aq, + translate_bool "rl" rl) +| `RISCVADDIW(imm, rs, rd) -> ADDIW( + translate_imm12 "imm" imm, + translate_reg "rs" rs, + translate_reg "rd" rd) +| `RISCVSHIFTW(imm, rs, rd, op) -> SHIFTW( + translate_imm5 "imm" imm, + translate_reg "rs" rs, + translate_reg "rd" rd, + translate_sop op) +| `RISCVRTYPEW(rs2, rs1, rd, op) -> RTYPEW( + translate_reg "rs2" rs2, + translate_reg "rs1" rs1, + translate_reg "rd" rd, + translate_ropw op) +| `RISCVFENCE(pred, succ) -> FENCE( + translate_imm4 "pred" pred, + translate_imm4 "succ" succ) +| `RISCVFENCE_TSO(pred, succ) -> FENCE_TSO( + translate_imm4 "pred" pred, + translate_imm4 "succ" succ) +| `RISCVFENCEI -> FENCEI () +| `RISCVLoadRes(aq, rl, rs1, width, rd) -> LOADRES( + translate_bool "aq" aq, + translate_bool "rl" rl, + translate_reg "rs1" rs1, + translate_wordWidth width, + translate_reg "rd" rd) +| `RISCVStoreCon(aq, rl, rs2, rs1, width, rd) -> STORECON( + translate_bool "aq" aq, + translate_bool "rl" rl, + translate_reg "rs2" rs2, + translate_reg "rs1" rs1, + translate_wordWidth width, + translate_reg "rd" rd) +| `RISCVAMO (op, aq, rl, rs2, rs1, width, rd) -> AMO( + translate_amoop op, + translate_bool "aq" aq, + translate_bool "rl" rl, + translate_reg "rs2" rs2, + translate_reg "rs1" rs1, + translate_wordWidth width, + translate_reg "rd" rd) diff --git a/handwritten_support/hgen/herdtools_types_to_shallow_types.hgen b/handwritten_support/hgen/herdtools_types_to_shallow_types.hgen new file mode 100644 index 0000000..8bd311b --- /dev/null +++ b/handwritten_support/hgen/herdtools_types_to_shallow_types.hgen @@ -0,0 +1,90 @@ +let is_inc = false + +let translate_reg name value = + Lem_machine_word.wordFromInteger Lem_machine_word.instance_Machine_word_Size_Machine_word_ty5_dict (Nat_big_num.of_int (reg_to_int value)) + +let translate_uop op = match op with + | RISCVLUI -> RISCV_LUI + | RISCVAUIPC -> RISCV_AUIPC + +let translate_bop op = match op with + | RISCVBEQ -> RISCV_BEQ + | RISCVBNE -> RISCV_BNE + | RISCVBLT -> RISCV_BLT + | RISCVBGE -> RISCV_BGE + | RISCVBLTU -> RISCV_BLTU + | RISCVBGEU -> RISCV_BGEU + +let translate_iop op = match op with + | RISCVADDI -> RISCV_ADDI + | RISCVSLTI -> RISCV_SLTI + | RISCVSLTIU -> RISCV_SLTIU + | RISCVXORI -> RISCV_XORI + | RISCVORI -> RISCV_ORI + | RISCVANDI -> RISCV_ANDI + +let translate_sop op = match op with + | RISCVSLLI -> RISCV_SLLI + | RISCVSRLI -> RISCV_SRLI + | RISCVSRAI -> RISCV_SRAI + +let translate_rop op = match op with + | RISCVADD -> RISCV_ADD + | RISCVSUB -> RISCV_SUB + | RISCVSLL -> RISCV_SLL + | RISCVSLT -> RISCV_SLT + | RISCVSLTU -> RISCV_SLTU + | RISCVXOR -> RISCV_XOR + | RISCVSRL -> RISCV_SRL + | RISCVSRA -> RISCV_SRA + | RISCVOR -> RISCV_OR + | RISCVAND -> RISCV_AND + +let translate_ropw op = match op with + | RISCVADDW -> RISCV_ADDW + | RISCVSUBW -> RISCV_SUBW + | RISCVSLLW -> RISCV_SLLW + | RISCVSRLW -> RISCV_SRLW + | RISCVSRAW -> RISCV_SRAW + +let translate_amoop op = match op with + | RISCVAMOSWAP -> AMOSWAP + | RISCVAMOADD -> AMOADD + | RISCVAMOXOR -> AMOXOR + | RISCVAMOAND -> AMOAND + | RISCVAMOOR -> AMOOR + | RISCVAMOMIN -> AMOMIN + | RISCVAMOMAX -> AMOMAX + | RISCVAMOMINU -> AMOMINU + | RISCVAMOMAXU -> AMOMAXU + +let translate_wordWidth op = match op with + | RISCVBYTE -> BYTE + | RISCVHALF -> HALF + | RISCVWORD -> WORD + | RISCVDOUBLE -> DOUBLE + +let translate_bool name b = b (* function + * | true -> trueSail2_values.B10 + * | false -> false Sail2_values.B00 *) + +let translate_imm21 name value = + Lem_machine_word.wordFromInteger Lem_machine_word.instance_Machine_word_Size_Machine_word_ty21_dict (Nat_big_num.of_int value) + +let translate_imm20 name value = + Lem_machine_word.wordFromInteger Lem_machine_word.instance_Machine_word_Size_Machine_word_ty20_dict (Nat_big_num.of_int value) + +let translate_imm13 name value = + Lem_machine_word.wordFromInteger Lem_machine_word.instance_Machine_word_Size_Machine_word_ty13_dict (Nat_big_num.of_int value) + +let translate_imm12 name value = + Lem_machine_word.wordFromInteger Lem_machine_word.instance_Machine_word_Size_Machine_word_ty12_dict (Nat_big_num.of_int value) + +let translate_imm6 name value = + Lem_machine_word.wordFromInteger Lem_machine_word.instance_Machine_word_Size_Machine_word_ty6_dict (Nat_big_num.of_int value) + +let translate_imm5 name value = + Lem_machine_word.wordFromInteger Lem_machine_word.instance_Machine_word_Size_Machine_word_ty5_dict (Nat_big_num.of_int value) + +let translate_imm4 name value = + Lem_machine_word.wordFromInteger Lem_machine_word.instance_Machine_word_Size_Machine_word_ty4_dict (Nat_big_num.of_int value) diff --git a/handwritten_support/hgen/lexer.hgen b/handwritten_support/hgen/lexer.hgen new file mode 100644 index 0000000..9009f33 --- /dev/null +++ b/handwritten_support/hgen/lexer.hgen @@ -0,0 +1,63 @@ +(** RV32I (and RV64I) ***********************************************) +"lui" , UTYPE { op=RISCVLUI }; +"auipc" , UTYPE { op=RISCVAUIPC }; + +"jal", JAL (); +"jalr", JALR (); + +"beq", BTYPE {op=RISCVBEQ}; +"bne", BTYPE {op=RISCVBNE}; +"blt", BTYPE {op=RISCVBLT}; +"bge", BTYPE {op=RISCVBGE}; +"bltu", BTYPE {op=RISCVBLTU}; +"bgeu", BTYPE {op=RISCVBGEU}; + +"addi", ITYPE {op=RISCVADDI}; +"stli", ITYPE {op=RISCVSLTI}; +"sltiu", ITYPE {op=RISCVSLTIU}; +"xori", ITYPE {op=RISCVXORI}; +"ori", ITYPE {op=RISCVORI}; +"andi", ITYPE {op=RISCVANDI}; + +"add", RTYPE {op=RISCVADD}; +"sub", RTYPE {op=RISCVSUB}; +"sll", RTYPE {op=RISCVSLL}; +"slt", RTYPE {op=RISCVSLT}; +"sltu", RTYPE {op=RISCVSLT}; +"xor", RTYPE {op=RISCVXOR}; +"srl", RTYPE {op=RISCVSRL}; +"sra", RTYPE {op=RISCVSRA}; +"or", RTYPE {op=RISCVOR}; +"and", RTYPE {op=RISCVAND}; + +"fence", FENCE (); +"fence.tso", FENCETSO (); +"fence.i", FENCEI (); + +(** RV64I (in addition to RV32I) ************************************) + +"addiw", ADDIW (); + +"addw", RTYPEW {op=RISCVADDW}; +"subw", RTYPEW {op=RISCVSUBW}; +"sllw", RTYPEW {op=RISCVSLLW}; +"srlw", RTYPEW {op=RISCVSRLW}; +"sraw", RTYPEW {op=RISCVSRAW}; + +"slli", SHIFTIOP {op=RISCVSLLI}; +"srli", SHIFTIOP {op=RISCVSRLI}; +"srai", SHIFTIOP {op=RISCVSRAI}; + +"slliw", SHIFTW {op=RISCVSLLI}; +"srliw", SHIFTW {op=RISCVSRLI}; +"sraiw", SHIFTW {op=RISCVSRAI}; + +(** RV32A (and RV64A) ***********************************************) + +"r", FENCEOPTION Fence_R; +"w", FENCEOPTION Fence_W; +"rw", FENCEOPTION Fence_RW; + +(** pseudo instructions *********************************************) + +"li", LI () diff --git a/handwritten_support/hgen/lexer_regexps.hgen b/handwritten_support/hgen/lexer_regexps.hgen new file mode 100644 index 0000000..b8f3ca6 --- /dev/null +++ b/handwritten_support/hgen/lexer_regexps.hgen @@ -0,0 +1,131 @@ +(** RV32I (and RV64I) ***********************************************) + +| 'l' (('b'|'h') as width) ("u"? as u) (".aq"? as aq) (".rl"? as rl) as load + { if (rl = ".rl") && not (aq = ".aq") then failwith ("'" ^ load ^ "' is not a valid instruction") else + LOAD { width = (match width with 'b' -> RISCVBYTE | 'h' -> RISCVHALF | _ -> failwith "bad width"); + unsigned = (u = "u"); + aq = (aq = ".aq"); + rl = (rl = ".rl"); + } + } + +| "lw" (".aq"? as aq) (".rl"? as rl) as load + { if (rl = ".rl") && not (aq = ".aq") then failwith ("'" ^ load ^ "' is not a valid instruction") else + LOAD { width = RISCVWORD; + unsigned = false; + aq = (aq = ".aq"); + rl = (rl = ".rl"); + } + } + +| 's' (('b'|'h'|'w') as width) (".aq"? as aq) (".rl"? as rl) as store + { if (aq = ".aq") && not (rl = ".rl") then failwith ("'" ^ store ^ "' is not a valid instruction") else + STORE { width = (match width with 'b' -> RISCVBYTE | 'h' -> RISCVHALF | 'w' -> RISCVWORD | _ -> failwith "bad width"); + aq = (aq = ".aq"); + rl = (rl = ".rl"); + } + } + +(** RV64I (in addition to RV32I) ************************************) + +| "lwu" (".aq"? as aq) (".rl"? as rl) as load + { if (rl = ".rl") && not (aq = ".aq") then failwith ("'" ^ load ^ "' is not a valid instruction") else + LOAD { width = RISCVWORD; + unsigned = true; + aq = (aq = ".aq"); + rl = (rl = ".rl"); + } + } + +| "ld" (".aq"? as aq) (".rl"? as rl) as load + { if (rl = ".rl") && not (aq = ".aq") then failwith ("'" ^ load ^ "' is not a valid instruction") else + LOAD { width = RISCVDOUBLE; + unsigned = false; + aq = (aq = ".aq"); + rl = (rl = ".rl"); + } + } + +| "sd" (".aq"? as aq) (".rl"? as rl) as store + { if (aq = ".aq") && not (rl = ".rl") then failwith ("'" ^ store ^ "' is not a valid instruction") else + STORE { width = RISCVDOUBLE; + aq = (aq = ".aq"); + rl = (rl = ".rl"); + } + } + +(** RV32A (and RV64A) ***********************************************) + +| "lr.w" (".aq"? as aq) (".rl"? as rl) as lr + { if (rl = ".rl") && not (aq = ".aq") then failwith ("'" ^ lr ^ "' is not a valid instruction") else + LOADRES { width = RISCVWORD; + aq = (aq = ".aq"); + rl = (rl = ".rl"); + } + } + +| "sc.w" (".aq"? as aq) (".rl"? as rl) as sc + { if (aq = ".aq") && not (rl = ".rl") then failwith ("'" ^ sc ^ "' is not a valid instruction") else + STORECON { width = RISCVWORD; + aq = (aq = ".aq"); + rl = (rl = ".rl"); + } + } + +| "amo" (("swap"|"add"|"and"|"or"|"xor"|"max"|"min"|"maxu"|"minu") as op) ".w" (".aq"? as aq) (".rl"? as rl) + { AMO { op = + begin match op with + | "swap" -> RISCVAMOSWAP; + | "add" -> RISCVAMOADD; + | "and" -> RISCVAMOAND; + | "or" -> RISCVAMOOR; + | "xor" -> RISCVAMOXOR; + | "max" -> RISCVAMOMAX; + | "min" -> RISCVAMOMIN; + | "maxu" -> RISCVAMOMAXU; + | "minu" -> RISCVAMOMINU; + | _ -> failwith "bad amo" + end; + width = RISCVWORD; + aq = (aq = ".aq"); + rl = (rl = ".rl"); + } + } + +(** RV64A (in addition to RV32A) ************************************) + +| "lr.d" (".aq"? as aq) (".rl"? as rl) as lr + { if (rl = ".rl") && not (aq = ".aq") then failwith ("'" ^ lr ^ "' is not a valid instruction") else + LOADRES { width = RISCVDOUBLE; + aq = (aq = ".aq"); + rl = (rl = ".rl"); + } + } + +| "sc.d" (".aq"? as aq) (".rl"? as rl) as sc + { if (aq = ".aq") && not (rl = ".rl") then failwith ("'" ^ sc ^ "' is not a valid instruction") else + STORECON { width = RISCVDOUBLE; + aq = (aq = ".aq"); + rl = (rl = ".rl"); + } + } + +| "amo" (("swap"|"add"|"and"|"or"|"xor"|"max"|"min"|"maxu"|"minu") as op) ".d" (".aq"? as aq) (".rl"? as rl) + { AMO { op = + begin match op with + | "swap" -> RISCVAMOSWAP; + | "add" -> RISCVAMOADD; + | "and" -> RISCVAMOAND; + | "or" -> RISCVAMOOR; + | "xor" -> RISCVAMOXOR; + | "max" -> RISCVAMOMAX; + | "min" -> RISCVAMOMIN; + | "maxu" -> RISCVAMOMAXU; + | "minu" -> RISCVAMOMINU; + | _ -> failwith "bad amo" + end; + width = RISCVDOUBLE; + aq = (aq = ".aq"); + rl = (rl = ".rl"); + } + } diff --git a/handwritten_support/hgen/map.hgen b/handwritten_support/hgen/map.hgen new file mode 100644 index 0000000..aa3882e --- /dev/null +++ b/handwritten_support/hgen/map.hgen @@ -0,0 +1,21 @@ +| `RISCVThreadStart -> `RISCVThreadStart +| `RISCVStopFetching -> `RISCVStopFetching + +| `RISCVUTYPE (x, r0, y) -> `RISCVUTYPE (x, map_reg r0, y) +| `RISCVJAL (x, r0) -> `RISCVJAL (x, map_reg r0) +| `RISCVJALR (x, r0, r1) -> `RISCVJALR (x, map_reg r0, map_reg r1) +| `RISCVBType (x, r0, r1, y) -> `RISCVBType (x, map_reg r0, map_reg r1, y) +| `RISCVIType (x, r0, r1, y) -> `RISCVIType (x, map_reg r0, map_reg r1, y) +| `RISCVShiftIop (x, r0, r1, y) -> `RISCVShiftIop (x, map_reg r0, map_reg r1, y) +| `RISCVRType (r0, r1, r2, y) -> `RISCVRType (r0, map_reg r1, map_reg r2, y) +| `RISCVLoad (x, r0, r1, y, z, a, b) -> `RISCVLoad (x, map_reg r0, map_reg r1, y, z, a, b) +| `RISCVStore (x, r0, r1, y, z, a) -> `RISCVStore (x, map_reg r0, map_reg r1, y, z, a) +| `RISCVADDIW (x, r0, r1) -> `RISCVADDIW (x, map_reg r0, map_reg r1) +| `RISCVSHIFTW (x, r0, r1, y) -> `RISCVSHIFTW (x, map_reg r0, map_reg r1, y) +| `RISCVRTYPEW (r0, r1, r2, x) -> `RISCVRTYPEW (r0, map_reg r1, map_reg r2, x) +| `RISCVFENCE (p, s) -> `RISCVFENCE (p, s) +| `RISCVFENCE_TSO (p, s) -> `RISCVFENCE_TSO (p, s) +| `RISCVFENCEI -> `RISCVFENCEI +| `RISCVLoadRes (aq, rl, rs1, w, rd) -> `RISCVLoadRes (aq, rl, map_reg rs1, w, map_reg rd) +| `RISCVStoreCon (aq, rl, rs2, rs1, w, rd) -> `RISCVStoreCon (aq, rl, map_reg rs2, map_reg rs1, w, map_reg rd) +| `RISCVAMO (op, aq, rl, rs2, rs1, w, rd) -> `RISCVAMO (op, aq, rl, map_reg rs2, map_reg rs1, w, map_reg rd) diff --git a/handwritten_support/hgen/parser.hgen b/handwritten_support/hgen/parser.hgen new file mode 100644 index 0000000..a4d5c07 --- /dev/null +++ b/handwritten_support/hgen/parser.hgen @@ -0,0 +1,76 @@ +| UTYPE reg COMMA NUM + { (* it's not clear if NUM here should be before or after filling the + lowest 12 bits with zeros, or if it should be signed or unsigned; + currently assuming: NUM does not include the 12 zeros, and is unsigned *) + if not (iskbituimm 20 $4) then failwith "immediate is not 20bit" + else `RISCVUTYPE ($4, $2, $1.op) } +| JAL reg COMMA NUM + { if not ($4 mod 2 = 0) then failwith "odd offset" + else if not (iskbitsimm 21 $4) then failwith "offset is not 21bit" + else `RISCVJAL ($4, $2) } +| JALR reg COMMA reg COMMA NUM + { if not (iskbitsimm 12 $6) then failwith "offset is not 12bit" + else `RISCVJALR ($6, $4, $2) } +| BTYPE reg COMMA reg COMMA NUM + { if not ($6 mod 2 = 0) then failwith "odd offset" + else if not (iskbitsimm 13 $6) then failwith "offset is not 13bit" + else `RISCVBType ($6, $4, $2, $1.op) } +| ITYPE reg COMMA reg COMMA NUM + { if $1.op <> RISCVSLTIU && not (iskbitsimm 12 $6) then failwith "immediate is not 12bit" + else if $1.op = RISCVSLTIU && not (iskbituimm 12 $6) then failwith "unsigned immediate is not 12bit" + else `RISCVIType ($6, $4, $2, $1.op) } +| ADDIW reg COMMA reg COMMA NUM + { if not (iskbitsimm 12 $6) then failwith "immediate is not 12bit" + else `RISCVADDIW ($6, $4, $2) } +| SHIFTIOP reg COMMA reg COMMA NUM + { if not (iskbituimm 6 $6) then failwith "unsigned immediate is not 6bit" + else `RISCVShiftIop ($6, $4, $2, $1.op) } +| SHIFTW reg COMMA reg COMMA NUM + { if not (iskbituimm 5 $6) then failwith "unsigned immediate is not 5bit" + else `RISCVSHIFTW ($6, $4, $2, $1.op) } +| RTYPE reg COMMA reg COMMA reg + { `RISCVRType ($6, $4, $2, $1.op) } +| LOAD reg COMMA NUM LPAR reg RPAR + { if not (iskbitsimm 12 $4) then failwith "offset is not 12bit" + else `RISCVLoad ($4, $6, $2, $1.unsigned, $1.width, $1.aq, $1.rl) } +| STORE reg COMMA NUM LPAR reg RPAR + { if not (iskbitsimm 12 $4) then failwith "offset is not 12bit" + else `RISCVStore ($4, $2, $6, $1.width, $1.aq, $1.rl) } +| RTYPEW reg COMMA reg COMMA reg + { `RISCVRTYPEW ($6, $4, $2, $1.op) } +| FENCE FENCEOPTION COMMA FENCEOPTION + { match ($2, $4) with + | (Fence_RW, Fence_RW) -> `RISCVFENCE (0b0011, 0b0011) + | (Fence_R, Fence_RW) -> `RISCVFENCE (0b0010, 0b0011) + | (Fence_W, Fence_RW) -> `RISCVFENCE (0b0001, 0b0011) + | (Fence_RW, Fence_R) -> `RISCVFENCE (0b0011, 0b0010) + | (Fence_R, Fence_R) -> `RISCVFENCE (0b0010, 0b0010) + | (Fence_W, Fence_R) -> `RISCVFENCE (0b0001, 0b0010) + | (Fence_RW, Fence_W) -> `RISCVFENCE (0b0011, 0b0001) + | (Fence_R, Fence_W) -> `RISCVFENCE (0b0010, 0b0001) + | (Fence_W, Fence_W) -> `RISCVFENCE (0b0001, 0b0001) + } +| FENCETSO + { `RISCVFENCE_TSO (0b0011, 0b0011) } +| FENCEI + { `RISCVFENCEI } +| LOADRES reg COMMA LPAR reg RPAR + { `RISCVLoadRes ($1.aq, $1.rl, $5, $1.width, $2) } +| LOADRES reg COMMA NUM LPAR reg RPAR + { if $4 <> 0 then failwith "'lr' offset must be 0" else + `RISCVLoadRes ($1.aq, $1.rl, $6, $1.width, $2) } +| STORECON reg COMMA reg COMMA LPAR reg RPAR + { `RISCVStoreCon ($1.aq, $1.rl, $4, $7, $1.width, $2) } +| STORECON reg COMMA reg COMMA NUM LPAR reg RPAR + { if $6 <> 0 then failwith "'sc' offset must be 0" else + `RISCVStoreCon ($1.aq, $1.rl, $4, $8, $1.width, $2) } +| AMO reg COMMA reg COMMA LPAR reg RPAR + { `RISCVAMO ($1.op, $1.aq, $1.rl, $4, $7, $1.width, $2) } +| AMO reg COMMA reg COMMA NUM LPAR reg RPAR + { if $6 <> 0 then failwith "'amo<op>' offset must be 0" else + `RISCVAMO ($1.op, $1.aq, $1.rl, $4, $8, $1.width, $2) } + +/* pseudo-ops */ +| LI reg COMMA NUM + { if not (iskbitsimm 12 $4) then failwith "immediate is not 12bit (li is currently implemented only with small immediate)" + else `RISCVIType ($4, IReg R0, $2, RISCVORI) } diff --git a/handwritten_support/hgen/pretty.hgen b/handwritten_support/hgen/pretty.hgen new file mode 100644 index 0000000..3e6e6d1 --- /dev/null +++ b/handwritten_support/hgen/pretty.hgen @@ -0,0 +1,36 @@ +| `RISCVThreadStart -> "start" +| `RISCVStopFetching -> "stop" + +| `RISCVUTYPE(imm, rd, op) -> sprintf "%s %s, %d" (pp_riscv_uop op) (pp_reg rd) imm +| `RISCVJAL(imm, rd) -> sprintf "jal %s, %d" (pp_reg rd) imm +| `RISCVJALR(imm, rs, rd) -> sprintf "jalr %s, %s, %d" (pp_reg rd) (pp_reg rs) imm +| `RISCVBType(imm, rs2, rs1, op) -> sprintf "%s %s, %s, %d" (pp_riscv_bop op) (pp_reg rs1) (pp_reg rs2) imm +| `RISCVIType(imm, rs2, rs1, op) -> sprintf "%s %s, %s, %d" (pp_riscv_iop op) (pp_reg rs1) (pp_reg rs2) imm +| `RISCVShiftIop(imm, rs, rd, op) -> sprintf "%s %s, %s, %d" (pp_riscv_sop op) (pp_reg rd) (pp_reg rs) imm +| `RISCVRType (rs2, rs1, rd, op) -> sprintf "%s %s, %s, %s" (pp_riscv_rop op) (pp_reg rd) (pp_reg rs1) (pp_reg rs2) + +| `RISCVLoad(imm, rs, rd, unsigned, width, aq, rl) -> + sprintf "%s %s, %d(%s)" (pp_riscv_load_op (unsigned, width, aq, rl)) (pp_reg rd) imm (pp_reg rs) + +| `RISCVStore(imm, rs2, rs1, width, aq, rl) -> + sprintf "%s %s, %d(%s)" (pp_riscv_store_op (width, aq, rl)) (pp_reg rs2) imm (pp_reg rs1) + +| `RISCVADDIW(imm, rs, rd) -> sprintf "addiw %s, %s, %d" (pp_reg rd) (pp_reg rs) imm +| `RISCVSHIFTW(imm, rs, rd, op) -> sprintf "%s %s, %s, %d" (pp_riscv_sop op) (pp_reg rd) (pp_reg rs) imm +| `RISCVRTYPEW(rs2, rs1, rd, op) -> sprintf "%s %s, %s, %s" (pp_riscv_ropw op) (pp_reg rd) (pp_reg rs1) (pp_reg rs2) + +| `RISCVFENCE(pred, succ) -> sprintf "fence %s,%s" (pp_riscv_fence_option pred) (pp_riscv_fence_option succ) + +| `RISCVFENCE_TSO(0b0011, 0b0011) -> sprintf "fence.tso" +| `RISCVFENCE_TSO(_, _) -> failwith "bad fence.tso" + +| `RISCVFENCEI -> sprintf "fence.i" + +| `RISCVLoadRes(aq, rl, rs1, width, rd) -> + sprintf "%s %s, (%s)" (pp_riscv_load_reserved_op (aq, rl, width)) (pp_reg rd) (pp_reg rs1) + +| `RISCVStoreCon(aq, rl, rs2, rs1, width, rd) -> + sprintf "%s %s, %s, (%s)" (pp_riscv_store_conditional_op (aq, rl, width)) (pp_reg rd) (pp_reg rs2) (pp_reg rs1) + +| `RISCVAMO(op, aq, rl, rs2, rs1, width, rd) -> + sprintf "%s %s, %s, (%s)" (pp_riscv_amo_op (op, aq, rl, width)) (pp_reg rd) (pp_reg rs2) (pp_reg rs1) diff --git a/handwritten_support/hgen/pretty_xml.hgen b/handwritten_support/hgen/pretty_xml.hgen new file mode 100644 index 0000000..be080cd --- /dev/null +++ b/handwritten_support/hgen/pretty_xml.hgen @@ -0,0 +1,143 @@ +| `RISCVThreadStart -> ("op_thread_start", []) + +| `RISCVStopFetching -> ("op_stop_fetching", []) + +| `RISCVUTYPE(imm, rd, op) -> + ("op_U_type", + [ ("op", pp_riscv_uop op); + ("uimm", sprintf "%d" imm); + ("dest", pp_reg rd); + ]) + +| `RISCVJAL(imm, rd) -> + ("op_jal", + [ ("offset", sprintf "%d" imm); + ("dest", pp_reg rd); + ]) + +| `RISCVJALR(imm, rs1, rd) -> + ("op_jalr", + [ ("offset", sprintf "%d" imm); + ("base", pp_reg rs1); + ("dest", pp_reg rd); + ]) + +| `RISCVBType(imm, rs2, rs1, op) -> + ("op_branch", + [ ("op", pp_riscv_bop op); + ("offset", sprintf "%d" imm); + ("src2", pp_reg rs2); + ("src1", pp_reg rs1); + ]) + +| `RISCVIType(imm, rs1, rd, op) -> + ("op_I_type", + [ ("op", pp_riscv_iop op); + ("iimm", sprintf "%d" imm); + ("src", pp_reg rs1); + ("dest", pp_reg rd); + ]) + +| `RISCVShiftIop(imm, rs1, rd, op) -> + ("op_IS_type", + [ ("op", pp_riscv_sop op); + ("shamt", sprintf "%d" imm); + ("src", pp_reg rs1); + ("dest", pp_reg rd); + ]) + +| `RISCVSHIFTW(imm, rs1, rd, op) -> + ("op_ISW_type", + [ ("op", pp_riscv_sop op); + ("shamt", sprintf "%d" imm); + ("src", pp_reg rs1); + ("dest", pp_reg rd); + ]) + +| `RISCVRType (rs2, rs1, rd, op) -> + ("op_R_type", + [ ("op", pp_riscv_rop op); + ("src2", pp_reg rs2); + ("src1", pp_reg rs1); + ("dest", pp_reg rd); + ]) + +| `RISCVLoad(imm, rs1, rd, unsigned, width, aq, rl) -> + ("op_load", + [ ("aq", if aq then "true" else "false"); + ("rl", if rl then "true" else "false"); + ("width", pp_word_width width); + ("unsigned", if unsigned then "true" else "false"); + ("base", pp_reg rs1); + ("offset", sprintf "%d" imm); + ("dest", pp_reg rd); + ]) + +| `RISCVStore(imm, rs2, rs1, width, aq, rl) -> + ("op_store", + [ ("aq", if aq then "true" else "false"); + ("rl", if rl then "true" else "false"); + ("width", pp_word_width width); + ("src", pp_reg rs2); + ("base", pp_reg rs1); + ("offset", sprintf "%d" imm); + ]) + +| `RISCVADDIW(imm, rs1, rd) -> + ("op_addiw", + [ ("iimm", sprintf "%d" imm); + ("src", pp_reg rs1); + ("dest", pp_reg rd); + ]) + +| `RISCVRTYPEW(rs2, rs1, rd, op) -> + ("op_RW_type", + [ ("op", pp_riscv_ropw op); + ("src2", pp_reg rs2); + ("src1", pp_reg rs1); + ("dest", pp_reg rd); + ]) + +| `RISCVFENCE(pred, succ) -> + ("op_fence", + [ ("pred", pp_riscv_fence_option pred); + ("succ", pp_riscv_fence_option succ); + ]) + +| `RISCVFENCE_TSO(pred, succ) -> + ("op_fence_tso", + [ ("pred", pp_riscv_fence_option pred); + ("succ", pp_riscv_fence_option succ); + ]) + +| `RISCVFENCEI -> ("op_fence_i", []) + +| `RISCVLoadRes(aq, rl, rs1, width, rd) -> + ("op_lr", + [ ("aq", if aq then "true" else "false"); + ("rl", if rl then "true" else "false"); + ("width", pp_word_width width); + ("addr", pp_reg rs1); + ("dest", pp_reg rd); + ]) + +| `RISCVStoreCon(aq, rl, rs2, rs1, width, rd) -> + ("op_sc", + [ ("aq", if aq then "true" else "false"); + ("rl", if rl then "true" else "false"); + ("width", pp_word_width width); + ("addr", pp_reg rs1); + ("src", pp_reg rs2); + ("dest", pp_reg rd); + ]) + +| `RISCVAMO(op, aq, rl, rs2, rs1, width, rd) -> + ("op_amo", + [ ("op", pp_riscv_amo_op_part op); + ("aq", if aq then "true" else "false"); + ("rl", if rl then "true" else "false"); + ("width", pp_word_width width); + ("src", pp_reg rs2); + ("addr", pp_reg rs1); + ("dest", pp_reg rd); + ]) diff --git a/handwritten_support/hgen/sail_trans_out.hgen b/handwritten_support/hgen/sail_trans_out.hgen new file mode 100644 index 0000000..0ddc508 --- /dev/null +++ b/handwritten_support/hgen/sail_trans_out.hgen @@ -0,0 +1,27 @@ +| ("StopFetching", []) -> `RISCVStopFetching +| ("ThreadStart", []) -> `RISCVThreadStart + +| ("UTYPE", [imm; rd; op]) -> `RISCVUTYPE(translate_out_simm20 imm, translate_out_ireg rd, translate_out_uop op) +| ("JAL", [imm; rd]) -> `RISCVJAL(translate_out_simm21 imm, translate_out_ireg rd) +| ("JALR", [imm; rs; rd]) -> `RISCVJALR(translate_out_simm12 imm, translate_out_ireg rs, translate_out_ireg rd) +| ("BTYPE", [imm; rs2; rs1; op]) -> `RISCVBType(translate_out_simm13 imm, translate_out_ireg rs2, translate_out_ireg rs1, translate_out_bop op) +| ("ITYPE", [imm; rs1; rd; op]) -> `RISCVIType(translate_out_simm12 imm, translate_out_ireg rs1, translate_out_ireg rd, translate_out_iop op) +| ("SHIFTIOP", [imm; rs; rd; op]) -> `RISCVShiftIop(translate_out_imm6 imm, translate_out_ireg rs, translate_out_ireg rd, translate_out_sop op) +| ("RTYPE", [rs2; rs1; rd; op]) -> `RISCVRType (translate_out_ireg rs2, translate_out_ireg rs1, translate_out_ireg rd, translate_out_rop op) +| ("LOAD", [imm; rs; rd; unsigned; width; aq; rl]) + -> `RISCVLoad(translate_out_simm12 imm, translate_out_ireg rs, translate_out_ireg rd, translate_out_bool unsigned, translate_out_wordWidth width, translate_out_bool aq, translate_out_bool rl) +| ("STORE", [imm; rs; rd; width; aq; rl]) + -> `RISCVStore(translate_out_simm12 imm, translate_out_ireg rs, translate_out_ireg rd, translate_out_wordWidth width, translate_out_bool aq, translate_out_bool rl) +| ("ADDIW", [imm; rs; rd]) -> `RISCVADDIW(translate_out_simm12 imm, translate_out_ireg rs, translate_out_ireg rd) +| ("SHIFTW", [imm; rs; rd; op]) -> `RISCVSHIFTW(translate_out_imm5 imm, translate_out_ireg rs, translate_out_ireg rd, translate_out_sop op) +| ("RTYPEW", [rs2; rs1; rd; op]) -> `RISCVRTYPEW(translate_out_ireg rs2, translate_out_ireg rs1, translate_out_ireg rd, translate_out_ropw op) +| ("FENCE", [0; pred; succ]) -> `RISCVFENCE(translate_out_imm4 pred, translate_out_imm4 succ) +| ("FENCE", [1; pred; succ]) -> `RISCVFENCE_TSO(translate_out_imm4 pred, translate_out_imm4 succ) +| ("FENCE", [_; pred; succ]) -> failwith "Unknown fm_mode in sail translate out" +| ("FENCEI", []) -> `RISCVFENCEI +| ("LOADRES", [aq; rl; rs1; width; rd]) + -> `RISCVLoadRes(translate_out_bool aq, translate_out_bool rl, translate_out_ireg rs1, translate_out_wordWidth width, translate_out_ireg rd) +| ("STORECON", [aq; rl; rs2; rs1; width; rd]) + -> `RISCVStoreCon(translate_out_bool aq, translate_out_bool rl, translate_out_ireg rs2, translate_out_ireg rs1, translate_out_wordWidth width, translate_out_ireg rd) +| ("AMO", [op; aq; rl; rs2; rs1; width; rd]) + -> `RISCVAMO(translate_out_amoop op, translate_out_bool aq, translate_out_bool rl, translate_out_ireg rs2, translate_out_ireg rs1, translate_out_wordWidth width, translate_out_ireg rd) diff --git a/handwritten_support/hgen/shallow_ast_to_herdtools_ast.hgen b/handwritten_support/hgen/shallow_ast_to_herdtools_ast.hgen new file mode 100644 index 0000000..bea72ac --- /dev/null +++ b/handwritten_support/hgen/shallow_ast_to_herdtools_ast.hgen @@ -0,0 +1,26 @@ +| STOP_FETCHING () -> `RISCVStopFetching +| THREAD_START () -> `RISCVThreadStart + +| UTYPE( imm, rd, op) -> `RISCVUTYPE(translate_out_simm20 imm, translate_out_ireg rd, translate_out_uop op) +| RISCV_JAL( imm, rd) -> `RISCVJAL(translate_out_simm21 imm, translate_out_ireg rd) +| RISCV_JALR( imm, rs, rd) -> `RISCVJALR(translate_out_simm12 imm, translate_out_ireg rs, translate_out_ireg rd) +| BTYPE( imm, rs2, rs1, op) -> `RISCVBType(translate_out_simm13 imm, translate_out_ireg rs2, translate_out_ireg rs1, translate_out_bop op) +| ITYPE( imm, rs1, rd, op) -> `RISCVIType(translate_out_simm12 imm, translate_out_ireg rs1, translate_out_ireg rd, translate_out_iop op) +| SHIFTIOP( imm, rs, rd, op) -> `RISCVShiftIop(translate_out_imm6 imm, translate_out_ireg rs, translate_out_ireg rd, translate_out_sop op) +| RTYPE( rs2, rs1, rd, op) -> `RISCVRType (translate_out_ireg rs2, translate_out_ireg rs1, translate_out_ireg rd, translate_out_rop op) +| LOAD( imm, rs, rd, unsigned, width, aq, rl) + -> `RISCVLoad(translate_out_simm12 imm, translate_out_ireg rs, translate_out_ireg rd, translate_out_bool unsigned, translate_out_wordWidth width, translate_out_bool aq, translate_out_bool rl) +| STORE( imm, rs, rd, width, aq, rl) + -> `RISCVStore(translate_out_simm12 imm, translate_out_ireg rs, translate_out_ireg rd, translate_out_wordWidth width, translate_out_bool aq, translate_out_bool rl) +| ADDIW( imm, rs, rd) -> `RISCVADDIW(translate_out_simm12 imm, translate_out_ireg rs, translate_out_ireg rd) +| SHIFTW( imm, rs, rd, op) -> `RISCVSHIFTW(translate_out_imm5 imm, translate_out_ireg rs, translate_out_ireg rd, translate_out_sop op) +| RTYPEW( rs2, rs1, rd, op) -> `RISCVRTYPEW(translate_out_ireg rs2, translate_out_ireg rs1, translate_out_ireg rd, translate_out_ropw op) +| FENCE( pred, succ) -> `RISCVFENCE(translate_out_imm4 pred, translate_out_imm4 succ) +| FENCE_TSO( pred, succ) -> `RISCVFENCE_TSO(translate_out_imm4 pred, translate_out_imm4 succ) +| FENCEI () -> `RISCVFENCEI +| LOADRES( aq, rl, rs1, width, rd) + -> `RISCVLoadRes(translate_out_bool aq, translate_out_bool rl, translate_out_ireg rs1, translate_out_wordWidth width, translate_out_ireg rd) +| STORECON( aq, rl, rs2, rs1, width, rd) + -> `RISCVStoreCon(translate_out_bool aq, translate_out_bool rl, translate_out_ireg rs2, translate_out_ireg rs1, translate_out_wordWidth width, translate_out_ireg rd) +| AMO( op, aq, rl, rs2, rs1, width, rd) + -> `RISCVAMO(translate_out_amoop op, translate_out_bool aq, translate_out_bool rl, translate_out_ireg rs2, translate_out_ireg rs1, translate_out_wordWidth width, translate_out_ireg rd) diff --git a/handwritten_support/hgen/shallow_types_to_herdtools_types.hgen b/handwritten_support/hgen/shallow_types_to_herdtools_types.hgen new file mode 100644 index 0000000..f3e3856 --- /dev/null +++ b/handwritten_support/hgen/shallow_types_to_herdtools_types.hgen @@ -0,0 +1,87 @@ +(* let translate_out_big_bit = Sail_values.unsigned + * + * let translate_out_int inst = (Nat_big_num.to_int (translate_out_big_bit inst)) + * let translate_out_signed_int inst bits = + * let i = (Nat_big_num.to_int (translate_out_big_bit inst)) in + * if (i >= (1 lsl (bits - 1))) then + * (i - (1 lsl bits)) else + * i *) + +let translate_out_int i = Nat_big_num.to_int (Lem.naturalFromWord i) +let translate_out_signed_int i = Nat_big_num.to_int (Lem.signedIntegerFromWord i) + +let translate_out_ireg ireg = IReg (int_to_ireg (translate_out_int ireg)) + +let translate_out_uop op = match op with + | RISCV_LUI -> RISCVLUI + | RISCV_AUIPC -> RISCVAUIPC + +let translate_out_bop op = match op with + | RISCV_BEQ -> RISCVBEQ + | RISCV_BNE -> RISCVBNE + | RISCV_BLT -> RISCVBLT + | RISCV_BGE -> RISCVBGE + | RISCV_BLTU -> RISCVBLTU + | RISCV_BGEU -> RISCVBGEU + +let translate_out_iop op = match op with + | RISCV_ADDI -> RISCVADDI + | RISCV_SLTI -> RISCVSLTI + | RISCV_SLTIU -> RISCVSLTIU + | RISCV_XORI -> RISCVXORI + | RISCV_ORI -> RISCVORI + | RISCV_ANDI -> RISCVANDI + +let translate_out_sop op = match op with + | RISCV_SLLI -> RISCVSLLI + | RISCV_SRLI -> RISCVSRLI + | RISCV_SRAI -> RISCVSRAI + +let translate_out_rop op = match op with + | RISCV_ADD -> RISCVADD + | RISCV_SUB -> RISCVSUB + | RISCV_SLL -> RISCVSLL + | RISCV_SLT -> RISCVSLT + | RISCV_SLTU -> RISCVSLTU + | RISCV_XOR -> RISCVXOR + | RISCV_SRL -> RISCVSRL + | RISCV_SRA -> RISCVSRA + | RISCV_OR -> RISCVOR + | RISCV_AND -> RISCVAND + +let translate_out_ropw op = match op with + | RISCV_ADDW -> RISCVADDW + | RISCV_SUBW -> RISCVSUBW + | RISCV_SLLW -> RISCVSLLW + | RISCV_SRLW -> RISCVSRLW + | RISCV_SRAW -> RISCVSRAW + +let translate_out_amoop op = match op with + | AMOSWAP -> RISCVAMOSWAP + | AMOADD -> RISCVAMOADD + | AMOXOR -> RISCVAMOXOR + | AMOAND -> RISCVAMOAND + | AMOOR -> RISCVAMOOR + | AMOMIN -> RISCVAMOMIN + | AMOMAX -> RISCVAMOMAX + | AMOMINU -> RISCVAMOMINU + | AMOMAXU -> RISCVAMOMAXU + +let translate_out_wordWidth op = match op with + | BYTE -> RISCVBYTE + | HALF -> RISCVHALF + | WORD -> RISCVWORD + | DOUBLE -> RISCVDOUBLE + +let translate_out_bool b = b (* function + * | Sail_values.B1 -> true + * | Sail_values.B0 -> false + * | _ -> failwith "translate_out_bool Undef" *) + +let translate_out_simm21 imm = translate_out_signed_int imm (* 21 *) +let translate_out_simm20 imm = translate_out_signed_int imm (* 20 *) +let translate_out_simm13 imm = translate_out_signed_int imm (* 13 *) +let translate_out_simm12 imm = translate_out_signed_int imm (* 12 *) +let translate_out_imm6 imm = translate_out_int imm +let translate_out_imm5 imm = translate_out_int imm +let translate_out_imm4 imm = translate_out_int imm diff --git a/handwritten_support/hgen/token_types.hgen b/handwritten_support/hgen/token_types.hgen new file mode 100644 index 0000000..1a2895a --- /dev/null +++ b/handwritten_support/hgen/token_types.hgen @@ -0,0 +1,24 @@ +type token_UTYPE = {op : riscvUop } +type token_JAL = unit +type token_JALR = unit +type token_BType = {op : riscvBop } +type token_IType = {op : riscvIop } +type token_ShiftIop = {op : riscvSop } +type token_RTYPE = {op : riscvRop } +type token_Load = {unsigned: bool; width : wordWidth; aq: bool; rl: bool } +type token_Store = {width : wordWidth; aq: bool; rl: bool } +type token_ADDIW = unit +type token_SHIFTW = {op : riscvSop } +type token_RTYPEW = {op : riscvRopw } +type token_FENCE = unit +type token_FENCETSO = unit +type token_FENCEI = unit +type token_LoadRes = {width : wordWidth; aq: bool; rl: bool } +type token_StoreCon = {width : wordWidth; aq: bool; rl: bool } +type token_AMO = {width : wordWidth; aq: bool; rl: bool; op: riscvAmoop } + +type token_FENCEOPTION = Fence_R | Fence_W | Fence_RW + +(* pseudo-ops *) + +type token_LI = unit diff --git a/handwritten_support/hgen/tokens.hgen b/handwritten_support/hgen/tokens.hgen new file mode 100644 index 0000000..37c76a2 --- /dev/null +++ b/handwritten_support/hgen/tokens.hgen @@ -0,0 +1,20 @@ +%token <RISCVHGenBase.token_UTYPE> UTYPE +%token <RISCVHGenBase.token_JAL> JAL +%token <RISCVHGenBase.token_JALR> JALR +%token <RISCVHGenBase.token_BType> BTYPE +%token <RISCVHGenBase.token_IType> ITYPE +%token <RISCVHGenBase.token_ShiftIop> SHIFTIOP +%token <RISCVHGenBase.token_RTYPE> RTYPE +%token <RISCVHGenBase.token_Load> LOAD +%token <RISCVHGenBase.token_Store> STORE +%token <RISCVHGenBase.token_ADDIW> ADDIW +%token <RISCVHGenBase.token_SHIFTW> SHIFTW +%token <RISCVHGenBase.token_RTYPEW> RTYPEW +%token <RISCVHGenBase.token_FENCE> FENCE +%token <RISCVHGenBase.token_FENCEOPTION> FENCEOPTION +%token <RISCVHGenBase.token_FENCETSO> FENCETSO +%token <RISCVHGenBase.token_FENCEI> FENCEI +%token <RISCVHGenBase.token_LoadRes> LOADRES +%token <RISCVHGenBase.token_StoreCon> STORECON +%token <RISCVHGenBase.token_AMO> AMO +%token <RISCVHGenBase.token_LI> LI diff --git a/handwritten_support/hgen/trans_sail.hgen b/handwritten_support/hgen/trans_sail.hgen new file mode 100644 index 0000000..aceaee7 --- /dev/null +++ b/handwritten_support/hgen/trans_sail.hgen @@ -0,0 +1,162 @@ +| `RISCVStopFetching -> ("StopFetching", [], []) +| `RISCVThreadStart -> ("ThreadStart", [], []) + +| `RISCVUTYPE(imm, rd, op) -> + ("UTYPE", + [ + translate_imm20 "imm" imm; + translate_reg "rd" rd; + translate_uop "op" op; + ], + []) +| `RISCVJAL(imm, rd) -> + ("JAL", + [ + translate_imm21 "imm" imm; + translate_reg "rd" rd; + ], + []) +| `RISCVJALR(imm, rs, rd) -> + ("JALR", + [ + translate_imm12 "imm" imm; + translate_reg "rs" rd; + translate_reg "rd" rd; + ], + []) +| `RISCVBType(imm, rs2, rs1, op) -> + ("BTYPE", + [ + translate_imm13 "imm" imm; + translate_reg "rs2" rs2; + translate_reg "rs1" rs1; + translate_bop "op" op; + ], + []) +| `RISCVIType(imm, rs1, rd, op) -> + ("ITYPE", + [ + translate_imm12 "imm" imm; + translate_reg "rs1" rs1; + translate_reg "rd" rd; + translate_iop "op" op; + ], + []) +| `RISCVShiftIop(imm, rs, rd, op) -> + ("SHIFTIOP", + [ + translate_imm6 "imm" imm; + translate_reg "rs" rs; + translate_reg "rd" rd; + translate_sop "op" op; + ], + []) +| `RISCVRType (rs2, rs1, rd, op) -> + ("RTYPE", + [ + translate_reg "rs2" rs2; + translate_reg "rs1" rs1; + translate_reg "rd" rd; + translate_rop "op" op; + ], + []) +| `RISCVLoad(imm, rs, rd, unsigned, width, aq, rl) -> + ("LOAD", + [ + translate_imm12 "imm" imm; + translate_reg "rs" rs; + translate_reg "rd" rd; + translate_bool "unsigned" unsigned; + translate_width "width" width; + translate_bool "aq" aq; + translate_bool "rl" rl; + ], + []) +| `RISCVStore(imm, rs2, rs1, width, aq, rl) -> + ("STORE", + [ + translate_imm12 "imm" imm; + translate_reg "rs2" rs2; + translate_reg "rs1" rs1; + translate_width "width" width; + translate_bool "aq" aq; + translate_bool "rl" rl; + ], + []) +| `RISCVADDIW(imm, rs, rd) -> + ("ADDIW", + [ + translate_imm12 "imm" imm; + translate_reg "rs" rs; + translate_reg "rd" rd; + ], + []) +| `RISCVSHIFTW(imm, rs, rd, op) -> + ("SHIFTW", + [ + translate_imm5 "imm" imm; + translate_reg "rs" rs; + translate_reg "rd" rd; + translate_sop "op" op; + ], + []) +| `RISCVRTYPEW(rs2, rs1, rd, op) -> + ("RTYPEW", + [ + translate_reg "rs2" rs2; + translate_reg "rs1" rs1; + translate_reg "rd" rd; + translate_ropw "op" op; + ], + []) +| `RISCVFENCE(pred, succ) -> + ("FENCE", + [ + translate_imm4 "pred" pred; + translate_imm4 "succ" succ; + ], + []) +| `RISCVFENCE_TSO(pred, succ) -> + ("FENCE_TSO", + [ + translate_imm4 "pred" pred; + translate_imm4 "succ" succ; + ], + []) +| `RISCVFENCEI -> + ("FENCEI", + [], + []) +| `RISCVLoadRes(aq, rl, rs1, width, rd) -> + ("LOADRES", + [ + translate_bool "aq" aq; + translate_bool "rl" rl; + translate_reg "rs1" rs1; + translate_width "width" width; + translate_reg "rd" rd; + ], + []) +| `RISCVStoreCon(aq, rl, rs2, rs1, width, rd) -> + ("STORECON", + [ + translate_bool "aq" aq; + translate_bool "rl" rl; + translate_reg "rs2" rs2; + translate_reg "rs1" rs1; + translate_width "width" width; + translate_reg "rd" rd; + ], + []) +| `RISCVAMO(op, aq, rl, rs2, rs1, width, rd) -> + ("AMO", + [ + translate_amoop "op" op; + translate_bool "aq" aq; + translate_bool "rl" rl; + translate_reg "rs2" rs2; + translate_reg "rs1" rs1; + translate_width "width" width; + translate_reg "rd" rd; + ], + []) diff --git a/handwritten_support/hgen/types.hgen b/handwritten_support/hgen/types.hgen new file mode 100644 index 0000000..a0b7560 --- /dev/null +++ b/handwritten_support/hgen/types.hgen @@ -0,0 +1,172 @@ +type bit20 = int +type bit12 = int +type bit6 = int +type bit5 = int +type bit4 = int + +type riscvUop = (* upper immediate ops *) +| RISCVLUI +| RISCVAUIPC + +let pp_riscv_uop = function +| RISCVLUI -> "lui" +| RISCVAUIPC -> "auipc" + + +type riscvBop = (* branch ops *) +| RISCVBEQ +| RISCVBNE +| RISCVBLT +| RISCVBGE +| RISCVBLTU +| RISCVBGEU + +let pp_riscv_bop = function +| RISCVBEQ -> "beq" +| RISCVBNE -> "bne" +| RISCVBLT -> "blt" +| RISCVBGE -> "bge" +| RISCVBLTU -> "bltu" +| RISCVBGEU -> "bgeu" + +type riscvIop = (* immediate ops *) +| RISCVADDI +| RISCVSLTI +| RISCVSLTIU +| RISCVXORI +| RISCVORI +| RISCVANDI + +let pp_riscv_iop = function +| RISCVADDI -> "addi" +| RISCVSLTI -> "slti" +| RISCVSLTIU -> "sltiu" +| RISCVXORI -> "xori" +| RISCVORI -> "ori" +| RISCVANDI -> "andi" + +type riscvSop = (* shift ops *) +| RISCVSLLI +| RISCVSRLI +| RISCVSRAI + +let pp_riscv_sop = function +| RISCVSLLI -> "slli" +| RISCVSRLI -> "srli" +| RISCVSRAI -> "srai" + +type riscvRop = (* reg-reg ops *) +| RISCVADD +| RISCVSUB +| RISCVSLL +| RISCVSLT +| RISCVSLTU +| RISCVXOR +| RISCVSRL +| RISCVSRA +| RISCVOR +| RISCVAND + +let pp_riscv_rop = function +| RISCVADD -> "add" +| RISCVSUB -> "sub" +| RISCVSLL -> "sll" +| RISCVSLT -> "slt" +| RISCVSLTU -> "sltu" +| RISCVXOR -> "xor" +| RISCVSRL -> "srl" +| RISCVSRA -> "sra" +| RISCVOR -> "or" +| RISCVAND -> "and" + +type riscvRopw = (* reg-reg 32-bit ops *) +| RISCVADDW +| RISCVSUBW +| RISCVSLLW +| RISCVSRLW +| RISCVSRAW + +let pp_riscv_ropw = function +| RISCVADDW -> "addw" +| RISCVSUBW -> "subw" +| RISCVSLLW -> "sllw" +| RISCVSRLW -> "srlw" +| RISCVSRAW -> "sraw" + +type wordWidth = + | RISCVBYTE + | RISCVHALF + | RISCVWORD + | RISCVDOUBLE + +let pp_word_width width : string = + begin match width with + | RISCVBYTE -> "b" + | RISCVHALF -> "h" + | RISCVWORD -> "w" + | RISCVDOUBLE -> "d" + end + +let pp_riscv_load_op (unsigned, width, aq, rl) = + "l" ^ + (pp_word_width width) ^ + (if unsigned then "u" else "") ^ + (if aq then ".aq" else "") ^ + (if rl then ".rl" else "") + +let pp_riscv_store_op (width, aq, rl) = + "s" ^ + (pp_word_width width) ^ + (if aq then ".aq" else "") ^ + (if rl then ".rl" else "") + +let pp_riscv_load_reserved_op (aq, rl, width) = + "lr." ^ + (pp_word_width width) ^ + (if aq then ".aq" else "") ^ + (if rl then ".rl" else "") + +let pp_riscv_store_conditional_op (aq, rl, width) = + "sc." ^ + (pp_word_width width) ^ + (if aq then ".aq" else "") ^ + (if rl then ".rl" else "") + +type riscvAmoop = + | RISCVAMOSWAP + | RISCVAMOADD + | RISCVAMOXOR + | RISCVAMOAND + | RISCVAMOOR + | RISCVAMOMIN + | RISCVAMOMAX + | RISCVAMOMINU + | RISCVAMOMAXU + +let pp_riscv_amo_op_part = function + | RISCVAMOSWAP -> "swap" + | RISCVAMOADD -> "add" + | RISCVAMOXOR -> "xor" + | RISCVAMOAND -> "and" + | RISCVAMOOR -> "or" + | RISCVAMOMIN -> "min" + | RISCVAMOMAX -> "max" + | RISCVAMOMINU -> "minu" + | RISCVAMOMAXU -> "maxu" + +let pp_riscv_amo_op (op, aq, rl, width) = + "amo" ^ + pp_riscv_amo_op_part op ^ + begin match width with + | RISCVWORD -> ".w" + | RISCVDOUBLE -> ".d" + | _ -> assert false + end ^ + (if aq then ".aq" else "") ^ + (if rl then ".rl" else "") + +let pp_riscv_fence_option = function + | 0b0011 -> "rw" + | 0b0010 -> "r" + | 0b0001 -> "w" + | _ -> failwith "unexpected fence option" diff --git a/handwritten_support/hgen/types_sail_trans_out.hgen b/handwritten_support/hgen/types_sail_trans_out.hgen new file mode 100644 index 0000000..66a2020 --- /dev/null +++ b/handwritten_support/hgen/types_sail_trans_out.hgen @@ -0,0 +1,98 @@ +let translate_out_big_bit = function + | (name, Bvector _, bits) -> IInt.integer_of_bit_list bits + | _ -> assert false + +let translate_out_int inst = (Nat_big_num.to_int (translate_out_big_bit inst)) +let translate_out_signed_int inst bits = + let i = (Nat_big_num.to_int (translate_out_big_bit inst)) in + if (i >= (1 lsl (bits - 1))) then + (i - (1 lsl bits)) else + i + +let translate_out_ireg ireg = IReg (int_to_ireg (translate_out_int ireg)) + +let translate_out_simm21 imm = translate_out_signed_int imm 21 +let translate_out_simm20 imm = translate_out_signed_int imm 20 +let translate_out_simm13 imm = translate_out_signed_int imm 13 +let translate_out_simm12 imm = translate_out_signed_int imm 12 +let translate_out_imm6 imm = translate_out_int imm +let translate_out_imm5 imm = translate_out_int imm +let translate_out_imm4 imm = translate_out_int imm + +let translate_out_bool = function + | (name, Bit, [Bitc_one]) -> true + | (name, Bit, [Bitc_zero]) -> false + | _ -> assert false + +let translate_out_enum (name,_,bits) = + Nat_big_num.to_int (IInt.integer_of_bit_list bits) + +let translate_out_wordWidth w = + match translate_out_enum w with + | 0 -> RISCVBYTE + | 1 -> RISCVHALF + | 2 -> RISCVWORD + | 3 -> RISCVDOUBLE + | _ -> failwith "Unknown wordWidth in sail translate out" + +let translate_out_uop op = match translate_out_enum op with + | 0 -> RISCVLUI + | 1 -> RISCVAUIPC + | _ -> failwith "Unknown uop in sail translate out" + +let translate_out_bop op = match translate_out_enum op with +| 0 -> RISCVBEQ +| 1 -> RISCVBNE +| 2 -> RISCVBLT +| 3 -> RISCVBGE +| 4 -> RISCVBLTU +| 5 -> RISCVBGEU +| _ -> failwith "Unknown bop in sail translate out" + +let translate_out_iop op = match translate_out_enum op with +| 0 -> RISCVADDI +| 1 -> RISCVSLTI +| 2 -> RISCVSLTIU +| 3 -> RISCVXORI +| 4 -> RISCVORI +| 5 -> RISCVANDI +| _ -> failwith "Unknown iop in sail translate out" + +let translate_out_sop op = match translate_out_enum op with +| 0 -> RISCVSLLI +| 1 -> RISCVSRLI +| 2 -> RISCVSRAI +| _ -> failwith "Unknown sop in sail translate out" + +let translate_out_rop op = match translate_out_enum op with +| 0 -> RISCVADD +| 1 -> RISCVSUB +| 2 -> RISCVSLL +| 3 -> RISCVSLT +| 4 -> RISCVSLTU +| 5 -> RISCVXOR +| 6 -> RISCVSRL +| 7 -> RISCVSRA +| 8 -> RISCVOR +| 9 -> RISCVAND +| _ -> failwith "Unknown rop in sail translate out" + +let translate_out_ropw op = match translate_out_enum op with +| 0 -> RISCVADDW +| 1 -> RISCVSUBW +| 2 -> RISCVSLLW +| 3 -> RISCVSRLW +| 4 -> RISCVSRAW +| _ -> failwith "Unknown ropw in sail translate out" + +let translate_out_amoop op = match translate_out_enum op with +| 0 -> RISCVAMOSWAP +| 1 -> RISCVAMOADD +| 2 -> RISCVAMOXOR +| 3 -> RISCVAMOAND +| 4 -> RISCVAMOOR +| 5 -> RISCVAMOMIN +| 6 -> RISCVAMOMAX +| 7 -> RISCVAMOMINU +| 8 -> RISCVAMOMAXU +| _ -> failwith "Unknown amoop in sail translate out" diff --git a/handwritten_support/hgen/types_trans_sail.hgen b/handwritten_support/hgen/types_trans_sail.hgen new file mode 100644 index 0000000..238c7e5 --- /dev/null +++ b/handwritten_support/hgen/types_trans_sail.hgen @@ -0,0 +1,57 @@ +let translate_enum enum_values name value = + let rec bit_count n = + if n = 0 then 0 + else 1 + (bit_count (n lsr 1)) in + let rec find_index element = function + | h::tail -> if h = element then 0 else 1 + (find_index element tail) + | _ -> failwith "translate_enum could not find value" + in + let size = bit_count (List.length enum_values) in + let index = find_index value enum_values in + (name, Range0 (Some size), IInt.bit_list_of_integer size (Nat_big_num.of_int index)) + +let translate_uop = translate_enum [RISCVLUI; RISCVAUIPC] + +let translate_bop = translate_enum [RISCVBEQ; RISCVBNE; RISCVBLT; RISCVBGE; RISCVBLTU; RISCVBGEU] (* branch ops *) + +let translate_iop = translate_enum [RISCVADDI; RISCVSLTI; RISCVSLTIU; RISCVXORI; RISCVORI; RISCVANDI] (* immediate ops *) + +let translate_sop = translate_enum [RISCVSLLI; RISCVSRLI; RISCVSRAI] (* shift ops *) + +let translate_rop = translate_enum [RISCVADD; RISCVSUB; RISCVSLL; RISCVSLT; RISCVSLTU; RISCVXOR; RISCVSRL; RISCVSRA; RISCVOR; RISCVAND] (* reg-reg ops *) + +let translate_ropw = translate_enum [RISCVADDW; RISCVSUBW; RISCVSLLW; RISCVSRLW; RISCVSRAW] (* reg-reg 32-bit ops *) + +let translate_amoop = translate_enum [RISCVAMOSWAP; RISCVAMOADD; RISCVAMOXOR; RISCVAMOAND; RISCVAMOOR; RISCVAMOMIN; RISCVAMOMAX; RISCVAMOMINU; RISCVAMOMAXU] + +let translate_width = translate_enum [RISCVBYTE; RISCVHALF; RISCVWORD; RISCVDOUBLE] + +let translate_reg name value = + (name, Bvector (Some 5), bit_list_of_integer 5 (Nat_big_num.of_int (reg_to_int value))) + +let translate_imm21 name value = + (name, Bvector (Some 21), bit_list_of_integer 21 (Nat_big_num.of_int value)) + +let translate_imm20 name value = + (name, Bvector (Some 20), bit_list_of_integer 20 (Nat_big_num.of_int value)) + +let translate_imm16 name value = + (name, Bvector (Some 16), bit_list_of_integer 16 (Nat_big_num.of_int value)) + +let translate_imm13 name value = + (name, Bvector (Some 13), bit_list_of_integer 13 (Nat_big_num.of_int value)) + +let translate_imm12 name value = + (name, Bvector (Some 12), bit_list_of_integer 12 (Nat_big_num.of_int value)) + +let translate_imm6 name value = + (name, Bvector (Some 6), bit_list_of_integer 6 (Nat_big_num.of_int value)) + +let translate_imm5 name value = + (name, Bvector (Some 5), bit_list_of_integer 5 (Nat_big_num.of_int value)) + +let translate_imm4 name value = + (name, Bvector (Some 4), bit_list_of_integer 4 (Nat_big_num.of_int value)) + +let translate_bool name value = + (name, Bit, [if value then Bitc_one else Bitc_zero]) diff --git a/handwritten_support/mem_metadata.glob b/handwritten_support/mem_metadata.glob new file mode 100644 index 0000000..c2d0ccd --- /dev/null +++ b/handwritten_support/mem_metadata.glob @@ -0,0 +1,64 @@ +DIGEST 693b57d74f776ae8bd215fbfc8b03df3 +Fmem_metadata +R15:23 Sail.Base <> <> lib +def 52:60 <> write_ram +binder 63:64 <> rv:1 +binder 66:66 <> e:2 +binder 68:68 <> a:3 +binder 71:72 <> wk:4 +R82:86 Sail.Values <> mword def +R88:88 mem_metadata <> a:3 var +binder 75:78 <> addr:5 +binder 91:94 <> size:6 +R101:105 Sail.Values <> mword def +R109:111 Coq.ZArith.BinInt <> ::Z_scope:x_'*'_x not +R112:115 mem_metadata <> size:6 var +binder 97:97 <> v:7 +R127:130 Coq.Init.Datatypes <> unit ind +binder 120:123 <> meta:8 +R135:139 Sail.Prompt_monad <> monad ind +R141:142 mem_metadata <> rv:1 var +R144:147 Coq.Init.Datatypes <> bool ind +R149:149 mem_metadata <> e:2 var +R154:162 Sail.Prompt_monad <> write_mem def +R179:179 mem_metadata <> v:7 var +R174:177 mem_metadata <> size:6 var +R169:172 mem_metadata <> addr:5 var +R167:167 mem_metadata <> a:3 var +R164:165 mem_metadata <> wk:4 var +def 194:201 <> read_ram +binder 204:205 <> rv:9 +binder 207:207 <> e:10 +binder 209:209 <> a:11 +binder 212:213 <> rk:12 +R223:227 Sail.Values <> mword def +R229:229 mem_metadata <> a:11 var +binder 216:219 <> addr:13 +binder 232:235 <> size:14 +R249:252 Coq.Init.Datatypes <> bool ind +binder 238:245 <> read_tag:15 +R257:265 Sail.Values <> ArithFact class +R272:276 Coq.ZArith.BinInt <> ::Z_scope:x_'>=?'_x not +R268:271 mem_metadata <> size:14 var +binder 257:278 <> H:16 +R283:287 Sail.Prompt_monad <> monad ind +R289:290 mem_metadata <> rv:9 var +R309:311 Coq.Init.Datatypes <> ::type_scope:x_'*'_x not +R293:297 Sail.Values <> mword def +R301:303 Coq.ZArith.BinInt <> ::Z_scope:x_'*'_x not +R304:307 mem_metadata <> size:14 var +R312:315 Coq.Init.Datatypes <> unit ind +R318:318 mem_metadata <> e:10 var +R348:352 Sail.Prompt_monad <> :::x_'>>='_x not +R325:332 Sail.Prompt_monad <> read_mem def +R344:347 mem_metadata <> size:14 var +R339:342 mem_metadata <> addr:13 var +R337:337 mem_metadata <> a:11 var +R334:335 mem_metadata <> rk:12 var +binder 357:360 <> data:17 +R367:373 Sail.Prompt_monad <> returnm def +R375:375 Coq.Init.Datatypes <> ::core_scope:'('_x_','_x_','_'..'_','_x_')' not +R380:381 Coq.Init.Datatypes <> ::core_scope:'('_x_','_x_','_'..'_','_x_')' not +R384:384 Coq.Init.Datatypes <> ::core_scope:'('_x_','_x_','_'..'_','_x_')' not +R376:379 mem_metadata <> data:17 var +R382:383 Coq.Init.Datatypes <> tt constr diff --git a/handwritten_support/mem_metadata.lem b/handwritten_support/mem_metadata.lem new file mode 100644 index 0000000..8a8c070 --- /dev/null +++ b/handwritten_support/mem_metadata.lem @@ -0,0 +1,16 @@ +open import Pervasives +open import Pervasives_extra +open import Sail2_instr_kinds +open import Sail2_values +open import Sail2_operators_mwords +open import Sail2_prompt_monad +open import Sail2_prompt + +val write_ram : forall 'rv 'e 'a 'n. Size 'a, Size 'n => write_kind -> mword 'a -> integer -> mword 'n -> unit -> monad 'rv bool 'e +let write_ram wk addr width data meta = + write_mem wk () addr width data + +val read_ram : forall 'rv 'e 'a 'n. Size 'a, Size 'n => read_kind -> mword 'a -> integer -> bool -> monad 'rv (mword 'n * unit) 'e +let read_ram rk addr width read_tag = + read_mem rk () addr width >>= (fun (data : mword 'n) -> + return (data, ())) diff --git a/handwritten_support/mem_metadata.v b/handwritten_support/mem_metadata.v new file mode 100644 index 0000000..bbfc856 --- /dev/null +++ b/handwritten_support/mem_metadata.v @@ -0,0 +1,8 @@ +Require Import Sail.Base. +Open Scope Z. + +Definition write_ram {rv e a} wk (addr : mword a) size (v : mword (8 * size)) (meta : unit) : monad rv bool e := write_mem wk a addr size v. + +Definition read_ram {rv e a} rk (addr : mword a) size (read_tag : bool) `{ArithFact (size >=? 0)} : monad rv (mword (8 * size) * unit) e := + read_mem rk a addr size >>= fun data => + returnm (data, tt). diff --git a/handwritten_support/mem_metadata.vo b/handwritten_support/mem_metadata.vo Binary files differnew file mode 100644 index 0000000..76f5087 --- /dev/null +++ b/handwritten_support/mem_metadata.vo diff --git a/handwritten_support/mem_metadata.vok b/handwritten_support/mem_metadata.vok new file mode 100644 index 0000000..e69de29 --- /dev/null +++ b/handwritten_support/mem_metadata.vok diff --git a/handwritten_support/mem_metadata.vos b/handwritten_support/mem_metadata.vos new file mode 100644 index 0000000..e69de29 --- /dev/null +++ b/handwritten_support/mem_metadata.vos diff --git a/handwritten_support/riscv_extras.glob b/handwritten_support/riscv_extras.glob new file mode 100644 index 0000000..980acb4 --- /dev/null +++ b/handwritten_support/riscv_extras.glob @@ -0,0 +1,875 @@ +DIGEST 9f6e940694efb436e57a7a26d0b1b3b3 +Friscv_extras +R15:23 Sail.Base <> <> lib +R41:46 Coq.Strings.String <> <> lib +R64:67 Coq.Lists.List <> <> lib +def 123:137 <> MEM_fence_rw_rw +binder 140:141 <> rv:1 +binder 143:143 <> e:2 +R149:152 Coq.Init.Datatypes <> unit ind +R157:161 Sail.Prompt_monad <> monad ind +R163:164 riscv_extras <> rv:1 var +R166:169 Coq.Init.Datatypes <> unit ind +R171:171 riscv_extras <> e:2 var +R176:182 Sail.Prompt_monad <> barrier def +R185:203 Sail.Instr_kinds <> Barrier_RISCV_rw_rw constr +R205:206 Coq.Init.Datatypes <> tt constr +def 221:234 <> MEM_fence_r_rw +binder 238:239 <> rv:3 +binder 241:241 <> e:4 +R247:250 Coq.Init.Datatypes <> unit ind +R255:259 Sail.Prompt_monad <> monad ind +R261:262 riscv_extras <> rv:3 var +R264:267 Coq.Init.Datatypes <> unit ind +R269:269 riscv_extras <> e:4 var +R274:280 Sail.Prompt_monad <> barrier def +R283:300 Sail.Instr_kinds <> Barrier_RISCV_r_rw constr +R302:303 Coq.Init.Datatypes <> tt constr +def 318:330 <> MEM_fence_r_r +binder 335:336 <> rv:5 +binder 338:338 <> e:6 +R344:347 Coq.Init.Datatypes <> unit ind +R352:356 Sail.Prompt_monad <> monad ind +R358:359 riscv_extras <> rv:5 var +R361:364 Coq.Init.Datatypes <> unit ind +R366:366 riscv_extras <> e:6 var +R371:377 Sail.Prompt_monad <> barrier def +R380:396 Sail.Instr_kinds <> Barrier_RISCV_r_r constr +R398:399 Coq.Init.Datatypes <> tt constr +def 414:427 <> MEM_fence_rw_w +binder 431:432 <> rv:7 +binder 434:434 <> e:8 +R440:443 Coq.Init.Datatypes <> unit ind +R448:452 Sail.Prompt_monad <> monad ind +R454:455 riscv_extras <> rv:7 var +R457:460 Coq.Init.Datatypes <> unit ind +R462:462 riscv_extras <> e:8 var +R467:473 Sail.Prompt_monad <> barrier def +R476:493 Sail.Instr_kinds <> Barrier_RISCV_rw_w constr +R495:496 Coq.Init.Datatypes <> tt constr +def 511:523 <> MEM_fence_w_w +binder 528:529 <> rv:9 +binder 531:531 <> e:10 +R537:540 Coq.Init.Datatypes <> unit ind +R545:549 Sail.Prompt_monad <> monad ind +R551:552 riscv_extras <> rv:9 var +R554:557 Coq.Init.Datatypes <> unit ind +R559:559 riscv_extras <> e:10 var +R564:570 Sail.Prompt_monad <> barrier def +R573:589 Sail.Instr_kinds <> Barrier_RISCV_w_w constr +R591:592 Coq.Init.Datatypes <> tt constr +def 607:620 <> MEM_fence_w_rw +binder 624:625 <> rv:11 +binder 627:627 <> e:12 +R633:636 Coq.Init.Datatypes <> unit ind +R641:645 Sail.Prompt_monad <> monad ind +R647:648 riscv_extras <> rv:11 var +R650:653 Coq.Init.Datatypes <> unit ind +R655:655 riscv_extras <> e:12 var +R660:666 Sail.Prompt_monad <> barrier def +R669:686 Sail.Instr_kinds <> Barrier_RISCV_w_rw constr +R688:689 Coq.Init.Datatypes <> tt constr +def 704:717 <> MEM_fence_rw_r +binder 721:722 <> rv:13 +binder 724:724 <> e:14 +R730:733 Coq.Init.Datatypes <> unit ind +R738:742 Sail.Prompt_monad <> monad ind +R744:745 riscv_extras <> rv:13 var +R747:750 Coq.Init.Datatypes <> unit ind +R752:752 riscv_extras <> e:14 var +R757:763 Sail.Prompt_monad <> barrier def +R766:783 Sail.Instr_kinds <> Barrier_RISCV_rw_r constr +R785:786 Coq.Init.Datatypes <> tt constr +def 801:813 <> MEM_fence_r_w +binder 818:819 <> rv:15 +binder 821:821 <> e:16 +R827:830 Coq.Init.Datatypes <> unit ind +R835:839 Sail.Prompt_monad <> monad ind +R841:842 riscv_extras <> rv:15 var +R844:847 Coq.Init.Datatypes <> unit ind +R849:849 riscv_extras <> e:16 var +R854:860 Sail.Prompt_monad <> barrier def +R863:879 Sail.Instr_kinds <> Barrier_RISCV_r_w constr +R881:882 Coq.Init.Datatypes <> tt constr +def 897:909 <> MEM_fence_w_r +binder 914:915 <> rv:17 +binder 917:917 <> e:18 +R923:926 Coq.Init.Datatypes <> unit ind +R931:935 Sail.Prompt_monad <> monad ind +R937:938 riscv_extras <> rv:17 var +R940:943 Coq.Init.Datatypes <> unit ind +R945:945 riscv_extras <> e:18 var +R950:956 Sail.Prompt_monad <> barrier def +R959:975 Sail.Instr_kinds <> Barrier_RISCV_w_r constr +R977:978 Coq.Init.Datatypes <> tt constr +def 993:1005 <> MEM_fence_tso +binder 1010:1011 <> rv:19 +binder 1013:1013 <> e:20 +R1019:1022 Coq.Init.Datatypes <> unit ind +R1027:1031 Sail.Prompt_monad <> monad ind +R1033:1034 riscv_extras <> rv:19 var +R1036:1039 Coq.Init.Datatypes <> unit ind +R1041:1041 riscv_extras <> e:20 var +R1046:1052 Sail.Prompt_monad <> barrier def +R1055:1071 Sail.Instr_kinds <> Barrier_RISCV_tso constr +R1073:1074 Coq.Init.Datatypes <> tt constr +def 1089:1099 <> MEM_fence_i +binder 1106:1107 <> rv:21 +binder 1109:1109 <> e:22 +R1115:1118 Coq.Init.Datatypes <> unit ind +R1123:1127 Sail.Prompt_monad <> monad ind +R1129:1130 riscv_extras <> rv:21 var +R1132:1135 Coq.Init.Datatypes <> unit ind +R1137:1137 riscv_extras <> e:22 var +R1142:1148 Sail.Prompt_monad <> barrier def +R1151:1165 Sail.Instr_kinds <> Barrier_RISCV_i constr +R1167:1168 Coq.Init.Datatypes <> tt constr +def 1867:1871 <> MEMea +binder 1874:1875 <> rv:23 +binder 1877:1877 <> a:24 +binder 1879:1879 <> e:25 +binder 1882:1889 <> addrsize:26 +R1899:1903 Sail.Values <> mword def +R1905:1905 riscv_extras <> a:24 var +binder 1892:1895 <> addr:27 +binder 1908:1911 <> size:28 +R1935:1939 Sail.Prompt_monad <> monad ind +R1941:1942 riscv_extras <> rv:23 var +R1944:1947 Coq.Init.Datatypes <> unit ind +R1949:1949 riscv_extras <> e:25 var +R1954:1965 Sail.Prompt_monad <> write_mem_ea def +R1993:1996 riscv_extras <> size:28 var +R1988:1991 riscv_extras <> addr:27 var +R1979:1986 riscv_extras <> addrsize:26 var +R1967:1977 Sail.Instr_kinds <> Write_plain constr +def 2010:2022 <> MEMea_release +binder 2025:2026 <> rv:29 +binder 2028:2028 <> a:30 +binder 2030:2030 <> e:31 +binder 2033:2040 <> addrsize:32 +R2050:2054 Sail.Values <> mword def +R2056:2056 riscv_extras <> a:30 var +binder 2043:2046 <> addr:33 +binder 2059:2062 <> size:34 +R2078:2082 Sail.Prompt_monad <> monad ind +R2084:2085 riscv_extras <> rv:29 var +R2087:2090 Coq.Init.Datatypes <> unit ind +R2092:2092 riscv_extras <> e:31 var +R2097:2108 Sail.Prompt_monad <> write_mem_ea def +R2144:2147 riscv_extras <> size:34 var +R2139:2142 riscv_extras <> addr:33 var +R2130:2137 riscv_extras <> addrsize:32 var +R2110:2128 Sail.Instr_kinds <> Write_RISCV_release constr +def 2161:2180 <> MEMea_strong_release +binder 2183:2184 <> rv:35 +binder 2186:2186 <> a:36 +binder 2188:2188 <> e:37 +binder 2191:2198 <> addrsize:38 +R2208:2212 Sail.Values <> mword def +R2214:2214 riscv_extras <> a:36 var +binder 2201:2204 <> addr:39 +binder 2217:2220 <> size:40 +R2229:2233 Sail.Prompt_monad <> monad ind +R2235:2236 riscv_extras <> rv:35 var +R2238:2241 Coq.Init.Datatypes <> unit ind +R2243:2243 riscv_extras <> e:37 var +R2248:2259 Sail.Prompt_monad <> write_mem_ea def +R2302:2305 riscv_extras <> size:40 var +R2297:2300 riscv_extras <> addr:39 var +R2288:2295 riscv_extras <> addrsize:38 var +R2261:2286 Sail.Instr_kinds <> Write_RISCV_strong_release constr +def 2319:2335 <> MEMea_conditional +binder 2338:2339 <> rv:41 +binder 2341:2341 <> a:42 +binder 2343:2343 <> e:43 +binder 2346:2353 <> addrsize:44 +R2363:2367 Sail.Values <> mword def +R2369:2369 riscv_extras <> a:42 var +binder 2356:2359 <> addr:45 +binder 2372:2375 <> size:46 +R2387:2391 Sail.Prompt_monad <> monad ind +R2393:2394 riscv_extras <> rv:41 var +R2396:2399 Coq.Init.Datatypes <> unit ind +R2401:2401 riscv_extras <> e:43 var +R2406:2417 Sail.Prompt_monad <> write_mem_ea def +R2457:2460 riscv_extras <> size:46 var +R2452:2455 riscv_extras <> addr:45 var +R2443:2450 riscv_extras <> addrsize:44 var +R2419:2441 Sail.Instr_kinds <> Write_RISCV_conditional constr +def 2474:2498 <> MEMea_conditional_release +binder 2501:2502 <> rv:47 +binder 2504:2504 <> a:48 +binder 2506:2506 <> e:49 +binder 2509:2516 <> addrsize:50 +R2526:2530 Sail.Values <> mword def +R2532:2532 riscv_extras <> a:48 var +binder 2519:2522 <> addr:51 +binder 2535:2538 <> size:52 +R2542:2546 Sail.Prompt_monad <> monad ind +R2548:2549 riscv_extras <> rv:47 var +R2551:2554 Coq.Init.Datatypes <> unit ind +R2556:2556 riscv_extras <> e:49 var +R2561:2572 Sail.Prompt_monad <> write_mem_ea def +R2620:2623 riscv_extras <> size:52 var +R2615:2618 riscv_extras <> addr:51 var +R2606:2613 riscv_extras <> addrsize:50 var +R2574:2604 Sail.Instr_kinds <> Write_RISCV_conditional_release constr +def 2637:2668 <> MEMea_conditional_strong_release +binder 2671:2672 <> rv:53 +binder 2674:2674 <> a:54 +binder 2676:2676 <> e:55 +binder 2679:2686 <> addrsize:56 +R2696:2700 Sail.Values <> mword def +R2702:2702 riscv_extras <> a:54 var +binder 2689:2692 <> addr:57 +binder 2705:2708 <> size:58 +R2712:2716 Sail.Prompt_monad <> monad ind +R2718:2719 riscv_extras <> rv:53 var +R2721:2724 Coq.Init.Datatypes <> unit ind +R2726:2726 riscv_extras <> e:55 var +R2773:2784 Sail.Prompt_monad <> write_mem_ea def +R2839:2842 riscv_extras <> size:58 var +R2834:2837 riscv_extras <> addr:57 var +R2825:2832 riscv_extras <> addrsize:56 var +R2786:2823 Sail.Instr_kinds <> Write_RISCV_conditional_strong_release constr +def 3812:3815 <> MEMr +binder 3818:3819 <> rv:59 +binder 3821:3821 <> e:60 +binder 3824:3831 <> addrsize:61 +binder 3833:3836 <> size:62 +R3853:3857 Sail.Values <> mword def +R3859:3866 riscv_extras <> addrsize:61 var +binder 3839:3844 <> hexRAM:63 +binder 3846:3849 <> addr:64 +R3895:3903 Sail.Values <> ArithFact class +R3910:3914 Coq.ZArith.BinInt <> ::Z_scope:x_'>=?'_x not +R3906:3909 riscv_extras <> size:62 var +binder 3895:3916 <> H:65 +R3921:3925 Sail.Prompt_monad <> monad ind +R3927:3928 riscv_extras <> rv:59 var +R3931:3935 Sail.Values <> mword def +R3939:3941 Coq.ZArith.BinInt <> ::Z_scope:x_'*'_x not +R3942:3945 riscv_extras <> size:62 var +R3949:3949 riscv_extras <> e:60 var +R3954:3961 Sail.Prompt_monad <> read_mem def +R3988:3991 riscv_extras <> size:62 var +R3983:3986 riscv_extras <> addr:64 var +R3974:3981 riscv_extras <> addrsize:61 var +R3963:3972 Sail.Instr_kinds <> Read_plain constr +def 4005:4016 <> MEMr_acquire +binder 4019:4020 <> rv:66 +binder 4022:4022 <> e:67 +binder 4025:4032 <> addrsize:68 +binder 4034:4037 <> size:69 +R4054:4058 Sail.Values <> mword def +R4060:4067 riscv_extras <> addrsize:68 var +binder 4040:4045 <> hexRAM:70 +binder 4047:4050 <> addr:71 +R4088:4096 Sail.Values <> ArithFact class +R4103:4107 Coq.ZArith.BinInt <> ::Z_scope:x_'>=?'_x not +R4099:4102 riscv_extras <> size:69 var +binder 4088:4109 <> H:72 +R4114:4118 Sail.Prompt_monad <> monad ind +R4120:4121 riscv_extras <> rv:66 var +R4124:4128 Sail.Values <> mword def +R4132:4134 Coq.ZArith.BinInt <> ::Z_scope:x_'*'_x not +R4135:4138 riscv_extras <> size:69 var +R4142:4142 riscv_extras <> e:67 var +R4147:4154 Sail.Prompt_monad <> read_mem def +R4189:4192 riscv_extras <> size:69 var +R4184:4187 riscv_extras <> addr:71 var +R4175:4182 riscv_extras <> addrsize:68 var +R4156:4173 Sail.Instr_kinds <> Read_RISCV_acquire constr +def 4206:4224 <> MEMr_strong_acquire +binder 4227:4228 <> rv:73 +binder 4230:4230 <> e:74 +binder 4233:4240 <> addrsize:75 +binder 4242:4245 <> size:76 +R4262:4266 Sail.Values <> mword def +R4268:4275 riscv_extras <> addrsize:75 var +binder 4248:4253 <> hexRAM:77 +binder 4255:4258 <> addr:78 +R4289:4297 Sail.Values <> ArithFact class +R4304:4308 Coq.ZArith.BinInt <> ::Z_scope:x_'>=?'_x not +R4300:4303 riscv_extras <> size:76 var +binder 4289:4310 <> H:79 +R4315:4319 Sail.Prompt_monad <> monad ind +R4321:4322 riscv_extras <> rv:73 var +R4325:4329 Sail.Values <> mword def +R4333:4335 Coq.ZArith.BinInt <> ::Z_scope:x_'*'_x not +R4336:4339 riscv_extras <> size:76 var +R4343:4343 riscv_extras <> e:74 var +R4348:4355 Sail.Prompt_monad <> read_mem def +R4397:4400 riscv_extras <> size:76 var +R4392:4395 riscv_extras <> addr:78 var +R4383:4390 riscv_extras <> addrsize:75 var +R4357:4381 Sail.Instr_kinds <> Read_RISCV_strong_acquire constr +def 4414:4426 <> MEMr_reserved +binder 4429:4430 <> rv:80 +binder 4432:4432 <> e:81 +binder 4435:4442 <> addrsize:82 +binder 4444:4447 <> size:83 +R4464:4468 Sail.Values <> mword def +R4470:4477 riscv_extras <> addrsize:82 var +binder 4450:4455 <> hexRAM:84 +binder 4457:4460 <> addr:85 +R4497:4505 Sail.Values <> ArithFact class +R4512:4516 Coq.ZArith.BinInt <> ::Z_scope:x_'>=?'_x not +R4508:4511 riscv_extras <> size:83 var +binder 4497:4518 <> H:86 +R4523:4527 Sail.Prompt_monad <> monad ind +R4529:4530 riscv_extras <> rv:80 var +R4533:4537 Sail.Values <> mword def +R4541:4543 Coq.ZArith.BinInt <> ::Z_scope:x_'*'_x not +R4544:4547 riscv_extras <> size:83 var +R4551:4551 riscv_extras <> e:81 var +R4556:4563 Sail.Prompt_monad <> read_mem def +R4599:4602 riscv_extras <> size:83 var +R4594:4597 riscv_extras <> addr:85 var +R4585:4592 riscv_extras <> addrsize:82 var +R4565:4583 Sail.Instr_kinds <> Read_RISCV_reserved constr +def 4616:4636 <> MEMr_reserved_acquire +binder 4639:4640 <> rv:87 +binder 4642:4642 <> e:88 +binder 4645:4652 <> addrsize:89 +binder 4654:4657 <> size:90 +R4674:4678 Sail.Values <> mword def +R4680:4687 riscv_extras <> addrsize:89 var +binder 4660:4665 <> hexRAM:91 +binder 4667:4670 <> addr:92 +R4699:4707 Sail.Values <> ArithFact class +R4714:4718 Coq.ZArith.BinInt <> ::Z_scope:x_'>=?'_x not +R4710:4713 riscv_extras <> size:90 var +binder 4699:4720 <> H:93 +R4725:4729 Sail.Prompt_monad <> monad ind +R4731:4732 riscv_extras <> rv:87 var +R4735:4739 Sail.Values <> mword def +R4743:4745 Coq.ZArith.BinInt <> ::Z_scope:x_'*'_x not +R4746:4749 riscv_extras <> size:90 var +R4753:4753 riscv_extras <> e:88 var +R4758:4765 Sail.Prompt_monad <> read_mem def +R4809:4812 riscv_extras <> size:90 var +R4804:4807 riscv_extras <> addr:92 var +R4795:4802 riscv_extras <> addrsize:89 var +R4767:4793 Sail.Instr_kinds <> Read_RISCV_reserved_acquire constr +def 4826:4853 <> MEMr_reserved_strong_acquire +binder 4856:4857 <> rv:94 +binder 4859:4859 <> e:95 +binder 4862:4869 <> addrsize:96 +binder 4871:4874 <> size:97 +R4891:4895 Sail.Values <> mword def +R4897:4904 riscv_extras <> addrsize:96 var +binder 4877:4882 <> hexRAM:98 +binder 4884:4887 <> addr:99 +R4909:4917 Sail.Values <> ArithFact class +R4924:4928 Coq.ZArith.BinInt <> ::Z_scope:x_'>=?'_x not +R4920:4923 riscv_extras <> size:97 var +binder 4909:4930 <> H:100 +R4935:4939 Sail.Prompt_monad <> monad ind +R4941:4942 riscv_extras <> rv:94 var +R4945:4949 Sail.Values <> mword def +R4953:4955 Coq.ZArith.BinInt <> ::Z_scope:x_'*'_x not +R4956:4959 riscv_extras <> size:97 var +R4963:4963 riscv_extras <> e:95 var +R4968:4975 Sail.Prompt_monad <> read_mem def +R5026:5029 riscv_extras <> size:97 var +R5021:5024 riscv_extras <> addr:99 var +R5012:5019 riscv_extras <> addrsize:96 var +R4977:5010 Sail.Instr_kinds <> Read_RISCV_reserved_strong_acquire constr +def 6053:6056 <> MEMw +binder 6059:6060 <> rv:101 +binder 6062:6062 <> e:102 +binder 6065:6072 <> addrsize:103 +binder 6074:6077 <> size:104 +R6094:6098 Sail.Values <> mword def +R6100:6107 riscv_extras <> addrsize:103 var +binder 6080:6085 <> hexRAM:105 +binder 6087:6090 <> addr:106 +R6115:6119 Sail.Values <> mword def +R6123:6125 Coq.ZArith.BinInt <> ::Z_scope:x_'*'_x not +R6126:6129 riscv_extras <> size:104 var +binder 6111:6111 <> v:107 +R6162:6166 Sail.Prompt_monad <> monad ind +R6168:6169 riscv_extras <> rv:101 var +R6171:6174 Coq.Init.Datatypes <> bool ind +R6176:6176 riscv_extras <> e:102 var +R6181:6189 Sail.Prompt_monad <> write_mem def +R6222:6222 riscv_extras <> v:107 var +R6217:6220 riscv_extras <> size:104 var +R6212:6215 riscv_extras <> addr:106 var +R6203:6210 riscv_extras <> addrsize:103 var +R6191:6201 Sail.Instr_kinds <> Write_plain constr +def 6236:6247 <> MEMw_release +binder 6250:6251 <> rv:108 +binder 6253:6253 <> e:109 +binder 6256:6263 <> addrsize:110 +binder 6265:6268 <> size:111 +R6285:6289 Sail.Values <> mword def +R6291:6298 riscv_extras <> addrsize:110 var +binder 6271:6276 <> hexRAM:112 +binder 6278:6281 <> addr:113 +R6306:6310 Sail.Values <> mword def +R6314:6316 Coq.ZArith.BinInt <> ::Z_scope:x_'*'_x not +R6317:6320 riscv_extras <> size:111 var +binder 6302:6302 <> v:114 +R6345:6349 Sail.Prompt_monad <> monad ind +R6351:6352 riscv_extras <> rv:108 var +R6354:6357 Coq.Init.Datatypes <> bool ind +R6359:6359 riscv_extras <> e:109 var +R6364:6372 Sail.Prompt_monad <> write_mem def +R6413:6413 riscv_extras <> v:114 var +R6408:6411 riscv_extras <> size:111 var +R6403:6406 riscv_extras <> addr:113 var +R6394:6401 riscv_extras <> addrsize:110 var +R6374:6392 Sail.Instr_kinds <> Write_RISCV_release constr +def 6427:6445 <> MEMw_strong_release +binder 6448:6449 <> rv:115 +binder 6451:6451 <> e:116 +binder 6454:6461 <> addrsize:117 +binder 6463:6466 <> size:118 +R6483:6487 Sail.Values <> mword def +R6489:6496 riscv_extras <> addrsize:117 var +binder 6469:6474 <> hexRAM:119 +binder 6476:6479 <> addr:120 +R6504:6508 Sail.Values <> mword def +R6512:6514 Coq.ZArith.BinInt <> ::Z_scope:x_'*'_x not +R6515:6518 riscv_extras <> size:118 var +binder 6500:6500 <> v:121 +R6536:6540 Sail.Prompt_monad <> monad ind +R6542:6543 riscv_extras <> rv:115 var +R6545:6548 Coq.Init.Datatypes <> bool ind +R6550:6550 riscv_extras <> e:116 var +R6555:6563 Sail.Prompt_monad <> write_mem def +R6611:6611 riscv_extras <> v:121 var +R6606:6609 riscv_extras <> size:118 var +R6601:6604 riscv_extras <> addr:120 var +R6592:6599 riscv_extras <> addrsize:117 var +R6565:6590 Sail.Instr_kinds <> Write_RISCV_strong_release constr +def 6625:6640 <> MEMw_conditional +binder 6643:6644 <> rv:122 +binder 6646:6646 <> e:123 +binder 6649:6656 <> addrsize:124 +binder 6658:6661 <> size:125 +R6678:6682 Sail.Values <> mword def +R6684:6691 riscv_extras <> addrsize:124 var +binder 6664:6669 <> hexRAM:126 +binder 6671:6674 <> addr:127 +R6699:6703 Sail.Values <> mword def +R6707:6709 Coq.ZArith.BinInt <> ::Z_scope:x_'*'_x not +R6710:6713 riscv_extras <> size:125 var +binder 6695:6695 <> v:128 +R6734:6738 Sail.Prompt_monad <> monad ind +R6740:6741 riscv_extras <> rv:122 var +R6743:6746 Coq.Init.Datatypes <> bool ind +R6748:6748 riscv_extras <> e:123 var +R6753:6761 Sail.Prompt_monad <> write_mem def +R6806:6806 riscv_extras <> v:128 var +R6801:6804 riscv_extras <> size:125 var +R6796:6799 riscv_extras <> addr:127 var +R6787:6794 riscv_extras <> addrsize:124 var +R6763:6785 Sail.Instr_kinds <> Write_RISCV_conditional constr +def 6820:6843 <> MEMw_conditional_release +binder 6846:6847 <> rv:129 +binder 6849:6849 <> e:130 +binder 6852:6859 <> addrsize:131 +binder 6861:6864 <> size:132 +R6881:6885 Sail.Values <> mword def +R6887:6894 riscv_extras <> addrsize:131 var +binder 6867:6872 <> hexRAM:133 +binder 6874:6877 <> addr:134 +R6902:6906 Sail.Values <> mword def +R6910:6912 Coq.ZArith.BinInt <> ::Z_scope:x_'*'_x not +R6913:6916 riscv_extras <> size:132 var +binder 6898:6898 <> v:135 +R6929:6933 Sail.Prompt_monad <> monad ind +R6935:6936 riscv_extras <> rv:129 var +R6938:6941 Coq.Init.Datatypes <> bool ind +R6943:6943 riscv_extras <> e:130 var +R6948:6956 Sail.Prompt_monad <> write_mem def +R7009:7009 riscv_extras <> v:135 var +R7004:7007 riscv_extras <> size:132 var +R6999:7002 riscv_extras <> addr:134 var +R6990:6997 riscv_extras <> addrsize:131 var +R6958:6988 Sail.Instr_kinds <> Write_RISCV_conditional_release constr +def 7023:7053 <> MEMw_conditional_strong_release +binder 7056:7057 <> rv:136 +binder 7059:7059 <> e:137 +binder 7062:7069 <> addrsize:138 +binder 7071:7074 <> size:139 +R7091:7095 Sail.Values <> mword def +R7097:7104 riscv_extras <> addrsize:138 var +binder 7077:7082 <> hexRAM:140 +binder 7084:7087 <> addr:141 +R7112:7116 Sail.Values <> mword def +R7120:7122 Coq.ZArith.BinInt <> ::Z_scope:x_'*'_x not +R7123:7126 riscv_extras <> size:139 var +binder 7108:7108 <> v:142 +R7132:7136 Sail.Prompt_monad <> monad ind +R7138:7139 riscv_extras <> rv:136 var +R7141:7144 Coq.Init.Datatypes <> bool ind +R7146:7146 riscv_extras <> e:137 var +R7151:7159 Sail.Prompt_monad <> write_mem def +R7219:7219 riscv_extras <> v:142 var +R7214:7217 riscv_extras <> size:139 var +R7209:7212 riscv_extras <> addr:141 var +R7200:7207 riscv_extras <> addrsize:138 var +R7161:7198 Sail.Instr_kinds <> Write_RISCV_conditional_strong_release constr +def 7234:7248 <> shift_bits_left +binder 7251:7251 <> a:143 +binder 7253:7253 <> b:144 +R7261:7265 Sail.Values <> mword def +R7267:7267 riscv_extras <> a:143 var +binder 7257:7257 <> v:145 +R7275:7279 Sail.Values <> mword def +R7281:7281 riscv_extras <> b:144 var +binder 7271:7271 <> n:146 +R7286:7290 Sail.Values <> mword def +R7292:7292 riscv_extras <> a:143 var +R7299:7304 Sail.Operators_mwords <> shiftl def +R7309:7320 Sail.Values <> int_of_mword def +R7328:7328 riscv_extras <> n:146 var +R7322:7326 Coq.Init.Datatypes <> false constr +R7306:7306 riscv_extras <> v:145 var +def 7344:7359 <> shift_bits_right +binder 7362:7362 <> a:147 +binder 7364:7364 <> b:148 +R7372:7376 Sail.Values <> mword def +R7378:7378 riscv_extras <> a:147 var +binder 7368:7368 <> v:149 +R7386:7390 Sail.Values <> mword def +R7392:7392 riscv_extras <> b:148 var +binder 7382:7382 <> n:150 +R7397:7401 Sail.Values <> mword def +R7403:7403 riscv_extras <> a:147 var +R7410:7415 Sail.Operators_mwords <> shiftr def +R7420:7431 Sail.Values <> int_of_mword def +R7439:7439 riscv_extras <> n:150 var +R7433:7437 Coq.Init.Datatypes <> false constr +R7417:7417 riscv_extras <> v:149 var +def 7455:7476 <> shift_bits_right_arith +binder 7479:7479 <> a:151 +binder 7481:7481 <> b:152 +R7489:7493 Sail.Values <> mword def +R7495:7495 riscv_extras <> a:151 var +binder 7485:7485 <> v:153 +R7503:7507 Sail.Values <> mword def +R7509:7509 riscv_extras <> b:152 var +binder 7499:7499 <> n:154 +R7514:7518 Sail.Values <> mword def +R7520:7520 riscv_extras <> a:151 var +R7527:7538 Sail.Operators_mwords <> arith_shiftr def +R7543:7554 Sail.Values <> int_of_mword def +R7562:7562 riscv_extras <> n:154 var +R7556:7560 Coq.Init.Datatypes <> false constr +R7540:7540 riscv_extras <> v:153 var +def 7627:7639 <> internal_pick +binder 7642:7643 <> rv:155 +binder 7645:7645 <> a:156 +binder 7647:7647 <> e:157 +R7656:7659 Coq.Init.Datatypes <> list ind +R7661:7661 riscv_extras <> a:156 var +binder 7651:7652 <> vs:158 +R7666:7670 Sail.Prompt_monad <> monad ind +R7672:7673 riscv_extras <> rv:155 var +R7675:7675 riscv_extras <> a:156 var +R7677:7677 riscv_extras <> e:157 var +R7688:7689 riscv_extras <> vs:158 var +R7700:7701 Coq.Init.Datatypes <> ::list_scope:x_'::'_x not +R7708:7714 Sail.Prompt_monad <> returnm def +R7725:7728 Sail.Prompt_monad <> Fail constr +def 7776:7791 <> undefined_string +binder 7794:7795 <> rv:160 +binder 7797:7797 <> e:161 +R7803:7806 Coq.Init.Datatypes <> unit ind +R7811:7815 Sail.Prompt_monad <> monad ind +R7817:7818 riscv_extras <> rv:160 var +R7820:7825 Coq.Strings.String <> string ind +R7827:7827 riscv_extras <> e:161 var +R7832:7838 Sail.Prompt_monad <> returnm def +def 7862:7875 <> undefined_unit +binder 7878:7879 <> rv:162 +binder 7881:7881 <> e:163 +R7887:7890 Coq.Init.Datatypes <> unit ind +R7895:7899 Sail.Prompt_monad <> monad ind +R7901:7902 riscv_extras <> rv:162 var +R7904:7907 Coq.Init.Datatypes <> unit ind +R7909:7909 riscv_extras <> e:163 var +R7914:7920 Sail.Prompt_monad <> returnm def +R7922:7923 Coq.Init.Datatypes <> tt constr +def 7937:7949 <> undefined_int +binder 7952:7953 <> rv:164 +binder 7955:7955 <> e:165 +R7961:7964 Coq.Init.Datatypes <> unit ind +R7969:7973 Sail.Prompt_monad <> monad ind +R7975:7976 riscv_extras <> rv:164 var +R7978:7978 Coq.Numbers.BinNums <> Z ind +R7980:7980 riscv_extras <> e:165 var +R7985:7991 Sail.Prompt_monad <> returnm def +R7996:7997 Sail.Values <> ii def +def 8097:8112 <> undefined_vector +binder 8115:8116 <> rv:166 +binder 8118:8118 <> a:167 +binder 8120:8120 <> e:168 +binder 8123:8125 <> len:169 +R8132:8132 riscv_extras <> a:167 var +binder 8128:8128 <> u:170 +R8137:8145 Sail.Values <> ArithFact class +R8151:8155 Coq.ZArith.BinInt <> ::Z_scope:x_'>=?'_x not +R8148:8150 riscv_extras <> len:169 var +binder 8137:8157 <> H:171 +R8162:8166 Sail.Prompt_monad <> monad ind +R8168:8169 riscv_extras <> rv:166 var +R8172:8174 Sail.Values <> vec def +R8176:8176 riscv_extras <> a:167 var +R8178:8180 riscv_extras <> len:169 var +R8183:8183 riscv_extras <> e:168 var +R8188:8194 Sail.Prompt_monad <> returnm def +R8197:8204 Sail.Values <> vec_init def +R8208:8210 riscv_extras <> len:169 var +R8206:8206 riscv_extras <> u:170 var +def 8316:8334 <> undefined_bitvector +binder 8337:8338 <> rv:172 +binder 8340:8340 <> e:173 +binder 8343:8345 <> len:174 +R8349:8357 Sail.Values <> ArithFact class +R8363:8367 Coq.ZArith.BinInt <> ::Z_scope:x_'>=?'_x not +R8360:8362 riscv_extras <> len:174 var +binder 8349:8369 <> H:175 +R8374:8378 Sail.Prompt_monad <> monad ind +R8380:8381 riscv_extras <> rv:172 var +R8384:8388 Sail.Values <> mword def +R8390:8392 riscv_extras <> len:174 var +R8395:8395 riscv_extras <> e:173 var +R8400:8406 Sail.Prompt_monad <> returnm def +R8409:8420 Sail.Values <> mword_of_int def +def 8523:8536 <> undefined_bits +binder 8539:8540 <> rv:176 +binder 8542:8542 <> e:177 +R8549:8567 riscv_extras <> undefined_bitvector def +R8569:8570 riscv_extras <> rv:176 var +R8572:8572 riscv_extras <> e:177 var +def 8586:8598 <> undefined_bit +binder 8601:8602 <> rv:178 +binder 8604:8604 <> e:179 +R8610:8613 Coq.Init.Datatypes <> unit ind +R8618:8622 Sail.Prompt_monad <> monad ind +R8624:8625 riscv_extras <> rv:178 var +R8627:8630 Sail.Values <> bitU ind +R8632:8632 riscv_extras <> e:179 var +R8637:8643 Sail.Prompt_monad <> returnm def +R8645:8646 Sail.Values <> BU constr +def 8755:8769 <> undefined_range +binder 8772:8773 <> rv:180 +binder 8775:8775 <> e:181 +binder 8778:8778 <> i:182 +binder 8780:8780 <> j:183 +R8784:8792 Sail.Values <> ArithFact class +R8796:8800 Coq.ZArith.BinInt <> ::Z_scope:x_'<=?'_x not +R8795:8795 riscv_extras <> i:182 var +R8801:8801 riscv_extras <> j:183 var +binder 8784:8802 <> H:184 +R8807:8811 Sail.Prompt_monad <> monad ind +R8813:8814 riscv_extras <> rv:180 var +R8816:8816 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R8818:8820 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R8822:8824 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R8850:8850 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R8821:8821 Coq.Numbers.BinNums <> Z ind +binder 8817:8817 <> z:185 +R8825:8833 Sail.Values <> ArithFact class +R8837:8841 Sail.Values <> ::Z_scope:x_'<=?'_x_'<=?'_x not +R8843:8847 Sail.Values <> ::Z_scope:x_'<=?'_x_'<=?'_x not +R8836:8836 riscv_extras <> i:182 var +R8842:8842 riscv_extras <> z:185 var +R8842:8842 riscv_extras <> z:185 var +R8848:8848 riscv_extras <> j:183 var +R8852:8852 riscv_extras <> e:181 var +R8857:8863 Sail.Prompt_monad <> returnm def +R8866:8873 Sail.Values <> build_ex def +R8875:8875 riscv_extras <> i:182 var +def 8890:8903 <> undefined_atom +binder 8906:8907 <> rv:186 +binder 8909:8909 <> e:187 +binder 8912:8912 <> i:188 +R8916:8920 Sail.Prompt_monad <> monad ind +R8922:8923 riscv_extras <> rv:186 var +R8925:8925 Coq.Numbers.BinNums <> Z ind +R8927:8927 riscv_extras <> e:187 var +R8932:8938 Sail.Prompt_monad <> returnm def +R8940:8940 riscv_extras <> i:188 var +def 8954:8966 <> undefined_nat +binder 8969:8970 <> rv:189 +binder 8972:8972 <> e:190 +R8978:8981 Coq.Init.Datatypes <> unit ind +R8986:8990 Sail.Prompt_monad <> monad ind +R8992:8993 riscv_extras <> rv:189 var +R8995:8995 Coq.Numbers.BinNums <> Z ind +R8997:8997 riscv_extras <> e:190 var +R9002:9008 Sail.Prompt_monad <> returnm def +R9013:9014 Sail.Values <> ii def +def 9030:9033 <> skip +binder 9036:9037 <> rv:191 +binder 9039:9039 <> e:192 +R9045:9048 Coq.Init.Datatypes <> unit ind +R9053:9057 Sail.Prompt_monad <> monad ind +R9059:9060 riscv_extras <> rv:191 var +R9062:9065 Coq.Init.Datatypes <> unit ind +R9067:9067 riscv_extras <> e:192 var +R9072:9078 Sail.Prompt_monad <> returnm def +R9080:9081 Coq.Init.Datatypes <> tt constr +def 9132:9140 <> elf_entry +R9145:9148 Coq.Init.Datatypes <> unit ind +R9153:9153 Coq.Numbers.BinNums <> Z ind +def 9247:9256 <> print_bits +binder 9259:9259 <> n:193 +binder 9262:9264 <> msg:194 +R9272:9276 Sail.Values <> mword def +R9278:9278 riscv_extras <> n:193 var +binder 9267:9268 <> bs:195 +R9284:9296 Sail.Values <> prerr_endline def +R9302:9306 Coq.Strings.String <> ::string_scope:x_'++'_x not +R9324:9324 Coq.Strings.String <> ::string_scope:x_'++'_x not +R9299:9301 riscv_extras <> msg:194 var +R9307:9320 Sail.Operators_mwords <> string_of_bits def +R9322:9323 riscv_extras <> bs:195 var +def 9378:9388 <> get_time_ns +R9393:9396 Coq.Init.Datatypes <> unit ind +R9401:9401 Coq.Numbers.BinNums <> Z ind +def 9548:9553 <> eq_bit +R9560:9563 Sail.Values <> bitU ind +binder 9556:9556 <> x:196 +R9571:9574 Sail.Values <> bitU ind +binder 9567:9567 <> y:197 +R9579:9582 Coq.Init.Datatypes <> bool ind +R9598:9598 riscv_extras <> y:197 var +R9595:9595 riscv_extras <> x:196 var +R9609:9610 Sail.Values <> B0 constr +R9613:9614 Sail.Values <> B0 constr +R9619:9622 Coq.Init.Datatypes <> true constr +R9628:9629 Sail.Values <> B1 constr +R9632:9633 Sail.Values <> B1 constr +R9638:9641 Coq.Init.Datatypes <> true constr +R9647:9648 Sail.Values <> BU constr +R9651:9652 Sail.Values <> BU constr +R9657:9660 Coq.Init.Datatypes <> true constr +R9673:9677 Coq.Init.Datatypes <> false constr +R9702:9708 Coq.ZArith.Zeuclid <> <> lib +def 9722:9734 <> euclid_modulo +R9743:9743 Coq.Numbers.BinNums <> Z ind +binder 9737:9737 <> m:200 +binder 9739:9739 <> n:201 +R9748:9756 Sail.Values <> ArithFact class +R9760:9763 Coq.ZArith.BinInt <> ::Z_scope:x_'>?'_x not +R9759:9759 riscv_extras <> n:201 var +binder 9748:9765 <> H:202 +R9770:9770 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R9772:9774 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R9776:9778 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R9806:9806 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R9775:9775 Coq.Numbers.BinNums <> Z ind +binder 9771:9771 <> z:203 +R9779:9787 Sail.Values <> ArithFact class +R9791:9795 Sail.Values <> ::Z_scope:x_'<=?'_x_'<=?'_x not +R9797:9801 Sail.Values <> ::Z_scope:x_'<=?'_x_'<=?'_x not +R9796:9796 riscv_extras <> z:203 var +R9796:9796 riscv_extras <> z:203 var +R9803:9803 Coq.ZArith.BinInt <> ::Z_scope:x_'-'_x not +R9802:9802 riscv_extras <> n:201 var +R9833:9846 Coq.ZArith.Zeuclid ZEuclid modulo def +R9815:9820 Coq.Init.Specif <> existT constr +R9833:9846 Coq.ZArith.Zeuclid ZEuclid modulo def +R9815:9820 Coq.Init.Specif <> existT constr +R9939:9941 Coq.Init.Logic <> ::type_scope:x_'='_x not +R9932:9936 Coq.ZArith.BinInt Z abs def +R9939:9941 Coq.Init.Logic <> ::type_scope:x_'='_x not +R9932:9936 Coq.ZArith.BinInt Z abs def +R9956:9963 Coq.ZArith.BinInt Z abs_eq thm +R9956:9963 Coq.ZArith.BinInt Z abs_eq thm +R9956:9963 Coq.ZArith.BinInt Z abs_eq thm +R9956:9963 Coq.ZArith.BinInt Z abs_eq thm +R10013:10034 Coq.ZArith.Zeuclid ZEuclid mod_always_pos thm +R10013:10034 Coq.ZArith.Zeuclid ZEuclid mod_always_pos thm +def 10107:10115 <> mults_vec +binder 10118:10118 <> n:204 +R10126:10130 Sail.Values <> mword def +R10132:10132 riscv_extras <> n:204 var +binder 10122:10122 <> l:205 +R10140:10144 Sail.Values <> mword def +R10146:10146 riscv_extras <> n:204 var +binder 10136:10136 <> r:206 +R10151:10155 Sail.Values <> mword def +R10159:10161 Coq.ZArith.BinInt <> ::Z_scope:x_'*'_x not +R10162:10162 riscv_extras <> n:204 var +R10168:10176 Sail.Operators_mwords <> mults_vec def +R10180:10180 riscv_extras <> r:206 var +R10178:10178 riscv_extras <> l:205 var +def 10194:10201 <> mult_vec +binder 10204:10204 <> n:207 +R10212:10216 Sail.Values <> mword def +R10218:10218 riscv_extras <> n:207 var +binder 10208:10208 <> l:208 +R10226:10230 Sail.Values <> mword def +R10232:10232 riscv_extras <> n:207 var +binder 10222:10222 <> r:209 +R10237:10241 Sail.Values <> mword def +R10245:10247 Coq.ZArith.BinInt <> ::Z_scope:x_'*'_x not +R10248:10248 riscv_extras <> n:207 var +R10254:10261 Sail.Operators_mwords <> mult_vec def +R10265:10265 riscv_extras <> r:209 var +R10263:10263 riscv_extras <> l:208 var +def 10281:10293 <> print_endline +R10298:10303 Coq.Strings.String <> string ind +R10308:10311 Coq.Init.Datatypes <> unit ind +R10316:10317 Coq.Init.Datatypes <> tt constr +def 10331:10343 <> prerr_endline +R10348:10353 Coq.Strings.String <> string ind +R10358:10361 Coq.Init.Datatypes <> unit ind +R10366:10367 Coq.Init.Datatypes <> tt constr +def 10381:10392 <> prerr_string +R10397:10402 Coq.Strings.String <> string ind +R10407:10410 Coq.Init.Datatypes <> unit ind +R10415:10416 Coq.Init.Datatypes <> tt constr +def 10430:10436 <> putchar +binder 10439:10439 <> T:210 +R10445:10445 riscv_extras <> T:210 var +R10450:10453 Coq.Init.Datatypes <> unit ind +R10458:10459 Coq.Init.Datatypes <> tt constr +R10470:10482 Coq.Numbers.DecimalString <> <> lib +def 10496:10508 <> string_of_int +binder 10510:10510 <> z:211 +R10515:10549 Coq.Numbers.DecimalString NilZero string_of_int def +R10552:10559 Coq.ZArith.BinInt Z to_int def +R10561:10561 riscv_extras <> z:211 var +ax 10572:10595 <> sys_enable_writable_misa +R10603:10606 Coq.Init.Logic <> ::type_scope:x_'->'_x not +R10599:10602 Coq.Init.Datatypes <> unit ind +R10607:10610 Coq.Init.Datatypes <> bool ind +ax 10619:10632 <> sys_enable_rvc +R10640:10643 Coq.Init.Logic <> ::type_scope:x_'->'_x not +R10636:10639 Coq.Init.Datatypes <> unit ind +R10644:10647 Coq.Init.Datatypes <> bool ind +ax 10656:10671 <> sys_enable_fdext +R10679:10682 Coq.Init.Logic <> ::type_scope:x_'->'_x not +R10675:10678 Coq.Init.Datatypes <> unit ind +R10683:10686 Coq.Init.Datatypes <> bool ind +ax 10695:10709 <> sys_enable_next +R10717:10720 Coq.Init.Logic <> ::type_scope:x_'->'_x not +R10713:10716 Coq.Init.Datatypes <> unit ind +R10721:10724 Coq.Init.Datatypes <> bool ind +prf 10868:10888 <> n_leading_spaces_fact +binder 10891:10894 <> w__0:216 +R10910:10913 Coq.Init.Logic <> ::type_scope:x_'->'_x not +R10905:10908 Coq.ZArith.BinInt <> ::Z_scope:x_'>='_x not +R10901:10904 riscv_extras <> w__0:216 var +R10914:10920 Coq.Init.Logic <> ::type_scope:'exists'_x_'..'_x_','_x not +R10933:10934 Coq.Init.Logic <> ::type_scope:'exists'_x_'..'_x_','_x not +R10932:10932 Coq.Numbers.BinNums <> Z ind +binder 10921:10928 <> ex17629_:217 +R10958:10961 Coq.Init.Logic <> ::type_scope:x_'/\'_x not +R10943:10945 Coq.Init.Logic <> ::type_scope:x_'='_x not +R10936:10938 Coq.ZArith.BinInt <> ::Z_scope:x_'+'_x not +R10939:10942 riscv_extras <> w__0:216 var +R10947:10949 Coq.ZArith.BinInt <> ::Z_scope:x_'+'_x not +R10950:10957 riscv_extras <> ex17629_:217 var +R10963:10966 Coq.ZArith.BinInt <> ::Z_scope:x_'<='_x not +R10967:10974 riscv_extras <> ex17629_:217 var diff --git a/handwritten_support/riscv_extras.lem b/handwritten_support/riscv_extras.lem new file mode 100644 index 0000000..15ac8c7 --- /dev/null +++ b/handwritten_support/riscv_extras.lem @@ -0,0 +1,164 @@ +open import Pervasives +open import Pervasives_extra +open import Sail2_instr_kinds +open import Sail2_values +open import Sail2_operators_mwords +open import Sail2_prompt_monad +open import Sail2_prompt + +type bitvector 'a = mword 'a + +let MEM_fence_rw_rw () = barrier Barrier_RISCV_rw_rw +let MEM_fence_r_rw () = barrier Barrier_RISCV_r_rw +let MEM_fence_r_r () = barrier Barrier_RISCV_r_r +let MEM_fence_rw_w () = barrier Barrier_RISCV_rw_w +let MEM_fence_w_w () = barrier Barrier_RISCV_w_w +let MEM_fence_w_rw () = barrier Barrier_RISCV_w_rw +let MEM_fence_rw_r () = barrier Barrier_RISCV_rw_r +let MEM_fence_r_w () = barrier Barrier_RISCV_r_w +let MEM_fence_w_r () = barrier Barrier_RISCV_w_r +let MEM_fence_tso () = barrier Barrier_RISCV_tso +let MEM_fence_i () = barrier Barrier_RISCV_i + +val MEMea : forall 'rv 'a 'e. Size 'a => bitvector 'a -> integer -> monad 'rv unit 'e +val MEMea_release : forall 'rv 'a 'e. Size 'a => bitvector 'a -> integer -> monad 'rv unit 'e +val MEMea_strong_release : forall 'rv 'a 'e. Size 'a => bitvector 'a -> integer -> monad 'rv unit 'e +val MEMea_conditional : forall 'rv 'a 'e. Size 'a => bitvector 'a -> integer -> monad 'rv unit 'e +val MEMea_conditional_release : forall 'rv 'a 'e. Size 'a => bitvector 'a -> integer -> monad 'rv unit 'e +val MEMea_conditional_strong_release : forall 'rv 'a 'e. Size 'a => bitvector 'a -> integer -> monad 'rv unit 'e + +let MEMea addr size = write_mem_ea Write_plain () addr size +let MEMea_release addr size = write_mem_ea Write_RISCV_release () addr size +let MEMea_strong_release addr size = write_mem_ea Write_RISCV_strong_release () addr size +let MEMea_conditional addr size = write_mem_ea Write_RISCV_conditional () addr size +let MEMea_conditional_release addr size = write_mem_ea Write_RISCV_conditional_release () addr size +let MEMea_conditional_strong_release addr size + = write_mem_ea Write_RISCV_conditional_strong_release () addr size + +val MEMr : forall 'rv 'a 'b 'e. Size 'a, Size 'b => integer -> integer -> bitvector 'a -> bitvector 'a -> monad 'rv (bitvector 'b) 'e +val MEMr_acquire : forall 'rv 'a 'b 'e. Size 'a, Size 'b => integer -> integer -> bitvector 'a -> bitvector 'a -> monad 'rv (bitvector 'b) 'e +val MEMr_strong_acquire : forall 'rv 'a 'b 'e. Size 'a, Size 'b => integer -> integer -> bitvector 'a -> bitvector 'a -> monad 'rv (bitvector 'b) 'e +val MEMr_reserved : forall 'rv 'a 'b 'e. Size 'a, Size 'b => integer -> integer -> bitvector 'a -> bitvector 'a -> monad 'rv (bitvector 'b) 'e +val MEMr_reserved_acquire : forall 'rv 'a 'b 'e. Size 'a, Size 'b => integer -> integer -> bitvector 'a -> bitvector 'a -> monad 'rv (bitvector 'b) 'e +val MEMr_reserved_strong_acquire : forall 'rv 'a 'b 'e. Size 'a, Size 'b => integer -> integer -> bitvector 'a -> bitvector 'a -> monad 'rv (bitvector 'b) 'e + +let MEMr addrsize size hexRAM addr = read_mem Read_plain addrsize addr size +let MEMr_acquire addrsize size hexRAM addr = read_mem Read_RISCV_acquire addrsize addr size +let MEMr_strong_acquire addrsize size hexRAM addr = read_mem Read_RISCV_strong_acquire addrsize addr size +let MEMr_reserved addrsize size hexRAM addr = read_mem Read_RISCV_reserved addrsize addr size +let MEMr_reserved_acquire addrsize size hexRAM addr = read_mem Read_RISCV_reserved_acquire addrsize addr size +let MEMr_reserved_strong_acquire addrsize size hexRAM addr = read_mem Read_RISCV_reserved_strong_acquire addrsize addr size + +val MEMw : forall 'rv 'a 'b 'e. Size 'a, Size 'b => integer -> integer -> bitvector 'a -> bitvector 'a -> bitvector 'b -> monad 'rv bool 'e +val MEMw_release : forall 'rv 'a 'b 'e. Size 'a, Size 'b => integer -> integer -> bitvector 'a -> bitvector 'a -> bitvector 'b -> monad 'rv bool 'e +val MEMw_strong_release : forall 'rv 'a 'b 'e. Size 'a, Size 'b => integer -> integer -> bitvector 'a -> bitvector 'a -> bitvector 'b -> monad 'rv bool 'e +val MEMw_conditional : forall 'rv 'a 'b 'e. Size 'a, Size 'b => integer -> integer -> bitvector 'a -> bitvector 'a -> bitvector 'b -> monad 'rv bool 'e +val MEMw_conditional_release : forall 'rv 'a 'b 'e. Size 'a, Size 'b => integer -> integer -> bitvector 'a -> bitvector 'a -> bitvector 'b -> monad 'rv bool 'e +val MEMw_conditional_strong_release : forall 'rv 'a 'b 'e. Size 'a, Size 'b => integer -> integer -> bitvector 'a -> bitvector 'a -> bitvector 'b -> monad 'rv bool 'e + +let MEMw addrsize size hexRAM addr = write_mem Write_plain addrsize addr size +let MEMw_release addrsize size hexRAM addr = write_mem Write_RISCV_release addrsize addr size +let MEMw_strong_release addrsize size hexRAM addr = write_mem Write_RISCV_strong_release addrsize addr size +let MEMw_conditional addrsize size hexRAM addr = write_mem Write_RISCV_conditional addrsize addr size +let MEMw_conditional_release addrsize size hexRAM addr = write_mem Write_RISCV_conditional_release addrsize addr size +let MEMw_conditional_strong_release addrsize size hexRAM addr = write_mem Write_RISCV_conditional_strong_release addrsize addr size + +val load_reservation : forall 'a. Size 'a => bitvector 'a -> unit +let load_reservation addr = () + +let speculate_conditional_success () = excl_result () + +let match_reservation _ = true +let cancel_reservation () = () + +val sys_enable_writable_misa : unit -> bool +let sys_enable_writable_misa () = true +declare ocaml target_rep function sys_enable_writable_misa = `Platform.enable_writable_misa` + +val sys_enable_rvc : unit -> bool +let sys_enable_rvc () = true +declare ocaml target_rep function sys_enable_rvc = `Platform.enable_rvc` + +val sys_enable_next : unit -> bool +let sys_enable_next () = true +declare ocaml target_rep function sys_enable_next = `Platform.enable_next` + +val sys_enable_fdext : unit -> bool +let sys_enable_fdext () = true +declare ocaml target_rep function sys_enable_fdext = `Platform.enable_fdext` + +val plat_ram_base : forall 'a. Size 'a => unit -> bitvector 'a +let plat_ram_base () = wordFromInteger 0 +declare ocaml target_rep function plat_ram_base = `Platform.dram_base` + +val plat_ram_size : forall 'a. Size 'a => unit -> bitvector 'a +let plat_ram_size () = wordFromInteger 0 +declare ocaml target_rep function plat_ram_size = `Platform.dram_size` + +val plat_rom_base : forall 'a. Size 'a => unit -> bitvector 'a +let plat_rom_base () = wordFromInteger 0 +declare ocaml target_rep function plat_rom_base = `Platform.rom_base` + +val plat_rom_size : forall 'a. Size 'a => unit -> bitvector 'a +let plat_rom_size () = wordFromInteger 0 +declare ocaml target_rep function plat_rom_size = `Platform.rom_size` + +val plat_clint_base : forall 'a. Size 'a => unit -> bitvector 'a +let plat_clint_base () = wordFromInteger 0 +declare ocaml target_rep function plat_clint_base = `Platform.clint_base` + +val plat_clint_size : forall 'a. Size 'a => unit -> bitvector 'a +let plat_clint_size () = wordFromInteger 0 +declare ocaml target_rep function plat_clint_size = `Platform.clint_size` + +val plat_enable_dirty_update : unit -> bool +let plat_enable_dirty_update () = false +declare ocaml target_rep function plat_enable_dirty_update = `Platform.enable_dirty_update` + +val plat_enable_misaligned_access : unit -> bool +let plat_enable_misaligned_access () = false +declare ocaml target_rep function plat_enable_misaligned_access = `Platform.enable_misaligned_access` + +val plat_enable_pmp : unit -> bool +let plat_enable_pmp () = false +declare ocaml target_rep function plat_enable_pmp = `Platform.enable_pmp` + +val plat_mtval_has_illegal_inst_bits : unit -> bool +let plat_mtval_has_illegal_inst_bits () = false +declare ocaml target_rep function plat_mtval_has_illegal_inst_bits = `Platform.mtval_has_illegal_inst_bits` + +val plat_insns_per_tick : unit -> integer +let plat_insns_per_tick () = 1 +declare ocaml target_rep function plat_insns_per_tick = `Platform.insns_per_tick` + +val plat_htif_tohost : forall 'a. Size 'a => unit -> bitvector 'a +let plat_htif_tohost () = wordFromInteger 0 +declare ocaml target_rep function plat_htif_tohost = `Platform.htif_tohost` + +val plat_term_write : forall 'a. Size 'a => bitvector 'a -> unit +let plat_term_write _ = () +declare ocaml target_rep function plat_term_write = `Platform.term_write` + +val plat_term_read : forall 'a. Size 'a => unit -> bitvector 'a +let plat_term_read () = wordFromInteger 0 +declare ocaml target_rep function plat_term_read = `Platform.term_read` + +val shift_bits_right : forall 'a 'b. Size 'a, Size 'b => bitvector 'a -> bitvector 'b -> bitvector 'a +let shift_bits_right v m = shiftr v (uint m) +val shift_bits_left : forall 'a 'b. Size 'a, Size 'b => bitvector 'a -> bitvector 'b -> bitvector 'a +let shift_bits_left v m = shiftl v (uint m) + +val print_string : string -> string -> unit +let print_string msg s = () (* print_endline (msg ^ s) *) + +val prerr_string : string -> string -> unit +let prerr_string msg s = prerr_endline (msg ^ s) + +val prerr_bits : forall 'a. Size 'a => string -> bitvector 'a -> unit +let prerr_bits msg bs = prerr_endline (msg ^ (show_bitlist (bits_of bs))) + +val print_bits : forall 'a. Size 'a => string -> bitvector 'a -> unit +let print_bits msg bs = () (* print_endline (msg ^ (show_bitlist (bits_of bs))) *) + +val print_dbg : string -> unit +let print_dbg msg = () diff --git a/handwritten_support/riscv_extras.v b/handwritten_support/riscv_extras.v new file mode 100644 index 0000000..4b069ec --- /dev/null +++ b/handwritten_support/riscv_extras.v @@ -0,0 +1,154 @@ +Require Import Sail.Base. +Require Import String. +Require Import List. +Import List.ListNotations. +Open Scope Z. + +Definition MEM_fence_rw_rw {rv e} (_:unit) : monad rv unit e := barrier (Barrier_RISCV_rw_rw tt). +Definition MEM_fence_r_rw {rv e} (_:unit) : monad rv unit e := barrier (Barrier_RISCV_r_rw tt). +Definition MEM_fence_r_r {rv e} (_:unit) : monad rv unit e := barrier (Barrier_RISCV_r_r tt). +Definition MEM_fence_rw_w {rv e} (_:unit) : monad rv unit e := barrier (Barrier_RISCV_rw_w tt). +Definition MEM_fence_w_w {rv e} (_:unit) : monad rv unit e := barrier (Barrier_RISCV_w_w tt). +Definition MEM_fence_w_rw {rv e} (_:unit) : monad rv unit e := barrier (Barrier_RISCV_w_rw tt). +Definition MEM_fence_rw_r {rv e} (_:unit) : monad rv unit e := barrier (Barrier_RISCV_rw_r tt). +Definition MEM_fence_r_w {rv e} (_:unit) : monad rv unit e := barrier (Barrier_RISCV_r_w tt). +Definition MEM_fence_w_r {rv e} (_:unit) : monad rv unit e := barrier (Barrier_RISCV_w_r tt). +Definition MEM_fence_tso {rv e} (_:unit) : monad rv unit e := barrier (Barrier_RISCV_tso tt). +Definition MEM_fence_i {rv e} (_:unit) : monad rv unit e := barrier (Barrier_RISCV_i tt). +(* +val MEMea : forall 'rv 'a 'e. Size 'a => bitvector 'a -> integer -> monad 'rv unit 'e +val MEMea_release : forall 'rv 'a 'e. Size 'a => bitvector 'a -> integer -> monad 'rv unit 'e +val MEMea_strong_release : forall 'rv 'a 'e. Size 'a => bitvector 'a -> integer -> monad 'rv unit 'e +val MEMea_conditional : forall 'rv 'a 'e. Size 'a => bitvector 'a -> integer -> monad 'rv unit 'e +val MEMea_conditional_release : forall 'rv 'a 'e. Size 'a => bitvector 'a -> integer -> monad 'rv unit 'e +val MEMea_conditional_strong_release : forall 'rv 'a 'e. Size 'a => bitvector 'a -> integer -> monad 'rv unit 'e +*) +Definition MEMea {rv a e} addrsize (addr : mword a) size : monad rv unit e := write_mem_ea Write_plain addrsize addr size. +Definition MEMea_release {rv a e} addrsize (addr : mword a) size : monad rv unit e := write_mem_ea Write_RISCV_release addrsize addr size. +Definition MEMea_strong_release {rv a e} addrsize (addr : mword a) size : monad rv unit e := write_mem_ea Write_RISCV_strong_release addrsize addr size. +Definition MEMea_conditional {rv a e} addrsize (addr : mword a) size : monad rv unit e := write_mem_ea Write_RISCV_conditional addrsize addr size. +Definition MEMea_conditional_release {rv a e} addrsize (addr : mword a) size : monad rv unit e := write_mem_ea Write_RISCV_conditional_release addrsize addr size. +Definition MEMea_conditional_strong_release {rv a e} addrsize (addr : mword a) size : monad rv unit e + := write_mem_ea Write_RISCV_conditional_strong_release addrsize addr size. + +(* +val MEMr : forall 'rv 'a 'b 'e. Size 'a, Size 'b => integer -> integer -> bitvector 'a -> bitvector 'a -> monad 'rv (bitvector 'b) 'e +val MEMr_acquire : forall 'rv 'a 'b 'e. Size 'a, Size 'b => integer -> integer -> bitvector 'a -> bitvector 'a -> monad 'rv (bitvector 'b) 'e +val MEMr_strong_acquire : forall 'rv 'a 'b 'e. Size 'a, Size 'b => integer -> integer -> bitvector 'a -> bitvector 'a -> monad 'rv (bitvector 'b) 'e +val MEMr_reserved : forall 'rv 'a 'b 'e. Size 'a, Size 'b => integer -> integer -> bitvector 'a -> bitvector 'a -> monad 'rv (bitvector 'b) 'e +val MEMr_reserved_acquire : forall 'rv 'a 'b 'e. Size 'a, Size 'b => integer -> integer -> bitvector 'a -> bitvector 'a -> monad 'rv (bitvector 'b) 'e +val MEMr_reserved_strong_acquire : forall 'rv 'a 'b 'e. Size 'a, Size 'b => integer -> integer -> bitvector 'a -> bitvector 'a -> monad 'rv (bitvector 'b) 'e +*) + +Definition MEMr {rv e} addrsize size (hexRAM addr : mword addrsize) `{ArithFact (size >=? 0)} : monad rv (mword (8 * size)) e := read_mem Read_plain addrsize addr size. +Definition MEMr_acquire {rv e} addrsize size (hexRAM addr : mword addrsize) `{ArithFact (size >=? 0)} : monad rv (mword (8 * size)) e := read_mem Read_RISCV_acquire addrsize addr size. +Definition MEMr_strong_acquire {rv e} addrsize size (hexRAM addr : mword addrsize) `{ArithFact (size >=? 0)} : monad rv (mword (8 * size)) e := read_mem Read_RISCV_strong_acquire addrsize addr size. +Definition MEMr_reserved {rv e} addrsize size (hexRAM addr : mword addrsize) `{ArithFact (size >=? 0)} : monad rv (mword (8 * size)) e := read_mem Read_RISCV_reserved addrsize addr size. +Definition MEMr_reserved_acquire {rv e} addrsize size (hexRAM addr : mword addrsize) `{ArithFact (size >=? 0)} : monad rv (mword (8 * size)) e := read_mem Read_RISCV_reserved_acquire addrsize addr size. +Definition MEMr_reserved_strong_acquire {rv e} addrsize size (hexRAM addr : mword addrsize) `{ArithFact (size >=? 0)} : monad rv (mword (8 * size)) e := read_mem Read_RISCV_reserved_strong_acquire addrsize addr size. + +(* +val MEMw : forall 'rv 'a 'b 'e. Size 'a, Size 'b => integer -> integer -> bitvector 'a -> bitvector 'a -> bitvector 'b -> monad 'rv bool 'e +val MEMw_release : forall 'rv 'a 'b 'e. Size 'a, Size 'b => integer -> integer -> bitvector 'a -> bitvector 'a -> bitvector 'b -> monad 'rv bool 'e +val MEMw_strong_release : forall 'rv 'a 'b 'e. Size 'a, Size 'b => integer -> integer -> bitvector 'a -> bitvector 'a -> bitvector 'b -> monad 'rv bool 'e +val MEMw_conditional : forall 'rv 'a 'b 'e. Size 'a, Size 'b => integer -> integer -> bitvector 'a -> bitvector 'a -> bitvector 'b -> monad 'rv bool 'e +val MEMw_conditional_release : forall 'rv 'a 'b 'e. Size 'a, Size 'b => integer -> integer -> bitvector 'a -> bitvector 'a -> bitvector 'b -> monad 'rv bool 'e +val MEMw_conditional_strong_release : forall 'rv 'a 'b 'e. Size 'a, Size 'b => integer -> integer -> bitvector 'a -> bitvector 'a -> bitvector 'b -> monad 'rv bool 'e +*) + +Definition MEMw {rv e} addrsize size (hexRAM addr : mword addrsize) (v : mword (8 * size)) : monad rv bool e := write_mem Write_plain addrsize addr size v. +Definition MEMw_release {rv e} addrsize size (hexRAM addr : mword addrsize) (v : mword (8 * size)) : monad rv bool e := write_mem Write_RISCV_release addrsize addr size v. +Definition MEMw_strong_release {rv e} addrsize size (hexRAM addr : mword addrsize) (v : mword (8 * size)) : monad rv bool e := write_mem Write_RISCV_strong_release addrsize addr size v. +Definition MEMw_conditional {rv e} addrsize size (hexRAM addr : mword addrsize) (v : mword (8 * size)) : monad rv bool e := write_mem Write_RISCV_conditional addrsize addr size v. +Definition MEMw_conditional_release {rv e} addrsize size (hexRAM addr : mword addrsize) (v : mword (8 * size)) : monad rv bool e := write_mem Write_RISCV_conditional_release addrsize addr size v. +Definition MEMw_conditional_strong_release {rv e} addrsize size (hexRAM addr : mword addrsize) (v : mword (8 * size)) : monad rv bool e := write_mem Write_RISCV_conditional_strong_release addrsize addr size v. + +Definition shift_bits_left {a b} (v : mword a) (n : mword b) : mword a := + shiftl v (int_of_mword false n). + +Definition shift_bits_right {a b} (v : mword a) (n : mword b) : mword a := + shiftr v (int_of_mword false n). + +Definition shift_bits_right_arith {a b} (v : mword a) (n : mword b) : mword a := + arith_shiftr v (int_of_mword false n). + +(* Use constants for undefined values for now *) +Definition internal_pick {rv a e} (vs : list a) : monad rv a e := +match vs with +| (h::_) => returnm h +| _ => Fail "empty list in internal_pick" +end. +Definition undefined_string {rv e} (_:unit) : monad rv string e := returnm ""%string. +Definition undefined_unit {rv e} (_:unit) : monad rv unit e := returnm tt. +Definition undefined_int {rv e} (_:unit) : monad rv Z e := returnm (0:ii). +(*val undefined_vector : forall 'rv 'a 'e. integer -> 'a -> monad 'rv (list 'a) 'e*) +Definition undefined_vector {rv a e} len (u : a) `{ArithFact (len >=? 0)} : monad rv (vec a len) e := returnm (vec_init u len). +(*val undefined_bitvector : forall 'rv 'a 'e. Bitvector 'a => integer -> monad 'rv 'a 'e*) +Definition undefined_bitvector {rv e} len `{ArithFact (len >=? 0)} : monad rv (mword len) e := returnm (mword_of_int 0). +(*val undefined_bits : forall 'rv 'a 'e. Bitvector 'a => integer -> monad 'rv 'a 'e*) +Definition undefined_bits {rv e} := @undefined_bitvector rv e. +Definition undefined_bit {rv e} (_:unit) : monad rv bitU e := returnm BU. +(*Definition undefined_real {rv e} (_:unit) : monad rv real e := returnm (realFromFrac 0 1).*) +Definition undefined_range {rv e} i j `{ArithFact (i <=? j)} : monad rv {z : Z & ArithFact (i <=? z <=? j)} e := returnm (build_ex i). +Definition undefined_atom {rv e} i : monad rv Z e := returnm i. +Definition undefined_nat {rv e} (_:unit) : monad rv Z e := returnm (0:ii). + +Definition skip {rv e} (_:unit) : monad rv unit e := returnm tt. + +(*val elf_entry : unit -> integer*) +Definition elf_entry (_:unit) : Z := 0. +(*declare ocaml target_rep function elf_entry := `Elf_loader.elf_entry`*) + +Definition print_bits {n} msg (bs : mword n) := prerr_endline (msg ++ (string_of_bits bs)). + +(*val get_time_ns : unit -> integer*) +Definition get_time_ns (_:unit) : Z := 0. +(*declare ocaml target_rep function get_time_ns := `(fun () -> Big_int.of_int (int_of_float (1e9 *. Unix.gettimeofday ())))`*) + +Definition eq_bit (x : bitU) (y : bitU) : bool := + match x, y with + | B0, B0 => true + | B1, B1 => true + | BU, BU => true + | _,_ => false + end. + +Require Import Zeuclid. +Definition euclid_modulo (m n : Z) `{ArithFact (n >? 0)} : {z : Z & ArithFact (0 <=? z <=? n-1)}. +apply existT with (x := ZEuclid.modulo m n). +constructor. +destruct H. +unbool_comparisons. +unbool_comparisons_goal. +assert (Z.abs n = n). { rewrite Z.abs_eq; auto with zarith. } +rewrite <- H at 3. +lapply (ZEuclid.mod_always_pos m n); omega. +Qed. + +(* Override the more general version *) + +Definition mults_vec {n} (l : mword n) (r : mword n) : mword (2 * n) := mults_vec l r. +Definition mult_vec {n} (l : mword n) (r : mword n) : mword (2 * n) := mult_vec l r. + + +Definition print_endline (_:string) : unit := tt. +Definition prerr_endline (_:string) : unit := tt. +Definition prerr_string (_:string) : unit := tt. +Definition putchar {T} (_:T) : unit := tt. +Require DecimalString. +Definition string_of_int z := DecimalString.NilZero.string_of_int (Z.to_int z). + +Axiom sys_enable_writable_misa : unit -> bool. +Axiom sys_enable_rvc : unit -> bool. +Axiom sys_enable_fdext : unit -> bool. +Axiom sys_enable_next : unit -> bool. + +(* The constraint solver can do this itself, but a Coq bug puts + anonymous_subproof into the term instead of an actual subproof. *) +Lemma n_leading_spaces_fact {w__0} : + w__0 >= 0 -> exists ex17629_ : Z, 1 + w__0 = 1 + ex17629_ /\ 0 <= ex17629_. +intro. +exists w__0. +omega. +Qed. +Hint Resolve n_leading_spaces_fact : sail. diff --git a/handwritten_support/riscv_extras.vo b/handwritten_support/riscv_extras.vo Binary files differnew file mode 100644 index 0000000..995df56 --- /dev/null +++ b/handwritten_support/riscv_extras.vo diff --git a/handwritten_support/riscv_extras.vok b/handwritten_support/riscv_extras.vok new file mode 100644 index 0000000..e69de29 --- /dev/null +++ b/handwritten_support/riscv_extras.vok diff --git a/handwritten_support/riscv_extras.vos b/handwritten_support/riscv_extras.vos new file mode 100644 index 0000000..e69de29 --- /dev/null +++ b/handwritten_support/riscv_extras.vos diff --git a/handwritten_support/riscv_extras_fdext.lem b/handwritten_support/riscv_extras_fdext.lem new file mode 100644 index 0000000..12cfe00 --- /dev/null +++ b/handwritten_support/riscv_extras_fdext.lem @@ -0,0 +1,125 @@ +open import Pervasives +open import Pervasives_extra +open import Sail2_instr_kinds +open import Sail2_values +open import Sail2_operators_mwords +open import Sail2_prompt_monad +open import Sail2_prompt + +type bitvector 'a = mword 'a + +(* stub functions emulating the C softfloat interface *) + +val softfloat_f32_add : forall 'rm 's. Size 'rm, Size 's => bitvector 'rm -> bitvector 's -> bitvector 's -> unit +let softfloat_f32_add _ _ _ = () + +val softfloat_f32_sub : forall 'rm 's. Size 'rm, Size 's => bitvector 'rm -> bitvector 's -> bitvector 's -> unit +let softfloat_f32_sub _ _ _ = () + +val softfloat_f32_mul : forall 'rm 's. Size 'rm, Size 's => bitvector 'rm -> bitvector 's -> bitvector 's -> unit +let softfloat_f32_mul _ _ _ = () + +val softfloat_f32_div : forall 'rm 's. Size 'rm, Size 's => bitvector 'rm -> bitvector 's -> bitvector 's -> unit +let softfloat_f32_div _ _ _ = () + +val softfloat_f64_add : forall 'rm 's. Size 'rm, Size 's => bitvector 'rm -> bitvector 's -> bitvector 's -> unit +let softfloat_f64_add _ _ _ = () + +val softfloat_f64_sub : forall 'rm 's. Size 'rm, Size 's => bitvector 'rm -> bitvector 's -> bitvector 's -> unit +let softfloat_f64_sub _ _ _ = () + +val softfloat_f64_mul : forall 'rm 's. Size 'rm, Size 's => bitvector 'rm -> bitvector 's -> bitvector 's -> unit +let softfloat_f64_mul _ _ _ = () + +val softfloat_f64_div : forall 'rm 's. Size 'rm, Size 's => bitvector 'rm -> bitvector 's -> bitvector 's -> unit +let softfloat_f64_div _ _ _ = () + + +val softfloat_f32_muladd : forall 'rm 's. Size 'rm, Size 's => bitvector 'rm -> bitvector 's -> bitvector 's -> bitvector 's -> unit +let softfloat_f32_muladd _ _ _ _ = () + +val softfloat_f64_muladd : forall 'rm 's. Size 'rm, Size 's => bitvector 'rm -> bitvector 's -> bitvector 's -> bitvector 's -> unit +let softfloat_f64_muladd _ _ _ _ = () + + +val softfloat_f32_sqrt : forall 'rm 's. Size 'rm, Size 's => bitvector 'rm -> bitvector 's -> unit +let softfloat_f32_sqrt _ _ = () + +val softfloat_f64_sqrt : forall 'rm 's. Size 'rm, Size 's => bitvector 'rm -> bitvector 's -> unit +let softfloat_f64_sqrt _ _ = () + + +val softfloat_f32_to_i32: forall 'rm 's. Size 'rm, Size 's => bitvector 'rm -> bitvector 's -> unit +let softfloat_f32_to_i32 _ _ = () + +val softfloat_f32_to_ui32: forall 'rm 's. Size 'rm, Size 's => bitvector 'rm -> bitvector 's -> unit +let softfloat_f32_to_ui32 _ _ = () + +val softfloat_i32_to_f32: forall 'rm 's. Size 'rm, Size 's => bitvector 'rm -> bitvector 's -> unit +let softfloat_i32_to_f32 _ _ = () + +val softfloat_ui32_to_f32: forall 'rm 's. Size 'rm, Size 's => bitvector 'rm -> bitvector 's -> unit +let softfloat_ui32_to_f32 _ _ = () + +val softfloat_f32_to_i64: forall 'rm 's. Size 'rm, Size 's => bitvector 'rm -> bitvector 's -> unit +let softfloat_f32_to_i64 _ _ = () + +val softfloat_f32_to_ui64: forall 'rm 's. Size 'rm, Size 's => bitvector 'rm -> bitvector 's -> unit +let softfloat_f32_to_ui64 _ _ = () + +val softfloat_i64_to_f32: forall 'rm 's. Size 'rm, Size 's => bitvector 'rm -> bitvector 's -> unit +let softfloat_i64_to_f32 _ _ = () + +val softfloat_ui64_to_f32: forall 'rm 's. Size 'rm, Size 's => bitvector 'rm -> bitvector 's -> unit +let softfloat_ui64_to_f32 _ _ = () + + +val softfloat_f64_to_i32: forall 'rm 's. Size 'rm, Size 's => bitvector 'rm -> bitvector 's -> unit +let softfloat_f64_to_i32 _ _ = () + +val softfloat_f64_to_ui32: forall 'rm 's. Size 'rm, Size 's => bitvector 'rm -> bitvector 's -> unit +let softfloat_f64_to_ui32 _ _ = () + +val softfloat_i32_to_f64: forall 'rm 's. Size 'rm, Size 's => bitvector 'rm -> bitvector 's -> unit +let softfloat_i32_to_f64 _ _ = () + +val softfloat_ui32_to_f64: forall 'rm 's. Size 'rm, Size 's => bitvector 'rm -> bitvector 's -> unit +let softfloat_ui32_to_f64 _ _ = () + +val softfloat_f64_to_i64: forall 'rm 's. Size 'rm, Size 's => bitvector 'rm -> bitvector 's -> unit +let softfloat_f64_to_i64 _ _ = () + +val softfloat_f64_to_ui64: forall 'rm 's. Size 'rm, Size 's => bitvector 'rm -> bitvector 's -> unit +let softfloat_f64_to_ui64 _ _ = () + +val softfloat_i64_to_f64: forall 'rm 's. Size 'rm, Size 's => bitvector 'rm -> bitvector 's -> unit +let softfloat_i64_to_f64 _ _ = () + +val softfloat_ui64_to_f64: forall 'rm 's. Size 'rm, Size 's => bitvector 'rm -> bitvector 's -> unit +let softfloat_ui64_to_f64 _ _ = () + + +val softfloat_f32_to_f64: forall 'rm 's. Size 'rm, Size 's => bitvector 'rm -> bitvector 's -> unit +let softfloat_f32_to_f64 _ _ = () + +val softfloat_f64_to_f32: forall 'rm 's. Size 'rm, Size 's => bitvector 'rm -> bitvector 's -> unit +let softfloat_f64_to_f32 _ _ = () + + +val softfloat_f32_lt : forall 's. Size 's => bitvector 's -> bitvector 's -> unit +let softfloat_f32_lt _ _ = () + +val softfloat_f32_le : forall 's. Size 's => bitvector 's -> bitvector 's -> unit +let softfloat_f32_le _ _ = () + +val softfloat_f32_eq : forall 's. Size 's => bitvector 's -> bitvector 's -> unit +let softfloat_f32_eq _ _ = () + +val softfloat_f64_lt : forall 's. Size 's => bitvector 's -> bitvector 's -> unit +let softfloat_f64_lt _ _ = () + +val softfloat_f64_le : forall 's. Size 's => bitvector 's -> bitvector 's -> unit +let softfloat_f64_le _ _ = () + +val softfloat_f64_eq : forall 's. Size 's => bitvector 's -> bitvector 's -> unit +let softfloat_f64_eq _ _ = () diff --git a/handwritten_support/riscv_extras_sequential.lem b/handwritten_support/riscv_extras_sequential.lem new file mode 100644 index 0000000..c1c99ed --- /dev/null +++ b/handwritten_support/riscv_extras_sequential.lem @@ -0,0 +1,156 @@ +open import Pervasives +open import Pervasives_extra +open import Sail2_instr_kinds +open import Sail2_values +open import Sail2_operators_mwords +open import Sail2_prompt_monad +open import Sail2_prompt + +type bitvector 'a = mword 'a + +let MEM_fence_rw_rw () = barrier Barrier_RISCV_rw_rw +let MEM_fence_r_rw () = barrier Barrier_RISCV_r_rw +let MEM_fence_r_r () = barrier Barrier_RISCV_r_r +let MEM_fence_rw_w () = barrier Barrier_RISCV_rw_w +let MEM_fence_w_w () = barrier Barrier_RISCV_w_w +let MEM_fence_w_rw () = barrier Barrier_RISCV_w_rw +let MEM_fence_rw_r () = barrier Barrier_RISCV_rw_r +let MEM_fence_r_w () = barrier Barrier_RISCV_r_w +let MEM_fence_w_r () = barrier Barrier_RISCV_w_r +let MEM_fence_tso () = barrier Barrier_RISCV_tso +let MEM_fence_i () = barrier Barrier_RISCV_i + +val MEMea : forall 'rv 'a 'e. Size 'a => bitvector 'a -> integer -> monad 'rv unit 'e +val MEMea_release : forall 'rv 'a 'e. Size 'a => bitvector 'a -> integer -> monad 'rv unit 'e +val MEMea_strong_release : forall 'rv 'a 'e. Size 'a => bitvector 'a -> integer -> monad 'rv unit 'e +val MEMea_conditional : forall 'rv 'a 'e. Size 'a => bitvector 'a -> integer -> monad 'rv unit 'e +val MEMea_conditional_release : forall 'rv 'a 'e. Size 'a => bitvector 'a -> integer -> monad 'rv unit 'e +val MEMea_conditional_strong_release : forall 'rv 'a 'e. Size 'a => bitvector 'a -> integer -> monad 'rv unit 'e + +let MEMea addr size = write_mem_ea Write_plain addr size +let MEMea_release addr size = write_mem_ea Write_RISCV_release addr size +let MEMea_strong_release addr size = write_mem_ea Write_RISCV_strong_release addr size +let MEMea_conditional addr size = write_mem_ea Write_RISCV_conditional addr size +let MEMea_conditional_release addr size = write_mem_ea Write_RISCV_conditional_release addr size +let MEMea_conditional_strong_release addr size + = write_mem_ea Write_RISCV_conditional_strong_release addr size + +val MEMr : forall 'rv 'a 'b 'e. Size 'a, Size 'b => integer -> integer -> bitvector 'a -> bitvector 'a -> monad 'rv (bitvector 'b) 'e +val MEMr_acquire : forall 'rv 'a 'b 'e. Size 'a, Size 'b => integer -> integer -> bitvector 'a -> bitvector 'a -> monad 'rv (bitvector 'b) 'e +val MEMr_strong_acquire : forall 'rv 'a 'b 'e. Size 'a, Size 'b => integer -> integer -> bitvector 'a -> bitvector 'a -> monad 'rv (bitvector 'b) 'e +val MEMr_reserved : forall 'rv 'a 'b 'e. Size 'a, Size 'b => integer -> integer -> bitvector 'a -> bitvector 'a -> monad 'rv (bitvector 'b) 'e +val MEMr_reserved_acquire : forall 'rv 'a 'b 'e. Size 'a, Size 'b => integer -> integer -> bitvector 'a -> bitvector 'a -> monad 'rv (bitvector 'b) 'e +val MEMr_reserved_strong_acquire : forall 'rv 'a 'b 'e. Size 'a, Size 'b => integer -> integer -> bitvector 'a -> bitvector 'a -> monad 'rv (bitvector 'b) 'e + +let MEMr addrsize size hexRAM addr = read_mem Read_plain addr size +let MEMr_acquire addrsize size hexRAM addr = read_mem Read_RISCV_acquire addr size +let MEMr_strong_acquire addrsize size hexRAM addr = read_mem Read_RISCV_strong_acquire addr size +let MEMr_reserved addrsize size hexRAM addr = read_mem Read_RISCV_reserved addr size +let MEMr_reserved_acquire addrsize size hexRAM addr = read_mem Read_RISCV_reserved_acquire addr size +let MEMr_reserved_strong_acquire addrsize size hexRAM addr = read_mem Read_RISCV_reserved_strong_acquire addr size + +val write_ram : forall 'rv 'a 'b 'e. Size 'a, Size 'b => + integer -> integer -> bitvector 'a -> bitvector 'a -> bitvector 'b -> monad 'rv bool 'e +let write_ram addrsize size hexRAM address value = + write_mem Write_plain address size value + +val read_ram : forall 'rv 'a 'b 'e. Size 'a, Size 'b => + integer -> integer -> bitvector 'a -> bitvector 'a -> monad 'rv (bitvector 'b) 'e +let read_ram addrsize size hexRAM address = + read_mem Read_plain address size + +val load_reservation : forall 'a. Size 'a => bitvector 'a -> unit +let load_reservation addr = () + +let speculate_conditional_success () = excl_result () + +let match_reservation _ = true +let cancel_reservation () = () + +val sys_enable_writable_misa : unit -> bool +let sys_enable_writable_misa () = true +declare ocaml target_rep function sys_enable_writable_misa = `Platform.enable_writable_misa` + +val sys_enable_rvc : unit -> bool +let sys_enable_rvc () = true +declare ocaml target_rep function sys_enable_rvc = `Platform.enable_rvc` + +val sys_enable_next : unit -> bool +let sys_enable_next () = true +declare ocaml target_rep function sys_enable_next = `Platform.enable_next` + +val plat_ram_base : forall 'a. Size 'a => unit -> bitvector 'a +let plat_ram_base () = wordFromInteger 0 +declare ocaml target_rep function plat_ram_base = `Platform.dram_base` + +val plat_ram_size : forall 'a. Size 'a => unit -> bitvector 'a +let plat_ram_size () = wordFromInteger 0 +declare ocaml target_rep function plat_ram_size = `Platform.dram_size` + +val plat_rom_base : forall 'a. Size 'a => unit -> bitvector 'a +let plat_rom_base () = wordFromInteger 0 +declare ocaml target_rep function plat_rom_base = `Platform.rom_base` + +val plat_rom_size : forall 'a. Size 'a => unit -> bitvector 'a +let plat_rom_size () = wordFromInteger 0 +declare ocaml target_rep function plat_rom_size = `Platform.rom_size` + +val plat_clint_base : forall 'a. Size 'a => unit -> bitvector 'a +let plat_clint_base () = wordFromInteger 0 +declare ocaml target_rep function plat_clint_base = `Platform.clint_base` + +val plat_clint_size : forall 'a. Size 'a => unit -> bitvector 'a +let plat_clint_size () = wordFromInteger 0 +declare ocaml target_rep function plat_clint_size = `Platform.clint_size` + +val plat_enable_dirty_update : unit -> bool +let plat_enable_dirty_update () = false +declare ocaml target_rep function plat_enable_dirty_update = `Platform.enable_dirty_update` + +val plat_enable_misaligned_access : unit -> bool +let plat_enable_misaligned_access () = false +declare ocaml target_rep function plat_enable_misaligned_access = `Platform.enable_misaligned_access` + +val plat_enable_pmp : unit -> bool +let plat_enable_pmp () = false +declare ocaml target_rep function plat_enable_pmp = `Platform.enable_pmp` + +val plat_mtval_has_illegal_inst_bits : unit -> bool +let plat_mtval_has_illegal_inst_bits () = false +declare ocaml target_rep function plat_mtval_has_illegal_inst_bits = `Platform.mtval_has_illegal_inst_bits` + +val plat_insns_per_tick : unit -> integer +let plat_insns_per_tick () = 1 +declare ocaml target_rep function plat_insns_per_tick = `Platform.insns_per_tick` + +val plat_htif_tohost : forall 'a. Size 'a => unit -> bitvector 'a +let plat_htif_tohost () = wordFromInteger 0 +declare ocaml target_rep function plat_htif_tohost = `Platform.htif_tohost` + +val plat_term_write : forall 'a. Size 'a => bitvector 'a -> unit +let plat_term_write _ = () +declare ocaml target_rep function plat_term_write = `Platform.term_write` + +val plat_term_read : forall 'a. Size 'a => unit -> bitvector 'a +let plat_term_read () = wordFromInteger 0 +declare ocaml target_rep function plat_term_read = `Platform.term_read` + +val shift_bits_right : forall 'a 'b. Size 'a, Size 'b => bitvector 'a -> bitvector 'b -> bitvector 'a +let shift_bits_right v m = shiftr v (uint m) +val shift_bits_left : forall 'a 'b. Size 'a, Size 'b => bitvector 'a -> bitvector 'b -> bitvector 'a +let shift_bits_left v m = shiftl v (uint m) + +val print_string : string -> string -> unit +let print_string msg s = () (* print_endline (msg ^ s) *) + +val prerr_string : string -> string -> unit +let prerr_string msg s = prerr_endline (msg ^ s) + +val prerr_bits : forall 'a. Size 'a => string -> bitvector 'a -> unit +let prerr_bits msg bs = prerr_endline (msg ^ (show_bitlist (bits_of bs))) + +val print_bits : forall 'a. Size 'a => string -> bitvector 'a -> unit +let print_bits msg bs = () (* print_endline (msg ^ (show_bitlist (bits_of bs))) *) + +val print_dbg : string -> unit +let print_dbg msg = () diff --git a/regs.sail b/regs.sail new file mode 100644 index 0000000..76a8d3e --- /dev/null +++ b/regs.sail @@ -0,0 +1,297 @@ +/* Content from files riscv_reg_type.sail and riscv_regs.sail */ + +type xlen : Int = 64 +type xlen_bytes : Int = 8 +type xlenbits = bits(xlen) + +/* default register type */ +type regtype = xlenbits + +/* default zero register */ +let zero_reg : regtype = EXTZ(0x0) + +/* default register printer */ +val RegStr : regtype -> string +function RegStr(r) = BitStr(r) + +/* conversions */ + +val regval_from_reg : regtype -> xlenbits +function regval_from_reg(r) = r + +val regval_into_reg : xlenbits -> regtype +function regval_into_reg(v) = v + +/* program counter */ + +register PC : xlenbits +register nextPC : xlenbits + +/* internal state to hold instruction bits for faulting instructions */ +register instbits : xlenbits + +/* register file and accessors */ + +register x1 : regtype +register x2 : regtype +register x3 : regtype +register x4 : regtype +register x5 : regtype +register x6 : regtype +register x7 : regtype +register x8 : regtype +register x9 : regtype +register x10 : regtype +register x11 : regtype +register x12 : regtype +register x13 : regtype +register x14 : regtype +register x15 : regtype +register x16 : regtype +register x17 : regtype +register x18 : regtype +register x19 : regtype +register x20 : regtype +register x21 : regtype +register x22 : regtype +register x23 : regtype +register x24 : regtype +register x25 : regtype +register x26 : regtype +register x27 : regtype +register x28 : regtype +register x29 : regtype +register x30 : regtype +register x31 : regtype + +val rX : forall 'n, 0 <= 'n < 32. regno('n) -> xlenbits effect {rreg, escape} +function rX r = { + let v : regtype = + match r { + 0 => zero_reg, + 1 => x1, + 2 => x2, + 3 => x3, + 4 => x4, + 5 => x5, + 6 => x6, + 7 => x7, + 8 => x8, + 9 => x9, + 10 => x10, + 11 => x11, + 12 => x12, + 13 => x13, + 14 => x14, + 15 => x15, + 16 => x16, + 17 => x17, + 18 => x18, + 19 => x19, + 20 => x20, + 21 => x21, + 22 => x22, + 23 => x23, + 24 => x24, + 25 => x25, + 26 => x26, + 27 => x27, + 28 => x28, + 29 => x29, + 30 => x30, + 31 => x31, + _ => {assert(false, "invalid register number"); zero_reg} + }; + regval_from_reg(v) +} + +/* $ifdef RVFI_DII */ +/* val rvfi_wX : forall 'n, 0 <= 'n < 32. (regno('n), xlenbits) -> unit effect {wreg} */ +/* function rvfi_wX (r,v) = { */ +/* rvfi_exec->rvfi_rd_wdata() = EXTZ(v); */ +/* rvfi_exec->rvfi_rd_addr() = to_bits(8,r); */ +/* } */ +/* $else */ +/* val rvfi_wX : forall 'n, 0 <= 'n < 32. (regno('n), xlenbits) -> unit */ +/* function rvfi_wX (r,v) = () */ +/* $endif */ + +val wX : forall 'n, 0 <= 'n < 32. (regno('n), xlenbits) -> unit effect {wreg, escape} +function wX (r, in_v) = { + let v = regval_into_reg(in_v); + match r { + 0 => (), + 1 => x1 = v, + 2 => x2 = v, + 3 => x3 = v, + 4 => x4 = v, + 5 => x5 = v, + 6 => x6 = v, + 7 => x7 = v, + 8 => x8 = v, + 9 => x9 = v, + 10 => x10 = v, + 11 => x11 = v, + 12 => x12 = v, + 13 => x13 = v, + 14 => x14 = v, + 15 => x15 = v, + 16 => x16 = v, + 17 => x17 = v, + 18 => x18 = v, + 19 => x19 = v, + 20 => x20 = v, + 21 => x21 = v, + 22 => x22 = v, + 23 => x23 = v, + 24 => x24 = v, + 25 => x25 = v, + 26 => x26 = v, + 27 => x27 = v, + 28 => x28 = v, + 29 => x29 = v, + 30 => x30 = v, + 31 => x31 = v, + _ => assert(false, "invalid register number") + }; + /* if (r != 0) then { */ + /* rvfi_wX(r, in_v); */ + /* if get_config_print_reg() */ + /* then print_reg("x" ^ string_of_int(r) ^ " <- " ^ RegStr(v)); */ + /* } */ +} + +function rX_bits(i: bits(5)) -> xlenbits = rX(unsigned(i)) + +function wX_bits(i: bits(5), data: xlenbits) -> unit = { + wX(unsigned(i)) = data +} + +overload X = {rX_bits, wX_bits, rX, wX} + +/* register names */ + +val reg_name_abi : regidx -> string + +function reg_name_abi(r) = { + match (r) { + 0b00000 => "zero", + 0b00001 => "ra", + 0b00010 => "sp", + 0b00011 => "gp", + 0b00100 => "tp", + 0b00101 => "t0", + 0b00110 => "t1", + 0b00111 => "t2", + 0b01000 => "fp", + 0b01001 => "s1", + 0b01010 => "a0", + 0b01011 => "a1", + 0b01100 => "a2", + 0b01101 => "a3", + 0b01110 => "a4", + 0b01111 => "a5", + 0b10000 => "a6", + 0b10001 => "a7", + 0b10010 => "s2", + 0b10011 => "s3", + 0b10100 => "s4", + 0b10101 => "s5", + 0b10110 => "s6", + 0b10111 => "s7", + 0b11000 => "s8", + 0b11001 => "s9", + 0b11010 => "s10", + 0b11011 => "s11", + 0b11100 => "t3", + 0b11101 => "t4", + 0b11110 => "t5", + 0b11111 => "t6" + } +} + +overload to_str = {reg_name_abi} + +/* mappings for assembly */ + +val reg_name : bits(5) <-> string +mapping reg_name = { + 0b00000 <-> "zero", + 0b00001 <-> "ra", + 0b00010 <-> "sp", + 0b00011 <-> "gp", + 0b00100 <-> "tp", + 0b00101 <-> "t0", + 0b00110 <-> "t1", + 0b00111 <-> "t2", + 0b01000 <-> "fp", + 0b01001 <-> "s1", + 0b01010 <-> "a0", + 0b01011 <-> "a1", + 0b01100 <-> "a2", + 0b01101 <-> "a3", + 0b01110 <-> "a4", + 0b01111 <-> "a5", + 0b10000 <-> "a6", + 0b10001 <-> "a7", + 0b10010 <-> "s2", + 0b10011 <-> "s3", + 0b10100 <-> "s4", + 0b10101 <-> "s5", + 0b10110 <-> "s6", + 0b10111 <-> "s7", + 0b11000 <-> "s8", + 0b11001 <-> "s9", + 0b11010 <-> "s10", + 0b11011 <-> "s11", + 0b11100 <-> "t3", + 0b11101 <-> "t4", + 0b11110 <-> "t5", + 0b11111 <-> "t6" +} + +mapping creg_name : bits(3) <-> string = { + 0b000 <-> "s0", + 0b001 <-> "s1", + 0b010 <-> "a0", + 0b011 <-> "a1", + 0b100 <-> "a2", + 0b101 <-> "a3", + 0b110 <-> "a4", + 0b111 <-> "a5" +} + +val init_base_regs : unit -> unit effect {wreg} +function init_base_regs () = { + x1 = zero_reg; + x2 = zero_reg; + x3 = zero_reg; + x4 = zero_reg; + x5 = zero_reg; + x6 = zero_reg; + x7 = zero_reg; + x8 = zero_reg; + x9 = zero_reg; + x10 = zero_reg; + x11 = zero_reg; + x12 = zero_reg; + x13 = zero_reg; + x14 = zero_reg; + x15 = zero_reg; + x16 = zero_reg; + x17 = zero_reg; + x18 = zero_reg; + x19 = zero_reg; + x20 = zero_reg; + x21 = zero_reg; + x22 = zero_reg; + x23 = zero_reg; + x24 = zero_reg; + x25 = zero_reg; + x26 = zero_reg; + x27 = zero_reg; + x28 = zero_reg; + x29 = zero_reg; + x30 = zero_reg; + x31 = zero_reg +} diff --git a/riscv_reg_type.sail b/riscv_reg_type.sail new file mode 100644 index 0000000..99fae3c --- /dev/null +++ b/riscv_reg_type.sail @@ -0,0 +1,60 @@ +/* Content from riscv_xlen64.sail */ +default Order dec + +/* $include <smt.sail> */ +$include <option.sail> +/* $include <arith.sail> */ +$include <string.sail> +$include <vector_dec.sail> +/* $include <regfp.sail> */ + +type xlen : Int = 64 +type xlen_bytes : Int = 8 +type xlenbits = bits(xlen) + +/* Content from prelude.sail */ + +val EXTS : forall 'n 'm, 'm >= 'n. (implicit('m), bits('n)) -> bits('m) +val EXTZ : forall 'n 'm, 'm >= 'n. (implicit('m), bits('n)) -> bits('m) + +function EXTS(m, v) = sail_sign_extend(v, m) +function EXTZ(m, v) = sail_zero_extend(v, m) + +val string_length = "string_length" : string -> nat +val string_startswith = "string_startswith" : (string, string) -> bool +val string_drop = "string_drop" : (string, nat) -> string +val string_take = "string_take" : (string, nat) -> string +val string_length = "string_length" : string -> nat +val string_append = {c: "concat_str", _: "string_append"} : (string, string) -> string +/* Content from riscv_reg_type.sail*/ + +/* default register type */ +type regtype = xlenbits + +/* default zero register */ +let zero_reg : regtype = EXTZ(0x0) + +/* default register printer */ +/* val RegStr : regtype -> string */ +/* function RegStr(r) = BitStr(r) */ + +/* conversions */ + +val regval_from_reg : regtype -> xlenbits +function regval_from_reg(r) = r + +val regval_into_reg : xlenbits -> regtype +function regval_into_reg(v) = v + +/* register file indexing */ + +type regno ('n : Int), 0 <= 'n < 32 = atom('n) + +/* val regidx_to_regno : bits(5) -> {'n, 0 <= 'n < 32. regno('n)} */ +/* function regidx_to_regno b = let 'r = unsigned(b) in r */ + +/* register identifiers */ + +type regidx = bits(5) +type cregidx = bits(3) /* identifiers in RVC instructions */ +type csreg = bits(12) /* CSR addressing */
\ No newline at end of file diff --git a/riscv_regs.sail b/riscv_regs.sail new file mode 100644 index 0000000..2bf91f1 --- /dev/null +++ b/riscv_regs.sail @@ -0,0 +1,231 @@ +/* Content from riscv_regs.sail */ +/* $include <smt.sail> */ +/* $include <option.sail> */ +/* $include <arith.sail> */ +/* $include <string.sail> */ +/* $include <vector_dec.sail> */ +/* $include <regfp.sail> */ +/* program counter */ + +register PC : xlenbits +register nextPC : xlenbits + +/* internal state to hold instruction bits for faulting instructions */ +register instbits : xlenbits + +/* register file and accessors */ + +register x1 : regtype +register x2 : regtype +register x3 : regtype +register x4 : regtype +register x5 : regtype +register x6 : regtype +register x7 : regtype +register x8 : regtype +register x9 : regtype +register x10 : regtype +register x11 : regtype +register x12 : regtype +register x13 : regtype +register x14 : regtype +register x15 : regtype +register x16 : regtype +register x17 : regtype +register x18 : regtype +register x19 : regtype +register x20 : regtype +register x21 : regtype +register x22 : regtype +register x23 : regtype +register x24 : regtype +register x25 : regtype +register x26 : regtype +register x27 : regtype +register x28 : regtype +register x29 : regtype +register x30 : regtype +register x31 : regtype + +val rX : forall 'n, 0 <= 'n < 32. regno('n) -> xlenbits effect {rreg, escape} +function rX r = { + let v : regtype = + match r { + 0 => zero_reg, + 1 => x1, + 2 => x2, + 3 => x3, + 4 => x4, + 5 => x5, + 6 => x6, + 7 => x7, + 8 => x8, + 9 => x9, + 10 => x10, + 11 => x11, + 12 => x12, + 13 => x13, + 14 => x14, + 15 => x15, + 16 => x16, + 17 => x17, + 18 => x18, + 19 => x19, + 20 => x20, + 21 => x21, + 22 => x22, + 23 => x23, + 24 => x24, + 25 => x25, + 26 => x26, + 27 => x27, + 28 => x28, + 29 => x29, + 30 => x30, + 31 => x31, + _ => {assert(false, "invalid register number"); zero_reg} + }; + regval_from_reg(v) +} + +/* $ifdef RVFI_DII */ +/* val rvfi_wX : forall 'n, 0 <= 'n < 32. (regno('n), xlenbits) -> unit effect {wreg} */ +/* function rvfi_wX (r,v) = { */ +/* rvfi_exec->rvfi_rd_wdata() = EXTZ(v); */ +/* rvfi_exec->rvfi_rd_addr() = to_bits(8,r); */ +/* } */ +/* $else */ +/* val rvfi_wX : forall 'n, 0 <= 'n < 32. (regno('n), xlenbits) -> unit */ +/* function rvfi_wX (r,v) = () */ +/* $endif */ + +val wX : forall 'n, 0 <= 'n < 32. (regno('n), xlenbits) -> unit effect {wreg, escape} +function wX (r, in_v) = { + let v = regval_into_reg(in_v); + match r { + 0 => (), + 1 => x1 = v, + 2 => x2 = v, + 3 => x3 = v, + 4 => x4 = v, + 5 => x5 = v, + 6 => x6 = v, + 7 => x7 = v, + 8 => x8 = v, + 9 => x9 = v, + 10 => x10 = v, + 11 => x11 = v, + 12 => x12 = v, + 13 => x13 = v, + 14 => x14 = v, + 15 => x15 = v, + 16 => x16 = v, + 17 => x17 = v, + 18 => x18 = v, + 19 => x19 = v, + 20 => x20 = v, + 21 => x21 = v, + 22 => x22 = v, + 23 => x23 = v, + 24 => x24 = v, + 25 => x25 = v, + 26 => x26 = v, + 27 => x27 = v, + 28 => x28 = v, + 29 => x29 = v, + 30 => x30 = v, + 31 => x31 = v, + _ => assert(false, "invalid register number") + }; + /* if (r != 0) then { */ + /* rvfi_wX(r, in_v); */ + /* if get_config_print_reg() */ + /* then print_reg("x" ^ string_of_int(r) ^ " <- " ^ RegStr(v)); */ + /* } */ +} + +function rX_bits(i: bits(5)) -> xlenbits = rX(unsigned(i)) + +function wX_bits(i: bits(5), data: xlenbits) -> unit = { + wX(unsigned(i)) = data +} + +overload X = {rX_bits, wX_bits, rX, wX} + +/* register names */ + +val reg_name_abi : regidx -> string + +function reg_name_abi(r) = { + match (r) { + 0b00000 => "zero", + 0b00001 => "ra", + 0b00010 => "sp", + 0b00011 => "gp", + 0b00100 => "tp", + 0b00101 => "t0", + 0b00110 => "t1", + 0b00111 => "t2", + 0b01000 => "fp", + 0b01001 => "s1", + 0b01010 => "a0", + 0b01011 => "a1", + 0b01100 => "a2", + 0b01101 => "a3", + 0b01110 => "a4", + 0b01111 => "a5", + 0b10000 => "a6", + 0b10001 => "a7", + 0b10010 => "s2", + 0b10011 => "s3", + 0b10100 => "s4", + 0b10101 => "s5", + 0b10110 => "s6", + 0b10111 => "s7", + 0b11000 => "s8", + 0b11001 => "s9", + 0b11010 => "s10", + 0b11011 => "s11", + 0b11100 => "t3", + 0b11101 => "t4", + 0b11110 => "t5", + 0b11111 => "t6" + } +} + +overload to_str = {reg_name_abi} + +val init_base_regs : unit -> unit effect {wreg} +function init_base_regs () = { + x1 = zero_reg; + x2 = zero_reg; + x3 = zero_reg; + x4 = zero_reg; + x5 = zero_reg; + x6 = zero_reg; + x7 = zero_reg; + x8 = zero_reg; + x9 = zero_reg; + x10 = zero_reg; + x11 = zero_reg; + x12 = zero_reg; + x13 = zero_reg; + x14 = zero_reg; + x15 = zero_reg; + x16 = zero_reg; + x17 = zero_reg; + x18 = zero_reg; + x19 = zero_reg; + x20 = zero_reg; + x21 = zero_reg; + x22 = zero_reg; + x23 = zero_reg; + x24 = zero_reg; + x25 = zero_reg; + x26 = zero_reg; + x27 = zero_reg; + x28 = zero_reg; + x29 = zero_reg; + x30 = zero_reg; + x31 = zero_reg +} diff --git a/snapshot/Makefile b/snapshot/Makefile new file mode 100644 index 0000000..8bfc468 --- /dev/null +++ b/snapshot/Makefile @@ -0,0 +1,870 @@ +########################################################################## +## # The Coq Proof Assistant / The Coq Development Team ## +## v # Copyright INRIA, CNRS and contributors ## +## <O___,, # (see version control and CREDITS file for authors & dates) ## +## \VV/ ############################################################### +## // # This file is distributed under the terms of the ## +## # GNU Lesser General Public License Version 2.1 ## +## # (see LICENSE file for the text of the license) ## +########################################################################## +## GNUMakefile for Coq 8.13.2 + +# For debugging purposes (must stay here, don't move below) +INITIAL_VARS := $(.VARIABLES) +# To implement recursion we save the name of the main Makefile +SELF := $(lastword $(MAKEFILE_LIST)) +PARENT := $(firstword $(MAKEFILE_LIST)) + +# This file is generated by coq_makefile and contains many variable +# definitions, like the list of .v files or the path to Coq +include Makefile.conf + +# Put in place old names +VFILES := $(COQMF_VFILES) +MLIFILES := $(COQMF_MLIFILES) +MLFILES := $(COQMF_MLFILES) +MLGFILES := $(COQMF_MLGFILES) +MLPACKFILES := $(COQMF_MLPACKFILES) +MLLIBFILES := $(COQMF_MLLIBFILES) +CMDLINE_VFILES := $(COQMF_CMDLINE_VFILES) +INSTALLCOQDOCROOT := $(COQMF_INSTALLCOQDOCROOT) +OTHERFLAGS := $(COQMF_OTHERFLAGS) +COQ_SRC_SUBDIRS := $(COQMF_COQ_SRC_SUBDIRS) +OCAMLLIBS := $(COQMF_OCAMLLIBS) +SRC_SUBDIRS := $(COQMF_SRC_SUBDIRS) +COQLIBS := $(COQMF_COQLIBS) +COQLIBS_NOML := $(COQMF_COQLIBS_NOML) +CMDLINE_COQLIBS := $(COQMF_CMDLINE_COQLIBS) +LOCAL := $(COQMF_LOCAL) +COQLIB := $(COQMF_COQLIB) +DOCDIR := $(COQMF_DOCDIR) +OCAMLFIND := $(COQMF_OCAMLFIND) +CAMLFLAGS := $(COQMF_CAMLFLAGS) +HASNATDYNLINK := $(COQMF_HASNATDYNLINK) +OCAMLWARN := $(COQMF_WARN) + +Makefile.conf: _CoqProject + coq_makefile -f _CoqProject riscv_types.v riscv.v -o Makefile + +# This file can be created by the user to hook into double colon rules or +# add any other Makefile code he may need +-include Makefile.local + +# Parameters ################################################################## +# +# Parameters are make variable assignments. +# They can be passed to (each call to) make on the command line. +# They can also be put in Makefile.local once and for all. +# For retro-compatibility reasons they can be put in the _CoqProject, but this +# practice is discouraged since _CoqProject better not contain make specific +# code (be nice to user interfaces). + +# Print shell commands (set to non empty) +VERBOSE ?= + +# Time the Coq process (set to non empty), and how (see default value) +TIMED?= +TIMECMD?= +# Use command time on linux, gtime on Mac OS +TIMEFMT?="$@ (real: %e, user: %U, sys: %S, mem: %M ko)" +ifneq (,$(TIMED)) +ifeq (0,$(shell command time -f "" true >/dev/null 2>/dev/null; echo $$?)) +STDTIME?=command time -f $(TIMEFMT) +else +ifeq (0,$(shell gtime -f "" true >/dev/null 2>/dev/null; echo $$?)) +STDTIME?=gtime -f $(TIMEFMT) +else +STDTIME?=command time +endif +endif +else +STDTIME?=command time -f $(TIMEFMT) +endif + +ifneq (,$(COQBIN)) +# add an ending / +COQBIN:=$(COQBIN)/ +endif + +# Coq binaries +COQC ?= "$(COQBIN)coqc" +COQTOP ?= "$(COQBIN)coqtop" +COQCHK ?= "$(COQBIN)coqchk" +COQDEP ?= "$(COQBIN)coqdep" +COQDOC ?= "$(COQBIN)coqdoc" +COQPP ?= "$(COQBIN)coqpp" +COQMKFILE ?= "$(COQBIN)coq_makefile" +OCAMLLIBDEP ?= "$(COQBIN)ocamllibdep" + +# Timing scripts +COQMAKE_ONE_TIME_FILE ?= "$(COQLIB)/tools/make-one-time-file.py" +COQMAKE_BOTH_TIME_FILES ?= "$(COQLIB)/tools/make-both-time-files.py" +COQMAKE_BOTH_SINGLE_TIMING_FILES ?= "$(COQLIB)/tools/make-both-single-timing-files.py" +BEFORE ?= +AFTER ?= + +# FIXME this should be generated by Coq (modules already linked by Coq) +CAMLDONTLINK=str,unix,dynlink,threads,zarith + +# OCaml binaries +CAMLC ?= "$(OCAMLFIND)" ocamlc -c +CAMLOPTC ?= "$(OCAMLFIND)" opt -c +CAMLLINK ?= "$(OCAMLFIND)" ocamlc -linkpkg -dontlink $(CAMLDONTLINK) +CAMLOPTLINK ?= "$(OCAMLFIND)" opt -linkpkg -dontlink $(CAMLDONTLINK) +CAMLDOC ?= "$(OCAMLFIND)" ocamldoc +CAMLDEP ?= "$(OCAMLFIND)" ocamldep -slash -ml-synonym .mlpack + +# DESTDIR is prepended to all installation paths +DESTDIR ?= + +# Debug builds, typically -g to OCaml, -debug to Coq. +CAMLDEBUG ?= +COQDEBUG ?= + +# Extra packages to be linked in (as in findlib -package) +CAMLPKGS ?= + +# Option for making timing files +TIMING?= +# Option for changing sorting of timing output file +TIMING_SORT_BY ?= auto +# Option for changing the fuzz parameter on the output file +TIMING_FUZZ ?= 0 +# Option for changing whether to use real or user time for timing tables +TIMING_REAL?= +# Option for including the memory column(s) +TIMING_INCLUDE_MEM?= +# Option for sorting by the memory column +TIMING_SORT_BY_MEM?= +# Output file names for timed builds +TIME_OF_BUILD_FILE ?= time-of-build.log +TIME_OF_BUILD_BEFORE_FILE ?= time-of-build-before.log +TIME_OF_BUILD_AFTER_FILE ?= time-of-build-after.log +TIME_OF_PRETTY_BUILD_FILE ?= time-of-build-pretty.log +TIME_OF_PRETTY_BOTH_BUILD_FILE ?= time-of-build-both.log +TIME_OF_PRETTY_BUILD_EXTRA_FILES ?= - # also output to the command line + +TGTS ?= + +# Retro compatibility (DESTDIR is standard on Unix, DSTROOT is not) +ifdef DSTROOT +DESTDIR := $(DSTROOT) +endif + +# Substitution of the path by appending $(DESTDIR) if needed. +# The variable $(COQMF_WINDRIVE) can be needed for Cygwin environments. +windrive_path = $(if $(COQMF_WINDRIVE),$(subst $(COQMF_WINDRIVE),/,$(1)),$(1)) +destination_path = $(if $(DESTDIR),$(DESTDIR)/$(call windrive_path,$(1)),$(1)) + +# Installation paths of libraries and documentation. +COQLIBINSTALL ?= $(call destination_path,$(COQLIB)/user-contrib) +COQDOCINSTALL ?= $(call destination_path,$(DOCDIR)/user-contrib) +COQTOPINSTALL ?= $(call destination_path,$(COQLIB)/toploop) # FIXME: Unused variable? + +########## End of parameters ################################################## +# What follows may be relevant to you only if you need to +# extend this Makefile. If so, look for 'Extension point' here and +# put in Makefile.local double colon rules accordingly. +# E.g. to perform some work after the all target completes you can write +# +# post-all:: +# echo "All done!" +# +# in Makefile.local +# +############################################################################### + + + + +# Flags ####################################################################### +# +# We define a bunch of variables combining the parameters. +# To add additional flags to coq, coqchk or coqdoc, set the +# {COQ,COQCHK,COQDOC}EXTRAFLAGS variable to whatever you want to add. +# To overwrite the default choice and set your own flags entirely, set the +# {COQ,COQCHK,COQDOC}FLAGS variable. + +SHOW := $(if $(VERBOSE),@true "",@echo "") +HIDE := $(if $(VERBOSE),,@) + +TIMER=$(if $(TIMED), $(STDTIME), $(TIMECMD)) + +OPT?= + +# The DYNOBJ and DYNLIB variables are used by "coqdep -dyndep var" in .v.d +ifeq '$(OPT)' '-byte' +USEBYTE:=true +DYNOBJ:=.cma +DYNLIB:=.cma +else +USEBYTE:= +DYNOBJ:=.cmxs +DYNLIB:=.cmxs +endif + +# these variables are meant to be overridden if you want to add *extra* flags +COQEXTRAFLAGS?= +COQCHKEXTRAFLAGS?= +COQDOCEXTRAFLAGS?= + +# these flags do NOT contain the libraries, to make them easier to overwrite +COQFLAGS?=-q $(OTHERFLAGS) $(COQEXTRAFLAGS) +COQCHKFLAGS?=-silent -o $(COQCHKEXTRAFLAGS) +COQDOCFLAGS?=-interpolate -utf8 $(COQDOCEXTRAFLAGS) + +COQDOCLIBS?=$(COQLIBS_NOML) + +# The version of Coq being run and the version of coq_makefile that +# generated this makefile +COQ_VERSION:=$(shell $(COQC) --print-version | cut -d " " -f 1) +COQMAKEFILE_VERSION:=8.13.2 + +COQSRCLIBS?= $(foreach d,$(COQ_SRC_SUBDIRS), -I "$(COQLIB)/$(d)") + +CAMLFLAGS+=$(OCAMLLIBS) $(COQSRCLIBS) +# ocamldoc fails with unknown argument otherwise +CAMLDOCFLAGS:=$(filter-out -annot, $(filter-out -bin-annot, $(CAMLFLAGS))) +CAMLFLAGS+=$(OCAMLWARN) + +ifneq (,$(TIMING)) +TIMING_ARG=-time +ifeq (after,$(TIMING)) +TIMING_EXT=after-timing +else +ifeq (before,$(TIMING)) +TIMING_EXT=before-timing +else +TIMING_EXT=timing +endif +endif +else +TIMING_ARG= +endif + +# Files ####################################################################### +# +# We here define a bunch of variables about the files being part of the +# Coq project in order to ease the writing of build target and build rules + +VDFILE := .Makefile.d + +ALLSRCFILES := \ + $(MLGFILES) \ + $(MLFILES) \ + $(MLPACKFILES) \ + $(MLLIBFILES) \ + $(MLIFILES) + +# helpers +vo_to_obj = $(addsuffix .o,\ + $(filter-out Warning: Error:,\ + $(shell $(COQTOP) -q -noinit -batch -quiet -print-mod-uid $(1)))) +strip_dotslash = $(patsubst ./%,%,$(1)) + +# without this we get undefined variables in the expansion for the +# targets of the [deprecated,use-mllib-or-mlpack] rule +with_undef = $(if $(filter-out undefined, $(origin $(1))),$($(1))) + +VO = vo +VOS = vos + +VOFILES = $(VFILES:.v=.$(VO)) +GLOBFILES = $(VFILES:.v=.glob) +HTMLFILES = $(VFILES:.v=.html) +GHTMLFILES = $(VFILES:.v=.g.html) +BEAUTYFILES = $(addsuffix .beautified,$(VFILES)) +TEXFILES = $(VFILES:.v=.tex) +GTEXFILES = $(VFILES:.v=.g.tex) +CMOFILES = \ + $(MLGFILES:.mlg=.cmo) \ + $(MLFILES:.ml=.cmo) \ + $(MLPACKFILES:.mlpack=.cmo) +CMXFILES = $(CMOFILES:.cmo=.cmx) +OFILES = $(CMXFILES:.cmx=.o) +CMAFILES = $(MLLIBFILES:.mllib=.cma) $(MLPACKFILES:.mlpack=.cma) +CMXAFILES = $(CMAFILES:.cma=.cmxa) +CMIFILES = \ + $(CMOFILES:.cmo=.cmi) \ + $(MLIFILES:.mli=.cmi) +# the /if/ is because old _CoqProject did not list a .ml(pack|lib) but just +# a .mlg file +CMXSFILES = \ + $(MLPACKFILES:.mlpack=.cmxs) \ + $(CMXAFILES:.cmxa=.cmxs) \ + $(if $(MLPACKFILES)$(CMXAFILES),,\ + $(MLGFILES:.mlg=.cmxs) $(MLFILES:.ml=.cmxs)) + +# files that are packed into a plugin (no extension) +PACKEDFILES = \ + $(call strip_dotslash, \ + $(foreach lib, \ + $(call strip_dotslash, \ + $(MLPACKFILES:.mlpack=_MLPACK_DEPENDENCIES)),$(call with_undef,$(lib)))) +# files that are archived into a .cma (mllib) +LIBEDFILES = \ + $(call strip_dotslash, \ + $(foreach lib, \ + $(call strip_dotslash, \ + $(MLLIBFILES:.mllib=_MLLIB_DEPENDENCIES)),$(call with_undef,$(lib)))) +CMIFILESTOINSTALL = $(filter-out $(addsuffix .cmi,$(PACKEDFILES)),$(CMIFILES)) +CMOFILESTOINSTALL = $(filter-out $(addsuffix .cmo,$(PACKEDFILES)),$(CMOFILES)) +OBJFILES = $(call vo_to_obj,$(VOFILES)) +ALLNATIVEFILES = \ + $(OBJFILES:.o=.cmi) \ + $(OBJFILES:.o=.cmx) \ + $(OBJFILES:.o=.cmxs) +# trick: wildcard filters out non-existing files, so that `install` doesn't show +# warnings and `clean` doesn't pass to rm a list of files that is too long for +# the shell. +NATIVEFILES = $(wildcard $(ALLNATIVEFILES)) +FILESTOINSTALL = \ + $(VOFILES) \ + $(VFILES) \ + $(GLOBFILES) \ + $(NATIVEFILES) \ + $(CMIFILESTOINSTALL) +BYTEFILESTOINSTALL = \ + $(CMOFILESTOINSTALL) \ + $(CMAFILES) +ifeq '$(HASNATDYNLINK)' 'true' +DO_NATDYNLINK = yes +FILESTOINSTALL += $(CMXSFILES) $(CMXAFILES) $(CMOFILESTOINSTALL:.cmo=.cmx) +else +DO_NATDYNLINK = +endif + +ALLDFILES = $(addsuffix .d,$(ALLSRCFILES)) $(VDFILE) + +# Compilation targets ######################################################### + +all: + $(HIDE)$(MAKE) --no-print-directory -f "$(SELF)" pre-all + $(HIDE)$(MAKE) --no-print-directory -f "$(SELF)" real-all + $(HIDE)$(MAKE) --no-print-directory -f "$(SELF)" post-all +.PHONY: all + +all.timing.diff: + $(HIDE)$(MAKE) --no-print-directory -f "$(SELF)" pre-all + $(HIDE)$(MAKE) --no-print-directory -f "$(SELF)" real-all.timing.diff TIME_OF_PRETTY_BUILD_EXTRA_FILES="" + $(HIDE)$(MAKE) --no-print-directory -f "$(SELF)" post-all +.PHONY: all.timing.diff + +ifeq (0,$(TIMING_REAL)) +TIMING_REAL_ARG := +TIMING_USER_ARG := --user +else +ifeq (1,$(TIMING_REAL)) +TIMING_REAL_ARG := --real +TIMING_USER_ARG := +else +TIMING_REAL_ARG := +TIMING_USER_ARG := +endif +endif + +ifeq (0,$(TIMING_INCLUDE_MEM)) +TIMING_INCLUDE_MEM_ARG := --no-include-mem +else +TIMING_INCLUDE_MEM_ARG := +endif + +ifeq (1,$(TIMING_SORT_BY_MEM)) +TIMING_SORT_BY_MEM_ARG := --sort-by-mem +else +TIMING_SORT_BY_MEM_ARG := +endif + +make-pretty-timed-before:: TIME_OF_BUILD_FILE=$(TIME_OF_BUILD_BEFORE_FILE) +make-pretty-timed-after:: TIME_OF_BUILD_FILE=$(TIME_OF_BUILD_AFTER_FILE) +make-pretty-timed make-pretty-timed-before make-pretty-timed-after:: + $(HIDE)rm -f pretty-timed-success.ok + $(HIDE)($(MAKE) --no-print-directory -f "$(PARENT)" $(TGTS) TIMED=1 2>&1 && touch pretty-timed-success.ok) | tee -a $(TIME_OF_BUILD_FILE) + $(HIDE)rm pretty-timed-success.ok # must not be -f; must fail if the touch failed +print-pretty-timed:: + $(HIDE)$(COQMAKE_ONE_TIME_FILE) $(TIMING_INCLUDE_MEM_ARG) $(TIMING_SORT_BY_MEM_ARG) $(TIMING_REAL_ARG) $(TIME_OF_BUILD_FILE) $(TIME_OF_PRETTY_BUILD_FILE) $(TIME_OF_PRETTY_BUILD_EXTRA_FILES) +print-pretty-timed-diff:: + $(HIDE)$(COQMAKE_BOTH_TIME_FILES) --sort-by=$(TIMING_SORT_BY) $(TIMING_INCLUDE_MEM_ARG) $(TIMING_SORT_BY_MEM_ARG) $(TIMING_REAL_ARG) $(TIME_OF_BUILD_AFTER_FILE) $(TIME_OF_BUILD_BEFORE_FILE) $(TIME_OF_PRETTY_BOTH_BUILD_FILE) $(TIME_OF_PRETTY_BUILD_EXTRA_FILES) +ifeq (,$(BEFORE)) +print-pretty-single-time-diff:: + @echo 'Error: Usage: $(MAKE) print-pretty-single-time-diff AFTER=path/to/file.v.after-timing BEFORE=path/to/file.v.before-timing' + $(HIDE)false +else +ifeq (,$(AFTER)) +print-pretty-single-time-diff:: + @echo 'Error: Usage: $(MAKE) print-pretty-single-time-diff AFTER=path/to/file.v.after-timing BEFORE=path/to/file.v.before-timing' + $(HIDE)false +else +print-pretty-single-time-diff:: + $(HIDE)$(COQMAKE_BOTH_SINGLE_TIMING_FILES) --fuzz=$(TIMING_FUZZ) --sort-by=$(TIMING_SORT_BY) $(TIMING_USER_ARG) $(AFTER) $(BEFORE) $(TIME_OF_PRETTY_BUILD_FILE) $(TIME_OF_PRETTY_BUILD_EXTRA_FILES) +endif +endif +pretty-timed: + $(HIDE)$(MAKE) --no-print-directory -f "$(PARENT)" make-pretty-timed + $(HIDE)$(MAKE) --no-print-directory -f "$(SELF)" print-pretty-timed +.PHONY: pretty-timed make-pretty-timed make-pretty-timed-before make-pretty-timed-after print-pretty-timed print-pretty-timed-diff print-pretty-single-time-diff + +# Extension points for actions to be performed before/after the all target +pre-all:: + @# Extension point + $(HIDE)if [ "$(COQMAKEFILE_VERSION)" != "$(COQ_VERSION)" ]; then\ + echo "W: This Makefile was generated by Coq $(COQMAKEFILE_VERSION)";\ + echo "W: while the current Coq version is $(COQ_VERSION)";\ + fi +.PHONY: pre-all + +post-all:: + @# Extension point +.PHONY: post-all + +real-all: $(VOFILES) $(if $(USEBYTE),bytefiles,optfiles) +.PHONY: real-all + +real-all.timing.diff: $(VOFILES:.vo=.v.timing.diff) +.PHONY: real-all.timing.diff + +bytefiles: $(CMOFILES) $(CMAFILES) +.PHONY: bytefiles + +optfiles: $(if $(DO_NATDYNLINK),$(CMXSFILES)) +.PHONY: optfiles + +# FIXME, see Ralf's bugreport +# quick is deprecated, now renamed vio +vio: $(VOFILES:.vo=.vio) +.PHONY: vio +quick: vio + $(warning "'make quick' is deprecated, use 'make vio' or consider using 'vos' files") +.PHONY: quick + +vio2vo: + $(TIMER) $(COQC) $(COQDEBUG) $(COQFLAGS) $(COQLIBS) \ + -schedule-vio2vo $(J) $(VOFILES:%.vo=%.vio) +.PHONY: vio2vo + +# quick2vo is undocumented +quick2vo: + $(HIDE)make -j $(J) vio + $(HIDE)VIOFILES=$$(for vofile in $(VOFILES); do \ + viofile="$$(echo "$$vofile" | sed "s/\.vo$$/.vio/")"; \ + if [ "$$vofile" -ot "$$viofile" -o ! -e "$$vofile" ]; then printf "$$viofile "; fi; \ + done); \ + echo "VIO2VO: $$VIOFILES"; \ + if [ -n "$$VIOFILES" ]; then \ + $(TIMER) $(COQC) $(COQDEBUG) $(COQFLAGS) $(COQLIBS) -schedule-vio2vo $(J) $$VIOFILES; \ + fi +.PHONY: quick2vo + +checkproofs: + $(TIMER) $(COQC) $(COQDEBUG) $(COQFLAGS) $(COQLIBS) \ + -schedule-vio-checking $(J) $(VOFILES:%.vo=%.vio) +.PHONY: checkproofs + +vos: $(VOFILES:%.vo=%.vos) +.PHONY: vos + +vok: $(VOFILES:%.vo=%.vok) +.PHONY: vok + +validate: $(VOFILES) + $(TIMER) $(COQCHK) $(COQCHKFLAGS) $(COQLIBS_NOML) $^ +.PHONY: validate + +only: $(TGTS) +.PHONY: only + +# Documentation targets ####################################################### + +html: $(GLOBFILES) $(VFILES) + $(SHOW)'COQDOC -d html $(GAL)' + $(HIDE)mkdir -p html + $(HIDE)$(COQDOC) \ + -toc $(COQDOCFLAGS) -html $(GAL) $(COQDOCLIBS) -d html $(VFILES) + +mlihtml: $(MLIFILES:.mli=.cmi) + $(SHOW)'CAMLDOC -d $@' + $(HIDE)mkdir $@ || rm -rf $@/* + $(HIDE)$(CAMLDOC) -html \ + -d $@ -m A $(CAMLDEBUG) $(CAMLDOCFLAGS) $(MLIFILES) + +all-mli.tex: $(MLIFILES:.mli=.cmi) + $(SHOW)'CAMLDOC -latex $@' + $(HIDE)$(CAMLDOC) -latex \ + -o $@ -m A $(CAMLDEBUG) $(CAMLDOCFLAGS) $(MLIFILES) + +all.ps: $(VFILES) + $(SHOW)'COQDOC -ps $(GAL)' + $(HIDE)$(COQDOC) \ + -toc $(COQDOCFLAGS) -ps $(GAL) $(COQDOCLIBS) \ + -o $@ `$(COQDEP) -sort $(VFILES)` + +all.pdf: $(VFILES) + $(SHOW)'COQDOC -pdf $(GAL)' + $(HIDE)$(COQDOC) \ + -toc $(COQDOCFLAGS) -pdf $(GAL) $(COQDOCLIBS) \ + -o $@ `$(COQDEP) -sort $(VFILES)` + +# FIXME: not quite right, since the output name is different +gallinahtml: GAL=-g +gallinahtml: html + +all-gal.ps: GAL=-g +all-gal.ps: all.ps + +all-gal.pdf: GAL=-g +all-gal.pdf: all.pdf + +# ? +beautify: $(BEAUTYFILES) + for file in $^; do mv $${file%.beautified} $${file%beautified}old && mv $${file} $${file%.beautified}; done + @echo 'Do not do "make clean" until you are sure that everything went well!' + @echo 'If there were a problem, execute "for file in $$(find . -name \*.v.old -print); do mv $${file} $${file%.old}; done" in your shell/' +.PHONY: beautify + +# Installation targets ######################################################## +# +# There rules can be extended in Makefile.local +# Extensions can't assume when they run. + +install: + $(HIDE)code=0; for f in $(FILESTOINSTALL); do\ + if ! [ -f "$$f" ]; then >&2 echo $$f does not exist; code=1; fi \ + done; exit $$code + $(HIDE)for f in $(FILESTOINSTALL); do\ + df="`$(COQMKFILE) -destination-of "$$f" $(COQLIBS)`";\ + if [ "$$?" != "0" -o -z "$$df" ]; then\ + echo SKIP "$$f" since it has no logical path;\ + else\ + install -d "$(COQLIBINSTALL)/$$df" &&\ + install -m 0644 "$$f" "$(COQLIBINSTALL)/$$df" &&\ + echo INSTALL "$$f" "$(COQLIBINSTALL)/$$df";\ + fi;\ + done + $(HIDE)$(MAKE) install-extra -f "$(SELF)" +install-extra:: + @# Extension point +.PHONY: install install-extra + +install-byte: + $(HIDE)for f in $(BYTEFILESTOINSTALL); do\ + df="`$(COQMKFILE) -destination-of "$$f" $(COQLIBS)`";\ + if [ "$$?" != "0" -o -z "$$df" ]; then\ + echo SKIP "$$f" since it has no logical path;\ + else\ + install -d "$(COQLIBINSTALL)/$$df" &&\ + install -m 0644 "$$f" "$(COQLIBINSTALL)/$$df" &&\ + echo INSTALL "$$f" "$(COQLIBINSTALL)/$$df";\ + fi;\ + done + +install-doc:: html mlihtml + @# Extension point + $(HIDE)install -d "$(COQDOCINSTALL)/$(INSTALLCOQDOCROOT)/html" + $(HIDE)for i in html/*; do \ + dest="$(COQDOCINSTALL)/$(INSTALLCOQDOCROOT)/$$i";\ + install -m 0644 "$$i" "$$dest";\ + echo INSTALL "$$i" "$$dest";\ + done + $(HIDE)install -d \ + "$(COQDOCINSTALL)/$(INSTALLCOQDOCROOT)/mlihtml" + $(HIDE)for i in mlihtml/*; do \ + dest="$(COQDOCINSTALL)/$(INSTALLCOQDOCROOT)/$$i";\ + install -m 0644 "$$i" "$$dest";\ + echo INSTALL "$$i" "$$dest";\ + done +.PHONY: install-doc + +uninstall:: + @# Extension point + $(HIDE)for f in $(FILESTOINSTALL); do \ + df="`$(COQMKFILE) -destination-of "$$f" $(COQLIBS)`" &&\ + instf="$(COQLIBINSTALL)/$$df/`basename $$f`" &&\ + rm -f "$$instf" &&\ + echo RM "$$instf" &&\ + (rmdir "$(COQLIBINSTALL)/$$df/" 2>/dev/null || true); \ + done +.PHONY: uninstall + +uninstall-doc:: + @# Extension point + $(SHOW)'RM $(COQDOCINSTALL)/$(INSTALLCOQDOCROOT)/html' + $(HIDE)rm -rf "$(COQDOCINSTALL)/$(INSTALLCOQDOCROOT)/html" + $(SHOW)'RM $(COQDOCINSTALL)/$(INSTALLCOQDOCROOT)/mlihtml' + $(HIDE)rm -rf "$(COQDOCINSTALL)/$(INSTALLCOQDOCROOT)/mlihtml" + $(HIDE) rmdir "$(COQDOCINSTALL)/$(INSTALLCOQDOCROOT)/" || true +.PHONY: uninstall-doc + +# Cleaning #################################################################### +# +# There rules can be extended in Makefile.local +# Extensions can't assume when they run. + +clean:: + @# Extension point + $(SHOW)'CLEAN' + $(HIDE)rm -f $(CMOFILES) + $(HIDE)rm -f $(CMIFILES) + $(HIDE)rm -f $(CMAFILES) + $(HIDE)rm -f $(CMOFILES:.cmo=.cmx) + $(HIDE)rm -f $(CMXAFILES) + $(HIDE)rm -f $(CMXSFILES) + $(HIDE)rm -f $(CMOFILES:.cmo=.o) + $(HIDE)rm -f $(CMXAFILES:.cmxa=.a) + $(HIDE)rm -f $(MLGFILES:.mlg=.ml) + $(HIDE)rm -f $(ALLDFILES) + $(HIDE)rm -f $(NATIVEFILES) + $(HIDE)find . -name .coq-native -type d -empty -delete + $(HIDE)rm -f $(VOFILES) + $(HIDE)rm -f $(VOFILES:.vo=.vio) + $(HIDE)rm -f $(VOFILES:.vo=.vos) + $(HIDE)rm -f $(VOFILES:.vo=.vok) + $(HIDE)rm -f $(BEAUTYFILES) $(VFILES:=.old) + $(HIDE)rm -f all.ps all-gal.ps all.pdf all-gal.pdf all.glob all-mli.tex + $(HIDE)rm -f $(VFILES:.v=.glob) + $(HIDE)rm -f $(VFILES:.v=.tex) + $(HIDE)rm -f $(VFILES:.v=.g.tex) + $(HIDE)rm -f pretty-timed-success.ok + $(HIDE)rm -rf html mlihtml +.PHONY: clean + +cleanall:: clean + @# Extension point + $(SHOW)'CLEAN *.aux *.timing' + $(HIDE)rm -f $(foreach f,$(VFILES:.v=),$(dir $(f)).$(notdir $(f)).aux) + $(HIDE)rm -f $(TIME_OF_BUILD_FILE) $(TIME_OF_BUILD_BEFORE_FILE) $(TIME_OF_BUILD_AFTER_FILE) $(TIME_OF_PRETTY_BUILD_FILE) $(TIME_OF_PRETTY_BOTH_BUILD_FILE) + $(HIDE)rm -f $(VOFILES:.vo=.v.timing) + $(HIDE)rm -f $(VOFILES:.vo=.v.before-timing) + $(HIDE)rm -f $(VOFILES:.vo=.v.after-timing) + $(HIDE)rm -f $(VOFILES:.vo=.v.timing.diff) + $(HIDE)rm -f .lia.cache .nia.cache +.PHONY: cleanall + +archclean:: + @# Extension point + $(SHOW)'CLEAN *.cmx *.o' + $(HIDE)rm -f $(NATIVEFILES) + $(HIDE)rm -f $(CMOFILES:%.cmo=%.cmx) +.PHONY: archclean + + +# Compilation rules ########################################################### + +$(MLIFILES:.mli=.cmi): %.cmi: %.mli + $(SHOW)'CAMLC -c $<' + $(HIDE)$(TIMER) $(CAMLC) $(CAMLDEBUG) $(CAMLFLAGS) $(CAMLPKGS) $< + +$(MLGFILES:.mlg=.ml): %.ml: %.mlg + $(SHOW)'COQPP $<' + $(HIDE)$(COQPP) $< + +# Stupid hack around a deficient syntax: we cannot concatenate two expansions +$(filter %.cmo, $(MLFILES:.ml=.cmo) $(MLGFILES:.mlg=.cmo)): %.cmo: %.ml + $(SHOW)'CAMLC -c $<' + $(HIDE)$(TIMER) $(CAMLC) $(CAMLDEBUG) $(CAMLFLAGS) $(CAMLPKGS) $< + +# Same hack +$(filter %.cmx, $(MLFILES:.ml=.cmx) $(MLGFILES:.mlg=.cmx)): %.cmx: %.ml + $(SHOW)'CAMLOPT -c $(FOR_PACK) $<' + $(HIDE)$(TIMER) $(CAMLOPTC) $(CAMLDEBUG) $(CAMLFLAGS) $(CAMLPKGS) $(FOR_PACK) $< + + +$(MLLIBFILES:.mllib=.cmxs): %.cmxs: %.cmxa + $(SHOW)'CAMLOPT -shared -o $@' + $(HIDE)$(TIMER) $(CAMLOPTLINK) $(CAMLDEBUG) $(CAMLFLAGS) $(CAMLPKGS) \ + -linkall -shared -o $@ $< + +$(MLLIBFILES:.mllib=.cma): %.cma: | %.mllib + $(SHOW)'CAMLC -a -o $@' + $(HIDE)$(TIMER) $(CAMLLINK) $(CAMLDEBUG) $(CAMLFLAGS) $(CAMLPKGS) -a -o $@ $^ + +$(MLLIBFILES:.mllib=.cmxa): %.cmxa: | %.mllib + $(SHOW)'CAMLOPT -a -o $@' + $(HIDE)$(TIMER) $(CAMLOPTLINK) $(CAMLDEBUG) $(CAMLFLAGS) -a -o $@ $^ + + +$(MLPACKFILES:.mlpack=.cmxs): %.cmxs: %.cmxa + $(SHOW)'CAMLOPT -shared -o $@' + $(HIDE)$(TIMER) $(CAMLOPTLINK) $(CAMLDEBUG) $(CAMLFLAGS) $(CAMLPKGS) \ + -shared -linkall -o $@ $< + +$(MLPACKFILES:.mlpack=.cmxa): %.cmxa: %.cmx + $(SHOW)'CAMLOPT -a -o $@' + $(HIDE)$(TIMER) $(CAMLOPTLINK) $(CAMLDEBUG) $(CAMLFLAGS) -a -o $@ $< + +$(MLPACKFILES:.mlpack=.cma): %.cma: %.cmo | %.mlpack + $(SHOW)'CAMLC -a -o $@' + $(HIDE)$(TIMER) $(CAMLLINK) $(CAMLDEBUG) $(CAMLFLAGS) $(CAMLPKGS) -a -o $@ $^ + +$(MLPACKFILES:.mlpack=.cmo): %.cmo: | %.mlpack + $(SHOW)'CAMLC -pack -o $@' + $(HIDE)$(TIMER) $(CAMLLINK) $(CAMLDEBUG) $(CAMLFLAGS) -pack -o $@ $^ + +$(MLPACKFILES:.mlpack=.cmx): %.cmx: | %.mlpack + $(SHOW)'CAMLOPT -pack -o $@' + $(HIDE)$(TIMER) $(CAMLOPTLINK) $(CAMLDEBUG) $(CAMLFLAGS) -pack -o $@ $^ + +# This rule is for _CoqProject with no .mllib nor .mlpack +$(filter-out $(MLLIBFILES:.mllib=.cmxs) $(MLPACKFILES:.mlpack=.cmxs) $(addsuffix .cmxs,$(PACKEDFILES)) $(addsuffix .cmxs,$(LIBEDFILES)),$(MLFILES:.ml=.cmxs) $(MLGFILES:.mlg=.cmxs)): %.cmxs: %.cmx + $(SHOW)'[deprecated,use-mllib-or-mlpack] CAMLOPT -shared -o $@' + $(HIDE)$(TIMER) $(CAMLOPTLINK) $(CAMLDEBUG) $(CAMLFLAGS) $(CAMLPKGS) \ + -shared -o $@ $< + +ifneq (,$(TIMING)) +TIMING_EXTRA = > $<.$(TIMING_EXT) +else +TIMING_EXTRA = +endif + +$(VOFILES): %.vo: %.v + $(SHOW)COQC $< + $(HIDE)$(TIMER) $(COQC) $(COQDEBUG) $(TIMING_ARG) $(COQFLAGS) $(COQLIBS) $< $(TIMING_EXTRA) + +# FIXME ?merge with .vo / .vio ? +$(GLOBFILES): %.glob: %.v + $(TIMER) $(COQC) $(COQDEBUG) $(COQFLAGS) $(COQLIBS) $< + +$(VFILES:.v=.vio): %.vio: %.v + $(SHOW)COQC -vio $< + $(HIDE)$(TIMER) $(COQC) -vio $(COQDEBUG) $(COQFLAGS) $(COQLIBS) $< + +$(VFILES:.v=.vos): %.vos: %.v + $(SHOW)COQC -vos $< + $(HIDE)$(TIMER) $(COQC) -vos $(COQDEBUG) $(COQFLAGS) $(COQLIBS) $< + +$(VFILES:.v=.vok): %.vok: %.v + $(SHOW)COQC -vok $< + $(HIDE)$(TIMER) $(COQC) -vok $(COQDEBUG) $(COQFLAGS) $(COQLIBS) $< + +$(addsuffix .timing.diff,$(VFILES)): %.timing.diff : %.before-timing %.after-timing + $(SHOW)PYTHON TIMING-DIFF $*.{before,after}-timing + $(HIDE)$(MAKE) --no-print-directory -f "$(SELF)" print-pretty-single-time-diff BEFORE=$*.before-timing AFTER=$*.after-timing TIME_OF_PRETTY_BUILD_FILE="$@" + +$(BEAUTYFILES): %.v.beautified: %.v + $(SHOW)'BEAUTIFY $<' + $(HIDE)$(TIMER) $(COQC) $(COQDEBUG) $(COQFLAGS) $(COQLIBS) -beautify $< + +$(TEXFILES): %.tex: %.v + $(SHOW)'COQDOC -latex $<' + $(HIDE)$(COQDOC) $(COQDOCFLAGS) -latex $< -o $@ + +$(GTEXFILES): %.g.tex: %.v + $(SHOW)'COQDOC -latex -g $<' + $(HIDE)$(COQDOC) $(COQDOCFLAGS) -latex -g $< -o $@ + +$(HTMLFILES): %.html: %.v %.glob + $(SHOW)'COQDOC -html $<' + $(HIDE)$(COQDOC) $(COQDOCFLAGS) -html $< -o $@ + +$(GHTMLFILES): %.g.html: %.v %.glob + $(SHOW)'COQDOC -html -g $<' + $(HIDE)$(COQDOC) $(COQDOCFLAGS) -html -g $< -o $@ + +# Dependency files ############################################################ + +ifndef MAKECMDGOALS + -include $(ALLDFILES) +else + ifneq ($(filter-out archclean clean cleanall printenv make-pretty-timed make-pretty-timed-before make-pretty-timed-after print-pretty-timed print-pretty-timed-diff print-pretty-single-time-diff,$(MAKECMDGOALS)),) + -include $(ALLDFILES) + endif +endif + +.SECONDARY: $(ALLDFILES) + +redir_if_ok = > "$@" || ( RV=$$?; rm -f "$@"; exit $$RV ) + +GENMLFILES:=$(MLGFILES:.mlg=.ml) +$(addsuffix .d,$(ALLSRCFILES)): $(GENMLFILES) + +$(addsuffix .d,$(MLIFILES)): %.mli.d: %.mli + $(SHOW)'CAMLDEP $<' + $(HIDE)$(CAMLDEP) $(OCAMLLIBS) "$<" $(redir_if_ok) + +$(addsuffix .d,$(MLGFILES)): %.mlg.d: %.ml + $(SHOW)'CAMLDEP $<' + $(HIDE)$(CAMLDEP) $(OCAMLLIBS) "$<" $(redir_if_ok) + +$(addsuffix .d,$(MLFILES)): %.ml.d: %.ml + $(SHOW)'CAMLDEP $<' + $(HIDE)$(CAMLDEP) $(OCAMLLIBS) "$<" $(redir_if_ok) + +$(addsuffix .d,$(MLLIBFILES)): %.mllib.d: %.mllib + $(SHOW)'OCAMLLIBDEP $<' + $(HIDE)$(OCAMLLIBDEP) -c $(OCAMLLIBS) "$<" $(redir_if_ok) + +$(addsuffix .d,$(MLPACKFILES)): %.mlpack.d: %.mlpack + $(SHOW)'OCAMLLIBDEP $<' + $(HIDE)$(OCAMLLIBDEP) -c $(OCAMLLIBS) "$<" $(redir_if_ok) + +# If this makefile is created using a _CoqProject we have coqdep get +# options from it. This avoids argument length limits for pathological +# projects. Note that extra options might be on the command line. +VDFILE_FLAGS:=$(if _CoqProject,-f _CoqProject,) $(CMDLINE_COQLIBS) $(CMDLINE_VFILES) + +$(VDFILE): _CoqProject $(VFILES) + $(SHOW)'COQDEP VFILES' + $(HIDE)$(COQDEP) -vos -dyndep var $(VDFILE_FLAGS) $(redir_if_ok) + +# Misc ######################################################################## + +byte: + $(HIDE)$(MAKE) all "OPT:=-byte" -f "$(SELF)" +.PHONY: byte + +opt: + $(HIDE)$(MAKE) all "OPT:=-opt" -f "$(SELF)" +.PHONY: opt + +# This is deprecated. To extend this makefile use +# extension points and Makefile.local +printenv:: + $(warning printenv is deprecated) + $(warning write extensions in Makefile.local or include Makefile.conf) + @echo 'LOCAL = $(LOCAL)' + @echo 'COQLIB = $(COQLIB)' + @echo 'DOCDIR = $(DOCDIR)' + @echo 'OCAMLFIND = $(OCAMLFIND)' + @echo 'HASNATDYNLINK = $(HASNATDYNLINK)' + @echo 'SRC_SUBDIRS = $(SRC_SUBDIRS)' + @echo 'COQ_SRC_SUBDIRS = $(COQ_SRC_SUBDIRS)' + @echo 'OCAMLFIND = $(OCAMLFIND)' + @echo 'PP = $(PP)' + @echo 'COQFLAGS = $(COQFLAGS)' + @echo 'COQLIB = $(COQLIBS)' + @echo 'COQLIBINSTALL = $(COQLIBINSTALL)' + @echo 'COQDOCINSTALL = $(COQDOCINSTALL)' +.PHONY: printenv + +# Generate a .merlin file. If you need to append directives to this +# file you can extend the merlin-hook target in Makefile.local +.merlin: + $(SHOW)'FILL .merlin' + $(HIDE)echo 'FLG $(COQMF_CAMLFLAGS)' > .merlin + $(HIDE)echo 'B $(COQLIB)' >> .merlin + $(HIDE)echo 'S $(COQLIB)' >> .merlin + $(HIDE)$(foreach d,$(COQ_SRC_SUBDIRS), \ + echo 'B $(COQLIB)$(d)' >> .merlin;) + $(HIDE)$(foreach d,$(COQ_SRC_SUBDIRS), \ + echo 'S $(COQLIB)$(d)' >> .merlin;) + $(HIDE)$(foreach d,$(SRC_SUBDIRS), echo 'B $(d)' >> .merlin;) + $(HIDE)$(foreach d,$(SRC_SUBDIRS), echo 'S $(d)' >> .merlin;) + $(HIDE)$(MAKE) merlin-hook -f "$(SELF)" +.PHONY: merlin + +merlin-hook:: + @# Extension point +.PHONY: merlin-hook + +# prints all variables +debug: + $(foreach v,\ + $(sort $(filter-out $(INITIAL_VARS) INITIAL_VARS,\ + $(.VARIABLES))),\ + $(info $(v) = $($(v)))) +.PHONY: debug + +.DEFAULT_GOAL := all + +# Local Variables: +# mode: makefile-gmake +# End: diff --git a/snapshot/Makefile.conf b/snapshot/Makefile.conf new file mode 100644 index 0000000..db8f321 --- /dev/null +++ b/snapshot/Makefile.conf @@ -0,0 +1,55 @@ +# This configuration file was generated by running: +# coq_makefile -f _CoqProject riscv_types.v riscv.v -o Makefile + + +############################################################################### +# # +# Project files. # +# # +############################################################################### + +COQMF_VFILES = riscv_types.v riscv.v +COQMF_MLIFILES = +COQMF_MLFILES = +COQMF_MLGFILES = +COQMF_MLPACKFILES = +COQMF_MLLIBFILES = +COQMF_CMDLINE_VFILES = riscv_types.v riscv.v + +############################################################################### +# # +# Path directives (-I, -R, -Q). # +# # +############################################################################### + +COQMF_OCAMLLIBS = +COQMF_SRC_SUBDIRS = +COQMF_COQLIBS = -R /home/aditya/.opam/default/share/sail/lib/coq/ Sail -R . '' -R ../handwritten_support '' +COQMF_COQLIBS_NOML = -R /home/aditya/.opam/default/share/sail/lib/coq/ Sail -R . '' -R ../handwritten_support '' +COQMF_CMDLINE_COQLIBS = + +############################################################################### +# # +# Coq configuration. # +# # +############################################################################### + +COQMF_LOCAL=0 +COQMF_COQLIB=/home/aditya/.opam/default/lib/coq/ +COQMF_DOCDIR=/home/aditya/.opam/default/doc/ +COQMF_OCAMLFIND=/home/aditya/.opam/default/bin/ocamlfind +COQMF_CAMLFLAGS=-thread -rectypes -w +a-4-9-27-41-42-44-45-48-58-67 -safe-string -strict-sequence +COQMF_WARN=-warn-error +a-3 +COQMF_HASNATDYNLINK=true +COQMF_COQ_SRC_SUBDIRS=config lib clib kernel library engine pretyping interp gramlib gramlib/.pack parsing proofs tactics toplevel printing ide stm vernac plugins/btauto plugins/cc plugins/derive plugins/extraction plugins/firstorder plugins/funind plugins/ltac plugins/micromega plugins/nsatz plugins/omega plugins/ring plugins/rtauto plugins/ssr plugins/ssrmatching plugins/ssrsearch plugins/syntax +COQMF_COQ_NATIVE_COMPILER_DEFAULT=no +COQMF_WINDRIVE= + +############################################################################### +# # +# Extra variables. # +# # +############################################################################### + +COQMF_OTHERFLAGS = +COQMF_INSTALLCOQDOCROOT = orphan_Sail__ diff --git a/snapshot/_CoqProject b/snapshot/_CoqProject new file mode 100644 index 0000000..b4438de --- /dev/null +++ b/snapshot/_CoqProject @@ -0,0 +1,3 @@ +-R /home/aditya/.opam/default/share/sail/lib/coq/ Sail +-R . "" +-R ../handwritten_support ""
\ No newline at end of file diff --git a/snapshot/riscv.glob b/snapshot/riscv.glob new file mode 100644 index 0000000..8973bf8 --- /dev/null +++ b/snapshot/riscv.glob @@ -0,0 +1,4823 @@ +DIGEST af24f8900dd91d4e01637aa3bcfca626 +Friscv +R49:57 Sail.Base <> <> lib +R75:83 Sail.Real <> <> lib +R101:111 riscv_types <> <> lib +def 199:205 <> is_none +binder 208:208 <> a:1 +R225:230 Coq.Init.Datatypes <> option ind +R232:232 riscv <> a:1 var +binder 219:221 <> opt:2 +R237:240 Coq.Init.Datatypes <> bool ind +R253:255 riscv <> opt:2 var +R264:267 Coq.Init.Datatypes <> Some constr +R274:278 Coq.Init.Datatypes <> false constr +R282:285 Coq.Init.Datatypes <> None constr +R290:293 Coq.Init.Datatypes <> true constr +def 312:318 <> is_some +binder 321:321 <> a:4 +R338:343 Coq.Init.Datatypes <> option ind +R345:345 riscv <> a:4 var +binder 332:334 <> opt:5 +R350:353 Coq.Init.Datatypes <> bool ind +R366:368 riscv <> opt:5 var +R377:380 Coq.Init.Datatypes <> Some constr +R387:390 Coq.Init.Datatypes <> true constr +R394:397 Coq.Init.Datatypes <> None constr +R402:406 Coq.Init.Datatypes <> false constr +def 425:431 <> eq_unit +R438:441 Coq.Init.Datatypes <> unit ind +R449:452 Coq.Init.Datatypes <> unit ind +R457:457 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R463:465 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R470:472 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R490:490 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R466:469 Coq.Init.Datatypes <> bool ind +binder 458:462 <> _bool:7 +R473:481 Sail.Values <> ArithFact class +R484:488 riscv <> _bool:7 var +R495:502 Sail.Values <> build_ex def +R505:508 Coq.Init.Datatypes <> true constr +def 524:530 <> neq_int +R537:537 Coq.Numbers.BinNums <> Z ind +binder 533:533 <> x:8 +R545:545 Coq.Numbers.BinNums <> Z ind +binder 541:541 <> y:9 +R550:550 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R556:558 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R563:565 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R608:608 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R559:562 Coq.Init.Datatypes <> bool ind +binder 551:555 <> _bool:10 +R566:574 Sail.Values <> ArithFact class +R577:584 Coq.Bool.Bool <> eqb def +R587:590 Coq.Init.Datatypes <> negb def +R594:597 Coq.ZArith.BinInt <> ::Z_scope:x_'=?'_x not +R593:593 riscv <> x:8 var +R598:598 riscv <> y:9 var +R602:606 riscv <> _bool:10 var +R615:622 Sail.Values <> build_ex def +R625:628 Coq.Init.Datatypes <> negb def +R631:635 Coq.ZArith.BinInt Z eqb def +R637:637 riscv <> x:8 var +R639:639 riscv <> y:9 var +def 656:663 <> neq_bool +R670:673 Coq.Init.Datatypes <> bool ind +binder 666:666 <> x:11 +R681:684 Coq.Init.Datatypes <> bool ind +binder 677:677 <> y:12 +R689:692 Coq.Init.Datatypes <> bool ind +R697:700 Coq.Init.Datatypes <> negb def +R703:710 Coq.Bool.Bool <> eqb def +R712:712 riscv <> x:11 var +R714:714 riscv <> y:12 var +def 730:733 <> __id +R740:740 Coq.Numbers.BinNums <> Z ind +binder 736:736 <> x:13 +R745:745 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R753:755 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R757:759 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R784:784 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R756:756 Coq.Numbers.BinNums <> Z ind +binder 746:752 <> _retval:14 +R760:768 Sail.Values <> ArithFact class +R778:781 Coq.ZArith.BinInt <> ::Z_scope:x_'=?'_x not +R771:777 riscv <> _retval:14 var +R782:782 riscv <> x:13 var +R789:796 Sail.Values <> build_ex def +R799:799 riscv <> x:13 var +def 815:822 <> fdiv_int +R829:829 Coq.Numbers.BinNums <> Z ind +binder 825:825 <> n:15 +R837:837 Coq.Numbers.BinNums <> Z ind +binder 833:833 <> m:16 +R842:842 Coq.Numbers.BinNums <> Z ind +R852:866 Coq.Bool.Sumbool <> sumbool_of_bool def +R869:872 Coq.Init.Datatypes <> andb def +R887:891 Coq.ZArith.BinInt Z gtb def +R893:893 riscv <> m:16 var +R875:879 Coq.ZArith.BinInt Z ltb def +R881:881 riscv <> n:15 var +R945:959 Coq.Bool.Sumbool <> sumbool_of_bool def +R962:965 Coq.Init.Datatypes <> andb def +R980:984 Coq.ZArith.BinInt Z ltb def +R986:986 riscv <> m:16 var +R968:972 Coq.ZArith.BinInt Z gtb def +R974:974 riscv <> n:15 var +R1040:1045 Coq.ZArith.BinInt Z quot def +R1047:1047 riscv <> n:15 var +R1049:1049 riscv <> m:16 var +R997:1001 Coq.ZArith.BinInt Z sub def +R1004:1009 Coq.ZArith.BinInt Z quot def +R1012:1016 Coq.ZArith.BinInt Z sub def +R1018:1018 riscv <> n:15 var +R1023:1023 riscv <> m:16 var +R904:908 Coq.ZArith.BinInt Z sub def +R911:916 Coq.ZArith.BinInt Z quot def +R919:923 Coq.ZArith.BinInt Z add def +R925:925 riscv <> n:15 var +R930:930 riscv <> m:16 var +def 1064:1071 <> fmod_int +R1078:1078 Coq.Numbers.BinNums <> Z ind +binder 1074:1074 <> n:17 +R1086:1086 Coq.Numbers.BinNums <> Z ind +binder 1082:1082 <> m:18 +R1091:1091 Coq.Numbers.BinNums <> Z ind +R1096:1100 Coq.ZArith.BinInt Z sub def +R1102:1102 riscv <> n:17 var +R1105:1109 Coq.ZArith.BinInt Z mul def +R1111:1111 riscv <> m:18 var +R1114:1121 riscv <> fdiv_int def +R1123:1123 riscv <> n:17 var +R1125:1125 riscv <> m:18 var +def 1142:1156 <> concat_str_bits +R1163:1163 Coq.Numbers.BinNums <> Z ind +binder 1159:1159 <> n:19 +R1173:1178 Coq.Strings.String <> string ind +binder 1167:1169 <> str:20 +R1186:1190 Sail.Values <> mword def +R1192:1192 riscv <> n:19 var +binder 1182:1182 <> x:21 +R1197:1202 Coq.Strings.String <> string ind +R1209:1221 Coq.Strings.String <> append def +R1223:1225 riscv <> str:20 var +R1228:1241 Sail.Operators_mwords <> string_of_bits def +R1243:1243 riscv <> x:21 var +def 1259:1272 <> concat_str_dec +R1281:1286 Coq.Strings.String <> string ind +binder 1275:1277 <> str:22 +R1294:1294 Coq.Numbers.BinNums <> Z ind +binder 1290:1290 <> x:23 +R1299:1304 Coq.Strings.String <> string ind +R1309:1321 Coq.Strings.String <> append def +R1323:1325 riscv <> str:22 var +R1328:1334 Sail.String <> dec_str def +R1336:1336 riscv <> x:23 var +def 1354:1362 <> sail_mask +R1370:1370 Coq.Numbers.BinNums <> Z ind +binder 1365:1366 <> v0:24 +R1380:1380 Coq.Numbers.BinNums <> Z ind +binder 1374:1376 <> len:25 +R1388:1392 Sail.Values <> mword def +R1394:1395 riscv <> v0:24 var +binder 1384:1384 <> v:26 +R1400:1408 Sail.Values <> ArithFact class +R1411:1411 Coq.Init.Datatypes <> ::bool_scope:x_'&&'_x not +R1421:1426 Coq.Init.Datatypes <> ::bool_scope:x_'&&'_x not +R1435:1435 Coq.Init.Datatypes <> ::bool_scope:x_'&&'_x not +R1415:1419 Coq.ZArith.BinInt <> ::Z_scope:x_'>=?'_x not +R1412:1414 riscv <> len:25 var +R1429:1433 Coq.ZArith.BinInt <> ::Z_scope:x_'>=?'_x not +R1427:1428 riscv <> v0:24 var +binder 1400:1436 <> H:27 +R1443:1447 Sail.Values <> mword def +R1449:1451 riscv <> len:25 var +R1461:1475 Coq.Bool.Sumbool <> sumbool_of_bool def +R1478:1482 Coq.ZArith.BinInt Z leb def +R1484:1486 riscv <> len:25 var +R1489:1500 Sail.Values <> length_mword def +R1502:1502 riscv <> v:26 var +R1538:1548 Sail.Operators_mwords <> zero_extend def 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1691:1709 <> H:33 +R1714:1718 Sail.Values <> mword def +R1720:1720 riscv <> n:30 var +R1730:1744 Coq.Bool.Sumbool <> sumbool_of_bool def +R1747:1751 Coq.ZArith.BinInt Z geb def +R1753:1753 riscv <> l:32 var +R1755:1755 riscv <> n:30 var +R1817:1825 riscv <> sail_mask def +R1839:1842 riscv_types <> bits def +R1830:1831 bbv.HexNotationWord <> :::'''b'_x not +R1827:1827 riscv <> n:30 var +R1807:1810 riscv_types <> bits def +R1812:1812 riscv <> n:30 var +binder 1801:1803 <> one:34 +R1854:1859 Sail.Operators_mwords <> shiftl def +R1890:1890 riscv <> i:31 var +R1862:1868 Sail.Operators_mwords <> sub_vec def +R1885:1887 riscv <> one:34 var +R1871:1876 Sail.Operators_mwords <> shiftl def +R1882:1882 riscv <> l:32 var +R1878:1880 riscv <> one:34 var +R1763:1768 Sail.Operators_mwords <> shiftl def +R1784:1784 riscv <> i:31 var +R1771:1779 riscv <> sail_ones def +R1781:1781 riscv <> n:30 var +def 1905:1908 <> EXTS +R1915:1915 Coq.Numbers.BinNums <> Z ind +binder 1911:1911 <> n:35 +R1923:1923 Coq.Numbers.BinNums <> Z ind +binder 1919:1919 <> m:36 +R1931:1935 Sail.Values <> mword def +R1937:1937 riscv <> n:35 var +binder 1927:1927 <> v:37 +R1942:1950 Sail.Values <> ArithFact class +R1954:1958 Coq.ZArith.BinInt <> ::Z_scope:x_'>=?'_x not +R1953:1953 riscv <> m:36 var +R1959:1959 riscv <> n:35 var +binder 1942:1960 <> H:38 +R1965:1969 Sail.Values <> mword def +R1971:1971 riscv <> m:36 var +R1976:1986 Sail.Operators_mwords <> sign_extend def +R1990:1990 riscv <> m:36 var +R1988:1988 riscv <> v:37 var +def 2005:2008 <> EXTZ +R2015:2015 Coq.Numbers.BinNums <> Z ind +binder 2011:2011 <> n:39 +R2023:2023 Coq.Numbers.BinNums <> Z ind +binder 2019:2019 <> m:40 +R2031:2035 Sail.Values <> mword def +R2037:2037 riscv <> n:39 var +binder 2027:2027 <> v:41 +R2042:2050 Sail.Values <> ArithFact class +R2054:2058 Coq.ZArith.BinInt <> ::Z_scope:x_'>=?'_x not +R2053:2053 riscv <> m:40 var +R2059:2059 riscv <> n:39 var +binder 2042:2060 <> H:42 +R2065:2069 Sail.Values <> mword def +R2071:2071 riscv <> m:40 var +R2076:2086 Sail.Operators_mwords <> zero_extend def +R2090:2090 riscv <> m:40 var +R2088:2088 riscv <> v:41 var +def 2105:2112 <> zero_reg +R2116:2122 riscv_types <> regtype def +R2127:2130 riscv <> EXTZ def +R2145:2149 Sail.Values <> mword def +R2136:2137 bbv.HexNotationWord <> :::'Ox'_x not +R2167:2174 riscv <> zero_reg def +def 2195:2209 <> regval_from_reg +R2216:2220 Sail.Values <> mword def +binder 2212:2212 <> r:43 +R2228:2232 Sail.Values <> mword def +R2240:2240 riscv <> r:43 var +def 2255:2269 <> regval_into_reg +R2276:2280 Sail.Values <> mword def +binder 2272:2272 <> v:44 +R2288:2292 Sail.Values <> mword def +R2300:2300 riscv <> v:44 var +def 2315:2316 <> rX +R2323:2323 Coq.Numbers.BinNums <> Z ind +binder 2319:2319 <> r:45 +R2328:2336 Sail.Values <> ArithFact class +R2339:2339 Coq.Init.Datatypes <> ::bool_scope:x_'&&'_x not +R2347:2352 Coq.Init.Datatypes <> ::bool_scope:x_'&&'_x not +R2360:2360 Coq.Init.Datatypes <> ::bool_scope:x_'&&'_x not +R2341:2345 Coq.ZArith.BinInt <> ::Z_scope:x_'<=?'_x not +R2346:2346 riscv <> r:45 var +R2354:2357 Coq.ZArith.BinInt <> ::Z_scope:x_'<?'_x not +R2353:2353 riscv <> r:45 var +binder 2328:2361 <> H:46 +R2366:2366 riscv_types <> M def +R2369:2373 Sail.Values <> mword def +R2397:2397 riscv <> r:45 var +binder 2388:2392 <> l__32:47 +R2404:2404 Sail.Prompt_monad <> :::x_'>>='_x not +R5832:5837 Sail.Prompt_monad <> :::x_'>>='_x not +R2408:2422 Coq.Bool.Sumbool <> sumbool_of_bool def +R2425:2429 Coq.ZArith.BinInt Z eqb def +R2431:2435 riscv <> l__32:47 var +R2473:2487 Coq.Bool.Sumbool <> sumbool_of_bool def +R2490:2494 Coq.ZArith.BinInt Z eqb def +R2496:2500 riscv <> l__32:47 var +R2573:2587 Coq.Bool.Sumbool <> sumbool_of_bool def +R2590:2594 Coq.ZArith.BinInt Z eqb def +R2596:2600 riscv <> l__32:47 var +R2673:2687 Coq.Bool.Sumbool <> sumbool_of_bool def +R2690:2694 Coq.ZArith.BinInt Z eqb def +R2696:2700 riscv <> l__32:47 var +R2773:2787 Coq.Bool.Sumbool <> sumbool_of_bool def +R2790:2794 Coq.ZArith.BinInt Z eqb def +R2796:2800 riscv <> l__32:47 var +R2873:2887 Coq.Bool.Sumbool <> sumbool_of_bool def +R2890:2894 Coq.ZArith.BinInt Z eqb def +R2896:2900 riscv <> l__32:47 var +R2973:2987 Coq.Bool.Sumbool <> sumbool_of_bool def +R2990:2994 Coq.ZArith.BinInt Z eqb def +R2996:3000 riscv <> l__32:47 var +R3073:3087 Coq.Bool.Sumbool <> sumbool_of_bool def +R3090:3094 Coq.ZArith.BinInt Z eqb def +R3096:3100 riscv <> l__32:47 var +R3173:3187 Coq.Bool.Sumbool <> sumbool_of_bool def +R3190:3194 Coq.ZArith.BinInt Z eqb def +R3196:3200 riscv <> l__32:47 var +R3273:3287 Coq.Bool.Sumbool <> sumbool_of_bool def +R3290:3294 Coq.ZArith.BinInt Z eqb def +R3296:3300 riscv <> l__32:47 var +R3373:3387 Coq.Bool.Sumbool <> sumbool_of_bool def +R3390:3394 Coq.ZArith.BinInt Z eqb def +R3396:3400 riscv <> l__32:47 var +R3482:3496 Coq.Bool.Sumbool <> sumbool_of_bool def +R3499:3503 Coq.ZArith.BinInt Z eqb def +R3505:3509 riscv <> l__32:47 var +R3591:3605 Coq.Bool.Sumbool <> sumbool_of_bool def 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sumbool_of_bool def +R4480:4484 Coq.ZArith.BinInt Z eqb def +R4486:4490 riscv <> l__32:47 var +R4572:4586 Coq.Bool.Sumbool <> sumbool_of_bool def +R4589:4593 Coq.ZArith.BinInt Z eqb def +R4595:4599 riscv <> l__32:47 var +R4681:4695 Coq.Bool.Sumbool <> sumbool_of_bool def +R4698:4702 Coq.ZArith.BinInt Z eqb def +R4704:4708 riscv <> l__32:47 var +R4790:4804 Coq.Bool.Sumbool <> sumbool_of_bool def +R4807:4811 Coq.ZArith.BinInt Z eqb def +R4813:4817 riscv <> l__32:47 var +R4899:4913 Coq.Bool.Sumbool <> sumbool_of_bool def +R4916:4920 Coq.ZArith.BinInt Z eqb def +R4922:4926 riscv <> l__32:47 var +R5008:5022 Coq.Bool.Sumbool <> sumbool_of_bool def +R5025:5029 Coq.ZArith.BinInt Z eqb def +R5031:5035 riscv <> l__32:47 var +R5117:5131 Coq.Bool.Sumbool <> sumbool_of_bool def +R5134:5138 Coq.ZArith.BinInt Z eqb def +R5140:5144 riscv <> l__32:47 var +R5226:5240 Coq.Bool.Sumbool <> sumbool_of_bool def +R5243:5247 Coq.ZArith.BinInt Z eqb def +R5249:5253 riscv <> l__32:47 var +R5335:5349 Coq.Bool.Sumbool <> sumbool_of_bool def +R5352:5356 Coq.ZArith.BinInt Z eqb def +R5358:5362 riscv <> l__32:47 var +R5444:5458 Coq.Bool.Sumbool <> sumbool_of_bool def +R5461:5465 Coq.ZArith.BinInt Z eqb def +R5467:5471 riscv <> l__32:47 var +R5553:5567 Coq.Bool.Sumbool <> sumbool_of_bool def +R5570:5574 Coq.ZArith.BinInt Z eqb def +R5576:5580 riscv <> l__32:47 var +R5662:5676 Coq.Bool.Sumbool <> sumbool_of_bool def +R5679:5683 Coq.ZArith.BinInt Z eqb def +R5685:5689 riscv <> l__32:47 var +R5811:5815 Sail.Prompt_monad <> :::x_'>>='_x not +R5768:5778 Sail.Prompt_monad <> assert_exp' def +R5780:5784 Coq.Init.Datatypes <> false constr +R5825:5828 Sail.Prompt_monad <> exit def +R5830:5831 Coq.Init.Datatypes <> tt constr +R5747:5747 riscv_types <> M def +R5750:5754 Sail.Values <> mword def +R5727:5727 riscv_types <> M def +R5730:5734 Sail.Values <> mword def +R5706:5713 Sail.Prompt_monad <> read_reg def +R5715:5721 riscv_types <> x31_ref def +R5638:5638 riscv_types <> M def +R5641:5645 Sail.Values <> mword def +R5618:5618 riscv_types <> M def +R5621:5625 Sail.Values <> mword def +R5597:5604 Sail.Prompt_monad <> read_reg def +R5606:5612 riscv_types <> x30_ref def +R5529:5529 riscv_types <> M def +R5532:5536 Sail.Values <> mword def +R5509:5509 riscv_types <> M def +R5512:5516 Sail.Values <> mword def +R5488:5495 Sail.Prompt_monad <> read_reg def +R5497:5503 riscv_types <> x29_ref def +R5420:5420 riscv_types <> M def +R5423:5427 Sail.Values <> mword def +R5400:5400 riscv_types <> M def +R5403:5407 Sail.Values <> mword def +R5379:5386 Sail.Prompt_monad <> read_reg def +R5388:5394 riscv_types <> x28_ref def +R5311:5311 riscv_types <> M def +R5314:5318 Sail.Values <> mword def +R5291:5291 riscv_types <> M def +R5294:5298 Sail.Values <> mword def +R5270:5277 Sail.Prompt_monad <> read_reg def +R5279:5285 riscv_types <> x27_ref def +R5202:5202 riscv_types <> M def +R5205:5209 Sail.Values <> mword def +R5182:5182 riscv_types <> M def +R5185:5189 Sail.Values <> mword def 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riscv_types <> M def +R4660:4664 Sail.Values <> mword def +R4637:4637 riscv_types <> M def +R4640:4644 Sail.Values <> mword def +R4616:4623 Sail.Prompt_monad <> read_reg def +R4625:4631 riscv_types <> x21_ref def +R4548:4548 riscv_types <> M def +R4551:4555 Sail.Values <> mword def +R4528:4528 riscv_types <> M def +R4531:4535 Sail.Values <> mword def +R4507:4514 Sail.Prompt_monad <> read_reg def +R4516:4522 riscv_types <> x20_ref def +R4439:4439 riscv_types <> M def +R4442:4446 Sail.Values <> mword def +R4419:4419 riscv_types <> M def +R4422:4426 Sail.Values <> mword def +R4398:4405 Sail.Prompt_monad <> read_reg def +R4407:4413 riscv_types <> x19_ref def +R4330:4330 riscv_types <> M def +R4333:4337 Sail.Values <> mword def +R4310:4310 riscv_types <> M def +R4313:4317 Sail.Values <> mword def +R4289:4296 Sail.Prompt_monad <> read_reg def +R4298:4304 riscv_types <> x18_ref def +R4221:4221 riscv_types <> M def +R4224:4228 Sail.Values <> mword def +R4201:4201 riscv_types <> M def +R4204:4208 Sail.Values <> mword def +R4180:4187 Sail.Prompt_monad <> read_reg def +R4189:4195 riscv_types <> x17_ref def +R4112:4112 riscv_types <> M def +R4115:4119 Sail.Values <> mword def +R4092:4092 riscv_types <> M def +R4095:4099 Sail.Values <> mword def +R4071:4078 Sail.Prompt_monad <> read_reg def +R4080:4086 riscv_types <> x16_ref def +R4003:4003 riscv_types <> M def +R4006:4010 Sail.Values <> mword def +R3983:3983 riscv_types <> M def +R3986:3990 Sail.Values <> mword def +R3962:3969 Sail.Prompt_monad <> read_reg def +R3971:3977 riscv_types <> x15_ref def +R3894:3894 riscv_types <> M def +R3897:3901 Sail.Values <> mword def +R3874:3874 riscv_types <> M def +R3877:3881 Sail.Values <> mword def +R3853:3860 Sail.Prompt_monad <> read_reg def +R3862:3868 riscv_types <> x14_ref def +R3785:3785 riscv_types <> M def +R3788:3792 Sail.Values <> mword def +R3765:3765 riscv_types <> M def +R3768:3772 Sail.Values <> mword def +R3744:3751 Sail.Prompt_monad <> read_reg def +R3753:3759 riscv_types <> x13_ref def +R3676:3676 riscv_types <> M def +R3679:3683 Sail.Values <> mword def +R3656:3656 riscv_types <> M def +R3659:3663 Sail.Values <> mword def +R3635:3642 Sail.Prompt_monad <> read_reg def +R3644:3650 riscv_types <> x12_ref def +R3567:3567 riscv_types <> M def +R3570:3574 Sail.Values <> mword def +R3547:3547 riscv_types <> M def +R3550:3554 Sail.Values <> mword def +R3526:3533 Sail.Prompt_monad <> read_reg def +R3535:3541 riscv_types <> x11_ref def +R3458:3458 riscv_types <> M def +R3461:3465 Sail.Values <> mword def +R3438:3438 riscv_types <> M def +R3441:3445 Sail.Values <> mword def +R3417:3424 Sail.Prompt_monad <> read_reg def +R3426:3432 riscv_types <> x10_ref def +R3349:3349 riscv_types <> M def +R3352:3356 Sail.Values <> mword def +R3332:3332 riscv_types <> M def +R3335:3339 Sail.Values <> mword def +R3312:3319 Sail.Prompt_monad <> read_reg def +R3321:3326 riscv_types <> x9_ref def +R3249:3249 riscv_types <> M def +R3252:3256 Sail.Values <> mword def +R3232:3232 riscv_types <> M def +R3235:3239 Sail.Values <> mword def +R3212:3219 Sail.Prompt_monad <> read_reg def +R3221:3226 riscv_types <> x8_ref def +R3149:3149 riscv_types <> M def +R3152:3156 Sail.Values <> mword def +R3132:3132 riscv_types <> M def +R3135:3139 Sail.Values <> mword def +R3112:3119 Sail.Prompt_monad <> read_reg def +R3121:3126 riscv_types <> x7_ref def +R3049:3049 riscv_types <> M def +R3052:3056 Sail.Values <> mword def +R3032:3032 riscv_types <> M def +R3035:3039 Sail.Values <> mword def +R3012:3019 Sail.Prompt_monad <> read_reg def +R3021:3026 riscv_types <> x6_ref def +R2949:2949 riscv_types <> M def +R2952:2956 Sail.Values <> mword def +R2932:2932 riscv_types <> M def +R2935:2939 Sail.Values <> mword def +R2912:2919 Sail.Prompt_monad <> read_reg def +R2921:2926 riscv_types <> x5_ref def +R2849:2849 riscv_types <> M def +R2852:2856 Sail.Values <> mword def +R2832:2832 riscv_types <> M def +R2835:2839 Sail.Values <> mword def +R2812:2819 Sail.Prompt_monad <> read_reg def +R2821:2826 riscv_types <> x4_ref def +R2749:2749 riscv_types <> M def +R2752:2756 Sail.Values <> mword def +R2732:2732 riscv_types <> M def +R2735:2739 Sail.Values <> mword def +R2712:2719 Sail.Prompt_monad <> read_reg def +R2721:2726 riscv_types <> x3_ref def +R2649:2649 riscv_types <> M def +R2652:2656 Sail.Values <> mword def +R2632:2632 riscv_types <> M def +R2635:2639 Sail.Values <> mword def +R2612:2619 Sail.Prompt_monad <> read_reg def +R2621:2626 riscv_types <> x2_ref def +R2549:2549 riscv_types <> M def +R2552:2556 Sail.Values <> mword def +R2532:2532 riscv_types <> M def +R2535:2539 Sail.Values <> mword def +R2512:2519 Sail.Prompt_monad <> read_reg def +R2521:2526 riscv_types <> x1_ref def +R2445:2451 Sail.Prompt_monad <> returnm def +R2453:2460 riscv <> zero_reg def +R5846:5852 riscv_types <> regtype def +binder 5842:5842 <> v:48 +R5861:5867 Sail.Prompt_monad <> returnm def +R5870:5884 riscv <> regval_from_reg def +R5886:5886 riscv <> v:48 var +def 5902:5903 <> wX +R5910:5910 Coq.Numbers.BinNums <> Z ind +binder 5906:5906 <> r:49 +R5921:5925 Sail.Values <> mword def +binder 5914:5917 <> in_v:50 +R5933:5941 Sail.Values <> ArithFact class +R5944:5944 Coq.Init.Datatypes <> ::bool_scope:x_'&&'_x not +R5952:5957 Coq.Init.Datatypes <> ::bool_scope:x_'&&'_x not +R5965:5965 Coq.Init.Datatypes <> ::bool_scope:x_'&&'_x not +R5946:5950 Coq.ZArith.BinInt <> ::Z_scope:x_'<=?'_x not +R5951:5951 riscv <> r:49 var +R5959:5962 Coq.ZArith.BinInt <> ::Z_scope:x_'<?'_x not +R5958:5958 riscv <> r:49 var +binder 5933:5966 <> H:51 +R5971:5971 riscv_types <> M def +R5974:5977 Coq.Init.Datatypes <> unit ind +R5994:6008 riscv <> regval_into_reg def +R6010:6013 riscv <> in_v:50 var +binder 5989:5989 <> v:52 +R6032:6032 riscv <> r:49 var +binder 6024:6027 <> l__0:53 +R8628:8628 riscv_types <> M def +R8631:8634 Coq.Init.Datatypes <> unit ind +R6043:6057 Coq.Bool.Sumbool <> sumbool_of_bool def +R6060:6064 Coq.ZArith.BinInt Z eqb def +R6066:6069 riscv <> l__0:53 var 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+R8003:8017 Coq.Bool.Sumbool <> sumbool_of_bool def +R8020:8024 Coq.ZArith.BinInt Z eqb def +R8026:8029 riscv <> l__0:53 var +R8083:8097 Coq.Bool.Sumbool <> sumbool_of_bool def +R8100:8104 Coq.ZArith.BinInt Z eqb def +R8106:8109 riscv <> l__0:53 var +R8163:8177 Coq.Bool.Sumbool <> sumbool_of_bool def +R8180:8184 Coq.ZArith.BinInt Z eqb def +R8186:8189 riscv <> l__0:53 var +R8243:8257 Coq.Bool.Sumbool <> sumbool_of_bool def +R8260:8264 Coq.ZArith.BinInt Z eqb def +R8266:8269 riscv <> l__0:53 var +R8323:8337 Coq.Bool.Sumbool <> sumbool_of_bool def +R8340:8344 Coq.ZArith.BinInt Z eqb def +R8346:8349 riscv <> l__0:53 var +R8403:8417 Coq.Bool.Sumbool <> sumbool_of_bool def +R8420:8424 Coq.ZArith.BinInt Z eqb def +R8426:8429 riscv <> l__0:53 var +R8483:8497 Coq.Bool.Sumbool <> sumbool_of_bool def +R8500:8504 Coq.ZArith.BinInt Z eqb def +R8506:8509 riscv <> l__0:53 var +R8603:8607 Sail.Prompt_monad <> :::x_'>>='_x not +R8560:8570 Sail.Prompt_monad <> assert_exp' def +R8572:8576 Coq.Init.Datatypes <> false constr +R8617:8620 Sail.Prompt_monad <> exit def +R8622:8623 Coq.Init.Datatypes <> tt constr +R8543:8543 riscv_types <> M def +R8546:8549 Coq.Init.Datatypes <> unit ind +R8520:8528 Sail.Prompt_monad <> write_reg def +R8538:8538 riscv <> v:52 var +R8530:8536 riscv_types <> x31_ref def +R8463:8463 riscv_types <> M def +R8466:8469 Coq.Init.Datatypes <> unit ind +R8440:8448 Sail.Prompt_monad <> write_reg def +R8458:8458 riscv <> v:52 var +R8450:8456 riscv_types <> x30_ref def +R8383:8383 riscv_types <> M def +R8386:8389 Coq.Init.Datatypes <> unit ind +R8360:8368 Sail.Prompt_monad <> write_reg def +R8378:8378 riscv <> v:52 var +R8370:8376 riscv_types <> x29_ref def +R8303:8303 riscv_types <> M def +R8306:8309 Coq.Init.Datatypes <> unit ind +R8280:8288 Sail.Prompt_monad <> write_reg def +R8298:8298 riscv <> v:52 var +R8290:8296 riscv_types <> x28_ref def +R8223:8223 riscv_types <> M def +R8226:8229 Coq.Init.Datatypes <> unit ind +R8200:8208 Sail.Prompt_monad <> write_reg def +R8218:8218 riscv <> v:52 var +R8210:8216 riscv_types <> x27_ref def +R8143:8143 riscv_types <> M def +R8146:8149 Coq.Init.Datatypes <> unit ind +R8120:8128 Sail.Prompt_monad <> write_reg def +R8138:8138 riscv <> v:52 var +R8130:8136 riscv_types <> x26_ref def +R8063:8063 riscv_types <> M def +R8066:8069 Coq.Init.Datatypes <> unit ind +R8040:8048 Sail.Prompt_monad <> write_reg def +R8058:8058 riscv <> v:52 var +R8050:8056 riscv_types <> x25_ref def +R7983:7983 riscv_types <> M def +R7986:7989 Coq.Init.Datatypes <> unit ind +R7960:7968 Sail.Prompt_monad <> write_reg def +R7978:7978 riscv <> v:52 var +R7970:7976 riscv_types <> x24_ref def +R7903:7903 riscv_types <> M def +R7906:7909 Coq.Init.Datatypes <> unit ind +R7880:7888 Sail.Prompt_monad <> write_reg def +R7898:7898 riscv <> v:52 var +R7890:7896 riscv_types <> x23_ref def +R7823:7823 riscv_types <> M def +R7826:7829 Coq.Init.Datatypes <> unit ind +R7800:7808 Sail.Prompt_monad <> write_reg def +R7818:7818 riscv <> v:52 var +R7810:7816 riscv_types <> x22_ref def +R7743:7743 riscv_types <> M def +R7746:7749 Coq.Init.Datatypes <> unit ind +R7720:7728 Sail.Prompt_monad <> write_reg def +R7738:7738 riscv <> v:52 var +R7730:7736 riscv_types <> x21_ref def +R7663:7663 riscv_types <> M def +R7666:7669 Coq.Init.Datatypes <> unit ind +R7640:7648 Sail.Prompt_monad <> write_reg def +R7658:7658 riscv <> v:52 var +R7650:7656 riscv_types <> x20_ref def +R7583:7583 riscv_types <> M def +R7586:7589 Coq.Init.Datatypes <> unit ind +R7560:7568 Sail.Prompt_monad <> write_reg def +R7578:7578 riscv <> v:52 var +R7570:7576 riscv_types <> x19_ref def +R7503:7503 riscv_types <> M def +R7506:7509 Coq.Init.Datatypes <> unit ind +R7480:7488 Sail.Prompt_monad <> write_reg def +R7498:7498 riscv <> v:52 var +R7490:7496 riscv_types <> x18_ref def +R7423:7423 riscv_types <> M def +R7426:7429 Coq.Init.Datatypes <> unit ind +R7400:7408 Sail.Prompt_monad <> write_reg def +R7418:7418 riscv <> v:52 var +R7410:7416 riscv_types <> x17_ref def +R7343:7343 riscv_types <> M def +R7346:7349 Coq.Init.Datatypes <> unit ind +R7320:7328 Sail.Prompt_monad <> write_reg def +R7338:7338 riscv <> v:52 var +R7330:7336 riscv_types <> x16_ref def +R7263:7263 riscv_types <> M def +R7266:7269 Coq.Init.Datatypes <> unit ind +R7240:7248 Sail.Prompt_monad <> write_reg def +R7258:7258 riscv <> v:52 var +R7250:7256 riscv_types <> x15_ref def +R7183:7183 riscv_types <> M def +R7186:7189 Coq.Init.Datatypes <> unit ind +R7160:7168 Sail.Prompt_monad <> write_reg def +R7178:7178 riscv <> v:52 var +R7170:7176 riscv_types <> x14_ref def +R7103:7103 riscv_types <> M def +R7106:7109 Coq.Init.Datatypes <> unit ind +R7080:7088 Sail.Prompt_monad <> write_reg def +R7098:7098 riscv <> v:52 var +R7090:7096 riscv_types <> x13_ref def +R7023:7023 riscv_types <> M def +R7026:7029 Coq.Init.Datatypes <> unit ind +R7000:7008 Sail.Prompt_monad <> write_reg def +R7018:7018 riscv <> v:52 var +R7010:7016 riscv_types <> x12_ref def +R6943:6943 riscv_types <> M def +R6946:6949 Coq.Init.Datatypes <> unit ind +R6920:6928 Sail.Prompt_monad <> write_reg def +R6938:6938 riscv <> v:52 var +R6930:6936 riscv_types <> x11_ref def +R6863:6863 riscv_types <> M def +R6866:6869 Coq.Init.Datatypes <> unit ind +R6840:6848 Sail.Prompt_monad <> write_reg def +R6858:6858 riscv <> v:52 var +R6850:6856 riscv_types <> x10_ref def +R6783:6783 riscv_types <> M def +R6786:6789 Coq.Init.Datatypes <> unit ind +R6761:6769 Sail.Prompt_monad <> write_reg def +R6778:6778 riscv <> v:52 var +R6771:6776 riscv_types <> x9_ref def +R6705:6705 riscv_types <> M def +R6708:6711 Coq.Init.Datatypes <> unit ind +R6683:6691 Sail.Prompt_monad <> write_reg def +R6700:6700 riscv <> v:52 var +R6693:6698 riscv_types <> x8_ref def +R6627:6627 riscv_types <> M def +R6630:6633 Coq.Init.Datatypes <> unit ind +R6605:6613 Sail.Prompt_monad <> write_reg def +R6622:6622 riscv <> v:52 var +R6615:6620 riscv_types <> x7_ref def +R6549:6549 riscv_types <> M def +R6552:6555 Coq.Init.Datatypes <> unit ind +R6527:6535 Sail.Prompt_monad <> write_reg def +R6544:6544 riscv <> v:52 var +R6537:6542 riscv_types <> x6_ref def +R6471:6471 riscv_types <> M def +R6474:6477 Coq.Init.Datatypes <> unit ind +R6449:6457 Sail.Prompt_monad <> write_reg def +R6466:6466 riscv <> v:52 var +R6459:6464 riscv_types <> x5_ref def +R6393:6393 riscv_types <> M def +R6396:6399 Coq.Init.Datatypes <> unit ind +R6371:6379 Sail.Prompt_monad <> write_reg def +R6388:6388 riscv <> v:52 var +R6381:6386 riscv_types <> x4_ref def +R6315:6315 riscv_types <> M def +R6318:6321 Coq.Init.Datatypes <> unit ind +R6293:6301 Sail.Prompt_monad <> write_reg def +R6310:6310 riscv <> v:52 var +R6303:6308 riscv_types <> x3_ref def +R6237:6237 riscv_types <> M def +R6240:6243 Coq.Init.Datatypes <> unit ind +R6215:6223 Sail.Prompt_monad <> write_reg def +R6232:6232 riscv <> v:52 var +R6225:6230 riscv_types <> x2_ref def +R6159:6159 riscv_types <> M def +R6162:6165 Coq.Init.Datatypes <> unit ind +R6137:6145 Sail.Prompt_monad <> write_reg def +R6154:6154 riscv <> v:52 var +R6147:6152 riscv_types <> x1_ref def +R6079:6085 Sail.Prompt_monad <> returnm def +R6087:6088 Coq.Init.Datatypes <> tt constr +def 8650:8656 <> rX_bits +R8663:8667 Sail.Values <> mword def +binder 8659:8659 <> i:54 +R8674:8674 riscv_types <> M def +R8677:8681 Sail.Values <> mword def +R8716:8716 riscv_types <> M def +R8719:8723 Sail.Values <> mword def +R8691:8692 riscv <> rX def +R8695:8700 Coq.Init.Specif <> projT1 def +R8703:8706 Sail.Operators_mwords <> uint def +R8708:8708 riscv <> i:54 var +def 8742:8748 <> wX_bits +R8755:8759 Sail.Values <> mword def +binder 8751:8751 <> i:55 +R8772:8776 Sail.Values <> mword def +binder 8765:8768 <> data:56 +R8784:8784 riscv_types <> M def +R8787:8790 Coq.Init.Datatypes <> unit ind +R8829:8829 riscv_types <> M def +R8832:8835 Coq.Init.Datatypes <> unit ind +R8799:8800 riscv <> wX def +R8820:8823 riscv <> data:56 var +R8803:8808 Coq.Init.Specif <> projT1 def +R8811:8814 Sail.Operators_mwords <> uint def +R8816:8816 riscv <> i:55 var +def 8851:8862 <> reg_name_abi +R8869:8873 Sail.Values <> mword def +binder 8865:8865 <> r:57 +R8880:8880 riscv_types <> M def +R8883:8888 Coq.Strings.String <> string ind +R8908:8908 riscv <> r:57 var +binder 8900:8903 <> b__0:58 +R11073:11073 riscv_types <> M def +R11076:11081 Coq.Strings.String <> string ind +R8919:8924 Sail.Operators_mwords <> eq_vec def +R8945:8949 Sail.Values <> mword def +R8932:8933 bbv.HexNotationWord <> :::'''b'_x not +R8926:8929 riscv <> b__0:58 var +R8985:8990 Sail.Operators_mwords <> eq_vec def +R9011:9015 Sail.Values <> mword def +R8998:8999 bbv.HexNotationWord <> :::'''b'_x not +R8992:8995 riscv <> b__0:58 var +R9049:9054 Sail.Operators_mwords <> eq_vec def +R9075:9079 Sail.Values <> mword def +R9062:9063 bbv.HexNotationWord <> :::'''b'_x not +R9056:9059 riscv <> b__0:58 var +R9113:9118 Sail.Operators_mwords <> eq_vec def +R9139:9143 Sail.Values <> mword def +R9126:9127 bbv.HexNotationWord <> :::'''b'_x not +R9120:9123 riscv <> b__0:58 var +R9177:9182 Sail.Operators_mwords <> eq_vec def +R9203:9207 Sail.Values <> mword def +R9190:9191 bbv.HexNotationWord <> :::'''b'_x not +R9184:9187 riscv <> b__0:58 var +R9241:9246 Sail.Operators_mwords <> eq_vec def +R9267:9271 Sail.Values <> mword def +R9254:9255 bbv.HexNotationWord <> :::'''b'_x not +R9248:9251 riscv <> b__0:58 var +R9305:9310 Sail.Operators_mwords <> eq_vec def +R9331:9335 Sail.Values <> mword def +R9318:9319 bbv.HexNotationWord <> :::'''b'_x not +R9312:9315 riscv <> b__0:58 var +R9369:9374 Sail.Operators_mwords <> eq_vec def +R9395:9399 Sail.Values <> mword def +R9382:9383 bbv.HexNotationWord <> :::'''b'_x not +R9376:9379 riscv <> b__0:58 var +R9433:9438 Sail.Operators_mwords <> eq_vec def +R9459:9463 Sail.Values <> mword def +R9446:9447 bbv.HexNotationWord <> :::'''b'_x not +R9440:9443 riscv <> b__0:58 var +R9497:9502 Sail.Operators_mwords <> eq_vec def +R9523:9527 Sail.Values <> mword def +R9510:9511 bbv.HexNotationWord <> :::'''b'_x not +R9504:9507 riscv <> b__0:58 var +R9561:9566 Sail.Operators_mwords <> eq_vec def +R9587:9591 Sail.Values <> mword def +R9574:9575 bbv.HexNotationWord <> :::'''b'_x not +R9568:9571 riscv <> b__0:58 var +R9625:9630 Sail.Operators_mwords <> eq_vec def +R9651:9655 Sail.Values <> mword def +R9638:9639 bbv.HexNotationWord <> :::'''b'_x not +R9632:9635 riscv <> b__0:58 var +R9689:9694 Sail.Operators_mwords <> eq_vec def +R9715:9719 Sail.Values <> mword def +R9702:9703 bbv.HexNotationWord <> :::'''b'_x not +R9696:9699 riscv <> b__0:58 var +R9753:9758 Sail.Operators_mwords <> eq_vec def +R9779:9783 Sail.Values <> mword def +R9766:9767 bbv.HexNotationWord <> :::'''b'_x not +R9760:9763 riscv <> b__0:58 var +R9817:9822 Sail.Operators_mwords <> eq_vec def +R9843:9847 Sail.Values <> mword def +R9830:9831 bbv.HexNotationWord <> :::'''b'_x not +R9824:9827 riscv <> b__0:58 var +R9881:9886 Sail.Operators_mwords <> eq_vec def +R9907:9911 Sail.Values <> mword def +R9894:9895 bbv.HexNotationWord <> :::'''b'_x not +R9888:9891 riscv <> b__0:58 var +R9945:9950 Sail.Operators_mwords <> eq_vec def +R9971:9975 Sail.Values <> mword def +R9958:9959 bbv.HexNotationWord <> :::'''b'_x not +R9952:9955 riscv <> b__0:58 var +R10009:10014 Sail.Operators_mwords <> eq_vec def +R10035:10039 Sail.Values <> mword def +R10022:10023 bbv.HexNotationWord <> :::'''b'_x not +R10016:10019 riscv <> b__0:58 var +R10073:10078 Sail.Operators_mwords <> eq_vec def +R10099:10103 Sail.Values <> mword def +R10086:10087 bbv.HexNotationWord <> :::'''b'_x not +R10080:10083 riscv <> b__0:58 var +R10137:10142 Sail.Operators_mwords <> eq_vec def +R10163:10167 Sail.Values <> mword def +R10150:10151 bbv.HexNotationWord <> :::'''b'_x not +R10144:10147 riscv <> b__0:58 var +R10201:10206 Sail.Operators_mwords <> eq_vec def +R10227:10231 Sail.Values <> mword def +R10214:10215 bbv.HexNotationWord <> :::'''b'_x not +R10208:10211 riscv <> b__0:58 var +R10265:10270 Sail.Operators_mwords <> eq_vec def +R10291:10295 Sail.Values <> mword def +R10278:10279 bbv.HexNotationWord <> :::'''b'_x not +R10272:10275 riscv <> b__0:58 var +R10329:10334 Sail.Operators_mwords <> eq_vec def +R10355:10359 Sail.Values <> mword def +R10342:10343 bbv.HexNotationWord <> :::'''b'_x not +R10336:10339 riscv <> b__0:58 var +R10393:10398 Sail.Operators_mwords <> eq_vec def +R10419:10423 Sail.Values <> mword def +R10406:10407 bbv.HexNotationWord <> :::'''b'_x not +R10400:10403 riscv <> b__0:58 var +R10457:10462 Sail.Operators_mwords <> eq_vec def +R10483:10487 Sail.Values <> mword def +R10470:10471 bbv.HexNotationWord <> :::'''b'_x not +R10464:10467 riscv <> b__0:58 var +R10521:10526 Sail.Operators_mwords <> eq_vec def +R10547:10551 Sail.Values <> mword def +R10534:10535 bbv.HexNotationWord <> :::'''b'_x not +R10528:10531 riscv <> b__0:58 var +R10585:10590 Sail.Operators_mwords <> eq_vec def +R10611:10615 Sail.Values <> mword def +R10598:10599 bbv.HexNotationWord <> :::'''b'_x not +R10592:10595 riscv <> b__0:58 var +R10650:10655 Sail.Operators_mwords <> eq_vec def +R10676:10680 Sail.Values <> mword def +R10663:10664 bbv.HexNotationWord <> :::'''b'_x not +R10657:10660 riscv <> b__0:58 var +R10715:10720 Sail.Operators_mwords <> eq_vec def +R10741:10745 Sail.Values <> mword def +R10728:10729 bbv.HexNotationWord <> :::'''b'_x not +R10722:10725 riscv <> b__0:58 var +R10779:10784 Sail.Operators_mwords <> eq_vec def +R10805:10809 Sail.Values <> mword def +R10792:10793 bbv.HexNotationWord <> :::'''b'_x not +R10786:10789 riscv <> b__0:58 var +R10843:10848 Sail.Operators_mwords <> eq_vec def +R10869:10873 Sail.Values <> mword def +R10856:10857 bbv.HexNotationWord <> :::'''b'_x not +R10850:10853 riscv <> b__0:58 var +R10907:10912 Sail.Operators_mwords <> eq_vec def +R10933:10937 Sail.Values <> mword def +R10920:10921 bbv.HexNotationWord <> :::'''b'_x not +R10914:10917 riscv <> b__0:58 var +R11045:11049 Sail.Prompt_monad <> :::x_'>>='_x not +R10971:10981 Sail.Prompt_monad <> assert_exp' def +R10983:10987 Coq.Init.Datatypes <> false constr +R11059:11062 Sail.Prompt_monad <> exit def +R11064:11065 Coq.Init.Datatypes <> tt constr +R10947:10953 Sail.Prompt_monad <> returnm def +R10883:10889 Sail.Prompt_monad <> returnm def +R10819:10825 Sail.Prompt_monad <> returnm def +R10755:10761 Sail.Prompt_monad <> returnm def +R10690:10696 Sail.Prompt_monad <> returnm def +R10625:10631 Sail.Prompt_monad <> returnm def +R10561:10567 Sail.Prompt_monad <> returnm def +R10497:10503 Sail.Prompt_monad <> returnm def +R10433:10439 Sail.Prompt_monad <> returnm def +R10369:10375 Sail.Prompt_monad <> returnm def +R10305:10311 Sail.Prompt_monad <> returnm def +R10241:10247 Sail.Prompt_monad <> returnm def +R10177:10183 Sail.Prompt_monad <> returnm def +R10113:10119 Sail.Prompt_monad <> returnm def +R10049:10055 Sail.Prompt_monad <> returnm def +R9985:9991 Sail.Prompt_monad <> returnm def +R9921:9927 Sail.Prompt_monad <> returnm def +R9857:9863 Sail.Prompt_monad <> returnm def +R9793:9799 Sail.Prompt_monad <> returnm def +R9729:9735 Sail.Prompt_monad <> returnm def +R9665:9671 Sail.Prompt_monad <> returnm def +R9601:9607 Sail.Prompt_monad <> returnm def +R9537:9543 Sail.Prompt_monad <> returnm def +R9473:9479 Sail.Prompt_monad <> returnm def +R9409:9415 Sail.Prompt_monad <> returnm def +R9345:9351 Sail.Prompt_monad <> returnm def +R9281:9287 Sail.Prompt_monad <> returnm def +R9217:9223 Sail.Prompt_monad <> returnm def +R9153:9159 Sail.Prompt_monad <> returnm def +R9089:9095 Sail.Prompt_monad <> returnm def +R9025:9031 Sail.Prompt_monad <> returnm def +R8959:8965 Sail.Prompt_monad <> returnm def +def 11097:11113 <> reg_name_forwards +R11123:11127 Sail.Values <> mword def +binder 11116:11119 <> arg_:59 +R11134:11134 riscv_types <> M def +R11137:11142 Coq.Strings.String <> string ind +R11162:11165 riscv <> arg_:59 var +binder 11154:11157 <> b__0:60 +R15793:15793 riscv_types <> M def +R15796:15801 Coq.Strings.String <> string ind +R11176:11181 Sail.Operators_mwords <> eq_vec def +R11202:11206 Sail.Values <> mword def +R11189:11190 bbv.HexNotationWord <> :::'''b'_x not +R11183:11186 riscv <> b__0:60 var +R11242:11247 Sail.Operators_mwords <> eq_vec def +R11268:11272 Sail.Values <> mword def +R11255:11256 bbv.HexNotationWord <> :::'''b'_x not +R11249:11252 riscv <> b__0:60 var +R11311:11316 Sail.Operators_mwords <> eq_vec def +R11337:11341 Sail.Values <> mword def +R11324:11325 bbv.HexNotationWord <> :::'''b'_x not +R11318:11321 riscv <> b__0:60 var +R11385:11390 Sail.Operators_mwords <> eq_vec def +R11411:11415 Sail.Values <> mword def +R11398:11399 bbv.HexNotationWord <> :::'''b'_x not +R11392:11395 riscv <> b__0:60 var +R11464:11469 Sail.Operators_mwords <> eq_vec def +R11490:11494 Sail.Values <> mword def +R11477:11478 bbv.HexNotationWord <> :::'''b'_x not +R11471:11474 riscv <> b__0:60 var +R11548:11553 Sail.Operators_mwords <> eq_vec def +R11574:11578 Sail.Values <> mword def +R11561:11562 bbv.HexNotationWord <> :::'''b'_x not +R11555:11558 riscv <> b__0:60 var +R11637:11642 Sail.Operators_mwords <> eq_vec def +R11663:11667 Sail.Values <> mword def +R11650:11651 bbv.HexNotationWord <> :::'''b'_x not +R11644:11647 riscv <> b__0:60 var +R11731:11736 Sail.Operators_mwords <> eq_vec def +R11757:11761 Sail.Values <> mword def +R11744:11745 bbv.HexNotationWord <> :::'''b'_x not +R11738:11741 riscv <> b__0:60 var +R11830:11835 Sail.Operators_mwords <> eq_vec def +R11856:11860 Sail.Values <> mword def +R11843:11844 bbv.HexNotationWord <> :::'''b'_x not +R11837:11840 riscv <> b__0:60 var +R11934:11939 Sail.Operators_mwords <> eq_vec def +R11960:11964 Sail.Values <> mword def +R11947:11948 bbv.HexNotationWord <> :::'''b'_x not +R11941:11944 riscv <> b__0:60 var +R12043:12048 Sail.Operators_mwords <> eq_vec def +R12069:12073 Sail.Values <> mword def +R12056:12057 bbv.HexNotationWord <> :::'''b'_x not +R12050:12053 riscv <> b__0:60 var +R12157:12162 Sail.Operators_mwords <> eq_vec def +R12183:12187 Sail.Values <> mword def +R12170:12171 bbv.HexNotationWord <> :::'''b'_x not +R12164:12167 riscv <> b__0:60 var +R12276:12281 Sail.Operators_mwords <> eq_vec def +R12302:12306 Sail.Values <> mword def +R12289:12290 bbv.HexNotationWord <> :::'''b'_x not +R12283:12286 riscv <> b__0:60 var +R12400:12405 Sail.Operators_mwords <> eq_vec def +R12426:12430 Sail.Values <> mword def +R12413:12414 bbv.HexNotationWord <> :::'''b'_x not +R12407:12410 riscv <> b__0:60 var +R12529:12534 Sail.Operators_mwords <> eq_vec def +R12555:12559 Sail.Values <> mword def +R12542:12543 bbv.HexNotationWord <> :::'''b'_x not +R12536:12539 riscv <> b__0:60 var +R12663:12668 Sail.Operators_mwords <> eq_vec def +R12689:12693 Sail.Values <> mword def +R12676:12677 bbv.HexNotationWord <> :::'''b'_x not +R12670:12673 riscv <> b__0:60 var +R12802:12807 Sail.Operators_mwords <> eq_vec def +R12828:12832 Sail.Values <> mword def +R12815:12816 bbv.HexNotationWord <> :::'''b'_x not +R12809:12812 riscv <> b__0:60 var +R12946:12951 Sail.Operators_mwords <> eq_vec def +R12972:12976 Sail.Values <> mword def +R12959:12960 bbv.HexNotationWord <> :::'''b'_x not +R12953:12956 riscv <> b__0:60 var +R13095:13100 Sail.Operators_mwords <> eq_vec def +R13121:13125 Sail.Values <> mword def +R13108:13109 bbv.HexNotationWord <> :::'''b'_x not +R13102:13105 riscv <> b__0:60 var +R13249:13254 Sail.Operators_mwords <> eq_vec def +R13275:13279 Sail.Values <> mword def +R13262:13263 bbv.HexNotationWord <> :::'''b'_x not +R13256:13259 riscv <> b__0:60 var +R13408:13413 Sail.Operators_mwords <> eq_vec def +R13434:13438 Sail.Values <> mword def +R13421:13422 bbv.HexNotationWord <> :::'''b'_x not +R13415:13418 riscv <> b__0:60 var +R13572:13577 Sail.Operators_mwords <> eq_vec def +R13598:13602 Sail.Values <> mword def +R13585:13586 bbv.HexNotationWord <> :::'''b'_x not +R13579:13582 riscv <> b__0:60 var +R13741:13746 Sail.Operators_mwords <> eq_vec def +R13767:13771 Sail.Values <> mword def +R13754:13755 bbv.HexNotationWord <> :::'''b'_x not +R13748:13751 riscv <> b__0:60 var +R13915:13920 Sail.Operators_mwords <> eq_vec def +R13941:13945 Sail.Values <> mword def +R13928:13929 bbv.HexNotationWord <> :::'''b'_x not +R13922:13925 riscv <> b__0:60 var +R14094:14099 Sail.Operators_mwords <> eq_vec def +R14120:14124 Sail.Values <> mword def +R14107:14108 bbv.HexNotationWord <> :::'''b'_x not +R14101:14104 riscv <> b__0:60 var +R14278:14283 Sail.Operators_mwords <> eq_vec def +R14304:14308 Sail.Values <> mword def +R14291:14292 bbv.HexNotationWord <> :::'''b'_x not +R14285:14288 riscv <> b__0:60 var +R14467:14472 Sail.Operators_mwords <> eq_vec def +R14493:14497 Sail.Values <> mword def +R14480:14481 bbv.HexNotationWord <> :::'''b'_x not +R14474:14477 riscv <> b__0:60 var +R14662:14667 Sail.Operators_mwords <> eq_vec def +R14688:14692 Sail.Values <> mword def +R14675:14676 bbv.HexNotationWord <> :::'''b'_x not +R14669:14672 riscv <> b__0:60 var +R14862:14867 Sail.Operators_mwords <> eq_vec def +R14888:14892 Sail.Values <> mword def +R14875:14876 bbv.HexNotationWord <> :::'''b'_x not +R14869:14872 riscv <> b__0:60 var +R15066:15071 Sail.Operators_mwords <> eq_vec def +R15092:15096 Sail.Values <> mword def +R15079:15080 bbv.HexNotationWord <> :::'''b'_x not +R15073:15076 riscv <> b__0:60 var +R15275:15280 Sail.Operators_mwords <> eq_vec def +R15301:15305 Sail.Values <> mword def +R15288:15289 bbv.HexNotationWord <> :::'''b'_x not +R15282:15285 riscv <> b__0:60 var +R15489:15494 Sail.Operators_mwords <> eq_vec def +R15515:15519 Sail.Values <> mword def +R15502:15503 bbv.HexNotationWord <> :::'''b'_x not +R15496:15499 riscv <> b__0:60 var +R15766:15770 Sail.Prompt_monad <> :::x_'>>='_x not +R15705:15715 Sail.Prompt_monad <> assert_exp' def +R15717:15721 Coq.Init.Datatypes <> false constr +R15780:15783 Sail.Prompt_monad <> exit def +R15785:15786 Coq.Init.Datatypes <> tt constr +R15529:15535 Sail.Prompt_monad <> returnm def +R15315:15321 Sail.Prompt_monad <> returnm def +R15106:15112 Sail.Prompt_monad <> returnm def +R14902:14908 Sail.Prompt_monad <> returnm def +R14702:14708 Sail.Prompt_monad <> returnm def +R14507:14513 Sail.Prompt_monad <> returnm def +R14318:14324 Sail.Prompt_monad <> returnm def +R14134:14140 Sail.Prompt_monad <> returnm def +R13955:13961 Sail.Prompt_monad <> returnm def +R13781:13787 Sail.Prompt_monad <> returnm def +R13612:13618 Sail.Prompt_monad <> returnm def +R13448:13454 Sail.Prompt_monad <> returnm def +R13289:13295 Sail.Prompt_monad <> returnm def +R13135:13141 Sail.Prompt_monad <> returnm def +R12986:12992 Sail.Prompt_monad <> returnm def +R12842:12848 Sail.Prompt_monad <> returnm def +R12703:12709 Sail.Prompt_monad <> returnm def +R12569:12575 Sail.Prompt_monad <> returnm def +R12440:12446 Sail.Prompt_monad <> returnm def +R12316:12322 Sail.Prompt_monad <> returnm def +R12197:12203 Sail.Prompt_monad <> returnm def +R12083:12089 Sail.Prompt_monad <> returnm def +R11974:11980 Sail.Prompt_monad <> returnm def +R11870:11876 Sail.Prompt_monad <> returnm def +R11771:11777 Sail.Prompt_monad <> returnm def +R11677:11683 Sail.Prompt_monad <> returnm def +R11588:11594 Sail.Prompt_monad <> returnm def +R11504:11510 Sail.Prompt_monad <> returnm def +R11425:11431 Sail.Prompt_monad <> returnm def +R11351:11357 Sail.Prompt_monad <> returnm def +R11282:11288 Sail.Prompt_monad <> returnm def +R11216:11222 Sail.Prompt_monad <> returnm def +def 15817:15834 <> reg_name_backwards +R15844:15849 Coq.Strings.String <> string ind +binder 15837:15840 <> arg_:61 +R15854:15854 riscv_types <> M def +R15857:15861 Sail.Values <> mword def +R15882:15885 riscv <> arg_:61 var +binder 15875:15877 <> p0_:62 +R20478:20478 riscv_types <> M def +R20481:20485 Sail.Values <> mword def +R15896:15905 Sail.Values <> generic_eq def +R15907:15909 riscv <> p0_:62 var +R15965:15974 Sail.Values <> generic_eq def +R15976:15978 riscv <> p0_:62 var +R16037:16046 Sail.Values <> generic_eq def +R16048:16050 riscv <> p0_:62 var +R16114:16123 Sail.Values <> generic_eq def +R16125:16127 riscv <> p0_:62 var +R16196:16205 Sail.Values <> generic_eq def +R16207:16209 riscv <> p0_:62 var +R16283:16292 Sail.Values <> generic_eq def +R16294:16296 riscv <> p0_:62 var +R16375:16384 Sail.Values <> generic_eq def +R16386:16388 riscv <> p0_:62 var +R16439:16448 Sail.Values <> generic_eq def +R16450:16452 riscv <> p0_:62 var +R16541:16550 Sail.Values <> generic_eq def +R16552:16554 riscv <> p0_:62 var +R16648:16657 Sail.Values <> generic_eq def +R16659:16661 riscv <> p0_:62 var +R16760:16769 Sail.Values <> generic_eq def +R16771:16773 riscv <> p0_:62 var +R16877:16886 Sail.Values <> generic_eq def +R16888:16890 riscv <> p0_:62 var +R16999:17008 Sail.Values <> generic_eq def +R17010:17012 riscv <> p0_:62 var +R17126:17135 Sail.Values <> generic_eq def +R17137:17139 riscv <> p0_:62 var +R17258:17267 Sail.Values <> generic_eq def +R17269:17271 riscv <> p0_:62 var +R17395:17404 Sail.Values <> generic_eq def +R17406:17408 riscv <> p0_:62 var +R17537:17546 Sail.Values <> generic_eq def +R17548:17550 riscv <> p0_:62 var +R17684:17693 Sail.Values <> generic_eq def +R17695:17697 riscv <> p0_:62 var +R17836:17845 Sail.Values <> generic_eq def +R17847:17849 riscv <> p0_:62 var +R17993:18002 Sail.Values <> generic_eq def +R18004:18006 riscv <> p0_:62 var +R18057:18066 Sail.Values <> generic_eq def +R18068:18070 riscv <> p0_:62 var +R18224:18233 Sail.Values <> generic_eq def +R18235:18237 riscv <> p0_:62 var +R18396:18405 Sail.Values <> generic_eq def +R18407:18409 riscv <> p0_:62 var +R18573:18582 Sail.Values <> generic_eq def +R18584:18586 riscv <> p0_:62 var +R18755:18764 Sail.Values <> generic_eq def +R18766:18768 riscv <> p0_:62 var +R18942:18951 Sail.Values <> generic_eq def +R18953:18955 riscv <> p0_:62 var +R19134:19143 Sail.Values <> generic_eq def +R19145:19147 riscv <> p0_:62 var +R19332:19341 Sail.Values <> generic_eq def +R19343:19345 riscv <> p0_:62 var +R19535:19544 Sail.Values <> generic_eq def +R19546:19548 riscv <> p0_:62 var +R19742:19751 Sail.Values <> generic_eq def +R19753:19755 riscv <> p0_:62 var +R19954:19963 Sail.Values <> generic_eq def +R19965:19967 riscv <> p0_:62 var +R20171:20180 Sail.Values <> generic_eq def +R20182:20184 riscv <> p0_:62 var +R20451:20455 Sail.Prompt_monad <> :::x_'>>='_x not +R20390:20400 Sail.Prompt_monad <> assert_exp' def +R20402:20406 Coq.Init.Datatypes <> false constr +R20465:20468 Sail.Prompt_monad <> exit def +R20470:20471 Coq.Init.Datatypes <> tt constr +R20196:20202 Sail.Prompt_monad <> returnm def +R20218:20222 Sail.Values <> mword def +R20205:20206 bbv.HexNotationWord <> :::'''b'_x not +R19979:19985 Sail.Prompt_monad <> returnm def +R20001:20005 Sail.Values <> mword def +R19988:19989 bbv.HexNotationWord <> :::'''b'_x not +R19767:19773 Sail.Prompt_monad <> returnm def +R19789:19793 Sail.Values <> mword def +R19776:19777 bbv.HexNotationWord <> :::'''b'_x not +R19560:19566 Sail.Prompt_monad <> returnm def +R19582:19586 Sail.Values <> mword def +R19569:19570 bbv.HexNotationWord <> :::'''b'_x not +R19358:19364 Sail.Prompt_monad <> returnm def +R19380:19384 Sail.Values <> mword def +R19367:19368 bbv.HexNotationWord <> :::'''b'_x not +R19160:19166 Sail.Prompt_monad <> returnm def +R19182:19186 Sail.Values <> mword def +R19169:19170 bbv.HexNotationWord <> :::'''b'_x not +R18967:18973 Sail.Prompt_monad <> returnm def +R18989:18993 Sail.Values <> mword def +R18976:18977 bbv.HexNotationWord <> :::'''b'_x not +R18780:18786 Sail.Prompt_monad <> returnm def +R18802:18806 Sail.Values <> mword def +R18789:18790 bbv.HexNotationWord <> :::'''b'_x not +R18598:18604 Sail.Prompt_monad <> returnm def +R18620:18624 Sail.Values <> mword def +R18607:18608 bbv.HexNotationWord <> :::'''b'_x not +R18421:18427 Sail.Prompt_monad <> returnm def +R18443:18447 Sail.Values <> mword def +R18430:18431 bbv.HexNotationWord <> :::'''b'_x not +R18249:18255 Sail.Prompt_monad <> returnm def +R18271:18275 Sail.Values <> mword def +R18258:18259 bbv.HexNotationWord <> :::'''b'_x not +R18082:18088 Sail.Prompt_monad <> returnm def +R18104:18108 Sail.Values <> mword def +R18091:18092 bbv.HexNotationWord <> :::'''b'_x not +R18018:18024 Sail.Prompt_monad <> returnm def +R18040:18044 Sail.Values <> mword def +R18027:18028 bbv.HexNotationWord <> :::'''b'_x not +R17861:17867 Sail.Prompt_monad <> returnm def +R17883:17887 Sail.Values <> mword def +R17870:17871 bbv.HexNotationWord <> :::'''b'_x not +R17709:17715 Sail.Prompt_monad <> returnm def +R17731:17735 Sail.Values <> mword def +R17718:17719 bbv.HexNotationWord <> :::'''b'_x not +R17562:17568 Sail.Prompt_monad <> returnm def +R17584:17588 Sail.Values <> mword def +R17571:17572 bbv.HexNotationWord <> :::'''b'_x not +R17420:17426 Sail.Prompt_monad <> returnm def +R17442:17446 Sail.Values <> mword def +R17429:17430 bbv.HexNotationWord <> :::'''b'_x not +R17283:17289 Sail.Prompt_monad <> returnm def +R17305:17309 Sail.Values <> mword def +R17292:17293 bbv.HexNotationWord <> :::'''b'_x not +R17151:17157 Sail.Prompt_monad <> returnm def +R17173:17177 Sail.Values <> mword def +R17160:17161 bbv.HexNotationWord <> :::'''b'_x not +R17024:17030 Sail.Prompt_monad <> returnm def +R17046:17050 Sail.Values <> mword def +R17033:17034 bbv.HexNotationWord <> :::'''b'_x not +R16902:16908 Sail.Prompt_monad <> returnm def +R16924:16928 Sail.Values <> mword def +R16911:16912 bbv.HexNotationWord <> :::'''b'_x not +R16785:16791 Sail.Prompt_monad <> returnm def +R16807:16811 Sail.Values <> mword def +R16794:16795 bbv.HexNotationWord <> :::'''b'_x not +R16673:16679 Sail.Prompt_monad <> returnm def +R16695:16699 Sail.Values <> mword def +R16682:16683 bbv.HexNotationWord <> :::'''b'_x not +R16566:16572 Sail.Prompt_monad <> returnm def +R16588:16592 Sail.Values <> mword def +R16575:16576 bbv.HexNotationWord <> :::'''b'_x not +R16464:16470 Sail.Prompt_monad <> returnm def +R16486:16490 Sail.Values <> mword def +R16473:16474 bbv.HexNotationWord <> :::'''b'_x not +R16400:16406 Sail.Prompt_monad <> returnm def +R16422:16426 Sail.Values <> mword def +R16409:16410 bbv.HexNotationWord <> :::'''b'_x not +R16308:16314 Sail.Prompt_monad <> returnm def +R16330:16334 Sail.Values <> mword def +R16317:16318 bbv.HexNotationWord <> :::'''b'_x not +R16221:16227 Sail.Prompt_monad <> returnm def +R16243:16247 Sail.Values <> mword def +R16230:16231 bbv.HexNotationWord <> :::'''b'_x not +R16139:16145 Sail.Prompt_monad <> returnm def +R16161:16165 Sail.Values <> mword def +R16148:16149 bbv.HexNotationWord <> :::'''b'_x not +R16062:16068 Sail.Prompt_monad <> returnm def +R16084:16088 Sail.Values <> mword def +R16071:16072 bbv.HexNotationWord <> :::'''b'_x not +R15990:15996 Sail.Prompt_monad <> returnm def +R16012:16016 Sail.Values <> mword def +R15999:16000 bbv.HexNotationWord <> :::'''b'_x not +R15923:15929 Sail.Prompt_monad <> returnm def +R15945:15949 Sail.Values <> mword def +R15932:15933 bbv.HexNotationWord <> :::'''b'_x not +def 20503:20527 <> reg_name_forwards_matches +R20537:20541 Sail.Values <> mword def +binder 20530:20533 <> arg_:63 +R20548:20551 Coq.Init.Datatypes <> bool ind +R20570:20573 riscv <> arg_:63 var +binder 20562:20565 <> b__0:64 +R20583:20588 Sail.Operators_mwords <> eq_vec def +R20609:20613 Sail.Values <> mword def +R20596:20597 bbv.HexNotationWord <> :::'''b'_x not +R20590:20593 riscv <> b__0:64 var +R20638:20643 Sail.Operators_mwords <> eq_vec def +R20664:20668 Sail.Values <> mword def +R20651:20652 bbv.HexNotationWord <> :::'''b'_x not +R20645:20648 riscv <> b__0:64 var +R20698:20703 Sail.Operators_mwords <> eq_vec def +R20724:20728 Sail.Values <> mword def +R20711:20712 bbv.HexNotationWord <> :::'''b'_x not +R20705:20708 riscv <> b__0:64 var +R20763:20768 Sail.Operators_mwords <> eq_vec def +R20789:20793 Sail.Values <> mword def +R20776:20777 bbv.HexNotationWord <> :::'''b'_x not +R20770:20773 riscv <> b__0:64 var +R20833:20838 Sail.Operators_mwords <> eq_vec def +R20859:20863 Sail.Values <> mword def +R20846:20847 bbv.HexNotationWord <> :::'''b'_x not +R20840:20843 riscv <> b__0:64 var +R20908:20913 Sail.Operators_mwords <> eq_vec def +R20934:20938 Sail.Values <> mword def +R20921:20922 bbv.HexNotationWord <> :::'''b'_x not +R20915:20918 riscv <> b__0:64 var +R20988:20993 Sail.Operators_mwords <> eq_vec def +R21014:21018 Sail.Values <> mword def +R21001:21002 bbv.HexNotationWord <> :::'''b'_x not +R20995:20998 riscv <> b__0:64 var +R21073:21078 Sail.Operators_mwords <> eq_vec def +R21099:21103 Sail.Values <> mword def +R21086:21087 bbv.HexNotationWord <> :::'''b'_x not +R21080:21083 riscv <> b__0:64 var +R21163:21168 Sail.Operators_mwords <> eq_vec def +R21189:21193 Sail.Values <> mword def +R21176:21177 bbv.HexNotationWord <> :::'''b'_x not +R21170:21173 riscv <> b__0:64 var +R21258:21263 Sail.Operators_mwords <> eq_vec def +R21284:21288 Sail.Values <> mword def +R21271:21272 bbv.HexNotationWord <> :::'''b'_x not +R21265:21268 riscv <> b__0:64 var +R21358:21363 Sail.Operators_mwords <> eq_vec def +R21384:21388 Sail.Values <> mword def +R21371:21372 bbv.HexNotationWord <> :::'''b'_x not +R21365:21368 riscv <> b__0:64 var +R21463:21468 Sail.Operators_mwords <> eq_vec def +R21489:21493 Sail.Values <> mword def +R21476:21477 bbv.HexNotationWord <> :::'''b'_x not +R21470:21473 riscv <> b__0:64 var +R21573:21578 Sail.Operators_mwords <> eq_vec def +R21599:21603 Sail.Values <> mword def +R21586:21587 bbv.HexNotationWord <> :::'''b'_x not +R21580:21583 riscv <> b__0:64 var +R21688:21693 Sail.Operators_mwords <> eq_vec def +R21714:21718 Sail.Values <> mword def +R21701:21702 bbv.HexNotationWord <> :::'''b'_x not +R21695:21698 riscv <> b__0:64 var +R21808:21813 Sail.Operators_mwords <> eq_vec def +R21834:21838 Sail.Values <> mword def +R21821:21822 bbv.HexNotationWord <> :::'''b'_x not +R21815:21818 riscv <> b__0:64 var +R21933:21938 Sail.Operators_mwords <> eq_vec def +R21959:21963 Sail.Values <> mword def +R21946:21947 bbv.HexNotationWord <> :::'''b'_x not +R21940:21943 riscv <> b__0:64 var +R22063:22068 Sail.Operators_mwords <> eq_vec def +R22089:22093 Sail.Values <> mword def +R22076:22077 bbv.HexNotationWord <> :::'''b'_x not +R22070:22073 riscv <> b__0:64 var +R22198:22203 Sail.Operators_mwords <> eq_vec def +R22224:22228 Sail.Values <> mword def +R22211:22212 bbv.HexNotationWord <> :::'''b'_x not +R22205:22208 riscv <> b__0:64 var +R22338:22343 Sail.Operators_mwords <> eq_vec def +R22364:22368 Sail.Values <> mword def +R22351:22352 bbv.HexNotationWord <> :::'''b'_x not +R22345:22348 riscv <> b__0:64 var +R22483:22488 Sail.Operators_mwords <> eq_vec def +R22509:22513 Sail.Values <> mword def +R22496:22497 bbv.HexNotationWord <> :::'''b'_x not +R22490:22493 riscv <> b__0:64 var +R22633:22638 Sail.Operators_mwords <> eq_vec def +R22659:22663 Sail.Values <> mword def +R22646:22647 bbv.HexNotationWord <> :::'''b'_x not +R22640:22643 riscv <> b__0:64 var +R22788:22793 Sail.Operators_mwords <> eq_vec def +R22814:22818 Sail.Values <> mword def +R22801:22802 bbv.HexNotationWord <> :::'''b'_x not +R22795:22798 riscv <> b__0:64 var +R22948:22953 Sail.Operators_mwords <> eq_vec def +R22974:22978 Sail.Values <> mword def +R22961:22962 bbv.HexNotationWord <> :::'''b'_x not +R22955:22958 riscv <> b__0:64 var +R23113:23118 Sail.Operators_mwords <> eq_vec def +R23139:23143 Sail.Values <> mword def +R23126:23127 bbv.HexNotationWord <> :::'''b'_x not +R23120:23123 riscv <> b__0:64 var +R23283:23288 Sail.Operators_mwords <> eq_vec def +R23309:23313 Sail.Values <> mword def +R23296:23297 bbv.HexNotationWord <> :::'''b'_x not +R23290:23293 riscv <> b__0:64 var +R23458:23463 Sail.Operators_mwords <> eq_vec def +R23484:23488 Sail.Values <> mword def +R23471:23472 bbv.HexNotationWord <> :::'''b'_x not +R23465:23468 riscv <> b__0:64 var +R23638:23643 Sail.Operators_mwords <> eq_vec def +R23664:23668 Sail.Values <> mword def +R23651:23652 bbv.HexNotationWord <> :::'''b'_x not +R23645:23648 riscv <> b__0:64 var +R23823:23828 Sail.Operators_mwords <> eq_vec def +R23849:23853 Sail.Values <> mword def +R23836:23837 bbv.HexNotationWord <> :::'''b'_x not +R23830:23833 riscv <> b__0:64 var +R24013:24018 Sail.Operators_mwords <> eq_vec def +R24039:24043 Sail.Values <> mword def +R24026:24027 bbv.HexNotationWord <> :::'''b'_x not +R24020:24023 riscv <> b__0:64 var +R24208:24213 Sail.Operators_mwords <> eq_vec def +R24234:24238 Sail.Values <> mword def +R24221:24222 bbv.HexNotationWord <> :::'''b'_x not +R24215:24218 riscv <> b__0:64 var +R24408:24413 Sail.Operators_mwords <> eq_vec def +R24434:24438 Sail.Values <> mword def +R24421:24422 bbv.HexNotationWord <> :::'''b'_x not +R24415:24418 riscv <> b__0:64 var +R24613:24618 Sail.Operators_mwords <> eq_vec def +R24639:24643 Sail.Values <> mword def +R24626:24627 bbv.HexNotationWord <> :::'''b'_x not +R24620:24623 riscv <> b__0:64 var +R24820:24824 Coq.Init.Datatypes <> false constr +R24653:24656 Coq.Init.Datatypes <> true constr +R24448:24451 Coq.Init.Datatypes <> true constr +R24248:24251 Coq.Init.Datatypes <> true constr +R24053:24056 Coq.Init.Datatypes <> true constr +R23863:23866 Coq.Init.Datatypes <> true constr +R23678:23681 Coq.Init.Datatypes <> true constr +R23498:23501 Coq.Init.Datatypes <> true constr +R23323:23326 Coq.Init.Datatypes <> true constr +R23153:23156 Coq.Init.Datatypes <> true constr +R22988:22991 Coq.Init.Datatypes <> true constr +R22828:22831 Coq.Init.Datatypes <> true constr +R22673:22676 Coq.Init.Datatypes <> true constr +R22523:22526 Coq.Init.Datatypes <> true constr +R22378:22381 Coq.Init.Datatypes <> true constr +R22238:22241 Coq.Init.Datatypes <> true constr +R22103:22106 Coq.Init.Datatypes <> true constr +R21973:21976 Coq.Init.Datatypes <> true constr +R21848:21851 Coq.Init.Datatypes <> true constr +R21728:21731 Coq.Init.Datatypes <> true constr +R21613:21616 Coq.Init.Datatypes <> true constr +R21503:21506 Coq.Init.Datatypes <> true constr +R21398:21401 Coq.Init.Datatypes <> true constr +R21298:21301 Coq.Init.Datatypes <> true constr +R21203:21206 Coq.Init.Datatypes <> true constr +R21113:21116 Coq.Init.Datatypes <> true constr +R21028:21031 Coq.Init.Datatypes <> true constr +R20948:20951 Coq.Init.Datatypes <> true constr +R20873:20876 Coq.Init.Datatypes <> true constr +R20803:20806 Coq.Init.Datatypes <> true constr +R20738:20741 Coq.Init.Datatypes <> true constr +R20678:20681 Coq.Init.Datatypes <> true constr +R20623:20626 Coq.Init.Datatypes <> true constr +def 24839:24864 <> reg_name_backwards_matches +R24874:24879 Coq.Strings.String <> string ind +binder 24867:24870 <> arg_:65 +R24884:24887 Coq.Init.Datatypes <> bool ind +R24905:24908 riscv <> arg_:65 var +binder 24898:24900 <> p0_:66 +R24918:24927 Sail.Values <> generic_eq def +R24929:24931 riscv <> p0_:66 var +R24960:24969 Sail.Values <> generic_eq def +R24971:24973 riscv <> p0_:66 var +R25000:25009 Sail.Values <> generic_eq def +R25011:25013 riscv <> p0_:66 var +R25040:25049 Sail.Values <> generic_eq def +R25051:25053 riscv <> p0_:66 var +R25080:25089 Sail.Values <> generic_eq def +R25091:25093 riscv <> p0_:66 var +R25120:25129 Sail.Values <> generic_eq def +R25131:25133 riscv <> p0_:66 var +R25160:25169 Sail.Values <> generic_eq def +R25171:25173 riscv <> p0_:66 var +R25200:25209 Sail.Values <> generic_eq def +R25211:25213 riscv <> p0_:66 var +R25240:25249 Sail.Values <> generic_eq def +R25251:25253 riscv <> p0_:66 var +R25280:25289 Sail.Values <> generic_eq def +R25291:25293 riscv <> p0_:66 var +R25365:25374 Sail.Values <> generic_eq def +R25376:25378 riscv <> p0_:66 var +R25455:25464 Sail.Values <> generic_eq def +R25466:25468 riscv <> p0_:66 var +R25550:25559 Sail.Values <> generic_eq def +R25561:25563 riscv <> p0_:66 var +R25650:25659 Sail.Values <> generic_eq def +R25661:25663 riscv <> p0_:66 var +R25755:25764 Sail.Values <> generic_eq def +R25766:25768 riscv <> p0_:66 var +R25865:25874 Sail.Values <> generic_eq def +R25876:25878 riscv <> p0_:66 var +R25980:25989 Sail.Values <> generic_eq def +R25991:25993 riscv <> p0_:66 var +R26100:26109 Sail.Values <> generic_eq def +R26111:26113 riscv <> p0_:66 var +R26225:26234 Sail.Values <> generic_eq def +R26236:26238 riscv <> p0_:66 var +R26355:26364 Sail.Values <> generic_eq def +R26366:26368 riscv <> p0_:66 var +R26490:26499 Sail.Values <> generic_eq def +R26501:26503 riscv <> p0_:66 var +R26630:26639 Sail.Values <> generic_eq def +R26641:26643 riscv <> p0_:66 var +R26775:26784 Sail.Values <> generic_eq def +R26786:26788 riscv <> p0_:66 var +R26925:26934 Sail.Values <> generic_eq def +R26936:26938 riscv <> p0_:66 var +R27080:27089 Sail.Values <> generic_eq def +R27091:27093 riscv <> p0_:66 var +R27240:27249 Sail.Values <> generic_eq def +R27251:27253 riscv <> p0_:66 var +R27405:27414 Sail.Values <> generic_eq def +R27416:27418 riscv <> p0_:66 var +R27576:27585 Sail.Values <> generic_eq def +R27587:27589 riscv <> p0_:66 var +R27752:27761 Sail.Values <> generic_eq def +R27763:27765 riscv <> p0_:66 var +R27932:27941 Sail.Values <> generic_eq def +R27943:27945 riscv <> p0_:66 var +R28117:28126 Sail.Values <> generic_eq def +R28128:28130 riscv <> p0_:66 var +R28307:28316 Sail.Values <> generic_eq def +R28318:28320 riscv <> p0_:66 var +R28499:28503 Coq.Init.Datatypes <> false constr +R28332:28335 Coq.Init.Datatypes <> true constr +R28142:28145 Coq.Init.Datatypes <> true constr +R27957:27960 Coq.Init.Datatypes <> true constr +R27777:27780 Coq.Init.Datatypes <> true constr +R27602:27605 Coq.Init.Datatypes <> true constr +R27431:27434 Coq.Init.Datatypes <> true constr +R27265:27268 Coq.Init.Datatypes <> true constr +R27105:27108 Coq.Init.Datatypes <> true constr +R26950:26953 Coq.Init.Datatypes <> true constr +R26800:26803 Coq.Init.Datatypes <> true constr +R26655:26658 Coq.Init.Datatypes <> true constr +R26515:26518 Coq.Init.Datatypes <> true constr +R26380:26383 Coq.Init.Datatypes <> true constr +R26250:26253 Coq.Init.Datatypes <> true constr +R26125:26128 Coq.Init.Datatypes <> true constr +R26005:26008 Coq.Init.Datatypes <> true constr +R25890:25893 Coq.Init.Datatypes <> true constr +R25780:25783 Coq.Init.Datatypes <> true constr +R25675:25678 Coq.Init.Datatypes <> true constr +R25575:25578 Coq.Init.Datatypes <> true constr +R25480:25483 Coq.Init.Datatypes <> true constr +R25390:25393 Coq.Init.Datatypes <> true constr +R25305:25308 Coq.Init.Datatypes <> true constr +R25265:25268 Coq.Init.Datatypes <> true constr +R25225:25228 Coq.Init.Datatypes <> true constr +R25185:25188 Coq.Init.Datatypes <> true constr +R25145:25148 Coq.Init.Datatypes <> true constr +R25105:25108 Coq.Init.Datatypes <> true constr +R25065:25068 Coq.Init.Datatypes <> true constr +R25025:25028 Coq.Init.Datatypes <> true constr +R24985:24988 Coq.Init.Datatypes <> true constr +R24945:24948 Coq.Init.Datatypes <> true constr +def 28518:28523 <> _s124_ +R28535:28540 Coq.Strings.String <> string ind +binder 28526:28531 <> _s125_:67 +R28545:28550 Coq.Init.Datatypes <> option ind +R28552:28557 Coq.Strings.String <> string ind +R28578:28583 riscv <> _s125_:67 var +binder 28568:28573 <> _s126_:68 +R28593:28609 Sail.String <> string_startswith def +R28611:28616 riscv <> _s126_:68 var +R28721:28724 Coq.Init.Datatypes <> None constr +R28639:28649 Sail.String <> string_drop def +R28659:28664 Coq.Init.Specif <> projT1 def +R28667:28679 Sail.String <> string_length def +R28651:28656 riscv <> _s126_:68 var +R28702:28705 Coq.Init.Datatypes <> Some constr +def 28739:28744 <> _s120_ +R28756:28761 Coq.Strings.String <> string ind +binder 28747:28752 <> _s121_:69 +R28766:28771 Coq.Init.Datatypes <> option ind +R28773:28778 Coq.Strings.String <> string ind +R28799:28804 riscv <> _s121_:69 var +binder 28789:28794 <> _s122_:70 +R28814:28830 Sail.String <> string_startswith def +R28832:28837 riscv <> _s122_:70 var +R28942:28945 Coq.Init.Datatypes <> None constr +R28860:28870 Sail.String <> string_drop def +R28880:28885 Coq.Init.Specif <> projT1 def +R28888:28900 Sail.String <> string_length def +R28872:28877 riscv <> _s122_:70 var +R28923:28926 Coq.Init.Datatypes <> Some constr +def 28960:28965 <> _s116_ +R28977:28982 Coq.Strings.String <> string ind +binder 28968:28973 <> _s117_:71 +R28987:28992 Coq.Init.Datatypes <> option ind +R28994:28999 Coq.Strings.String <> string ind +R29020:29025 riscv <> _s117_:71 var +binder 29010:29015 <> _s118_:72 +R29035:29051 Sail.String <> string_startswith def +R29053:29058 riscv <> _s118_:72 var +R29163:29166 Coq.Init.Datatypes <> None constr +R29081:29091 Sail.String <> string_drop def +R29101:29106 Coq.Init.Specif <> projT1 def +R29109:29121 Sail.String <> string_length def +R29093:29098 riscv <> _s118_:72 var +R29144:29147 Coq.Init.Datatypes <> Some constr +def 29181:29186 <> _s112_ +R29198:29203 Coq.Strings.String <> string ind +binder 29189:29194 <> _s113_:73 +R29208:29213 Coq.Init.Datatypes <> option ind +R29215:29220 Coq.Strings.String <> string ind +R29241:29246 riscv <> _s113_:73 var +binder 29231:29236 <> _s114_:74 +R29256:29272 Sail.String <> string_startswith def +R29274:29279 riscv <> _s114_:74 var +R29384:29387 Coq.Init.Datatypes <> None constr +R29302:29312 Sail.String <> string_drop def +R29322:29327 Coq.Init.Specif <> projT1 def +R29330:29342 Sail.String <> string_length def +R29314:29319 riscv <> _s114_:74 var +R29365:29368 Coq.Init.Datatypes <> Some constr +def 29402:29407 <> _s108_ +R29419:29424 Coq.Strings.String <> string ind +binder 29410:29415 <> _s109_:75 +R29429:29434 Coq.Init.Datatypes <> option ind +R29436:29441 Coq.Strings.String <> string ind +R29462:29467 riscv <> _s109_:75 var +binder 29452:29457 <> _s110_:76 +R29477:29493 Sail.String <> string_startswith def +R29495:29500 riscv <> _s110_:76 var +R29607:29610 Coq.Init.Datatypes <> None constr +R29524:29534 Sail.String <> string_drop def +R29544:29549 Coq.Init.Specif <> projT1 def +R29552:29564 Sail.String <> string_length def +R29536:29541 riscv <> _s110_:76 var +R29588:29591 Coq.Init.Datatypes <> Some constr +def 29625:29630 <> _s104_ +R29642:29647 Coq.Strings.String <> string ind +binder 29633:29638 <> _s105_:77 +R29652:29657 Coq.Init.Datatypes <> option ind +R29659:29664 Coq.Strings.String <> string ind +R29685:29690 riscv <> _s105_:77 var +binder 29675:29680 <> _s106_:78 +R29700:29716 Sail.String <> string_startswith def +R29718:29723 riscv <> _s106_:78 var +R29830:29833 Coq.Init.Datatypes <> None constr +R29747:29757 Sail.String <> string_drop def +R29767:29772 Coq.Init.Specif <> projT1 def +R29775:29787 Sail.String <> string_length def +R29759:29764 riscv <> _s106_:78 var +R29811:29814 Coq.Init.Datatypes <> Some constr +def 29848:29853 <> _s100_ +R29865:29870 Coq.Strings.String <> string ind +binder 29856:29861 <> _s101_:79 +R29875:29880 Coq.Init.Datatypes <> option ind +R29882:29887 Coq.Strings.String <> string ind +R29908:29913 riscv <> _s101_:79 var +binder 29898:29903 <> _s102_:80 +R29923:29939 Sail.String <> string_startswith def +R29941:29946 riscv <> _s102_:80 var +R30051:30054 Coq.Init.Datatypes <> None constr +R29969:29979 Sail.String <> string_drop def +R29989:29994 Coq.Init.Specif <> projT1 def +R29997:30009 Sail.String <> string_length def +R29981:29986 riscv <> _s102_:80 var +R30032:30035 Coq.Init.Datatypes <> Some constr +def 30069:30073 <> _s96_ +R30084:30089 Coq.Strings.String <> string ind +binder 30076:30080 <> _s97_:81 +R30094:30099 Coq.Init.Datatypes <> option ind +R30101:30106 Coq.Strings.String <> string ind +R30126:30130 riscv <> _s97_:81 var +binder 30117:30121 <> _s98_:82 +R30140:30156 Sail.String <> string_startswith def +R30158:30162 riscv <> _s98_:82 var +R30266:30269 Coq.Init.Datatypes <> None constr +R30185:30195 Sail.String <> string_drop def +R30204:30209 Coq.Init.Specif <> projT1 def +R30212:30224 Sail.String <> string_length def +R30197:30201 riscv <> _s98_:82 var +R30247:30250 Coq.Init.Datatypes <> Some constr +def 30284:30288 <> _s92_ +R30299:30304 Coq.Strings.String <> string ind +binder 30291:30295 <> _s93_:83 +R30309:30314 Coq.Init.Datatypes <> option ind +R30316:30321 Coq.Strings.String <> string ind +R30341:30345 riscv <> _s93_:83 var +binder 30332:30336 <> _s94_:84 +R30355:30371 Sail.String <> string_startswith def +R30373:30377 riscv <> _s94_:84 var +R30481:30484 Coq.Init.Datatypes <> None constr +R30400:30410 Sail.String <> string_drop def +R30419:30424 Coq.Init.Specif <> projT1 def +R30427:30439 Sail.String <> string_length def +R30412:30416 riscv <> _s94_:84 var +R30462:30465 Coq.Init.Datatypes <> Some constr +def 30499:30503 <> _s88_ +R30514:30519 Coq.Strings.String <> string ind +binder 30506:30510 <> _s89_:85 +R30524:30529 Coq.Init.Datatypes <> option ind +R30531:30536 Coq.Strings.String <> string ind +R30556:30560 riscv <> _s89_:85 var +binder 30547:30551 <> _s90_:86 +R30570:30586 Sail.String <> string_startswith def +R30588:30592 riscv <> _s90_:86 var +R30696:30699 Coq.Init.Datatypes <> None constr +R30615:30625 Sail.String <> string_drop def +R30634:30639 Coq.Init.Specif <> projT1 def +R30642:30654 Sail.String <> string_length def +R30627:30631 riscv <> _s90_:86 var +R30677:30680 Coq.Init.Datatypes <> Some constr +def 30714:30718 <> _s84_ +R30729:30734 Coq.Strings.String <> string ind +binder 30721:30725 <> _s85_:87 +R30739:30744 Coq.Init.Datatypes <> option ind +R30746:30751 Coq.Strings.String <> string ind +R30771:30775 riscv <> _s85_:87 var +binder 30762:30766 <> _s86_:88 +R30785:30801 Sail.String <> string_startswith def +R30803:30807 riscv <> _s86_:88 var +R30911:30914 Coq.Init.Datatypes <> None constr +R30830:30840 Sail.String <> string_drop def +R30849:30854 Coq.Init.Specif <> projT1 def +R30857:30869 Sail.String <> string_length def +R30842:30846 riscv <> _s86_:88 var +R30892:30895 Coq.Init.Datatypes <> Some constr +def 30929:30933 <> _s80_ +R30944:30949 Coq.Strings.String <> string ind +binder 30936:30940 <> _s81_:89 +R30954:30959 Coq.Init.Datatypes <> option ind +R30961:30966 Coq.Strings.String <> string ind +R30986:30990 riscv <> _s81_:89 var +binder 30977:30981 <> _s82_:90 +R31000:31016 Sail.String <> string_startswith def +R31018:31022 riscv <> _s82_:90 var +R31126:31129 Coq.Init.Datatypes <> None constr +R31045:31055 Sail.String <> string_drop def +R31064:31069 Coq.Init.Specif <> projT1 def +R31072:31084 Sail.String <> string_length def +R31057:31061 riscv <> _s82_:90 var +R31107:31110 Coq.Init.Datatypes <> Some constr +def 31144:31148 <> _s76_ +R31159:31164 Coq.Strings.String <> string ind +binder 31151:31155 <> _s77_:91 +R31169:31174 Coq.Init.Datatypes <> option ind +R31176:31181 Coq.Strings.String <> string ind +R31201:31205 riscv <> _s77_:91 var +binder 31192:31196 <> _s78_:92 +R31215:31231 Sail.String <> string_startswith def +R31233:31237 riscv <> _s78_:92 var +R31341:31344 Coq.Init.Datatypes <> None constr +R31260:31270 Sail.String <> string_drop def +R31279:31284 Coq.Init.Specif <> projT1 def +R31287:31299 Sail.String <> string_length def +R31272:31276 riscv <> _s78_:92 var +R31322:31325 Coq.Init.Datatypes <> Some constr +def 31359:31363 <> _s72_ +R31374:31379 Coq.Strings.String <> string ind +binder 31366:31370 <> _s73_:93 +R31384:31389 Coq.Init.Datatypes <> option ind +R31391:31396 Coq.Strings.String <> string ind +R31416:31420 riscv <> _s73_:93 var +binder 31407:31411 <> _s74_:94 +R31430:31446 Sail.String <> string_startswith def +R31448:31452 riscv <> _s74_:94 var +R31556:31559 Coq.Init.Datatypes <> None constr +R31475:31485 Sail.String <> string_drop def +R31494:31499 Coq.Init.Specif <> projT1 def +R31502:31514 Sail.String <> string_length def +R31487:31491 riscv <> _s74_:94 var +R31537:31540 Coq.Init.Datatypes <> Some constr +def 31574:31578 <> _s68_ +R31589:31594 Coq.Strings.String <> string ind +binder 31581:31585 <> _s69_:95 +R31599:31604 Coq.Init.Datatypes <> option ind +R31606:31611 Coq.Strings.String <> string ind +R31631:31635 riscv <> _s69_:95 var +binder 31622:31626 <> _s70_:96 +R31645:31661 Sail.String <> string_startswith def +R31663:31667 riscv <> _s70_:96 var +R31771:31774 Coq.Init.Datatypes <> None constr +R31690:31700 Sail.String <> string_drop def +R31709:31714 Coq.Init.Specif <> projT1 def +R31717:31729 Sail.String <> string_length def +R31702:31706 riscv <> _s70_:96 var +R31752:31755 Coq.Init.Datatypes <> Some constr +def 31789:31793 <> _s64_ +R31804:31809 Coq.Strings.String <> string ind +binder 31796:31800 <> _s65_:97 +R31814:31819 Coq.Init.Datatypes <> option ind +R31821:31826 Coq.Strings.String <> string ind +R31846:31850 riscv <> _s65_:97 var +binder 31837:31841 <> _s66_:98 +R31860:31876 Sail.String <> string_startswith def +R31878:31882 riscv <> _s66_:98 var +R31986:31989 Coq.Init.Datatypes <> None constr +R31905:31915 Sail.String <> string_drop def +R31924:31929 Coq.Init.Specif <> projT1 def +R31932:31944 Sail.String <> string_length def +R31917:31921 riscv <> _s66_:98 var +R31967:31970 Coq.Init.Datatypes <> Some constr +def 32004:32008 <> _s60_ +R32019:32024 Coq.Strings.String <> string ind +binder 32011:32015 <> _s61_:99 +R32029:32034 Coq.Init.Datatypes <> option ind +R32036:32041 Coq.Strings.String <> string ind +R32061:32065 riscv <> _s61_:99 var +binder 32052:32056 <> _s62_:100 +R32075:32091 Sail.String <> string_startswith def +R32093:32097 riscv <> _s62_:100 var +R32201:32204 Coq.Init.Datatypes <> None constr +R32120:32130 Sail.String <> string_drop def +R32139:32144 Coq.Init.Specif <> projT1 def +R32147:32159 Sail.String <> string_length def +R32132:32136 riscv <> _s62_:100 var +R32182:32185 Coq.Init.Datatypes <> Some constr +def 32219:32223 <> _s56_ +R32234:32239 Coq.Strings.String <> string ind +binder 32226:32230 <> _s57_:101 +R32244:32249 Coq.Init.Datatypes <> option ind +R32251:32256 Coq.Strings.String <> string ind +R32276:32280 riscv <> _s57_:101 var +binder 32267:32271 <> _s58_:102 +R32290:32306 Sail.String <> string_startswith def +R32308:32312 riscv <> _s58_:102 var +R32416:32419 Coq.Init.Datatypes <> None constr +R32335:32345 Sail.String <> string_drop def +R32354:32359 Coq.Init.Specif <> projT1 def +R32362:32374 Sail.String <> string_length def +R32347:32351 riscv <> _s58_:102 var +R32397:32400 Coq.Init.Datatypes <> Some constr +def 32434:32438 <> _s52_ +R32449:32454 Coq.Strings.String <> string ind +binder 32441:32445 <> _s53_:103 +R32459:32464 Coq.Init.Datatypes <> option ind +R32466:32471 Coq.Strings.String <> string ind +R32491:32495 riscv <> _s53_:103 var +binder 32482:32486 <> _s54_:104 +R32505:32521 Sail.String <> string_startswith def +R32523:32527 riscv <> _s54_:104 var +R32631:32634 Coq.Init.Datatypes <> None constr +R32550:32560 Sail.String <> string_drop def +R32569:32574 Coq.Init.Specif <> projT1 def +R32577:32589 Sail.String <> string_length def +R32562:32566 riscv <> _s54_:104 var +R32612:32615 Coq.Init.Datatypes <> Some constr +def 32649:32653 <> _s48_ +R32664:32669 Coq.Strings.String <> string ind +binder 32656:32660 <> _s49_:105 +R32674:32679 Coq.Init.Datatypes <> option ind +R32681:32686 Coq.Strings.String <> string ind +R32706:32710 riscv <> _s49_:105 var +binder 32697:32701 <> _s50_:106 +R32720:32736 Sail.String <> string_startswith def +R32738:32742 riscv <> _s50_:106 var +R32846:32849 Coq.Init.Datatypes <> None constr +R32765:32775 Sail.String <> string_drop def +R32784:32789 Coq.Init.Specif <> projT1 def +R32792:32804 Sail.String <> string_length def +R32777:32781 riscv <> _s50_:106 var +R32827:32830 Coq.Init.Datatypes <> Some constr +def 32864:32868 <> _s44_ +R32879:32884 Coq.Strings.String <> string ind +binder 32871:32875 <> _s45_:107 +R32889:32894 Coq.Init.Datatypes <> option ind +R32896:32901 Coq.Strings.String <> string ind +R32921:32925 riscv <> _s45_:107 var +binder 32912:32916 <> _s46_:108 +R32935:32951 Sail.String <> string_startswith def +R32953:32957 riscv <> _s46_:108 var +R33061:33064 Coq.Init.Datatypes <> None constr +R32980:32990 Sail.String <> string_drop def +R32999:33004 Coq.Init.Specif <> projT1 def +R33007:33019 Sail.String <> string_length def +R32992:32996 riscv <> _s46_:108 var +R33042:33045 Coq.Init.Datatypes <> Some constr +def 33079:33083 <> _s40_ +R33094:33099 Coq.Strings.String <> string ind +binder 33086:33090 <> _s41_:109 +R33104:33109 Coq.Init.Datatypes <> option ind +R33111:33116 Coq.Strings.String <> string ind +R33136:33140 riscv <> _s41_:109 var +binder 33127:33131 <> _s42_:110 +R33150:33166 Sail.String <> string_startswith def +R33168:33172 riscv <> _s42_:110 var +R33276:33279 Coq.Init.Datatypes <> None constr +R33195:33205 Sail.String <> string_drop def +R33214:33219 Coq.Init.Specif <> projT1 def +R33222:33234 Sail.String <> string_length def +R33207:33211 riscv <> _s42_:110 var +R33257:33260 Coq.Init.Datatypes <> Some constr +def 33294:33298 <> _s36_ +R33309:33314 Coq.Strings.String <> string ind +binder 33301:33305 <> _s37_:111 +R33319:33324 Coq.Init.Datatypes <> option ind +R33326:33331 Coq.Strings.String <> string ind +R33351:33355 riscv <> _s37_:111 var +binder 33342:33346 <> _s38_:112 +R33365:33381 Sail.String <> string_startswith def +R33383:33387 riscv <> _s38_:112 var +R33491:33494 Coq.Init.Datatypes <> None constr +R33410:33420 Sail.String <> string_drop def +R33429:33434 Coq.Init.Specif <> projT1 def +R33437:33449 Sail.String <> string_length def +R33422:33426 riscv <> _s38_:112 var +R33472:33475 Coq.Init.Datatypes <> Some constr +def 33509:33513 <> _s32_ +R33524:33529 Coq.Strings.String <> string ind +binder 33516:33520 <> _s33_:113 +R33534:33539 Coq.Init.Datatypes <> option ind +R33541:33546 Coq.Strings.String <> string ind +R33566:33570 riscv <> _s33_:113 var +binder 33557:33561 <> _s34_:114 +R33580:33596 Sail.String <> string_startswith def +R33598:33602 riscv <> _s34_:114 var +R33706:33709 Coq.Init.Datatypes <> None constr +R33625:33635 Sail.String <> string_drop def +R33644:33649 Coq.Init.Specif <> projT1 def +R33652:33664 Sail.String <> string_length def +R33637:33641 riscv <> _s34_:114 var +R33687:33690 Coq.Init.Datatypes <> Some constr +def 33724:33728 <> _s28_ +R33739:33744 Coq.Strings.String <> string ind +binder 33731:33735 <> _s29_:115 +R33749:33754 Coq.Init.Datatypes <> option ind +R33756:33761 Coq.Strings.String <> string ind +R33781:33785 riscv <> _s29_:115 var +binder 33772:33776 <> _s30_:116 +R33795:33811 Sail.String <> string_startswith def +R33813:33817 riscv <> _s30_:116 var +R33921:33924 Coq.Init.Datatypes <> None constr +R33840:33850 Sail.String <> string_drop def +R33859:33864 Coq.Init.Specif <> projT1 def +R33867:33879 Sail.String <> string_length def +R33852:33856 riscv <> _s30_:116 var +R33902:33905 Coq.Init.Datatypes <> Some constr +def 33939:33943 <> _s24_ +R33954:33959 Coq.Strings.String <> string ind +binder 33946:33950 <> _s25_:117 +R33964:33969 Coq.Init.Datatypes <> option ind +R33971:33976 Coq.Strings.String <> string ind +R33996:34000 riscv <> _s25_:117 var +binder 33987:33991 <> _s26_:118 +R34010:34026 Sail.String <> string_startswith def +R34028:34032 riscv <> _s26_:118 var +R34136:34139 Coq.Init.Datatypes <> None constr +R34055:34065 Sail.String <> string_drop def +R34074:34079 Coq.Init.Specif <> projT1 def +R34082:34094 Sail.String <> string_length def +R34067:34071 riscv <> _s26_:118 var +R34117:34120 Coq.Init.Datatypes <> Some constr +def 34154:34158 <> _s20_ +R34169:34174 Coq.Strings.String <> string ind +binder 34161:34165 <> _s21_:119 +R34179:34184 Coq.Init.Datatypes <> option ind +R34186:34191 Coq.Strings.String <> string ind +R34211:34215 riscv <> _s21_:119 var +binder 34202:34206 <> _s22_:120 +R34225:34241 Sail.String <> string_startswith def +R34243:34247 riscv <> _s22_:120 var +R34351:34354 Coq.Init.Datatypes <> None constr +R34270:34280 Sail.String <> string_drop def +R34289:34294 Coq.Init.Specif <> projT1 def +R34297:34309 Sail.String <> string_length def +R34282:34286 riscv <> _s22_:120 var +R34332:34335 Coq.Init.Datatypes <> Some constr +def 34369:34373 <> _s16_ +R34384:34389 Coq.Strings.String <> string ind +binder 34376:34380 <> _s17_:121 +R34394:34399 Coq.Init.Datatypes <> option ind +R34401:34406 Coq.Strings.String <> string ind +R34426:34430 riscv <> _s17_:121 var +binder 34417:34421 <> _s18_:122 +R34440:34456 Sail.String <> string_startswith def +R34458:34462 riscv <> _s18_:122 var +R34566:34569 Coq.Init.Datatypes <> None constr +R34485:34495 Sail.String <> string_drop def +R34504:34509 Coq.Init.Specif <> projT1 def +R34512:34524 Sail.String <> string_length def +R34497:34501 riscv <> _s18_:122 var +R34547:34550 Coq.Init.Datatypes <> Some constr +def 34584:34588 <> _s12_ +R34599:34604 Coq.Strings.String <> string ind +binder 34591:34595 <> _s13_:123 +R34609:34614 Coq.Init.Datatypes <> option ind +R34616:34621 Coq.Strings.String <> string ind +R34641:34645 riscv <> _s13_:123 var +binder 34632:34636 <> _s14_:124 +R34655:34671 Sail.String <> string_startswith def +R34673:34677 riscv <> _s14_:124 var +R34781:34784 Coq.Init.Datatypes <> None constr +R34700:34710 Sail.String <> string_drop def +R34719:34724 Coq.Init.Specif <> projT1 def +R34727:34739 Sail.String <> string_length def +R34712:34716 riscv <> _s14_:124 var +R34762:34765 Coq.Init.Datatypes <> Some constr +def 34799:34802 <> _s8_ +R34812:34817 Coq.Strings.String <> string ind +binder 34805:34808 <> _s9_:125 +R34822:34827 Coq.Init.Datatypes <> option ind +R34829:34834 Coq.Strings.String <> string ind +R34854:34857 riscv <> _s9_:125 var +binder 34845:34849 <> _s10_:126 +R34867:34883 Sail.String <> string_startswith def +R34885:34889 riscv <> _s10_:126 var +R34993:34996 Coq.Init.Datatypes <> None constr +R34912:34922 Sail.String <> string_drop def +R34931:34936 Coq.Init.Specif <> projT1 def +R34939:34951 Sail.String <> string_length def +R34924:34928 riscv <> _s10_:126 var +R34974:34977 Coq.Init.Datatypes <> Some constr +def 35011:35014 <> _s4_ +R35024:35029 Coq.Strings.String <> string ind +binder 35017:35020 <> _s5_:127 +R35034:35039 Coq.Init.Datatypes <> option ind +R35041:35046 Coq.Strings.String <> string ind +R35065:35068 riscv <> _s5_:127 var +binder 35057:35060 <> _s6_:128 +R35078:35094 Sail.String <> string_startswith def +R35096:35099 riscv <> _s6_:128 var +R35202:35205 Coq.Init.Datatypes <> None constr +R35122:35132 Sail.String <> string_drop def +R35140:35145 Coq.Init.Specif <> projT1 def +R35148:35160 Sail.String <> string_length def +R35134:35137 riscv <> _s6_:128 var +R35183:35186 Coq.Init.Datatypes <> Some constr +def 35220:35223 <> _s0_ +R35233:35238 Coq.Strings.String <> string ind +binder 35226:35229 <> _s1_:129 +R35243:35248 Coq.Init.Datatypes <> option ind +R35250:35255 Coq.Strings.String <> string ind +R35274:35277 riscv <> _s1_:129 var +binder 35266:35269 <> _s2_:130 +R35287:35303 Sail.String <> string_startswith def +R35305:35308 riscv <> _s2_:130 var +R35415:35418 Coq.Init.Datatypes <> None constr +R35333:35343 Sail.String <> string_drop def +R35351:35356 Coq.Init.Specif <> projT1 def +R35359:35371 Sail.String <> string_length def +R35345:35348 riscv <> _s2_:130 var +R35396:35399 Coq.Init.Datatypes <> Some constr +def 35433:35455 <> reg_name_matches_prefix +R35465:35470 Coq.Strings.String <> string ind +binder 35458:35461 <> arg_:131 +R35477:35477 riscv_types <> M def +R35480:35485 Coq.Init.Datatypes <> option ind +R35496:35498 Coq.Init.Datatypes <> ::type_scope:x_'*'_x not +R35489:35493 Sail.Values <> mword def +R35499:35499 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R35501:35503 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R35505:35507 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R35527:35527 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R35504:35504 Coq.Numbers.BinNums <> Z ind +binder 35500:35500 <> n:132 +R35508:35516 Sail.Values <> ArithFact class +R35520:35524 Coq.ZArith.BinInt <> ::Z_scope:x_'>=?'_x not +R35519:35519 riscv <> n:132 var +R35549:35552 riscv <> arg_:131 var +binder 35541:35544 <> _s3_:133 +R79378:79378 riscv_types <> M def +R79381:79386 Coq.Init.Datatypes <> option ind +R79397:79399 Coq.Init.Datatypes <> ::type_scope:x_'*'_x not +R79390:79394 Sail.Values <> mword def +R79400:79400 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R79402:79404 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R79406:79408 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R79428:79428 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R79405:79405 Coq.Numbers.BinNums <> Z ind +binder 79401:79401 <> n:134 +R79409:79417 Sail.Values <> ArithFact class +R79421:79425 Coq.ZArith.BinInt <> ::Z_scope:x_'>=?'_x not +R79420:79420 riscv <> n:134 var +R35570:35573 riscv <> _s0_ def +R35575:35578 riscv <> _s3_:133 var +R35588:35591 Coq.Init.Datatypes <> Some constr +R35599:35602 Coq.Init.Datatypes <> true constr +R35611:35615 Coq.Init.Datatypes <> false constr +R36084:36087 riscv <> _s4_ def +R36089:36092 riscv <> _s3_:133 var +R36102:36105 Coq.Init.Datatypes <> Some constr +R36113:36116 Coq.Init.Datatypes <> true constr +R36125:36129 Coq.Init.Datatypes <> false constr +R36653:36656 riscv <> _s8_ def +R36658:36661 riscv <> _s3_:133 var +R36671:36674 Coq.Init.Datatypes <> Some constr +R36682:36685 Coq.Init.Datatypes <> true constr +R36694:36698 Coq.Init.Datatypes <> false constr +R37277:37281 riscv <> _s12_ def +R37283:37286 riscv <> _s3_:133 var +R37296:37299 Coq.Init.Datatypes <> Some constr +R37307:37310 Coq.Init.Datatypes <> true constr +R37319:37323 Coq.Init.Datatypes <> false constr +R37958:37962 riscv <> _s16_ def +R37964:37967 riscv <> _s3_:133 var +R37977:37980 Coq.Init.Datatypes <> Some constr +R37988:37991 Coq.Init.Datatypes <> true constr +R38000:38004 Coq.Init.Datatypes <> false constr +R38694:38698 riscv <> _s20_ def +R38700:38703 riscv <> _s3_:133 var +R38713:38716 Coq.Init.Datatypes <> Some constr +R38724:38727 Coq.Init.Datatypes <> true constr +R38736:38740 Coq.Init.Datatypes <> false constr +R39485:39489 riscv <> _s24_ def +R39491:39494 riscv <> _s3_:133 var +R39504:39507 Coq.Init.Datatypes <> Some constr +R39515:39518 Coq.Init.Datatypes <> true constr +R39527:39531 Coq.Init.Datatypes <> false constr +R40331:40335 riscv <> _s28_ def +R40337:40340 riscv <> _s3_:133 var +R40350:40353 Coq.Init.Datatypes <> Some constr +R40361:40364 Coq.Init.Datatypes <> true constr +R40373:40377 Coq.Init.Datatypes <> false constr +R41232:41236 riscv <> _s32_ def +R41238:41241 riscv <> _s3_:133 var +R41251:41254 Coq.Init.Datatypes <> Some constr +R41262:41265 Coq.Init.Datatypes <> true constr +R41274:41278 Coq.Init.Datatypes <> false constr +R42188:42192 riscv <> _s36_ def +R42194:42197 riscv <> _s3_:133 var +R42207:42210 Coq.Init.Datatypes <> Some constr +R42218:42221 Coq.Init.Datatypes <> true constr +R42230:42234 Coq.Init.Datatypes <> false constr +R43199:43203 riscv <> _s40_ def +R43205:43208 riscv <> _s3_:133 var +R43218:43221 Coq.Init.Datatypes <> Some constr +R43229:43232 Coq.Init.Datatypes <> true constr +R43241:43245 Coq.Init.Datatypes <> false constr +R44265:44269 riscv <> _s44_ def +R44271:44274 riscv <> _s3_:133 var +R44284:44287 Coq.Init.Datatypes <> Some constr +R44295:44298 Coq.Init.Datatypes <> true constr +R44307:44311 Coq.Init.Datatypes <> false constr +R45386:45390 riscv <> _s48_ def +R45392:45395 riscv <> _s3_:133 var +R45405:45408 Coq.Init.Datatypes <> Some constr +R45416:45419 Coq.Init.Datatypes <> true constr +R45428:45432 Coq.Init.Datatypes <> false constr +R46562:46566 riscv <> _s52_ def +R46568:46571 riscv <> _s3_:133 var +R46581:46584 Coq.Init.Datatypes <> Some constr +R46592:46595 Coq.Init.Datatypes <> true constr +R46604:46608 Coq.Init.Datatypes <> false constr +R47793:47797 riscv <> _s56_ def +R47799:47802 riscv <> _s3_:133 var +R47812:47815 Coq.Init.Datatypes <> Some constr +R47823:47826 Coq.Init.Datatypes <> true constr +R47835:47839 Coq.Init.Datatypes <> false constr +R49079:49083 riscv <> _s60_ def +R49085:49088 riscv <> _s3_:133 var +R49098:49101 Coq.Init.Datatypes <> Some constr +R49109:49112 Coq.Init.Datatypes <> true constr +R49121:49125 Coq.Init.Datatypes <> false constr +R50420:50424 riscv <> _s64_ def +R50426:50429 riscv <> _s3_:133 var +R50439:50442 Coq.Init.Datatypes <> Some constr +R50450:50453 Coq.Init.Datatypes <> true constr +R50462:50466 Coq.Init.Datatypes <> false constr +R51816:51820 riscv <> _s68_ def +R51822:51825 riscv <> _s3_:133 var +R51835:51838 Coq.Init.Datatypes <> Some constr +R51846:51849 Coq.Init.Datatypes <> true constr +R51858:51862 Coq.Init.Datatypes <> false constr +R53267:53271 riscv <> _s72_ def +R53273:53276 riscv <> _s3_:133 var +R53286:53289 Coq.Init.Datatypes <> Some constr +R53297:53300 Coq.Init.Datatypes <> true constr +R53309:53313 Coq.Init.Datatypes <> false constr +R54773:54777 riscv <> _s76_ def +R54779:54782 riscv <> _s3_:133 var +R54792:54795 Coq.Init.Datatypes <> Some constr +R54803:54806 Coq.Init.Datatypes <> true constr +R54815:54819 Coq.Init.Datatypes <> false constr +R56334:56338 riscv <> _s80_ def +R56340:56343 riscv <> _s3_:133 var +R56353:56356 Coq.Init.Datatypes <> Some constr +R56364:56367 Coq.Init.Datatypes <> true constr +R56376:56380 Coq.Init.Datatypes <> false constr +R57950:57954 riscv <> _s84_ def +R57956:57959 riscv <> _s3_:133 var +R57969:57972 Coq.Init.Datatypes <> Some constr +R57980:57983 Coq.Init.Datatypes <> true constr +R57992:57996 Coq.Init.Datatypes <> false constr +R59621:59625 riscv <> _s88_ def +R59627:59630 riscv <> _s3_:133 var +R59640:59643 Coq.Init.Datatypes <> Some constr +R59651:59654 Coq.Init.Datatypes <> true constr +R59663:59667 Coq.Init.Datatypes <> false constr +R61347:61351 riscv <> _s92_ def +R61353:61356 riscv <> _s3_:133 var +R61366:61369 Coq.Init.Datatypes <> Some constr +R61377:61380 Coq.Init.Datatypes <> true constr +R61389:61393 Coq.Init.Datatypes <> false constr +R63128:63132 riscv <> _s96_ def +R63134:63137 riscv <> _s3_:133 var +R63147:63150 Coq.Init.Datatypes <> Some constr +R63158:63161 Coq.Init.Datatypes <> true constr +R63170:63174 Coq.Init.Datatypes <> false constr +R64964:64969 riscv <> _s100_ def +R64971:64974 riscv <> _s3_:133 var +R64984:64987 Coq.Init.Datatypes <> Some constr +R64995:64998 Coq.Init.Datatypes <> true constr +R65007:65011 Coq.Init.Datatypes <> false constr +R66857:66862 riscv <> _s104_ def +R66864:66867 riscv <> _s3_:133 var +R66877:66880 Coq.Init.Datatypes <> Some constr +R66888:66891 Coq.Init.Datatypes <> true constr +R66900:66904 Coq.Init.Datatypes <> false constr +R68805:68810 riscv <> _s108_ def +R68812:68815 riscv <> _s3_:133 var +R68825:68828 Coq.Init.Datatypes <> Some constr +R68836:68839 Coq.Init.Datatypes <> true constr +R68848:68852 Coq.Init.Datatypes <> false constr +R70808:70813 riscv <> _s112_ def +R70815:70818 riscv <> _s3_:133 var +R70828:70831 Coq.Init.Datatypes <> Some constr +R70839:70842 Coq.Init.Datatypes <> true constr +R70851:70855 Coq.Init.Datatypes <> false constr +R72866:72871 riscv <> _s116_ def +R72873:72876 riscv <> _s3_:133 var +R72886:72889 Coq.Init.Datatypes <> Some constr +R72897:72900 Coq.Init.Datatypes <> true constr +R72909:72913 Coq.Init.Datatypes <> false constr +R74979:74984 riscv <> _s120_ def +R74986:74989 riscv <> _s3_:133 var +R74999:75002 Coq.Init.Datatypes <> Some constr +R75010:75013 Coq.Init.Datatypes <> true constr +R75022:75026 Coq.Init.Datatypes <> false constr +R77147:77152 riscv <> _s124_ def +R77154:77157 riscv <> _s3_:133 var +R77167:77170 Coq.Init.Datatypes <> Some constr +R77178:77181 Coq.Init.Datatypes <> true constr +R77190:77194 Coq.Init.Datatypes <> false constr +R79360:79366 Sail.Prompt_monad <> returnm def +R79368:79371 Coq.Init.Datatypes <> None constr +R79142:79142 riscv_types <> M def +R79145:79150 Coq.Init.Datatypes <> option ind +R79161:79163 Coq.Init.Datatypes <> ::type_scope:x_'*'_x not +R79154:79158 Sail.Values <> mword def +R79164:79164 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R79166:79168 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R79170:79172 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R79192:79192 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R79169:79169 Coq.Numbers.BinNums <> Z ind +binder 79165:79165 <> n:135 +R79173:79181 Sail.Values <> ArithFact class +R79185:79189 Coq.ZArith.BinInt <> ::Z_scope:x_'>=?'_x not +R79184:79184 riscv <> n:135 var +R77373:77378 riscv <> _s124_ def +R77380:77383 riscv <> _s3_:133 var +R77554:77557 Coq.Init.Datatypes <> Some constr +R77728:77734 Sail.Prompt_monad <> returnm def +R77737:77740 Coq.Init.Datatypes <> Some constr +R77916:77916 Coq.Init.Datatypes <> ::core_scope:'('_x_','_x_','_'..'_','_x_')' not +R78111:78112 Coq.Init.Datatypes <> ::core_scope:'('_x_','_x_','_'..'_','_x_')' not +R78577:78577 Coq.Init.Datatypes <> ::core_scope:'('_x_','_x_','_'..'_','_x_')' not +R78104:78108 Sail.Values <> mword def +R77917:77918 bbv.HexNotationWord <> :::'''b'_x not +R78113:78120 Sail.Values <> build_ex def +R78311:78316 Coq.Init.Specif <> projT1 def +R78510:78516 Sail.Values <> sub_nat def +R78549:78554 Coq.Init.Specif <> projT1 def +R78557:78569 Sail.String <> string_length def +R78519:78524 Coq.Init.Specif <> projT1 def +R78527:78539 Sail.String <> string_length def +R78541:78544 riscv <> arg_:131 var +R78759:78759 riscv_types <> M def +R78762:78767 Coq.Init.Datatypes <> option ind +R78778:78780 Coq.Init.Datatypes <> ::type_scope:x_'*'_x not +R78771:78775 Sail.Values <> mword def +R78781:78781 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R78783:78785 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R78787:78789 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R78809:78809 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R78786:78786 Coq.Numbers.BinNums <> Z ind +binder 78782:78782 <> n:136 +R78790:78798 Sail.Values <> ArithFact class +R78802:78806 Coq.ZArith.BinInt <> ::Z_scope:x_'>=?'_x not +R78801:78801 riscv <> n:136 var +R78748:78751 Sail.Prompt_monad <> exit def +R78753:78754 Coq.Init.Datatypes <> tt constr +R76924:76924 riscv_types <> M def +R76927:76932 Coq.Init.Datatypes <> option ind +R76943:76945 Coq.Init.Datatypes <> ::type_scope:x_'*'_x not +R76936:76940 Sail.Values <> mword def +R76946:76946 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R76948:76950 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R76952:76954 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R76974:76974 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R76951:76951 Coq.Numbers.BinNums <> Z ind +binder 76947:76947 <> n:137 +R76955:76963 Sail.Values <> ArithFact class +R76967:76971 Coq.ZArith.BinInt <> ::Z_scope:x_'>=?'_x not +R76966:76966 riscv <> n:137 var +R75200:75205 riscv <> _s120_ def +R75207:75210 riscv <> _s3_:133 var +R75376:75379 Coq.Init.Datatypes <> Some constr +R75545:75551 Sail.Prompt_monad <> returnm def +R75554:75557 Coq.Init.Datatypes <> Some constr +R75728:75728 Coq.Init.Datatypes <> ::core_scope:'('_x_','_x_','_'..'_','_x_')' not +R75918:75919 Coq.Init.Datatypes <> ::core_scope:'('_x_','_x_','_'..'_','_x_')' not +R76374:76374 Coq.Init.Datatypes <> ::core_scope:'('_x_','_x_','_'..'_','_x_')' not +R75911:75915 Sail.Values <> mword def +R75729:75730 bbv.HexNotationWord <> :::'''b'_x not +R75920:75927 Sail.Values <> build_ex def +R76113:76118 Coq.Init.Specif <> projT1 def +R76307:76313 Sail.Values <> sub_nat def +R76346:76351 Coq.Init.Specif <> projT1 def +R76354:76366 Sail.String <> string_length def +R76316:76321 Coq.Init.Specif <> projT1 def +R76324:76336 Sail.String <> string_length def +R76338:76341 riscv <> arg_:131 var +R76551:76551 riscv_types <> M def +R76554:76559 Coq.Init.Datatypes <> option ind +R76570:76572 Coq.Init.Datatypes <> ::type_scope:x_'*'_x not +R76563:76567 Sail.Values <> mword def +R76573:76573 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R76575:76577 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R76579:76581 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R76601:76601 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R76578:76578 Coq.Numbers.BinNums <> Z ind +binder 76574:76574 <> n:138 +R76582:76590 Sail.Values <> ArithFact class +R76594:76598 Coq.ZArith.BinInt <> ::Z_scope:x_'>=?'_x not +R76593:76593 riscv <> n:138 var +R76540:76543 Sail.Prompt_monad <> exit def +R76545:76546 Coq.Init.Datatypes <> tt constr +R74761:74761 riscv_types <> M def +R74764:74769 Coq.Init.Datatypes <> option ind +R74780:74782 Coq.Init.Datatypes <> ::type_scope:x_'*'_x not +R74773:74777 Sail.Values <> mword def +R74783:74783 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R74785:74787 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R74789:74791 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R74811:74811 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R74788:74788 Coq.Numbers.BinNums <> Z ind +binder 74784:74784 <> n:139 +R74792:74800 Sail.Values <> ArithFact class +R74804:74808 Coq.ZArith.BinInt <> ::Z_scope:x_'>=?'_x not +R74803:74803 riscv <> n:139 var +R73082:73087 riscv <> _s116_ def +R73089:73092 riscv <> _s3_:133 var +R73253:73256 Coq.Init.Datatypes <> Some constr +R73417:73423 Sail.Prompt_monad <> returnm def +R73426:73429 Coq.Init.Datatypes <> Some constr +R73595:73595 Coq.Init.Datatypes <> ::core_scope:'('_x_','_x_','_'..'_','_x_')' not +R73780:73781 Coq.Init.Datatypes <> ::core_scope:'('_x_','_x_','_'..'_','_x_')' not +R74226:74226 Coq.Init.Datatypes <> ::core_scope:'('_x_','_x_','_'..'_','_x_')' not +R73773:73777 Sail.Values <> mword def +R73596:73597 bbv.HexNotationWord <> :::'''b'_x not +R73782:73789 Sail.Values <> build_ex def +R73970:73975 Coq.Init.Specif <> projT1 def +R74159:74165 Sail.Values <> sub_nat def +R74198:74203 Coq.Init.Specif <> projT1 def +R74206:74218 Sail.String <> string_length def +R74168:74173 Coq.Init.Specif <> projT1 def +R74176:74188 Sail.String <> string_length def +R74190:74193 riscv <> arg_:131 var +R74398:74398 riscv_types <> M def +R74401:74406 Coq.Init.Datatypes <> option ind +R74417:74419 Coq.Init.Datatypes <> ::type_scope:x_'*'_x not +R74410:74414 Sail.Values <> mword def +R74420:74420 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R74422:74424 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R74426:74428 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R74448:74448 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R74425:74425 Coq.Numbers.BinNums <> Z ind +binder 74421:74421 <> n:140 +R74429:74437 Sail.Values <> ArithFact class +R74441:74445 Coq.ZArith.BinInt <> ::Z_scope:x_'>=?'_x not +R74440:74440 riscv <> n:140 var +R74387:74390 Sail.Prompt_monad <> exit def +R74392:74393 Coq.Init.Datatypes <> tt constr +R72653:72653 riscv_types <> M def +R72656:72661 Coq.Init.Datatypes <> option ind +R72672:72674 Coq.Init.Datatypes <> ::type_scope:x_'*'_x not +R72665:72669 Sail.Values <> mword def +R72675:72675 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R72677:72679 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R72681:72683 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R72703:72703 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R72680:72680 Coq.Numbers.BinNums <> Z ind +binder 72676:72676 <> n:141 +R72684:72692 Sail.Values <> ArithFact class +R72696:72700 Coq.ZArith.BinInt <> ::Z_scope:x_'>=?'_x not +R72695:72695 riscv <> n:141 var +R71019:71024 riscv <> _s112_ def +R71026:71029 riscv <> _s3_:133 var +R71185:71188 Coq.Init.Datatypes <> Some constr +R71344:71350 Sail.Prompt_monad <> returnm def +R71353:71356 Coq.Init.Datatypes <> Some constr +R71517:71517 Coq.Init.Datatypes <> ::core_scope:'('_x_','_x_','_'..'_','_x_')' not +R71697:71698 Coq.Init.Datatypes <> ::core_scope:'('_x_','_x_','_'..'_','_x_')' not +R72133:72133 Coq.Init.Datatypes <> ::core_scope:'('_x_','_x_','_'..'_','_x_')' not +R71690:71694 Sail.Values <> mword def +R71518:71519 bbv.HexNotationWord <> :::'''b'_x not +R71699:71706 Sail.Values <> build_ex def +R71882:71887 Coq.Init.Specif <> projT1 def +R72066:72072 Sail.Values <> sub_nat def +R72105:72110 Coq.Init.Specif <> projT1 def +R72113:72125 Sail.String <> string_length def +R72075:72080 Coq.Init.Specif <> projT1 def +R72083:72095 Sail.String <> string_length def +R72097:72100 riscv <> arg_:131 var +R72300:72300 riscv_types <> M def +R72303:72308 Coq.Init.Datatypes <> option ind +R72319:72321 Coq.Init.Datatypes <> ::type_scope:x_'*'_x not +R72312:72316 Sail.Values <> mword def +R72322:72322 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R72324:72326 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R72328:72330 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R72350:72350 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R72327:72327 Coq.Numbers.BinNums <> Z ind +binder 72323:72323 <> n:142 +R72331:72339 Sail.Values <> ArithFact class +R72343:72347 Coq.ZArith.BinInt <> ::Z_scope:x_'>=?'_x not +R72342:72342 riscv <> n:142 var +R72289:72292 Sail.Prompt_monad <> exit def +R72294:72295 Coq.Init.Datatypes <> tt constr +R70600:70600 riscv_types <> M def +R70603:70608 Coq.Init.Datatypes <> option ind +R70619:70621 Coq.Init.Datatypes <> ::type_scope:x_'*'_x not +R70612:70616 Sail.Values <> mword def +R70622:70622 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R70624:70626 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R70628:70630 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R70650:70650 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R70627:70627 Coq.Numbers.BinNums <> Z ind +binder 70623:70623 <> n:143 +R70631:70639 Sail.Values <> ArithFact class +R70643:70647 Coq.ZArith.BinInt <> ::Z_scope:x_'>=?'_x not +R70642:70642 riscv <> n:143 var +R69011:69016 riscv <> _s108_ def +R69018:69021 riscv <> _s3_:133 var +R69172:69175 Coq.Init.Datatypes <> Some constr +R69326:69332 Sail.Prompt_monad <> returnm def +R69335:69338 Coq.Init.Datatypes <> Some constr +R69494:69494 Coq.Init.Datatypes <> ::core_scope:'('_x_','_x_','_'..'_','_x_')' not +R69669:69670 Coq.Init.Datatypes <> ::core_scope:'('_x_','_x_','_'..'_','_x_')' not +R70095:70095 Coq.Init.Datatypes <> ::core_scope:'('_x_','_x_','_'..'_','_x_')' not +R69662:69666 Sail.Values <> mword def +R69495:69496 bbv.HexNotationWord <> :::'''b'_x not +R69671:69678 Sail.Values <> build_ex def +R69849:69854 Coq.Init.Specif <> projT1 def +R70028:70034 Sail.Values <> sub_nat def +R70067:70072 Coq.Init.Specif <> projT1 def +R70075:70087 Sail.String <> string_length def +R70037:70042 Coq.Init.Specif <> projT1 def +R70045:70057 Sail.String <> string_length def +R70059:70062 riscv <> arg_:131 var +R70257:70257 riscv_types <> M def +R70260:70265 Coq.Init.Datatypes <> option ind +R70276:70278 Coq.Init.Datatypes <> ::type_scope:x_'*'_x not +R70269:70273 Sail.Values <> mword def +R70279:70279 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R70281:70283 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R70285:70287 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R70307:70307 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R70284:70284 Coq.Numbers.BinNums <> Z ind +binder 70280:70280 <> n:144 +R70288:70296 Sail.Values <> ArithFact class +R70300:70304 Coq.ZArith.BinInt <> ::Z_scope:x_'>=?'_x not +R70299:70299 riscv <> n:144 var +R70246:70249 Sail.Prompt_monad <> exit def +R70251:70252 Coq.Init.Datatypes <> tt constr +R68602:68602 riscv_types <> M def +R68605:68610 Coq.Init.Datatypes <> option ind +R68621:68623 Coq.Init.Datatypes <> ::type_scope:x_'*'_x not +R68614:68618 Sail.Values <> mword def +R68624:68624 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R68626:68628 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R68630:68632 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R68652:68652 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R68629:68629 Coq.Numbers.BinNums <> Z ind +binder 68625:68625 <> n:145 +R68633:68641 Sail.Values <> ArithFact class +R68645:68649 Coq.ZArith.BinInt <> ::Z_scope:x_'>=?'_x not +R68644:68644 riscv <> n:145 var +R67058:67063 riscv <> _s104_ def +R67065:67068 riscv <> _s3_:133 var +R67214:67217 Coq.Init.Datatypes <> Some constr +R67363:67369 Sail.Prompt_monad <> returnm def +R67372:67375 Coq.Init.Datatypes <> Some constr +R67526:67526 Coq.Init.Datatypes <> ::core_scope:'('_x_','_x_','_'..'_','_x_')' not +R67696:67697 Coq.Init.Datatypes <> ::core_scope:'('_x_','_x_','_'..'_','_x_')' not +R68112:68112 Coq.Init.Datatypes <> ::core_scope:'('_x_','_x_','_'..'_','_x_')' not +R67689:67693 Sail.Values <> mword def +R67527:67528 bbv.HexNotationWord <> :::'''b'_x not +R67698:67705 Sail.Values <> build_ex def +R67871:67876 Coq.Init.Specif <> projT1 def +R68045:68051 Sail.Values <> sub_nat def +R68084:68089 Coq.Init.Specif <> projT1 def +R68092:68104 Sail.String <> string_length def +R68054:68059 Coq.Init.Specif <> projT1 def +R68062:68074 Sail.String <> string_length def +R68076:68079 riscv <> arg_:131 var +R68269:68269 riscv_types <> M def +R68272:68277 Coq.Init.Datatypes <> option ind +R68288:68290 Coq.Init.Datatypes <> ::type_scope:x_'*'_x not +R68281:68285 Sail.Values <> mword def +R68291:68291 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R68293:68295 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R68297:68299 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R68319:68319 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R68296:68296 Coq.Numbers.BinNums <> Z ind +binder 68292:68292 <> n:146 +R68300:68308 Sail.Values <> ArithFact class +R68312:68316 Coq.ZArith.BinInt <> ::Z_scope:x_'>=?'_x not +R68311:68311 riscv <> n:146 var +R68258:68261 Sail.Prompt_monad <> exit def +R68263:68264 Coq.Init.Datatypes <> tt constr +R66659:66659 riscv_types <> M def +R66662:66667 Coq.Init.Datatypes <> option ind +R66678:66680 Coq.Init.Datatypes <> ::type_scope:x_'*'_x not +R66671:66675 Sail.Values <> mword def +R66681:66681 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R66683:66685 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R66687:66689 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R66709:66709 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R66686:66686 Coq.Numbers.BinNums <> Z ind +binder 66682:66682 <> n:147 +R66690:66698 Sail.Values <> ArithFact class +R66702:66706 Coq.ZArith.BinInt <> ::Z_scope:x_'>=?'_x not +R66701:66701 riscv <> n:147 var +R65160:65165 riscv <> _s100_ def +R65167:65170 riscv <> _s3_:133 var +R65311:65314 Coq.Init.Datatypes <> Some constr +R65455:65461 Sail.Prompt_monad <> returnm def +R65464:65467 Coq.Init.Datatypes <> Some constr +R65613:65613 Coq.Init.Datatypes <> ::core_scope:'('_x_','_x_','_'..'_','_x_')' not +R65778:65779 Coq.Init.Datatypes <> ::core_scope:'('_x_','_x_','_'..'_','_x_')' not +R66184:66184 Coq.Init.Datatypes <> ::core_scope:'('_x_','_x_','_'..'_','_x_')' not +R65771:65775 Sail.Values <> mword def +R65614:65615 bbv.HexNotationWord <> :::'''b'_x not +R65780:65787 Sail.Values <> build_ex def +R65948:65953 Coq.Init.Specif <> projT1 def +R66117:66123 Sail.Values <> sub_nat def +R66156:66161 Coq.Init.Specif <> projT1 def +R66164:66176 Sail.String <> string_length def +R66126:66131 Coq.Init.Specif <> projT1 def +R66134:66146 Sail.String <> string_length def +R66148:66151 riscv <> arg_:131 var +R66336:66336 riscv_types <> M def +R66339:66344 Coq.Init.Datatypes <> option ind +R66355:66357 Coq.Init.Datatypes <> ::type_scope:x_'*'_x not +R66348:66352 Sail.Values <> mword def +R66358:66358 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R66360:66362 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R66364:66366 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R66386:66386 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R66363:66363 Coq.Numbers.BinNums <> Z ind +binder 66359:66359 <> n:148 +R66367:66375 Sail.Values <> ArithFact class +R66379:66383 Coq.ZArith.BinInt <> ::Z_scope:x_'>=?'_x not +R66378:66378 riscv <> n:148 var +R66325:66328 Sail.Prompt_monad <> exit def +R66330:66331 Coq.Init.Datatypes <> tt constr +R64771:64771 riscv_types <> M def +R64774:64779 Coq.Init.Datatypes <> option ind +R64790:64792 Coq.Init.Datatypes <> ::type_scope:x_'*'_x not +R64783:64787 Sail.Values <> mword def +R64793:64793 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R64795:64797 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R64799:64801 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R64821:64821 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R64798:64798 Coq.Numbers.BinNums <> Z ind +binder 64794:64794 <> n:149 +R64802:64810 Sail.Values <> ArithFact class +R64814:64818 Coq.ZArith.BinInt <> ::Z_scope:x_'>=?'_x not +R64813:64813 riscv <> n:149 var +R63318:63322 riscv <> _s96_ def +R63324:63327 riscv <> _s3_:133 var +R63463:63466 Coq.Init.Datatypes <> Some constr +R63602:63608 Sail.Prompt_monad <> returnm def +R63611:63614 Coq.Init.Datatypes <> Some constr +R63755:63755 Coq.Init.Datatypes <> ::core_scope:'('_x_','_x_','_'..'_','_x_')' not +R63915:63916 Coq.Init.Datatypes <> ::core_scope:'('_x_','_x_','_'..'_','_x_')' not +R64311:64311 Coq.Init.Datatypes <> ::core_scope:'('_x_','_x_','_'..'_','_x_')' not +R63908:63912 Sail.Values <> mword def +R63756:63757 bbv.HexNotationWord <> :::'''b'_x not +R63917:63924 Sail.Values <> build_ex def +R64080:64085 Coq.Init.Specif <> projT1 def +R64244:64250 Sail.Values <> sub_nat def +R64283:64288 Coq.Init.Specif <> projT1 def +R64291:64303 Sail.String <> string_length def +R64253:64258 Coq.Init.Specif <> projT1 def +R64261:64273 Sail.String <> string_length def +R64275:64278 riscv <> arg_:131 var +R64458:64458 riscv_types <> M def +R64461:64466 Coq.Init.Datatypes <> option ind +R64477:64479 Coq.Init.Datatypes <> ::type_scope:x_'*'_x not +R64470:64474 Sail.Values <> mword def +R64480:64480 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R64482:64484 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R64486:64488 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R64508:64508 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R64485:64485 Coq.Numbers.BinNums <> Z ind +binder 64481:64481 <> n:150 +R64489:64497 Sail.Values <> ArithFact class +R64501:64505 Coq.ZArith.BinInt <> ::Z_scope:x_'>=?'_x not +R64500:64500 riscv <> n:150 var +R64447:64450 Sail.Prompt_monad <> exit def +R64452:64453 Coq.Init.Datatypes <> tt constr +R62940:62940 riscv_types <> M def +R62943:62948 Coq.Init.Datatypes <> option ind +R62959:62961 Coq.Init.Datatypes <> ::type_scope:x_'*'_x not +R62952:62956 Sail.Values <> mword def +R62962:62962 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R62964:62966 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R62968:62970 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R62990:62990 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R62967:62967 Coq.Numbers.BinNums <> Z ind +binder 62963:62963 <> n:151 +R62971:62979 Sail.Values <> ArithFact class +R62983:62987 Coq.ZArith.BinInt <> ::Z_scope:x_'>=?'_x not +R62982:62982 riscv <> n:151 var +R61532:61536 riscv <> _s92_ def +R61538:61541 riscv <> _s3_:133 var +R61672:61675 Coq.Init.Datatypes <> Some constr +R61806:61812 Sail.Prompt_monad <> returnm def +R61815:61818 Coq.Init.Datatypes <> Some constr +R61954:61954 Coq.Init.Datatypes <> ::core_scope:'('_x_','_x_','_'..'_','_x_')' not +R62109:62110 Coq.Init.Datatypes <> ::core_scope:'('_x_','_x_','_'..'_','_x_')' not +R62495:62495 Coq.Init.Datatypes <> ::core_scope:'('_x_','_x_','_'..'_','_x_')' not +R62102:62106 Sail.Values <> mword def +R61955:61956 bbv.HexNotationWord <> :::'''b'_x not +R62111:62118 Sail.Values <> build_ex def +R62269:62274 Coq.Init.Specif <> projT1 def +R62428:62434 Sail.Values <> sub_nat def +R62467:62472 Coq.Init.Specif <> projT1 def +R62475:62487 Sail.String <> string_length def +R62437:62442 Coq.Init.Specif <> projT1 def +R62445:62457 Sail.String <> string_length def +R62459:62462 riscv <> arg_:131 var +R62637:62637 riscv_types <> M def +R62640:62645 Coq.Init.Datatypes <> option ind +R62656:62658 Coq.Init.Datatypes <> ::type_scope:x_'*'_x not +R62649:62653 Sail.Values <> mword def +R62659:62659 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R62661:62663 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R62665:62667 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R62687:62687 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R62664:62664 Coq.Numbers.BinNums <> Z ind +binder 62660:62660 <> n:152 +R62668:62676 Sail.Values <> ArithFact class +R62680:62684 Coq.ZArith.BinInt <> ::Z_scope:x_'>=?'_x not +R62679:62679 riscv <> n:152 var +R62626:62629 Sail.Prompt_monad <> exit def +R62631:62632 Coq.Init.Datatypes <> tt constr +R61164:61164 riscv_types <> M def +R61167:61172 Coq.Init.Datatypes <> option ind +R61183:61185 Coq.Init.Datatypes <> ::type_scope:x_'*'_x not +R61176:61180 Sail.Values <> mword def +R61186:61186 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R61188:61190 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R61192:61194 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R61214:61214 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R61191:61191 Coq.Numbers.BinNums <> Z ind +binder 61187:61187 <> n:153 +R61195:61203 Sail.Values <> ArithFact class +R61207:61211 Coq.ZArith.BinInt <> ::Z_scope:x_'>=?'_x not +R61206:61206 riscv <> n:153 var +R59801:59805 riscv <> _s88_ def +R59807:59810 riscv <> _s3_:133 var +R59936:59939 Coq.Init.Datatypes <> Some constr +R60065:60071 Sail.Prompt_monad <> returnm def +R60074:60077 Coq.Init.Datatypes <> Some constr +R60208:60208 Coq.Init.Datatypes <> ::core_scope:'('_x_','_x_','_'..'_','_x_')' not +R60358:60359 Coq.Init.Datatypes <> ::core_scope:'('_x_','_x_','_'..'_','_x_')' not +R60734:60734 Coq.Init.Datatypes <> ::core_scope:'('_x_','_x_','_'..'_','_x_')' not +R60351:60355 Sail.Values <> mword def +R60209:60210 bbv.HexNotationWord <> :::'''b'_x not +R60360:60367 Sail.Values <> build_ex def +R60513:60518 Coq.Init.Specif <> projT1 def +R60667:60673 Sail.Values <> sub_nat def +R60706:60711 Coq.Init.Specif <> projT1 def +R60714:60726 Sail.String <> string_length def +R60676:60681 Coq.Init.Specif <> projT1 def +R60684:60696 Sail.String <> string_length def +R60698:60701 riscv <> arg_:131 var +R60871:60871 riscv_types <> M def +R60874:60879 Coq.Init.Datatypes <> option ind +R60890:60892 Coq.Init.Datatypes <> ::type_scope:x_'*'_x not +R60883:60887 Sail.Values <> mword def +R60893:60893 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R60895:60897 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R60899:60901 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R60921:60921 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R60898:60898 Coq.Numbers.BinNums <> Z ind +binder 60894:60894 <> n:154 +R60902:60910 Sail.Values <> ArithFact class +R60914:60918 Coq.ZArith.BinInt <> ::Z_scope:x_'>=?'_x not +R60913:60913 riscv <> n:154 var +R60860:60863 Sail.Prompt_monad <> exit def +R60865:60866 Coq.Init.Datatypes <> tt constr +R59443:59443 riscv_types <> M def +R59446:59451 Coq.Init.Datatypes <> option ind +R59462:59464 Coq.Init.Datatypes <> ::type_scope:x_'*'_x not +R59455:59459 Sail.Values <> mword def +R59465:59465 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R59467:59469 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R59471:59473 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R59493:59493 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R59470:59470 Coq.Numbers.BinNums <> Z ind +binder 59466:59466 <> n:155 +R59474:59482 Sail.Values <> ArithFact class +R59486:59490 Coq.ZArith.BinInt <> ::Z_scope:x_'>=?'_x not +R59485:59485 riscv <> n:155 var +R58125:58129 riscv <> _s84_ def +R58131:58134 riscv <> _s3_:133 var +R58255:58258 Coq.Init.Datatypes <> Some constr +R58379:58385 Sail.Prompt_monad <> returnm def +R58388:58391 Coq.Init.Datatypes <> Some constr +R58517:58517 Coq.Init.Datatypes <> ::core_scope:'('_x_','_x_','_'..'_','_x_')' not +R58662:58663 Coq.Init.Datatypes <> ::core_scope:'('_x_','_x_','_'..'_','_x_')' not +R59028:59028 Coq.Init.Datatypes <> ::core_scope:'('_x_','_x_','_'..'_','_x_')' not +R58655:58659 Sail.Values <> mword def +R58518:58519 bbv.HexNotationWord <> :::'''b'_x not +R58664:58671 Sail.Values <> build_ex def +R58812:58817 Coq.Init.Specif <> projT1 def +R58961:58967 Sail.Values <> sub_nat def +R59000:59005 Coq.Init.Specif <> projT1 def +R59008:59020 Sail.String <> string_length def +R58970:58975 Coq.Init.Specif <> projT1 def +R58978:58990 Sail.String <> string_length def +R58992:58995 riscv <> arg_:131 var +R59160:59160 riscv_types <> M def +R59163:59168 Coq.Init.Datatypes <> option ind +R59179:59181 Coq.Init.Datatypes <> ::type_scope:x_'*'_x not +R59172:59176 Sail.Values <> mword def +R59182:59182 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R59184:59186 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R59188:59190 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R59210:59210 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R59187:59187 Coq.Numbers.BinNums <> Z ind +binder 59183:59183 <> n:156 +R59191:59199 Sail.Values <> ArithFact class +R59203:59207 Coq.ZArith.BinInt <> ::Z_scope:x_'>=?'_x not +R59202:59202 riscv <> n:156 var +R59149:59152 Sail.Prompt_monad <> exit def +R59154:59155 Coq.Init.Datatypes <> tt constr +R57777:57777 riscv_types <> M def +R57780:57785 Coq.Init.Datatypes <> option ind +R57796:57798 Coq.Init.Datatypes <> ::type_scope:x_'*'_x not +R57789:57793 Sail.Values <> mword def +R57799:57799 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R57801:57803 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R57805:57807 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R57827:57827 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R57804:57804 Coq.Numbers.BinNums <> Z ind +binder 57800:57800 <> n:157 +R57808:57816 Sail.Values <> ArithFact class +R57820:57824 Coq.ZArith.BinInt <> ::Z_scope:x_'>=?'_x not +R57819:57819 riscv <> n:157 var +R56504:56508 riscv <> _s80_ def +R56510:56513 riscv <> _s3_:133 var +R56629:56632 Coq.Init.Datatypes <> Some constr +R56748:56754 Sail.Prompt_monad <> returnm def +R56757:56760 Coq.Init.Datatypes <> Some constr +R56881:56881 Coq.Init.Datatypes <> ::core_scope:'('_x_','_x_','_'..'_','_x_')' not +R57021:57022 Coq.Init.Datatypes <> ::core_scope:'('_x_','_x_','_'..'_','_x_')' not +R57377:57377 Coq.Init.Datatypes <> ::core_scope:'('_x_','_x_','_'..'_','_x_')' not +R57014:57018 Sail.Values <> mword def +R56882:56883 bbv.HexNotationWord <> :::'''b'_x not +R57023:57030 Sail.Values <> build_ex def +R57166:57171 Coq.Init.Specif <> projT1 def +R57310:57316 Sail.Values <> sub_nat def +R57349:57354 Coq.Init.Specif <> projT1 def +R57357:57369 Sail.String <> string_length def +R57319:57324 Coq.Init.Specif <> projT1 def +R57327:57339 Sail.String <> string_length def +R57341:57344 riscv <> arg_:131 var +R57504:57504 riscv_types <> M def +R57507:57512 Coq.Init.Datatypes <> option ind +R57523:57525 Coq.Init.Datatypes <> ::type_scope:x_'*'_x not +R57516:57520 Sail.Values <> mword def +R57526:57526 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R57528:57530 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R57532:57534 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R57554:57554 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R57531:57531 Coq.Numbers.BinNums <> Z ind +binder 57527:57527 <> n:158 +R57535:57543 Sail.Values <> ArithFact class +R57547:57551 Coq.ZArith.BinInt <> ::Z_scope:x_'>=?'_x not +R57546:57546 riscv <> n:158 var +R57493:57496 Sail.Prompt_monad <> exit def +R57498:57499 Coq.Init.Datatypes <> tt constr +R56166:56166 riscv_types <> M def +R56169:56174 Coq.Init.Datatypes <> option ind +R56185:56187 Coq.Init.Datatypes <> ::type_scope:x_'*'_x not +R56178:56182 Sail.Values <> mword def +R56188:56188 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R56190:56192 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R56194:56196 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R56216:56216 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R56193:56193 Coq.Numbers.BinNums <> Z ind +binder 56189:56189 <> n:159 +R56197:56205 Sail.Values <> ArithFact class +R56209:56213 Coq.ZArith.BinInt <> ::Z_scope:x_'>=?'_x not +R56208:56208 riscv <> n:159 var +R54938:54942 riscv <> _s76_ def +R54944:54947 riscv <> _s3_:133 var +R55058:55061 Coq.Init.Datatypes <> Some constr +R55172:55178 Sail.Prompt_monad <> returnm def +R55181:55184 Coq.Init.Datatypes <> Some constr +R55300:55300 Coq.Init.Datatypes <> ::core_scope:'('_x_','_x_','_'..'_','_x_')' not +R55435:55436 Coq.Init.Datatypes <> ::core_scope:'('_x_','_x_','_'..'_','_x_')' not +R55781:55781 Coq.Init.Datatypes <> ::core_scope:'('_x_','_x_','_'..'_','_x_')' not +R55428:55432 Sail.Values <> mword def +R55301:55302 bbv.HexNotationWord <> :::'''b'_x not +R55437:55444 Sail.Values <> build_ex def +R55575:55580 Coq.Init.Specif <> projT1 def +R55714:55720 Sail.Values <> sub_nat def +R55753:55758 Coq.Init.Specif <> projT1 def +R55761:55773 Sail.String <> string_length def +R55723:55728 Coq.Init.Specif <> projT1 def +R55731:55743 Sail.String <> string_length def +R55745:55748 riscv <> arg_:131 var +R55903:55903 riscv_types <> M def +R55906:55911 Coq.Init.Datatypes <> option ind +R55922:55924 Coq.Init.Datatypes <> ::type_scope:x_'*'_x not +R55915:55919 Sail.Values <> mword def +R55925:55925 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R55927:55929 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R55931:55933 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R55953:55953 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R55930:55930 Coq.Numbers.BinNums <> Z ind +binder 55926:55926 <> n:160 +R55934:55942 Sail.Values <> ArithFact class +R55946:55950 Coq.ZArith.BinInt <> ::Z_scope:x_'>=?'_x not +R55945:55945 riscv <> n:160 var +R55892:55895 Sail.Prompt_monad <> exit def +R55897:55898 Coq.Init.Datatypes <> tt constr +R54610:54610 riscv_types <> M def +R54613:54618 Coq.Init.Datatypes <> option ind +R54629:54631 Coq.Init.Datatypes <> ::type_scope:x_'*'_x not +R54622:54626 Sail.Values <> mword def +R54632:54632 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R54634:54636 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R54638:54640 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R54660:54660 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R54637:54637 Coq.Numbers.BinNums <> Z ind +binder 54633:54633 <> n:161 +R54641:54649 Sail.Values <> ArithFact class +R54653:54657 Coq.ZArith.BinInt <> ::Z_scope:x_'>=?'_x not +R54652:54652 riscv <> n:161 var +R53427:53431 riscv <> _s72_ def +R53433:53436 riscv <> _s3_:133 var +R53542:53545 Coq.Init.Datatypes <> Some constr +R53651:53657 Sail.Prompt_monad <> returnm def +R53660:53663 Coq.Init.Datatypes <> Some constr +R53774:53774 Coq.Init.Datatypes <> ::core_scope:'('_x_','_x_','_'..'_','_x_')' not +R53904:53905 Coq.Init.Datatypes <> ::core_scope:'('_x_','_x_','_'..'_','_x_')' not +R54240:54240 Coq.Init.Datatypes <> ::core_scope:'('_x_','_x_','_'..'_','_x_')' not +R53897:53901 Sail.Values <> mword def +R53775:53776 bbv.HexNotationWord <> :::'''b'_x not +R53906:53913 Sail.Values <> build_ex def +R54039:54044 Coq.Init.Specif <> projT1 def +R54173:54179 Sail.Values <> sub_nat def +R54212:54217 Coq.Init.Specif <> projT1 def +R54220:54232 Sail.String <> string_length def +R54182:54187 Coq.Init.Specif <> projT1 def +R54190:54202 Sail.String <> string_length def +R54204:54207 riscv <> arg_:131 var +R54357:54357 riscv_types <> M def +R54360:54365 Coq.Init.Datatypes <> option ind +R54376:54378 Coq.Init.Datatypes <> ::type_scope:x_'*'_x not +R54369:54373 Sail.Values <> mword def +R54379:54379 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R54381:54383 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R54385:54387 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R54407:54407 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R54384:54384 Coq.Numbers.BinNums <> Z ind +binder 54380:54380 <> n:162 +R54388:54396 Sail.Values <> ArithFact class +R54400:54404 Coq.ZArith.BinInt <> ::Z_scope:x_'>=?'_x not +R54399:54399 riscv <> n:162 var +R54346:54349 Sail.Prompt_monad <> exit def +R54351:54352 Coq.Init.Datatypes <> tt constr +R53109:53109 riscv_types <> M def +R53112:53117 Coq.Init.Datatypes <> option ind +R53128:53130 Coq.Init.Datatypes <> ::type_scope:x_'*'_x not +R53121:53125 Sail.Values <> mword def +R53131:53131 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R53133:53135 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R53137:53139 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R53159:53159 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R53136:53136 Coq.Numbers.BinNums <> Z ind +binder 53132:53132 <> n:163 +R53140:53148 Sail.Values <> ArithFact class +R53152:53156 Coq.ZArith.BinInt <> ::Z_scope:x_'>=?'_x not +R53151:53151 riscv <> n:163 var +R51971:51975 riscv <> _s68_ def +R51977:51980 riscv <> _s3_:133 var +R52081:52084 Coq.Init.Datatypes <> Some constr +R52185:52191 Sail.Prompt_monad <> returnm def +R52194:52197 Coq.Init.Datatypes <> Some constr +R52303:52303 Coq.Init.Datatypes <> ::core_scope:'('_x_','_x_','_'..'_','_x_')' not +R52428:52429 Coq.Init.Datatypes <> ::core_scope:'('_x_','_x_','_'..'_','_x_')' not +R52754:52754 Coq.Init.Datatypes <> ::core_scope:'('_x_','_x_','_'..'_','_x_')' not +R52421:52425 Sail.Values <> mword def +R52304:52305 bbv.HexNotationWord <> :::'''b'_x not +R52430:52437 Sail.Values <> build_ex def +R52558:52563 Coq.Init.Specif <> projT1 def +R52687:52693 Sail.Values <> sub_nat def +R52726:52731 Coq.Init.Specif <> projT1 def +R52734:52746 Sail.String <> string_length def +R52696:52701 Coq.Init.Specif <> projT1 def +R52704:52716 Sail.String <> string_length def +R52718:52721 riscv <> arg_:131 var +R52866:52866 riscv_types <> M def +R52869:52874 Coq.Init.Datatypes <> option ind +R52885:52887 Coq.Init.Datatypes <> ::type_scope:x_'*'_x not +R52878:52882 Sail.Values <> mword def +R52888:52888 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R52890:52892 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R52894:52896 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R52916:52916 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R52893:52893 Coq.Numbers.BinNums <> Z ind +binder 52889:52889 <> n:164 +R52897:52905 Sail.Values <> ArithFact class +R52909:52913 Coq.ZArith.BinInt <> ::Z_scope:x_'>=?'_x not +R52908:52908 riscv <> n:164 var +R52855:52858 Sail.Prompt_monad <> exit def +R52860:52861 Coq.Init.Datatypes <> tt constr +R51663:51663 riscv_types <> M def +R51666:51671 Coq.Init.Datatypes <> option ind +R51682:51684 Coq.Init.Datatypes <> ::type_scope:x_'*'_x not +R51675:51679 Sail.Values <> mword def +R51685:51685 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R51687:51689 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R51691:51693 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R51713:51713 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R51690:51690 Coq.Numbers.BinNums <> Z ind +binder 51686:51686 <> n:165 +R51694:51702 Sail.Values <> ArithFact class +R51706:51710 Coq.ZArith.BinInt <> ::Z_scope:x_'>=?'_x not +R51705:51705 riscv <> n:165 var +R50570:50574 riscv <> _s64_ def +R50576:50579 riscv <> _s3_:133 var +R50675:50678 Coq.Init.Datatypes <> Some constr +R50774:50780 Sail.Prompt_monad <> returnm def +R50783:50786 Coq.Init.Datatypes <> Some constr +R50887:50887 Coq.Init.Datatypes <> ::core_scope:'('_x_','_x_','_'..'_','_x_')' not +R51007:51008 Coq.Init.Datatypes <> ::core_scope:'('_x_','_x_','_'..'_','_x_')' not +R51323:51323 Coq.Init.Datatypes <> ::core_scope:'('_x_','_x_','_'..'_','_x_')' not +R51000:51004 Sail.Values <> mword def +R50888:50889 bbv.HexNotationWord <> :::'''b'_x not +R51009:51016 Sail.Values <> build_ex def +R51132:51137 Coq.Init.Specif <> projT1 def +R51256:51262 Sail.Values <> sub_nat def +R51295:51300 Coq.Init.Specif <> projT1 def +R51303:51315 Sail.String <> string_length def +R51265:51270 Coq.Init.Specif <> projT1 def +R51273:51285 Sail.String <> string_length def +R51287:51290 riscv <> arg_:131 var +R51430:51430 riscv_types <> M def +R51433:51438 Coq.Init.Datatypes <> option ind +R51449:51451 Coq.Init.Datatypes <> ::type_scope:x_'*'_x not +R51442:51446 Sail.Values <> mword def +R51452:51452 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R51454:51456 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R51458:51460 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R51480:51480 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R51457:51457 Coq.Numbers.BinNums <> Z ind +binder 51453:51453 <> n:166 +R51461:51469 Sail.Values <> ArithFact class +R51473:51477 Coq.ZArith.BinInt <> ::Z_scope:x_'>=?'_x not +R51472:51472 riscv <> n:166 var +R51419:51422 Sail.Prompt_monad <> exit def +R51424:51425 Coq.Init.Datatypes <> tt constr +R50272:50272 riscv_types <> M def +R50275:50280 Coq.Init.Datatypes <> option ind +R50291:50293 Coq.Init.Datatypes <> ::type_scope:x_'*'_x not +R50284:50288 Sail.Values <> mword def +R50294:50294 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R50296:50298 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R50300:50302 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R50322:50322 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R50299:50299 Coq.Numbers.BinNums <> Z ind +binder 50295:50295 <> n:167 +R50303:50311 Sail.Values <> ArithFact class +R50315:50319 Coq.ZArith.BinInt <> ::Z_scope:x_'>=?'_x not +R50314:50314 riscv <> n:167 var +R49224:49228 riscv <> _s60_ def +R49230:49233 riscv <> _s3_:133 var +R49324:49327 Coq.Init.Datatypes <> Some constr +R49418:49424 Sail.Prompt_monad <> returnm def +R49427:49430 Coq.Init.Datatypes <> Some constr +R49526:49526 Coq.Init.Datatypes <> ::core_scope:'('_x_','_x_','_'..'_','_x_')' not +R49641:49642 Coq.Init.Datatypes <> ::core_scope:'('_x_','_x_','_'..'_','_x_')' not +R49947:49947 Coq.Init.Datatypes <> ::core_scope:'('_x_','_x_','_'..'_','_x_')' not +R49634:49638 Sail.Values <> mword def +R49527:49528 bbv.HexNotationWord <> :::'''b'_x not +R49643:49650 Sail.Values <> build_ex def +R49761:49766 Coq.Init.Specif <> projT1 def +R49880:49886 Sail.Values <> sub_nat def +R49919:49924 Coq.Init.Specif <> projT1 def +R49927:49939 Sail.String <> string_length def +R49889:49894 Coq.Init.Specif <> projT1 def +R49897:49909 Sail.String <> string_length def +R49911:49914 riscv <> arg_:131 var +R50049:50049 riscv_types <> M def +R50052:50057 Coq.Init.Datatypes <> option ind +R50068:50070 Coq.Init.Datatypes <> ::type_scope:x_'*'_x not +R50061:50065 Sail.Values <> mword def +R50071:50071 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R50073:50075 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R50077:50079 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R50099:50099 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R50076:50076 Coq.Numbers.BinNums <> Z ind +binder 50072:50072 <> n:168 +R50080:50088 Sail.Values <> ArithFact class +R50092:50096 Coq.ZArith.BinInt <> ::Z_scope:x_'>=?'_x not +R50091:50091 riscv <> n:168 var +R50038:50041 Sail.Prompt_monad <> exit def +R50043:50044 Coq.Init.Datatypes <> tt constr +R48936:48936 riscv_types <> M def +R48939:48944 Coq.Init.Datatypes <> option ind +R48955:48957 Coq.Init.Datatypes <> ::type_scope:x_'*'_x not +R48948:48952 Sail.Values <> mword def +R48958:48958 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R48960:48962 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R48964:48966 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R48986:48986 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R48963:48963 Coq.Numbers.BinNums <> Z ind +binder 48959:48959 <> n:169 +R48967:48975 Sail.Values <> ArithFact class +R48979:48983 Coq.ZArith.BinInt <> ::Z_scope:x_'>=?'_x not +R48978:48978 riscv <> n:169 var +R47933:47937 riscv <> _s56_ def +R47939:47942 riscv <> _s3_:133 var +R48028:48031 Coq.Init.Datatypes <> Some constr +R48117:48123 Sail.Prompt_monad <> returnm def +R48126:48129 Coq.Init.Datatypes <> Some constr +R48220:48220 Coq.Init.Datatypes <> ::core_scope:'('_x_','_x_','_'..'_','_x_')' not +R48330:48331 Coq.Init.Datatypes <> ::core_scope:'('_x_','_x_','_'..'_','_x_')' not +R48626:48626 Coq.Init.Datatypes <> ::core_scope:'('_x_','_x_','_'..'_','_x_')' not +R48323:48327 Sail.Values <> mword def +R48221:48222 bbv.HexNotationWord <> :::'''b'_x not +R48332:48339 Sail.Values <> build_ex def +R48445:48450 Coq.Init.Specif <> projT1 def +R48559:48565 Sail.Values <> sub_nat def +R48598:48603 Coq.Init.Specif <> projT1 def +R48606:48618 Sail.String <> string_length def +R48568:48573 Coq.Init.Specif <> projT1 def +R48576:48588 Sail.String <> string_length def +R48590:48593 riscv <> arg_:131 var +R48723:48723 riscv_types <> M def +R48726:48731 Coq.Init.Datatypes <> option ind +R48742:48744 Coq.Init.Datatypes <> ::type_scope:x_'*'_x not +R48735:48739 Sail.Values <> mword def +R48745:48745 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R48747:48749 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R48751:48753 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R48773:48773 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R48750:48750 Coq.Numbers.BinNums <> Z ind +binder 48746:48746 <> n:170 +R48754:48762 Sail.Values <> ArithFact class +R48766:48770 Coq.ZArith.BinInt <> ::Z_scope:x_'>=?'_x not +R48765:48765 riscv <> n:170 var +R48712:48715 Sail.Prompt_monad <> exit def +R48717:48718 Coq.Init.Datatypes <> tt constr +R47655:47655 riscv_types <> M def +R47658:47663 Coq.Init.Datatypes <> option ind +R47674:47676 Coq.Init.Datatypes <> ::type_scope:x_'*'_x not +R47667:47671 Sail.Values <> mword def +R47677:47677 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R47679:47681 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R47683:47685 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R47705:47705 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R47682:47682 Coq.Numbers.BinNums <> Z ind +binder 47678:47678 <> n:171 +R47686:47694 Sail.Values <> ArithFact class +R47698:47702 Coq.ZArith.BinInt <> ::Z_scope:x_'>=?'_x not +R47697:47697 riscv <> n:171 var +R46697:46701 riscv <> _s52_ def +R46703:46706 riscv <> _s3_:133 var +R46787:46790 Coq.Init.Datatypes <> Some constr +R46871:46877 Sail.Prompt_monad <> returnm def +R46880:46883 Coq.Init.Datatypes <> Some constr +R46969:46969 Coq.Init.Datatypes <> ::core_scope:'('_x_','_x_','_'..'_','_x_')' not +R47074:47075 Coq.Init.Datatypes <> ::core_scope:'('_x_','_x_','_'..'_','_x_')' not +R47360:47360 Coq.Init.Datatypes <> ::core_scope:'('_x_','_x_','_'..'_','_x_')' not +R47067:47071 Sail.Values <> mword def +R46970:46971 bbv.HexNotationWord <> :::'''b'_x not +R47076:47083 Sail.Values <> build_ex def +R47184:47189 Coq.Init.Specif <> projT1 def +R47293:47299 Sail.Values <> sub_nat def +R47332:47337 Coq.Init.Specif <> projT1 def +R47340:47352 Sail.String <> string_length def +R47302:47307 Coq.Init.Specif <> projT1 def +R47310:47322 Sail.String <> string_length def +R47324:47327 riscv <> arg_:131 var +R47452:47452 riscv_types <> M def +R47455:47460 Coq.Init.Datatypes <> option ind +R47471:47473 Coq.Init.Datatypes <> ::type_scope:x_'*'_x not +R47464:47468 Sail.Values <> mword def +R47474:47474 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R47476:47478 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R47480:47482 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R47502:47502 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R47479:47479 Coq.Numbers.BinNums <> Z ind +binder 47475:47475 <> n:172 +R47483:47491 Sail.Values <> ArithFact class +R47495:47499 Coq.ZArith.BinInt <> ::Z_scope:x_'>=?'_x not +R47494:47494 riscv <> n:172 var +R47441:47444 Sail.Prompt_monad <> exit def +R47446:47447 Coq.Init.Datatypes <> tt constr +R46429:46429 riscv_types <> M def +R46432:46437 Coq.Init.Datatypes <> option ind +R46448:46450 Coq.Init.Datatypes <> ::type_scope:x_'*'_x not +R46441:46445 Sail.Values <> mword def +R46451:46451 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R46453:46455 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R46457:46459 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R46479:46479 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R46456:46456 Coq.Numbers.BinNums <> Z ind +binder 46452:46452 <> n:173 +R46460:46468 Sail.Values <> ArithFact class +R46472:46476 Coq.ZArith.BinInt <> ::Z_scope:x_'>=?'_x not +R46471:46471 riscv <> n:173 var +R45516:45520 riscv <> _s48_ def +R45522:45525 riscv <> _s3_:133 var +R45601:45604 Coq.Init.Datatypes <> Some constr +R45680:45686 Sail.Prompt_monad <> returnm def +R45689:45692 Coq.Init.Datatypes <> Some constr +R45773:45773 Coq.Init.Datatypes <> ::core_scope:'('_x_','_x_','_'..'_','_x_')' not +R45873:45874 Coq.Init.Datatypes <> ::core_scope:'('_x_','_x_','_'..'_','_x_')' not +R46149:46149 Coq.Init.Datatypes <> ::core_scope:'('_x_','_x_','_'..'_','_x_')' not +R45866:45870 Sail.Values <> mword def +R45774:45775 bbv.HexNotationWord <> :::'''b'_x not +R45875:45882 Sail.Values <> build_ex def +R45978:45983 Coq.Init.Specif <> projT1 def +R46082:46088 Sail.Values <> sub_nat def +R46121:46126 Coq.Init.Specif <> projT1 def +R46129:46141 Sail.String <> string_length def +R46091:46096 Coq.Init.Specif <> projT1 def +R46099:46111 Sail.String <> string_length def +R46113:46116 riscv <> arg_:131 var +R46236:46236 riscv_types <> M def +R46239:46244 Coq.Init.Datatypes <> option ind +R46255:46257 Coq.Init.Datatypes <> ::type_scope:x_'*'_x not +R46248:46252 Sail.Values <> mword def +R46258:46258 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R46260:46262 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R46264:46266 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R46286:46286 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R46263:46263 Coq.Numbers.BinNums <> Z ind +binder 46259:46259 <> n:174 +R46267:46275 Sail.Values <> ArithFact class +R46279:46283 Coq.ZArith.BinInt <> ::Z_scope:x_'>=?'_x not +R46278:46278 riscv <> n:174 var +R46225:46228 Sail.Prompt_monad <> exit def +R46230:46231 Coq.Init.Datatypes <> tt constr +R45258:45258 riscv_types <> M def +R45261:45266 Coq.Init.Datatypes <> option ind +R45277:45279 Coq.Init.Datatypes <> ::type_scope:x_'*'_x not +R45270:45274 Sail.Values <> mword def +R45280:45280 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R45282:45284 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R45286:45288 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R45308:45308 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R45285:45285 Coq.Numbers.BinNums <> Z ind +binder 45281:45281 <> n:175 +R45289:45297 Sail.Values <> ArithFact class +R45301:45305 Coq.ZArith.BinInt <> ::Z_scope:x_'>=?'_x not +R45300:45300 riscv <> n:175 var +R44390:44394 riscv <> _s44_ def +R44396:44399 riscv <> _s3_:133 var +R44470:44473 Coq.Init.Datatypes <> Some constr +R44544:44550 Sail.Prompt_monad <> returnm def +R44553:44556 Coq.Init.Datatypes <> Some constr +R44632:44632 Coq.Init.Datatypes <> ::core_scope:'('_x_','_x_','_'..'_','_x_')' not +R44727:44728 Coq.Init.Datatypes <> ::core_scope:'('_x_','_x_','_'..'_','_x_')' not +R44993:44993 Coq.Init.Datatypes <> ::core_scope:'('_x_','_x_','_'..'_','_x_')' not +R44720:44724 Sail.Values <> mword def +R44633:44634 bbv.HexNotationWord <> :::'''b'_x not +R44729:44736 Sail.Values <> build_ex def +R44827:44832 Coq.Init.Specif <> projT1 def +R44926:44932 Sail.Values <> sub_nat def +R44965:44970 Coq.Init.Specif <> projT1 def +R44973:44985 Sail.String <> string_length def +R44935:44940 Coq.Init.Specif <> projT1 def +R44943:44955 Sail.String <> string_length def +R44957:44960 riscv <> arg_:131 var +R45075:45075 riscv_types <> M def +R45078:45083 Coq.Init.Datatypes <> option ind +R45094:45096 Coq.Init.Datatypes <> ::type_scope:x_'*'_x not +R45087:45091 Sail.Values <> mword def +R45097:45097 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R45099:45101 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R45103:45105 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R45125:45125 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R45102:45102 Coq.Numbers.BinNums <> Z ind +binder 45098:45098 <> n:176 +R45106:45114 Sail.Values <> ArithFact class +R45118:45122 Coq.ZArith.BinInt <> ::Z_scope:x_'>=?'_x not +R45117:45117 riscv <> n:176 var +R45064:45067 Sail.Prompt_monad <> exit def +R45069:45070 Coq.Init.Datatypes <> tt constr +R44142:44142 riscv_types <> M def +R44145:44150 Coq.Init.Datatypes <> option ind +R44161:44163 Coq.Init.Datatypes <> ::type_scope:x_'*'_x not +R44154:44158 Sail.Values <> mword def +R44164:44164 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R44166:44168 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R44170:44172 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R44192:44192 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R44169:44169 Coq.Numbers.BinNums <> Z ind +binder 44165:44165 <> n:177 +R44173:44181 Sail.Values <> ArithFact class +R44185:44189 Coq.ZArith.BinInt <> ::Z_scope:x_'>=?'_x not +R44184:44184 riscv <> n:177 var +R43319:43323 riscv <> _s40_ def +R43325:43328 riscv <> _s3_:133 var +R43394:43397 Coq.Init.Datatypes <> Some constr +R43463:43469 Sail.Prompt_monad <> returnm def +R43472:43475 Coq.Init.Datatypes <> Some constr +R43546:43546 Coq.Init.Datatypes <> ::core_scope:'('_x_','_x_','_'..'_','_x_')' not +R43636:43637 Coq.Init.Datatypes <> ::core_scope:'('_x_','_x_','_'..'_','_x_')' not +R43892:43892 Coq.Init.Datatypes <> ::core_scope:'('_x_','_x_','_'..'_','_x_')' not +R43629:43633 Sail.Values <> mword def +R43547:43548 bbv.HexNotationWord <> :::'''b'_x not +R43638:43645 Sail.Values <> build_ex def +R43731:43736 Coq.Init.Specif <> projT1 def +R43825:43831 Sail.Values <> sub_nat def +R43864:43869 Coq.Init.Specif <> projT1 def +R43872:43884 Sail.String <> string_length def +R43834:43839 Coq.Init.Specif <> projT1 def +R43842:43854 Sail.String <> string_length def +R43856:43859 riscv <> arg_:131 var +R43969:43969 riscv_types <> M def +R43972:43977 Coq.Init.Datatypes <> option ind +R43988:43990 Coq.Init.Datatypes <> ::type_scope:x_'*'_x not +R43981:43985 Sail.Values <> mword def +R43991:43991 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R43993:43995 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R43997:43999 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R44019:44019 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R43996:43996 Coq.Numbers.BinNums <> Z ind +binder 43992:43992 <> n:178 +R44000:44008 Sail.Values <> ArithFact class +R44012:44016 Coq.ZArith.BinInt <> ::Z_scope:x_'>=?'_x not +R44011:44011 riscv <> n:178 var +R43958:43961 Sail.Prompt_monad <> exit def +R43963:43964 Coq.Init.Datatypes <> tt constr +R43081:43081 riscv_types <> M def +R43084:43089 Coq.Init.Datatypes <> option ind +R43100:43102 Coq.Init.Datatypes <> ::type_scope:x_'*'_x not +R43093:43097 Sail.Values <> mword def +R43103:43103 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R43105:43107 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R43109:43111 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R43131:43131 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R43108:43108 Coq.Numbers.BinNums <> Z ind +binder 43104:43104 <> n:179 +R43112:43120 Sail.Values <> ArithFact class +R43124:43128 Coq.ZArith.BinInt <> ::Z_scope:x_'>=?'_x not +R43123:43123 riscv <> n:179 var +R42303:42307 riscv <> _s36_ def +R42309:42312 riscv <> _s3_:133 var +R42373:42376 Coq.Init.Datatypes <> Some constr +R42437:42443 Sail.Prompt_monad <> returnm def +R42446:42449 Coq.Init.Datatypes <> Some constr +R42515:42515 Coq.Init.Datatypes <> ::core_scope:'('_x_','_x_','_'..'_','_x_')' not +R42600:42601 Coq.Init.Datatypes <> ::core_scope:'('_x_','_x_','_'..'_','_x_')' not +R42846:42846 Coq.Init.Datatypes <> ::core_scope:'('_x_','_x_','_'..'_','_x_')' not +R42593:42597 Sail.Values <> mword def +R42516:42517 bbv.HexNotationWord <> :::'''b'_x not +R42602:42609 Sail.Values <> build_ex def +R42690:42695 Coq.Init.Specif <> projT1 def +R42779:42785 Sail.Values <> sub_nat def +R42818:42823 Coq.Init.Specif <> projT1 def +R42826:42838 Sail.String <> string_length def +R42788:42793 Coq.Init.Specif <> projT1 def +R42796:42808 Sail.String <> string_length def +R42810:42813 riscv <> arg_:131 var +R42918:42918 riscv_types <> M def +R42921:42926 Coq.Init.Datatypes <> option ind +R42937:42939 Coq.Init.Datatypes <> ::type_scope:x_'*'_x not +R42930:42934 Sail.Values <> mword def +R42940:42940 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R42942:42944 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R42946:42948 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R42968:42968 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R42945:42945 Coq.Numbers.BinNums <> Z ind +binder 42941:42941 <> n:180 +R42949:42957 Sail.Values <> ArithFact class +R42961:42965 Coq.ZArith.BinInt <> ::Z_scope:x_'>=?'_x not +R42960:42960 riscv <> n:180 var +R42907:42910 Sail.Prompt_monad <> exit def +R42912:42913 Coq.Init.Datatypes <> tt constr +R42075:42075 riscv_types <> M def +R42078:42083 Coq.Init.Datatypes <> option ind +R42094:42096 Coq.Init.Datatypes <> ::type_scope:x_'*'_x not +R42087:42091 Sail.Values <> mword def +R42097:42097 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R42099:42101 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R42103:42105 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R42125:42125 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R42102:42102 Coq.Numbers.BinNums <> Z ind +binder 42098:42098 <> n:181 +R42106:42114 Sail.Values <> ArithFact class +R42118:42122 Coq.ZArith.BinInt <> ::Z_scope:x_'>=?'_x not +R42117:42117 riscv <> n:181 var +R41342:41346 riscv <> _s32_ def +R41348:41351 riscv <> _s3_:133 var +R41407:41410 Coq.Init.Datatypes <> Some constr +R41466:41472 Sail.Prompt_monad <> returnm def +R41475:41478 Coq.Init.Datatypes <> Some constr +R41539:41539 Coq.Init.Datatypes <> ::core_scope:'('_x_','_x_','_'..'_','_x_')' not +R41619:41620 Coq.Init.Datatypes <> ::core_scope:'('_x_','_x_','_'..'_','_x_')' not +R41855:41855 Coq.Init.Datatypes <> ::core_scope:'('_x_','_x_','_'..'_','_x_')' not +R41612:41616 Sail.Values <> mword def +R41540:41541 bbv.HexNotationWord <> :::'''b'_x not +R41621:41628 Sail.Values <> build_ex def +R41704:41709 Coq.Init.Specif <> projT1 def +R41788:41794 Sail.Values <> sub_nat def +R41827:41832 Coq.Init.Specif <> projT1 def +R41835:41847 Sail.String <> string_length def +R41797:41802 Coq.Init.Specif <> projT1 def +R41805:41817 Sail.String <> string_length def +R41819:41822 riscv <> arg_:131 var +R41922:41922 riscv_types <> M def +R41925:41930 Coq.Init.Datatypes <> option ind +R41941:41943 Coq.Init.Datatypes <> ::type_scope:x_'*'_x not +R41934:41938 Sail.Values <> mword def +R41944:41944 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R41946:41948 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R41950:41952 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R41972:41972 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R41949:41949 Coq.Numbers.BinNums <> Z ind +binder 41945:41945 <> n:182 +R41953:41961 Sail.Values <> ArithFact class +R41965:41969 Coq.ZArith.BinInt <> ::Z_scope:x_'>=?'_x not +R41964:41964 riscv <> n:182 var +R41911:41914 Sail.Prompt_monad <> exit def +R41916:41917 Coq.Init.Datatypes <> tt constr +R41124:41124 riscv_types <> M def +R41127:41132 Coq.Init.Datatypes <> option ind +R41143:41145 Coq.Init.Datatypes <> ::type_scope:x_'*'_x not +R41136:41140 Sail.Values <> mword def +R41146:41146 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R41148:41150 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R41152:41154 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R41174:41174 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R41151:41151 Coq.Numbers.BinNums <> Z ind +binder 41147:41147 <> n:183 +R41155:41163 Sail.Values <> ArithFact class +R41167:41171 Coq.ZArith.BinInt <> ::Z_scope:x_'>=?'_x not +R41166:41166 riscv <> n:183 var +R40436:40440 riscv <> _s28_ def +R40442:40445 riscv <> _s3_:133 var +R40496:40499 Coq.Init.Datatypes <> Some constr +R40550:40556 Sail.Prompt_monad <> returnm def +R40559:40562 Coq.Init.Datatypes <> Some constr +R40618:40618 Coq.Init.Datatypes <> ::core_scope:'('_x_','_x_','_'..'_','_x_')' not +R40693:40694 Coq.Init.Datatypes <> ::core_scope:'('_x_','_x_','_'..'_','_x_')' not +R40919:40919 Coq.Init.Datatypes <> ::core_scope:'('_x_','_x_','_'..'_','_x_')' not +R40686:40690 Sail.Values <> mword def +R40619:40620 bbv.HexNotationWord <> :::'''b'_x not +R40695:40702 Sail.Values <> build_ex def +R40773:40778 Coq.Init.Specif <> projT1 def +R40852:40858 Sail.Values <> sub_nat def +R40891:40896 Coq.Init.Specif <> projT1 def +R40899:40911 Sail.String <> string_length def +R40861:40866 Coq.Init.Specif <> projT1 def +R40869:40881 Sail.String <> string_length def +R40883:40886 riscv <> arg_:131 var +R40981:40981 riscv_types <> M def +R40984:40989 Coq.Init.Datatypes <> option ind +R41000:41002 Coq.Init.Datatypes <> ::type_scope:x_'*'_x not +R40993:40997 Sail.Values <> mword def +R41003:41003 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R41005:41007 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R41009:41011 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R41031:41031 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R41008:41008 Coq.Numbers.BinNums <> Z ind +binder 41004:41004 <> n:184 +R41012:41020 Sail.Values <> ArithFact class +R41024:41028 Coq.ZArith.BinInt <> ::Z_scope:x_'>=?'_x not +R41023:41023 riscv <> n:184 var +R40970:40973 Sail.Prompt_monad <> exit def +R40975:40976 Coq.Init.Datatypes <> tt constr +R40228:40228 riscv_types <> M def +R40231:40236 Coq.Init.Datatypes <> option ind +R40247:40249 Coq.Init.Datatypes <> ::type_scope:x_'*'_x not +R40240:40244 Sail.Values <> mword def +R40250:40250 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R40252:40254 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R40256:40258 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R40278:40278 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R40255:40255 Coq.Numbers.BinNums <> Z ind +binder 40251:40251 <> n:185 +R40259:40267 Sail.Values <> ArithFact class +R40271:40275 Coq.ZArith.BinInt <> ::Z_scope:x_'>=?'_x not +R40270:40270 riscv <> n:185 var +R39585:39589 riscv <> _s24_ def +R39591:39594 riscv <> _s3_:133 var +R39640:39643 Coq.Init.Datatypes <> Some constr +R39689:39695 Sail.Prompt_monad <> returnm def +R39698:39701 Coq.Init.Datatypes <> Some constr +R39752:39752 Coq.Init.Datatypes <> ::core_scope:'('_x_','_x_','_'..'_','_x_')' not +R39822:39823 Coq.Init.Datatypes <> ::core_scope:'('_x_','_x_','_'..'_','_x_')' not +R40038:40038 Coq.Init.Datatypes <> ::core_scope:'('_x_','_x_','_'..'_','_x_')' not +R39815:39819 Sail.Values <> mword def +R39753:39754 bbv.HexNotationWord <> :::'''b'_x not +R39824:39831 Sail.Values <> build_ex def +R39897:39902 Coq.Init.Specif <> projT1 def +R39971:39977 Sail.Values <> sub_nat def +R40010:40015 Coq.Init.Specif <> projT1 def +R40018:40030 Sail.String <> string_length def +R39980:39985 Coq.Init.Specif <> projT1 def +R39988:40000 Sail.String <> string_length def +R40002:40005 riscv <> arg_:131 var +R40095:40095 riscv_types <> M def +R40098:40103 Coq.Init.Datatypes <> option ind +R40114:40116 Coq.Init.Datatypes <> ::type_scope:x_'*'_x not +R40107:40111 Sail.Values <> mword def +R40117:40117 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R40119:40121 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R40123:40125 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R40145:40145 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R40122:40122 Coq.Numbers.BinNums <> Z ind +binder 40118:40118 <> n:186 +R40126:40134 Sail.Values <> ArithFact class +R40138:40142 Coq.ZArith.BinInt <> ::Z_scope:x_'>=?'_x not +R40137:40137 riscv <> n:186 var +R40084:40087 Sail.Prompt_monad <> exit def +R40089:40090 Coq.Init.Datatypes <> tt constr +R39387:39387 riscv_types <> M def +R39390:39395 Coq.Init.Datatypes <> option ind +R39406:39408 Coq.Init.Datatypes <> ::type_scope:x_'*'_x not +R39399:39403 Sail.Values <> mword def +R39409:39409 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R39411:39413 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R39415:39417 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R39437:39437 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R39414:39414 Coq.Numbers.BinNums <> Z ind +binder 39410:39410 <> n:187 +R39418:39426 Sail.Values <> ArithFact class +R39430:39434 Coq.ZArith.BinInt <> ::Z_scope:x_'>=?'_x not +R39429:39429 riscv <> n:187 var +R38789:38793 riscv <> _s20_ def +R38795:38798 riscv <> _s3_:133 var +R38839:38842 Coq.Init.Datatypes <> Some constr +R38883:38889 Sail.Prompt_monad <> returnm def +R38892:38895 Coq.Init.Datatypes <> Some constr +R38941:38941 Coq.Init.Datatypes <> ::core_scope:'('_x_','_x_','_'..'_','_x_')' not +R39006:39007 Coq.Init.Datatypes <> ::core_scope:'('_x_','_x_','_'..'_','_x_')' not +R39212:39212 Coq.Init.Datatypes <> ::core_scope:'('_x_','_x_','_'..'_','_x_')' not +R38999:39003 Sail.Values <> mword def +R38942:38943 bbv.HexNotationWord <> :::'''b'_x not +R39008:39015 Sail.Values <> build_ex def +R39076:39081 Coq.Init.Specif <> projT1 def +R39145:39151 Sail.Values <> sub_nat def +R39184:39189 Coq.Init.Specif <> projT1 def +R39192:39204 Sail.String <> string_length def +R39154:39159 Coq.Init.Specif <> projT1 def +R39162:39174 Sail.String <> string_length def +R39176:39179 riscv <> arg_:131 var +R39264:39264 riscv_types <> M def +R39267:39272 Coq.Init.Datatypes <> option ind +R39283:39285 Coq.Init.Datatypes <> ::type_scope:x_'*'_x not +R39276:39280 Sail.Values <> mword def +R39286:39286 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R39288:39290 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R39292:39294 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R39314:39314 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R39291:39291 Coq.Numbers.BinNums <> Z ind +binder 39287:39287 <> n:188 +R39295:39303 Sail.Values <> ArithFact class +R39307:39311 Coq.ZArith.BinInt <> ::Z_scope:x_'>=?'_x not +R39306:39306 riscv <> n:188 var +R39253:39256 Sail.Prompt_monad <> exit def +R39258:39259 Coq.Init.Datatypes <> tt constr +R38601:38601 riscv_types <> M def +R38604:38609 Coq.Init.Datatypes <> option ind +R38620:38622 Coq.Init.Datatypes <> ::type_scope:x_'*'_x not +R38613:38617 Sail.Values <> mword def +R38623:38623 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R38625:38627 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R38629:38631 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R38651:38651 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R38628:38628 Coq.Numbers.BinNums <> Z ind +binder 38624:38624 <> n:189 +R38632:38640 Sail.Values <> ArithFact class +R38644:38648 Coq.ZArith.BinInt <> ::Z_scope:x_'>=?'_x not +R38643:38643 riscv <> n:189 var +R38048:38052 riscv <> _s16_ def +R38054:38057 riscv <> _s3_:133 var +R38093:38096 Coq.Init.Datatypes <> Some constr +R38132:38138 Sail.Prompt_monad <> returnm def +R38141:38144 Coq.Init.Datatypes <> Some constr +R38185:38185 Coq.Init.Datatypes <> ::core_scope:'('_x_','_x_','_'..'_','_x_')' not +R38245:38246 Coq.Init.Datatypes <> ::core_scope:'('_x_','_x_','_'..'_','_x_')' not +R38441:38441 Coq.Init.Datatypes <> ::core_scope:'('_x_','_x_','_'..'_','_x_')' not +R38238:38242 Sail.Values <> mword def +R38186:38187 bbv.HexNotationWord <> :::'''b'_x not +R38247:38254 Sail.Values <> build_ex def +R38310:38315 Coq.Init.Specif <> projT1 def +R38374:38380 Sail.Values <> sub_nat def +R38413:38418 Coq.Init.Specif <> projT1 def +R38421:38433 Sail.String <> string_length def +R38383:38388 Coq.Init.Specif <> projT1 def +R38391:38403 Sail.String <> string_length def +R38405:38408 riscv <> arg_:131 var +R38488:38488 riscv_types <> M def +R38491:38496 Coq.Init.Datatypes <> option ind +R38507:38509 Coq.Init.Datatypes <> ::type_scope:x_'*'_x not +R38500:38504 Sail.Values <> mword def +R38510:38510 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R38512:38514 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R38516:38518 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R38538:38538 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R38515:38515 Coq.Numbers.BinNums <> Z ind +binder 38511:38511 <> n:190 +R38519:38527 Sail.Values <> ArithFact class +R38531:38535 Coq.ZArith.BinInt <> ::Z_scope:x_'>=?'_x not +R38530:38530 riscv <> n:190 var +R38477:38480 Sail.Prompt_monad <> exit def +R38482:38483 Coq.Init.Datatypes <> tt constr +R37870:37870 riscv_types <> M def +R37873:37878 Coq.Init.Datatypes <> option ind +R37889:37891 Coq.Init.Datatypes <> ::type_scope:x_'*'_x not +R37882:37886 Sail.Values <> mword def +R37892:37892 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R37894:37896 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R37898:37900 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R37920:37920 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R37897:37897 Coq.Numbers.BinNums <> Z ind +binder 37893:37893 <> n:191 +R37901:37909 Sail.Values <> ArithFact class +R37913:37917 Coq.ZArith.BinInt <> ::Z_scope:x_'>=?'_x not +R37912:37912 riscv <> n:191 var +R37362:37366 riscv <> _s12_ def +R37368:37371 riscv <> _s3_:133 var +R37402:37405 Coq.Init.Datatypes <> Some constr +R37436:37442 Sail.Prompt_monad <> returnm def +R37445:37448 Coq.Init.Datatypes <> Some constr +R37484:37484 Coq.Init.Datatypes <> ::core_scope:'('_x_','_x_','_'..'_','_x_')' not +R37539:37540 Coq.Init.Datatypes <> ::core_scope:'('_x_','_x_','_'..'_','_x_')' not +R37725:37725 Coq.Init.Datatypes <> ::core_scope:'('_x_','_x_','_'..'_','_x_')' not +R37532:37536 Sail.Values <> mword def +R37485:37486 bbv.HexNotationWord <> :::'''b'_x not +R37541:37548 Sail.Values <> build_ex def +R37599:37604 Coq.Init.Specif <> projT1 def +R37658:37664 Sail.Values <> sub_nat def +R37697:37702 Coq.Init.Specif <> projT1 def +R37705:37717 Sail.String <> string_length def +R37667:37672 Coq.Init.Specif <> projT1 def +R37675:37687 Sail.String <> string_length def +R37689:37692 riscv <> arg_:131 var +R37767:37767 riscv_types <> M def +R37770:37775 Coq.Init.Datatypes <> option ind +R37786:37788 Coq.Init.Datatypes <> ::type_scope:x_'*'_x not +R37779:37783 Sail.Values <> mword def +R37789:37789 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R37791:37793 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R37795:37797 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R37817:37817 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R37794:37794 Coq.Numbers.BinNums <> Z ind +binder 37790:37790 <> n:192 +R37798:37806 Sail.Values <> ArithFact class +R37810:37814 Coq.ZArith.BinInt <> ::Z_scope:x_'>=?'_x not +R37809:37809 riscv <> n:192 var +R37756:37759 Sail.Prompt_monad <> exit def +R37761:37762 Coq.Init.Datatypes <> tt constr +R37194:37194 riscv_types <> M def +R37197:37202 Coq.Init.Datatypes <> option ind +R37213:37215 Coq.Init.Datatypes <> ::type_scope:x_'*'_x not +R37206:37210 Sail.Values <> mword def +R37216:37216 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R37218:37220 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R37222:37224 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R37244:37244 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R37221:37221 Coq.Numbers.BinNums <> Z ind +binder 37217:37217 <> n:193 +R37225:37233 Sail.Values <> ArithFact class +R37237:37241 Coq.ZArith.BinInt <> ::Z_scope:x_'>=?'_x not +R37236:37236 riscv <> n:193 var +R36732:36735 riscv <> _s8_ def +R36737:36740 riscv <> _s3_:133 var +R36766:36769 Coq.Init.Datatypes <> Some constr +R36795:36801 Sail.Prompt_monad <> returnm def +R36804:36807 Coq.Init.Datatypes <> Some constr +R36838:36838 Coq.Init.Datatypes <> ::core_scope:'('_x_','_x_','_'..'_','_x_')' not +R36888:36889 Coq.Init.Datatypes <> ::core_scope:'('_x_','_x_','_'..'_','_x_')' not +R37064:37064 Coq.Init.Datatypes <> ::core_scope:'('_x_','_x_','_'..'_','_x_')' not +R36881:36885 Sail.Values <> mword def +R36839:36840 bbv.HexNotationWord <> :::'''b'_x not +R36890:36897 Sail.Values <> build_ex def +R36943:36948 Coq.Init.Specif <> projT1 def +R36997:37003 Sail.Values <> sub_nat def +R37036:37041 Coq.Init.Specif <> projT1 def +R37044:37056 Sail.String <> string_length def +R37006:37011 Coq.Init.Specif <> projT1 def +R37014:37026 Sail.String <> string_length def +R37028:37031 riscv <> arg_:131 var +R37101:37101 riscv_types <> M def +R37104:37109 Coq.Init.Datatypes <> option ind +R37120:37122 Coq.Init.Datatypes <> ::type_scope:x_'*'_x not +R37113:37117 Sail.Values <> mword def +R37123:37123 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R37125:37127 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R37129:37131 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R37151:37151 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R37128:37128 Coq.Numbers.BinNums <> Z ind +binder 37124:37124 <> n:194 +R37132:37140 Sail.Values <> ArithFact class +R37144:37148 Coq.ZArith.BinInt <> ::Z_scope:x_'>=?'_x not +R37143:37143 riscv <> n:194 var +R37090:37093 Sail.Prompt_monad <> exit def +R37095:37096 Coq.Init.Datatypes <> tt constr +R36575:36575 riscv_types <> M def +R36578:36583 Coq.Init.Datatypes <> option ind +R36594:36596 Coq.Init.Datatypes <> ::type_scope:x_'*'_x not +R36587:36591 Sail.Values <> mword def +R36597:36597 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R36599:36601 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R36603:36605 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R36625:36625 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R36602:36602 Coq.Numbers.BinNums <> Z ind +binder 36598:36598 <> n:195 +R36606:36614 Sail.Values <> ArithFact class +R36618:36622 Coq.ZArith.BinInt <> ::Z_scope:x_'>=?'_x not +R36617:36617 riscv <> n:195 var +R36158:36161 riscv <> _s4_ def +R36163:36166 riscv <> _s3_:133 var +R36187:36190 Coq.Init.Datatypes <> Some constr +R36211:36217 Sail.Prompt_monad <> returnm def +R36220:36223 Coq.Init.Datatypes <> Some constr +R36249:36249 Coq.Init.Datatypes <> ::core_scope:'('_x_','_x_','_'..'_','_x_')' not +R36294:36295 Coq.Init.Datatypes <> ::core_scope:'('_x_','_x_','_'..'_','_x_')' not +R36460:36460 Coq.Init.Datatypes <> ::core_scope:'('_x_','_x_','_'..'_','_x_')' not +R36287:36291 Sail.Values <> mword def +R36250:36251 bbv.HexNotationWord <> :::'''b'_x not +R36296:36303 Sail.Values <> build_ex def +R36344:36349 Coq.Init.Specif <> projT1 def +R36393:36399 Sail.Values <> sub_nat def +R36432:36437 Coq.Init.Specif <> projT1 def +R36440:36452 Sail.String <> string_length def +R36402:36407 Coq.Init.Specif <> projT1 def +R36410:36422 Sail.String <> string_length def +R36424:36427 riscv <> arg_:131 var +R36492:36492 riscv_types <> M def +R36495:36500 Coq.Init.Datatypes <> option ind +R36511:36513 Coq.Init.Datatypes <> ::type_scope:x_'*'_x not +R36504:36508 Sail.Values <> mword def +R36514:36514 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R36516:36518 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R36520:36522 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R36542:36542 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R36519:36519 Coq.Numbers.BinNums <> Z ind +binder 36515:36515 <> n:196 +R36523:36531 Sail.Values <> ArithFact class +R36535:36539 Coq.ZArith.BinInt <> ::Z_scope:x_'>=?'_x not +R36534:36534 riscv <> n:196 var +R36481:36484 Sail.Prompt_monad <> exit def +R36486:36487 Coq.Init.Datatypes <> tt constr +R36011:36011 riscv_types <> M def +R36014:36019 Coq.Init.Datatypes <> option ind +R36030:36032 Coq.Init.Datatypes <> ::type_scope:x_'*'_x not +R36023:36027 Sail.Values <> mword def +R36033:36033 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R36035:36037 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R36039:36041 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R36061:36061 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R36038:36038 Coq.Numbers.BinNums <> Z ind +binder 36034:36034 <> n:197 +R36042:36050 Sail.Values <> ArithFact class +R36054:36058 Coq.ZArith.BinInt <> ::Z_scope:x_'>=?'_x not +R36053:36053 riscv <> n:197 var +R35639:35642 riscv <> _s0_ def +R35644:35647 riscv <> _s3_:133 var +R35663:35666 Coq.Init.Datatypes <> Some constr +R35682:35688 Sail.Prompt_monad <> returnm def +R35691:35694 Coq.Init.Datatypes <> Some constr +R35715:35715 Coq.Init.Datatypes <> ::core_scope:'('_x_','_x_','_'..'_','_x_')' not +R35755:35756 Coq.Init.Datatypes <> ::core_scope:'('_x_','_x_','_'..'_','_x_')' not +R35911:35911 Coq.Init.Datatypes <> ::core_scope:'('_x_','_x_','_'..'_','_x_')' not +R35748:35752 Sail.Values <> mword def +R35716:35717 bbv.HexNotationWord <> :::'''b'_x not +R35757:35764 Sail.Values <> build_ex def +R35800:35805 Coq.Init.Specif <> projT1 def +R35844:35850 Sail.Values <> sub_nat def +R35883:35888 Coq.Init.Specif <> projT1 def +R35891:35903 Sail.String <> string_length def +R35853:35858 Coq.Init.Specif <> projT1 def +R35861:35873 Sail.String <> string_length def +R35875:35878 riscv <> arg_:131 var +R35938:35938 riscv_types <> M def +R35941:35946 Coq.Init.Datatypes <> option ind +R35957:35959 Coq.Init.Datatypes <> ::type_scope:x_'*'_x not +R35950:35954 Sail.Values <> mword def +R35960:35960 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R35962:35964 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R35966:35968 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R35988:35988 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R35965:35965 Coq.Numbers.BinNums <> Z ind +binder 35961:35961 <> n:198 +R35969:35977 Sail.Values <> ArithFact class +R35981:35985 Coq.ZArith.BinInt <> ::Z_scope:x_'>=?'_x not +R35980:35980 riscv <> n:198 var +R35927:35930 Sail.Prompt_monad <> exit def +R35932:35933 Coq.Init.Datatypes <> tt constr +def 79446:79463 <> creg_name_forwards +R79473:79477 Sail.Values <> mword def +binder 79466:79469 <> arg_:199 +R79484:79484 riscv_types <> M def +R79487:79492 Coq.Strings.String <> string ind +R79512:79515 riscv <> arg_:199 var +binder 79504:79507 <> b__0:200 +R80247:80247 riscv_types <> M def +R80250:80255 Coq.Strings.String <> string ind +R79526:79531 Sail.Operators_mwords <> eq_vec def +R79550:79554 Sail.Values <> mword def +R79539:79540 bbv.HexNotationWord <> :::'''b'_x not +R79533:79536 riscv <> b__0:200 var +R79588:79593 Sail.Operators_mwords <> eq_vec def +R79612:79616 Sail.Values <> mword def +R79601:79602 bbv.HexNotationWord <> :::'''b'_x not +R79595:79598 riscv <> b__0:200 var +R79655:79660 Sail.Operators_mwords <> eq_vec def +R79679:79683 Sail.Values <> mword def +R79668:79669 bbv.HexNotationWord <> :::'''b'_x not +R79662:79665 riscv <> b__0:200 var +R79727:79732 Sail.Operators_mwords <> eq_vec def +R79751:79755 Sail.Values <> mword def +R79740:79741 bbv.HexNotationWord <> :::'''b'_x not +R79734:79737 riscv <> b__0:200 var +R79804:79809 Sail.Operators_mwords <> eq_vec def +R79828:79832 Sail.Values <> mword def +R79817:79818 bbv.HexNotationWord <> :::'''b'_x not +R79811:79814 riscv <> b__0:200 var +R79886:79891 Sail.Operators_mwords <> eq_vec def +R79910:79914 Sail.Values <> mword def +R79899:79900 bbv.HexNotationWord <> :::'''b'_x not +R79893:79896 riscv <> b__0:200 var +R79973:79978 Sail.Operators_mwords <> eq_vec def +R79997:80001 Sail.Values <> mword def +R79986:79987 bbv.HexNotationWord <> :::'''b'_x not +R79980:79983 riscv <> b__0:200 var +R80065:80070 Sail.Operators_mwords <> eq_vec def +R80089:80093 Sail.Values <> mword def +R80078:80079 bbv.HexNotationWord <> :::'''b'_x not +R80072:80075 riscv <> b__0:200 var +R80220:80224 Sail.Prompt_monad <> :::x_'>>='_x not +R80159:80169 Sail.Prompt_monad <> assert_exp' def +R80171:80175 Coq.Init.Datatypes <> false constr +R80234:80237 Sail.Prompt_monad <> exit def +R80239:80240 Coq.Init.Datatypes <> tt constr +R80103:80109 Sail.Prompt_monad <> returnm def +R80011:80017 Sail.Prompt_monad <> returnm def +R79924:79930 Sail.Prompt_monad <> returnm def +R79842:79848 Sail.Prompt_monad <> returnm def +R79765:79771 Sail.Prompt_monad <> returnm def +R79693:79699 Sail.Prompt_monad <> returnm def +R79626:79632 Sail.Prompt_monad <> returnm def +R79564:79570 Sail.Prompt_monad <> returnm def +def 80271:80289 <> creg_name_backwards +R80299:80304 Coq.Strings.String <> string ind +binder 80292:80295 <> arg_:201 +R80309:80309 riscv_types <> M def +R80312:80316 Sail.Values <> mword def +R80337:80340 riscv <> arg_:201 var +binder 80330:80332 <> p0_:202 +R81096:81096 riscv_types <> M def +R81099:81103 Sail.Values <> mword def +R80351:80360 Sail.Values <> generic_eq def +R80362:80364 riscv <> p0_:202 var +R80416:80425 Sail.Values <> generic_eq def +R80427:80429 riscv <> p0_:202 var +R80486:80495 Sail.Values <> generic_eq def +R80497:80499 riscv <> p0_:202 var +R80561:80570 Sail.Values <> generic_eq def +R80572:80574 riscv <> p0_:202 var +R80641:80650 Sail.Values <> generic_eq def +R80652:80654 riscv <> p0_:202 var +R80726:80735 Sail.Values <> generic_eq def +R80737:80739 riscv <> p0_:202 var +R80816:80825 Sail.Values <> generic_eq def +R80827:80829 riscv <> p0_:202 var +R80911:80920 Sail.Values <> generic_eq def +R80922:80924 riscv <> p0_:202 var +R81069:81073 Sail.Prompt_monad <> :::x_'>>='_x not +R81008:81018 Sail.Prompt_monad <> assert_exp' def +R81020:81024 Coq.Init.Datatypes <> false constr +R81083:81086 Sail.Prompt_monad <> exit def +R81088:81089 Coq.Init.Datatypes <> tt constr +R80936:80942 Sail.Prompt_monad <> returnm def +R80956:80960 Sail.Values <> mword def +R80945:80946 bbv.HexNotationWord <> :::'''b'_x not +R80841:80847 Sail.Prompt_monad <> returnm def +R80861:80865 Sail.Values <> mword def +R80850:80851 bbv.HexNotationWord <> :::'''b'_x not +R80751:80757 Sail.Prompt_monad <> returnm def +R80771:80775 Sail.Values <> mword def +R80760:80761 bbv.HexNotationWord <> :::'''b'_x not +R80666:80672 Sail.Prompt_monad <> returnm def +R80686:80690 Sail.Values <> mword def +R80675:80676 bbv.HexNotationWord <> :::'''b'_x not +R80586:80592 Sail.Prompt_monad <> returnm def +R80606:80610 Sail.Values <> mword def +R80595:80596 bbv.HexNotationWord <> :::'''b'_x not +R80511:80517 Sail.Prompt_monad <> returnm def +R80531:80535 Sail.Values <> mword def +R80520:80521 bbv.HexNotationWord <> :::'''b'_x not +R80441:80447 Sail.Prompt_monad <> returnm def +R80461:80465 Sail.Values <> mword def +R80450:80451 bbv.HexNotationWord <> :::'''b'_x not +R80376:80382 Sail.Prompt_monad <> returnm def +R80396:80400 Sail.Values <> mword def +R80385:80386 bbv.HexNotationWord <> :::'''b'_x not +def 81121:81146 <> creg_name_forwards_matches +R81156:81160 Sail.Values <> mword def +binder 81149:81152 <> arg_:203 +R81167:81170 Coq.Init.Datatypes <> bool ind +R81189:81192 riscv <> arg_:203 var +binder 81181:81184 <> b__0:204 +R81202:81207 Sail.Operators_mwords <> eq_vec def +R81226:81230 Sail.Values <> mword def +R81215:81216 bbv.HexNotationWord <> :::'''b'_x not +R81209:81212 riscv <> b__0:204 var +R81255:81260 Sail.Operators_mwords <> eq_vec def +R81279:81283 Sail.Values <> mword def +R81268:81269 bbv.HexNotationWord <> :::'''b'_x not +R81262:81265 riscv <> b__0:204 var +R81313:81318 Sail.Operators_mwords <> eq_vec def +R81337:81341 Sail.Values <> mword def +R81326:81327 bbv.HexNotationWord <> :::'''b'_x not +R81320:81323 riscv <> b__0:204 var +R81376:81381 Sail.Operators_mwords <> eq_vec def +R81400:81404 Sail.Values <> mword def +R81389:81390 bbv.HexNotationWord <> :::'''b'_x not +R81383:81386 riscv <> b__0:204 var +R81444:81449 Sail.Operators_mwords <> eq_vec def +R81468:81472 Sail.Values <> mword def +R81457:81458 bbv.HexNotationWord <> :::'''b'_x not +R81451:81454 riscv <> b__0:204 var +R81517:81522 Sail.Operators_mwords <> eq_vec def +R81541:81545 Sail.Values <> mword def +R81530:81531 bbv.HexNotationWord <> :::'''b'_x not +R81524:81527 riscv <> b__0:204 var +R81595:81600 Sail.Operators_mwords <> eq_vec def +R81619:81623 Sail.Values <> mword def +R81608:81609 bbv.HexNotationWord <> :::'''b'_x not +R81602:81605 riscv <> b__0:204 var +R81678:81683 Sail.Operators_mwords <> eq_vec def +R81702:81706 Sail.Values <> mword def +R81691:81692 bbv.HexNotationWord <> :::'''b'_x not +R81685:81688 riscv <> b__0:204 var +R81763:81767 Coq.Init.Datatypes <> false constr +R81716:81719 Coq.Init.Datatypes <> true constr +R81633:81636 Coq.Init.Datatypes <> true constr +R81555:81558 Coq.Init.Datatypes <> true constr +R81482:81485 Coq.Init.Datatypes <> true constr +R81414:81417 Coq.Init.Datatypes <> true constr +R81351:81354 Coq.Init.Datatypes <> true constr +R81293:81296 Coq.Init.Datatypes <> true constr +R81240:81243 Coq.Init.Datatypes <> true constr +def 81782:81808 <> creg_name_backwards_matches +R81818:81823 Coq.Strings.String <> string ind +binder 81811:81814 <> arg_:205 +R81828:81831 Coq.Init.Datatypes <> bool ind +R81849:81852 riscv <> arg_:205 var +binder 81842:81844 <> p0_:206 +R81862:81871 Sail.Values <> generic_eq def +R81873:81875 riscv <> p0_:206 var +R81902:81911 Sail.Values <> generic_eq def +R81913:81915 riscv <> p0_:206 var +R81947:81956 Sail.Values <> generic_eq def +R81958:81960 riscv <> p0_:206 var +R81997:82006 Sail.Values <> generic_eq def +R82008:82010 riscv <> p0_:206 var +R82052:82061 Sail.Values <> generic_eq def +R82063:82065 riscv <> p0_:206 var +R82112:82121 Sail.Values <> generic_eq def +R82123:82125 riscv <> p0_:206 var +R82177:82186 Sail.Values <> generic_eq def +R82188:82190 riscv <> p0_:206 var +R82247:82256 Sail.Values <> generic_eq def +R82258:82260 riscv <> p0_:206 var +R82319:82323 Coq.Init.Datatypes <> false constr +R82272:82275 Coq.Init.Datatypes <> true constr +R82202:82205 Coq.Init.Datatypes <> true constr +R82137:82140 Coq.Init.Datatypes <> true constr +R82077:82080 Coq.Init.Datatypes <> true constr +R82022:82025 Coq.Init.Datatypes <> true constr +R81972:81975 Coq.Init.Datatypes <> true constr +R81927:81930 Coq.Init.Datatypes <> true constr +R81887:81890 Coq.Init.Datatypes <> true constr +def 82338:82343 <> _s156_ +R82355:82360 Coq.Strings.String <> string ind +binder 82346:82351 <> _s157_:207 +R82365:82370 Coq.Init.Datatypes <> option ind +R82372:82377 Coq.Strings.String <> string ind +R82398:82403 riscv <> _s157_:207 var +binder 82388:82393 <> _s158_:208 +R82413:82429 Sail.String <> string_startswith def +R82431:82436 riscv <> _s158_:208 var +R82541:82544 Coq.Init.Datatypes <> None constr +R82459:82469 Sail.String <> string_drop def +R82479:82484 Coq.Init.Specif <> projT1 def +R82487:82499 Sail.String <> string_length def +R82471:82476 riscv <> _s158_:208 var +R82522:82525 Coq.Init.Datatypes <> Some constr +def 82559:82564 <> _s152_ +R82576:82581 Coq.Strings.String <> string ind +binder 82567:82572 <> _s153_:209 +R82586:82591 Coq.Init.Datatypes <> option ind +R82593:82598 Coq.Strings.String <> string ind +R82619:82624 riscv <> _s153_:209 var +binder 82609:82614 <> _s154_:210 +R82634:82650 Sail.String <> string_startswith def +R82652:82657 riscv <> _s154_:210 var +R82762:82765 Coq.Init.Datatypes <> None constr +R82680:82690 Sail.String <> string_drop def +R82700:82705 Coq.Init.Specif <> projT1 def +R82708:82720 Sail.String <> string_length def +R82692:82697 riscv <> _s154_:210 var +R82743:82746 Coq.Init.Datatypes <> Some constr +def 82780:82785 <> _s148_ +R82797:82802 Coq.Strings.String <> string ind +binder 82788:82793 <> _s149_:211 +R82807:82812 Coq.Init.Datatypes <> option ind +R82814:82819 Coq.Strings.String <> string ind +R82840:82845 riscv <> _s149_:211 var +binder 82830:82835 <> _s150_:212 +R82855:82871 Sail.String <> string_startswith def +R82873:82878 riscv <> _s150_:212 var +R82983:82986 Coq.Init.Datatypes <> None constr +R82901:82911 Sail.String <> string_drop def +R82921:82926 Coq.Init.Specif <> projT1 def +R82929:82941 Sail.String <> string_length def +R82913:82918 riscv <> _s150_:212 var +R82964:82967 Coq.Init.Datatypes <> Some constr +def 83001:83006 <> _s144_ +R83018:83023 Coq.Strings.String <> string ind +binder 83009:83014 <> _s145_:213 +R83028:83033 Coq.Init.Datatypes <> option ind +R83035:83040 Coq.Strings.String <> string ind +R83061:83066 riscv <> _s145_:213 var +binder 83051:83056 <> _s146_:214 +R83076:83092 Sail.String <> string_startswith def +R83094:83099 riscv <> _s146_:214 var +R83204:83207 Coq.Init.Datatypes <> None constr +R83122:83132 Sail.String <> string_drop def +R83142:83147 Coq.Init.Specif <> projT1 def +R83150:83162 Sail.String <> string_length def +R83134:83139 riscv <> _s146_:214 var +R83185:83188 Coq.Init.Datatypes <> Some constr +def 83222:83227 <> _s140_ +R83239:83244 Coq.Strings.String <> string ind +binder 83230:83235 <> _s141_:215 +R83249:83254 Coq.Init.Datatypes <> option ind +R83256:83261 Coq.Strings.String <> string ind +R83282:83287 riscv <> _s141_:215 var +binder 83272:83277 <> _s142_:216 +R83297:83313 Sail.String <> string_startswith def +R83315:83320 riscv <> _s142_:216 var +R83425:83428 Coq.Init.Datatypes <> None constr +R83343:83353 Sail.String <> string_drop def +R83363:83368 Coq.Init.Specif <> projT1 def +R83371:83383 Sail.String <> string_length def +R83355:83360 riscv <> _s142_:216 var +R83406:83409 Coq.Init.Datatypes <> Some constr +def 83443:83448 <> _s136_ +R83460:83465 Coq.Strings.String <> string ind +binder 83451:83456 <> _s137_:217 +R83470:83475 Coq.Init.Datatypes <> option ind +R83477:83482 Coq.Strings.String <> string ind +R83503:83508 riscv <> _s137_:217 var +binder 83493:83498 <> _s138_:218 +R83518:83534 Sail.String <> string_startswith def +R83536:83541 riscv <> _s138_:218 var +R83646:83649 Coq.Init.Datatypes <> None constr +R83564:83574 Sail.String <> string_drop def +R83584:83589 Coq.Init.Specif <> projT1 def +R83592:83604 Sail.String <> string_length def +R83576:83581 riscv <> _s138_:218 var +R83627:83630 Coq.Init.Datatypes <> Some constr +def 83664:83669 <> _s132_ +R83681:83686 Coq.Strings.String <> string ind +binder 83672:83677 <> _s133_:219 +R83691:83696 Coq.Init.Datatypes <> option ind +R83698:83703 Coq.Strings.String <> string ind +R83724:83729 riscv <> _s133_:219 var +binder 83714:83719 <> _s134_:220 +R83739:83755 Sail.String <> string_startswith def +R83757:83762 riscv <> _s134_:220 var +R83867:83870 Coq.Init.Datatypes <> None constr +R83785:83795 Sail.String <> string_drop def +R83805:83810 Coq.Init.Specif <> projT1 def +R83813:83825 Sail.String <> string_length def +R83797:83802 riscv <> _s134_:220 var +R83848:83851 Coq.Init.Datatypes <> Some constr +def 83885:83890 <> _s128_ +R83902:83907 Coq.Strings.String <> string ind +binder 83893:83898 <> _s129_:221 +R83912:83917 Coq.Init.Datatypes <> option ind +R83919:83924 Coq.Strings.String <> string ind +R83945:83950 riscv <> _s129_:221 var +binder 83935:83940 <> _s130_:222 +R83960:83976 Sail.String <> string_startswith def +R83978:83983 riscv <> _s130_:222 var +R84088:84091 Coq.Init.Datatypes <> None constr +R84006:84016 Sail.String <> string_drop def +R84026:84031 Coq.Init.Specif <> projT1 def +R84034:84046 Sail.String <> string_length def +R84018:84023 riscv <> _s130_:222 var +R84069:84072 Coq.Init.Datatypes <> Some constr +def 84106:84129 <> creg_name_matches_prefix +R84139:84144 Coq.Strings.String <> string ind +binder 84132:84135 <> arg_:223 +R84151:84151 riscv_types <> M def +R84154:84159 Coq.Init.Datatypes <> option ind +R84170:84172 Coq.Init.Datatypes <> ::type_scope:x_'*'_x not +R84163:84167 Sail.Values <> mword def +R84173:84173 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R84175:84177 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R84179:84181 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R84201:84201 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R84178:84178 Coq.Numbers.BinNums <> Z ind +binder 84174:84174 <> n:224 +R84182:84190 Sail.Values <> ArithFact class +R84194:84198 Coq.ZArith.BinInt <> ::Z_scope:x_'>=?'_x not +R84193:84193 riscv <> n:224 var +R84225:84228 riscv <> arg_:223 var +binder 84215:84220 <> _s131_:225 +R89954:89954 riscv_types <> M def +R89957:89962 Coq.Init.Datatypes <> option ind +R89973:89975 Coq.Init.Datatypes <> ::type_scope:x_'*'_x not +R89966:89970 Sail.Values <> mword def +R89976:89976 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R89978:89980 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R89982:89984 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R90004:90004 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R89981:89981 Coq.Numbers.BinNums <> Z ind +binder 89977:89977 <> n:226 +R89985:89993 Sail.Values <> ArithFact class +R89997:90001 Coq.ZArith.BinInt <> ::Z_scope:x_'>=?'_x not +R89996:89996 riscv <> n:226 var +R84246:84251 riscv <> _s128_ def +R84253:84258 riscv <> _s131_:225 var +R84268:84271 Coq.Init.Datatypes <> Some constr +R84279:84282 Coq.Init.Datatypes <> true constr +R84291:84295 Coq.Init.Datatypes <> false constr +R84766:84771 riscv <> _s132_ def +R84773:84778 riscv <> _s131_:225 var +R84788:84791 Coq.Init.Datatypes <> Some constr +R84799:84802 Coq.Init.Datatypes <> true constr +R84811:84815 Coq.Init.Datatypes <> false constr +R85341:85346 riscv <> _s136_ def +R85348:85353 riscv <> _s131_:225 var +R85363:85366 Coq.Init.Datatypes <> Some constr +R85374:85377 Coq.Init.Datatypes <> true constr +R85386:85390 Coq.Init.Datatypes <> false constr +R85971:85976 riscv <> _s140_ def +R85978:85983 riscv <> _s131_:225 var +R85993:85996 Coq.Init.Datatypes <> Some constr +R86004:86007 Coq.Init.Datatypes <> true constr +R86016:86020 Coq.Init.Datatypes <> false constr +R86656:86661 riscv <> _s144_ def +R86663:86668 riscv <> _s131_:225 var +R86678:86681 Coq.Init.Datatypes <> Some constr +R86689:86692 Coq.Init.Datatypes <> true constr +R86701:86705 Coq.Init.Datatypes <> false constr +R87396:87401 riscv <> _s148_ def +R87403:87408 riscv <> _s131_:225 var +R87418:87421 Coq.Init.Datatypes <> Some constr +R87429:87432 Coq.Init.Datatypes <> true constr +R87441:87445 Coq.Init.Datatypes <> false constr +R88191:88196 riscv <> _s152_ def +R88198:88203 riscv <> _s131_:225 var +R88213:88216 Coq.Init.Datatypes <> Some constr +R88224:88227 Coq.Init.Datatypes <> true constr +R88236:88240 Coq.Init.Datatypes <> false constr +R89041:89046 riscv <> _s156_ def +R89048:89053 riscv <> _s131_:225 var +R89063:89066 Coq.Init.Datatypes <> Some constr +R89074:89077 Coq.Init.Datatypes <> true constr +R89086:89090 Coq.Init.Datatypes <> false constr +R89936:89942 Sail.Prompt_monad <> returnm def +R89944:89947 Coq.Init.Datatypes <> None constr +R89838:89838 riscv_types <> M def +R89841:89846 Coq.Init.Datatypes <> option ind +R89857:89859 Coq.Init.Datatypes <> ::type_scope:x_'*'_x not +R89850:89854 Sail.Values <> mword def +R89860:89860 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R89862:89864 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R89866:89868 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R89888:89888 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R89865:89865 Coq.Numbers.BinNums <> Z ind +binder 89861:89861 <> n:227 +R89869:89877 Sail.Values <> ArithFact class +R89881:89885 Coq.ZArith.BinInt <> ::Z_scope:x_'>=?'_x not +R89880:89880 riscv <> n:227 var +R89149:89154 riscv <> _s156_ def +R89156:89161 riscv <> _s131_:225 var +R89212:89215 Coq.Init.Datatypes <> Some constr +R89266:89272 Sail.Prompt_monad <> returnm def +R89275:89278 Coq.Init.Datatypes <> Some constr +R89334:89334 Coq.Init.Datatypes <> ::core_scope:'('_x_','_x_','_'..'_','_x_')' not +R89407:89408 Coq.Init.Datatypes <> ::core_scope:'('_x_','_x_','_'..'_','_x_')' not +R89633:89633 Coq.Init.Datatypes <> ::core_scope:'('_x_','_x_','_'..'_','_x_')' not +R89400:89404 Sail.Values <> mword def +R89335:89336 bbv.HexNotationWord <> :::'''b'_x not +R89409:89416 Sail.Values <> build_ex def +R89487:89492 Coq.Init.Specif <> projT1 def +R89566:89572 Sail.Values <> sub_nat def +R89605:89610 Coq.Init.Specif <> projT1 def +R89613:89625 Sail.String <> string_length def +R89575:89580 Coq.Init.Specif <> projT1 def +R89583:89595 Sail.String <> string_length def +R89597:89600 riscv <> arg_:223 var +R89695:89695 riscv_types <> M def +R89698:89703 Coq.Init.Datatypes <> option ind +R89714:89716 Coq.Init.Datatypes <> ::type_scope:x_'*'_x not +R89707:89711 Sail.Values <> mword def +R89717:89717 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R89719:89721 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R89723:89725 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R89745:89745 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R89722:89722 Coq.Numbers.BinNums <> Z ind +binder 89718:89718 <> n:228 +R89726:89734 Sail.Values <> ArithFact class +R89738:89742 Coq.ZArith.BinInt <> ::Z_scope:x_'>=?'_x not +R89737:89737 riscv <> n:228 var +R89684:89687 Sail.Prompt_monad <> exit def +R89689:89690 Coq.Init.Datatypes <> tt constr +R88938:88938 riscv_types <> M def +R88941:88946 Coq.Init.Datatypes <> option ind +R88957:88959 Coq.Init.Datatypes <> ::type_scope:x_'*'_x not +R88950:88954 Sail.Values <> mword def +R88960:88960 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R88962:88964 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R88966:88968 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R88988:88988 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R88965:88965 Coq.Numbers.BinNums <> Z ind +binder 88961:88961 <> n:229 +R88969:88977 Sail.Values <> ArithFact class +R88981:88985 Coq.ZArith.BinInt <> ::Z_scope:x_'>=?'_x not +R88980:88980 riscv <> n:229 var +R88294:88299 riscv <> _s152_ def +R88301:88306 riscv <> _s131_:225 var +R88352:88355 Coq.Init.Datatypes <> Some constr +R88401:88407 Sail.Prompt_monad <> returnm def +R88410:88413 Coq.Init.Datatypes <> Some constr +R88464:88464 Coq.Init.Datatypes <> ::core_scope:'('_x_','_x_','_'..'_','_x_')' not +R88532:88533 Coq.Init.Datatypes <> ::core_scope:'('_x_','_x_','_'..'_','_x_')' not +R88748:88748 Coq.Init.Datatypes <> ::core_scope:'('_x_','_x_','_'..'_','_x_')' not +R88525:88529 Sail.Values <> mword def +R88465:88466 bbv.HexNotationWord <> :::'''b'_x not +R88534:88541 Sail.Values <> build_ex def +R88607:88612 Coq.Init.Specif <> projT1 def +R88681:88687 Sail.Values <> sub_nat def +R88720:88725 Coq.Init.Specif <> projT1 def +R88728:88740 Sail.String <> string_length def +R88690:88695 Coq.Init.Specif <> projT1 def +R88698:88710 Sail.String <> string_length def +R88712:88715 riscv <> arg_:223 var +R88805:88805 riscv_types <> M def +R88808:88813 Coq.Init.Datatypes <> option ind +R88824:88826 Coq.Init.Datatypes <> ::type_scope:x_'*'_x not +R88817:88821 Sail.Values <> mword def +R88827:88827 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R88829:88831 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R88833:88835 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R88855:88855 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R88832:88832 Coq.Numbers.BinNums <> Z ind +binder 88828:88828 <> n:230 +R88836:88844 Sail.Values <> ArithFact class +R88848:88852 Coq.ZArith.BinInt <> ::Z_scope:x_'>=?'_x not +R88847:88847 riscv <> n:230 var +R88794:88797 Sail.Prompt_monad <> exit def +R88799:88800 Coq.Init.Datatypes <> tt constr +R88093:88093 riscv_types <> M def +R88096:88101 Coq.Init.Datatypes <> option ind +R88112:88114 Coq.Init.Datatypes <> ::type_scope:x_'*'_x not +R88105:88109 Sail.Values <> mword def +R88115:88115 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R88117:88119 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R88121:88123 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R88143:88143 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R88120:88120 Coq.Numbers.BinNums <> Z ind +binder 88116:88116 <> n:231 +R88124:88132 Sail.Values <> ArithFact class +R88136:88140 Coq.ZArith.BinInt <> ::Z_scope:x_'>=?'_x not +R88135:88135 riscv <> n:231 var +R87494:87499 riscv <> _s148_ def +R87501:87506 riscv <> _s131_:225 var +R87547:87550 Coq.Init.Datatypes <> Some constr +R87591:87597 Sail.Prompt_monad <> returnm def +R87600:87603 Coq.Init.Datatypes <> Some constr +R87649:87649 Coq.Init.Datatypes <> ::core_scope:'('_x_','_x_','_'..'_','_x_')' not +R87712:87713 Coq.Init.Datatypes <> ::core_scope:'('_x_','_x_','_'..'_','_x_')' not +R87918:87918 Coq.Init.Datatypes <> ::core_scope:'('_x_','_x_','_'..'_','_x_')' not +R87705:87709 Sail.Values <> mword def +R87650:87651 bbv.HexNotationWord <> :::'''b'_x not +R87714:87721 Sail.Values <> build_ex def +R87782:87787 Coq.Init.Specif <> projT1 def +R87851:87857 Sail.Values <> sub_nat def +R87890:87895 Coq.Init.Specif <> projT1 def +R87898:87910 Sail.String <> string_length def +R87860:87865 Coq.Init.Specif <> projT1 def +R87868:87880 Sail.String <> string_length def +R87882:87885 riscv <> arg_:223 var +R87970:87970 riscv_types <> M def +R87973:87978 Coq.Init.Datatypes <> option ind +R87989:87991 Coq.Init.Datatypes <> ::type_scope:x_'*'_x not +R87982:87986 Sail.Values <> mword def +R87992:87992 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R87994:87996 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R87998:88000 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R88020:88020 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R87997:87997 Coq.Numbers.BinNums <> Z ind +binder 87993:87993 <> n:232 +R88001:88009 Sail.Values <> ArithFact class +R88013:88017 Coq.ZArith.BinInt <> ::Z_scope:x_'>=?'_x not +R88012:88012 riscv <> n:232 var +R87959:87962 Sail.Prompt_monad <> exit def +R87964:87965 Coq.Init.Datatypes <> tt constr +R87303:87303 riscv_types <> M def +R87306:87311 Coq.Init.Datatypes <> option ind +R87322:87324 Coq.Init.Datatypes <> ::type_scope:x_'*'_x not +R87315:87319 Sail.Values <> mword def +R87325:87325 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R87327:87329 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R87331:87333 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R87353:87353 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R87330:87330 Coq.Numbers.BinNums <> Z ind +binder 87326:87326 <> n:233 +R87334:87342 Sail.Values <> ArithFact class +R87346:87350 Coq.ZArith.BinInt <> ::Z_scope:x_'>=?'_x not +R87345:87345 riscv <> n:233 var +R86749:86754 riscv <> _s144_ def +R86756:86761 riscv <> _s131_:225 var +R86797:86800 Coq.Init.Datatypes <> Some constr +R86836:86842 Sail.Prompt_monad <> returnm def +R86845:86848 Coq.Init.Datatypes <> Some constr +R86889:86889 Coq.Init.Datatypes <> ::core_scope:'('_x_','_x_','_'..'_','_x_')' not +R86947:86948 Coq.Init.Datatypes <> ::core_scope:'('_x_','_x_','_'..'_','_x_')' not +R87143:87143 Coq.Init.Datatypes <> ::core_scope:'('_x_','_x_','_'..'_','_x_')' not +R86940:86944 Sail.Values <> mword def +R86890:86891 bbv.HexNotationWord <> :::'''b'_x not +R86949:86956 Sail.Values <> build_ex def +R87012:87017 Coq.Init.Specif <> projT1 def +R87076:87082 Sail.Values <> sub_nat def +R87115:87120 Coq.Init.Specif <> projT1 def +R87123:87135 Sail.String <> string_length def +R87085:87090 Coq.Init.Specif <> projT1 def +R87093:87105 Sail.String <> string_length def +R87107:87110 riscv <> arg_:223 var +R87190:87190 riscv_types <> M def +R87193:87198 Coq.Init.Datatypes <> option ind +R87209:87211 Coq.Init.Datatypes <> ::type_scope:x_'*'_x not +R87202:87206 Sail.Values <> mword def +R87212:87212 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R87214:87216 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R87218:87220 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R87240:87240 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R87217:87217 Coq.Numbers.BinNums <> Z ind +binder 87213:87213 <> n:234 +R87221:87229 Sail.Values <> ArithFact class +R87233:87237 Coq.ZArith.BinInt <> ::Z_scope:x_'>=?'_x not +R87232:87232 riscv <> n:234 var +R87179:87182 Sail.Prompt_monad <> exit def +R87184:87185 Coq.Init.Datatypes <> tt constr +R86568:86568 riscv_types <> M def +R86571:86576 Coq.Init.Datatypes <> option ind +R86587:86589 Coq.Init.Datatypes <> ::type_scope:x_'*'_x not +R86580:86584 Sail.Values <> mword def +R86590:86590 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R86592:86594 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R86596:86598 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R86618:86618 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R86595:86595 Coq.Numbers.BinNums <> Z ind +binder 86591:86591 <> n:235 +R86599:86607 Sail.Values <> ArithFact class +R86611:86615 Coq.ZArith.BinInt <> ::Z_scope:x_'>=?'_x not +R86610:86610 riscv <> n:235 var +R86059:86064 riscv <> _s140_ def +R86066:86071 riscv <> _s131_:225 var +R86102:86105 Coq.Init.Datatypes <> Some constr +R86136:86142 Sail.Prompt_monad <> returnm def +R86145:86148 Coq.Init.Datatypes <> Some constr +R86184:86184 Coq.Init.Datatypes <> ::core_scope:'('_x_','_x_','_'..'_','_x_')' not +R86237:86238 Coq.Init.Datatypes <> ::core_scope:'('_x_','_x_','_'..'_','_x_')' not +R86423:86423 Coq.Init.Datatypes <> ::core_scope:'('_x_','_x_','_'..'_','_x_')' not +R86230:86234 Sail.Values <> mword def +R86185:86186 bbv.HexNotationWord <> :::'''b'_x not +R86239:86246 Sail.Values <> build_ex def +R86297:86302 Coq.Init.Specif <> projT1 def +R86356:86362 Sail.Values <> sub_nat def +R86395:86400 Coq.Init.Specif <> projT1 def +R86403:86415 Sail.String <> string_length def +R86365:86370 Coq.Init.Specif <> projT1 def +R86373:86385 Sail.String <> string_length def +R86387:86390 riscv <> arg_:223 var +R86465:86465 riscv_types <> M def +R86468:86473 Coq.Init.Datatypes <> option ind +R86484:86486 Coq.Init.Datatypes <> ::type_scope:x_'*'_x not +R86477:86481 Sail.Values <> mword def +R86487:86487 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R86489:86491 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R86493:86495 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R86515:86515 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R86492:86492 Coq.Numbers.BinNums <> Z ind +binder 86488:86488 <> n:236 +R86496:86504 Sail.Values <> ArithFact class +R86508:86512 Coq.ZArith.BinInt <> ::Z_scope:x_'>=?'_x not +R86507:86507 riscv <> n:236 var +R86454:86457 Sail.Prompt_monad <> exit def +R86459:86460 Coq.Init.Datatypes <> tt constr +R85888:85888 riscv_types <> M def +R85891:85896 Coq.Init.Datatypes <> option ind +R85907:85909 Coq.Init.Datatypes <> ::type_scope:x_'*'_x not +R85900:85904 Sail.Values <> mword def +R85910:85910 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R85912:85914 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R85916:85918 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R85938:85938 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R85915:85915 Coq.Numbers.BinNums <> Z ind +binder 85911:85911 <> n:237 +R85919:85927 Sail.Values <> ArithFact class +R85931:85935 Coq.ZArith.BinInt <> ::Z_scope:x_'>=?'_x not +R85930:85930 riscv <> n:237 var +R85424:85429 riscv <> _s136_ def +R85431:85436 riscv <> _s131_:225 var +R85462:85465 Coq.Init.Datatypes <> Some constr +R85491:85497 Sail.Prompt_monad <> returnm def +R85500:85503 Coq.Init.Datatypes <> Some constr +R85534:85534 Coq.Init.Datatypes <> ::core_scope:'('_x_','_x_','_'..'_','_x_')' not +R85582:85583 Coq.Init.Datatypes <> ::core_scope:'('_x_','_x_','_'..'_','_x_')' not +R85758:85758 Coq.Init.Datatypes <> ::core_scope:'('_x_','_x_','_'..'_','_x_')' not +R85575:85579 Sail.Values <> mword def +R85535:85536 bbv.HexNotationWord <> :::'''b'_x not +R85584:85591 Sail.Values <> build_ex def +R85637:85642 Coq.Init.Specif <> projT1 def +R85691:85697 Sail.Values <> sub_nat def +R85730:85735 Coq.Init.Specif <> projT1 def +R85738:85750 Sail.String <> string_length def +R85700:85705 Coq.Init.Specif <> projT1 def +R85708:85720 Sail.String <> string_length def +R85722:85725 riscv <> arg_:223 var +R85795:85795 riscv_types <> M def +R85798:85803 Coq.Init.Datatypes <> option ind +R85814:85816 Coq.Init.Datatypes <> ::type_scope:x_'*'_x not +R85807:85811 Sail.Values <> mword def +R85817:85817 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R85819:85821 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R85823:85825 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R85845:85845 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R85822:85822 Coq.Numbers.BinNums <> Z ind +binder 85818:85818 <> n:238 +R85826:85834 Sail.Values <> ArithFact class +R85838:85842 Coq.ZArith.BinInt <> ::Z_scope:x_'>=?'_x not +R85837:85837 riscv <> n:238 var +R85784:85787 Sail.Prompt_monad <> exit def +R85789:85790 Coq.Init.Datatypes <> tt constr +R85263:85263 riscv_types <> M def +R85266:85271 Coq.Init.Datatypes <> option ind +R85282:85284 Coq.Init.Datatypes <> ::type_scope:x_'*'_x not +R85275:85279 Sail.Values <> mword def +R85285:85285 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R85287:85289 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R85291:85293 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R85313:85313 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R85290:85290 Coq.Numbers.BinNums <> Z ind +binder 85286:85286 <> n:239 +R85294:85302 Sail.Values <> ArithFact class +R85306:85310 Coq.ZArith.BinInt <> ::Z_scope:x_'>=?'_x not +R85305:85305 riscv <> n:239 var +R84844:84849 riscv <> _s132_ def +R84851:84856 riscv <> _s131_:225 var +R84877:84880 Coq.Init.Datatypes <> Some constr +R84901:84907 Sail.Prompt_monad <> returnm def +R84910:84913 Coq.Init.Datatypes <> Some constr +R84939:84939 Coq.Init.Datatypes <> ::core_scope:'('_x_','_x_','_'..'_','_x_')' not +R84982:84983 Coq.Init.Datatypes <> ::core_scope:'('_x_','_x_','_'..'_','_x_')' not +R85148:85148 Coq.Init.Datatypes <> ::core_scope:'('_x_','_x_','_'..'_','_x_')' not +R84975:84979 Sail.Values <> mword def +R84940:84941 bbv.HexNotationWord <> :::'''b'_x not +R84984:84991 Sail.Values <> build_ex def +R85032:85037 Coq.Init.Specif <> projT1 def +R85081:85087 Sail.Values <> sub_nat def +R85120:85125 Coq.Init.Specif <> projT1 def +R85128:85140 Sail.String <> string_length def +R85090:85095 Coq.Init.Specif <> projT1 def +R85098:85110 Sail.String <> string_length def +R85112:85115 riscv <> arg_:223 var +R85180:85180 riscv_types <> M def +R85183:85188 Coq.Init.Datatypes <> option ind +R85199:85201 Coq.Init.Datatypes <> ::type_scope:x_'*'_x not +R85192:85196 Sail.Values <> mword def +R85202:85202 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R85204:85206 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R85208:85210 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R85230:85230 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R85207:85207 Coq.Numbers.BinNums <> Z ind +binder 85203:85203 <> n:240 +R85211:85219 Sail.Values <> ArithFact class +R85223:85227 Coq.ZArith.BinInt <> ::Z_scope:x_'>=?'_x not +R85222:85222 riscv <> n:240 var +R85169:85172 Sail.Prompt_monad <> exit def +R85174:85175 Coq.Init.Datatypes <> tt constr +R84693:84693 riscv_types <> M def +R84696:84701 Coq.Init.Datatypes <> option ind +R84712:84714 Coq.Init.Datatypes <> ::type_scope:x_'*'_x not +R84705:84709 Sail.Values <> mword def +R84715:84715 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R84717:84719 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R84721:84723 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R84743:84743 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R84720:84720 Coq.Numbers.BinNums <> Z ind +binder 84716:84716 <> n:241 +R84724:84732 Sail.Values <> ArithFact class +R84736:84740 Coq.ZArith.BinInt <> ::Z_scope:x_'>=?'_x not +R84735:84735 riscv <> n:241 var +R84319:84324 riscv <> _s128_ def +R84326:84331 riscv <> _s131_:225 var +R84347:84350 Coq.Init.Datatypes <> Some constr +R84366:84372 Sail.Prompt_monad <> returnm def +R84375:84378 Coq.Init.Datatypes <> Some constr +R84399:84399 Coq.Init.Datatypes <> ::core_scope:'('_x_','_x_','_'..'_','_x_')' not +R84437:84438 Coq.Init.Datatypes <> ::core_scope:'('_x_','_x_','_'..'_','_x_')' not +R84593:84593 Coq.Init.Datatypes <> ::core_scope:'('_x_','_x_','_'..'_','_x_')' not +R84430:84434 Sail.Values <> mword def +R84400:84401 bbv.HexNotationWord <> :::'''b'_x not +R84439:84446 Sail.Values <> build_ex def +R84482:84487 Coq.Init.Specif <> projT1 def +R84526:84532 Sail.Values <> sub_nat def +R84565:84570 Coq.Init.Specif <> projT1 def +R84573:84585 Sail.String <> string_length def +R84535:84540 Coq.Init.Specif <> projT1 def +R84543:84555 Sail.String <> string_length def +R84557:84560 riscv <> arg_:223 var +R84620:84620 riscv_types <> M def +R84623:84628 Coq.Init.Datatypes <> option ind +R84639:84641 Coq.Init.Datatypes <> ::type_scope:x_'*'_x not +R84632:84636 Sail.Values <> mword def +R84642:84642 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R84644:84646 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R84648:84650 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R84670:84670 Coq.Init.Specif <> ::type_scope:'{'_x_':'_x_'&'_x_'}' not +R84647:84647 Coq.Numbers.BinNums <> Z ind +binder 84643:84643 <> n:242 +R84651:84659 Sail.Values <> ArithFact class +R84663:84667 Coq.ZArith.BinInt <> ::Z_scope:x_'>=?'_x not +R84662:84662 riscv <> n:242 var +R84609:84612 Sail.Prompt_monad <> exit def +R84614:84615 Coq.Init.Datatypes <> tt constr +def 90022:90035 <> init_base_regs +R90039:90040 Coq.Init.Datatypes <> tt constr +R90044:90047 Coq.Init.Datatypes <> unit ind +binder 90039:90047 <> pat:243 +R90052:90052 riscv_types <> M def +R90055:90058 Coq.Init.Datatypes <> unit ind +R91335:91335 riscv_types <> M def +R91338:91341 Coq.Init.Datatypes <> unit ind +R91301:91304 Sail.Prompt_monad <> :::x_'>>'_x not +R91259:91274 Sail.Prompt_monad <> :::x_'>>'_x not +R91217:91232 Sail.Prompt_monad <> :::x_'>>'_x not +R91175:91190 Sail.Prompt_monad <> :::x_'>>'_x not +R91133:91148 Sail.Prompt_monad <> :::x_'>>'_x not +R91091:91106 Sail.Prompt_monad <> :::x_'>>'_x not +R91049:91064 Sail.Prompt_monad <> :::x_'>>'_x not +R91007:91022 Sail.Prompt_monad <> :::x_'>>'_x not +R90965:90980 Sail.Prompt_monad <> :::x_'>>'_x not +R90923:90938 Sail.Prompt_monad <> :::x_'>>'_x not +R90881:90896 Sail.Prompt_monad <> :::x_'>>'_x not +R90839:90854 Sail.Prompt_monad <> :::x_'>>'_x not +R90797:90812 Sail.Prompt_monad <> :::x_'>>'_x not +R90755:90770 Sail.Prompt_monad <> :::x_'>>'_x not +R90713:90728 Sail.Prompt_monad <> :::x_'>>'_x not +R90671:90686 Sail.Prompt_monad <> :::x_'>>'_x not +R90629:90644 Sail.Prompt_monad <> :::x_'>>'_x not +R90587:90602 Sail.Prompt_monad <> :::x_'>>'_x not +R90545:90560 Sail.Prompt_monad <> :::x_'>>'_x not +R90503:90518 Sail.Prompt_monad <> :::x_'>>'_x not +R90461:90476 Sail.Prompt_monad <> :::x_'>>'_x not +R90419:90434 Sail.Prompt_monad <> :::x_'>>'_x not +R90378:90393 Sail.Prompt_monad <> :::x_'>>'_x not +R90337:90352 Sail.Prompt_monad <> :::x_'>>'_x not +R90296:90311 Sail.Prompt_monad <> :::x_'>>'_x not +R90255:90270 Sail.Prompt_monad <> :::x_'>>'_x not +R90214:90229 Sail.Prompt_monad <> :::x_'>>'_x not +R90173:90188 Sail.Prompt_monad <> :::x_'>>'_x not +R90132:90147 Sail.Prompt_monad <> :::x_'>>'_x not +R90091:90106 Sail.Prompt_monad <> :::x_'>>'_x not +R90066:90074 Sail.Prompt_monad <> write_reg def +R90083:90090 riscv <> zero_reg def +R90076:90081 riscv_types <> x1_ref def +R90107:90115 Sail.Prompt_monad <> write_reg def +R90124:90131 riscv <> zero_reg def +R90117:90122 riscv_types <> x2_ref def +R90148:90156 Sail.Prompt_monad <> write_reg def +R90165:90172 riscv <> zero_reg def +R90158:90163 riscv_types <> x3_ref def +R90189:90197 Sail.Prompt_monad <> write_reg def +R90206:90213 riscv <> zero_reg def +R90199:90204 riscv_types <> x4_ref def +R90230:90238 Sail.Prompt_monad <> write_reg def +R90247:90254 riscv <> zero_reg def +R90240:90245 riscv_types <> x5_ref def +R90271:90279 Sail.Prompt_monad <> write_reg def +R90288:90295 riscv <> zero_reg def +R90281:90286 riscv_types <> x6_ref def +R90312:90320 Sail.Prompt_monad <> write_reg def +R90329:90336 riscv <> zero_reg def +R90322:90327 riscv_types <> x7_ref def +R90353:90361 Sail.Prompt_monad <> write_reg def +R90370:90377 riscv <> zero_reg def +R90363:90368 riscv_types <> x8_ref def +R90394:90402 Sail.Prompt_monad <> write_reg def +R90411:90418 riscv <> zero_reg def +R90404:90409 riscv_types <> x9_ref def +R90435:90443 Sail.Prompt_monad <> write_reg def +R90453:90460 riscv <> zero_reg def +R90445:90451 riscv_types <> x10_ref def +R90477:90485 Sail.Prompt_monad <> write_reg def +R90495:90502 riscv <> zero_reg def +R90487:90493 riscv_types <> x11_ref def +R90519:90527 Sail.Prompt_monad <> write_reg def +R90537:90544 riscv <> zero_reg def +R90529:90535 riscv_types <> x12_ref def +R90561:90569 Sail.Prompt_monad <> write_reg def +R90579:90586 riscv <> zero_reg def +R90571:90577 riscv_types <> x13_ref def +R90603:90611 Sail.Prompt_monad <> write_reg def +R90621:90628 riscv <> zero_reg def +R90613:90619 riscv_types <> x14_ref def +R90645:90653 Sail.Prompt_monad <> write_reg def +R90663:90670 riscv <> zero_reg def +R90655:90661 riscv_types <> x15_ref def +R90687:90695 Sail.Prompt_monad <> write_reg def +R90705:90712 riscv <> zero_reg def +R90697:90703 riscv_types <> x16_ref def +R90729:90737 Sail.Prompt_monad <> write_reg def +R90747:90754 riscv <> zero_reg def +R90739:90745 riscv_types <> x17_ref def +R90771:90779 Sail.Prompt_monad <> write_reg def +R90789:90796 riscv <> zero_reg def +R90781:90787 riscv_types <> x18_ref def +R90813:90821 Sail.Prompt_monad <> write_reg def +R90831:90838 riscv <> zero_reg def +R90823:90829 riscv_types <> x19_ref def +R90855:90863 Sail.Prompt_monad <> write_reg def +R90873:90880 riscv <> zero_reg def +R90865:90871 riscv_types <> x20_ref def +R90897:90905 Sail.Prompt_monad <> write_reg def +R90915:90922 riscv <> zero_reg def +R90907:90913 riscv_types <> x21_ref def +R90939:90947 Sail.Prompt_monad <> write_reg def +R90957:90964 riscv <> zero_reg def +R90949:90955 riscv_types <> x22_ref def +R90981:90989 Sail.Prompt_monad <> write_reg def +R90999:91006 riscv <> zero_reg def +R90991:90997 riscv_types <> x23_ref def +R91023:91031 Sail.Prompt_monad <> write_reg def +R91041:91048 riscv <> zero_reg def +R91033:91039 riscv_types <> x24_ref def +R91065:91073 Sail.Prompt_monad <> write_reg def +R91083:91090 riscv <> zero_reg def +R91075:91081 riscv_types <> x25_ref def +R91107:91115 Sail.Prompt_monad <> write_reg def +R91125:91132 riscv <> zero_reg def +R91117:91123 riscv_types <> x26_ref def +R91149:91157 Sail.Prompt_monad <> write_reg def +R91167:91174 riscv <> zero_reg def +R91159:91165 riscv_types <> x27_ref def +R91191:91199 Sail.Prompt_monad <> write_reg def +R91209:91216 riscv <> zero_reg def +R91201:91207 riscv_types <> x28_ref def +R91233:91241 Sail.Prompt_monad <> write_reg def +R91251:91258 riscv <> zero_reg def +R91243:91249 riscv_types <> x29_ref def +R91275:91283 Sail.Prompt_monad <> write_reg def +R91293:91300 riscv <> zero_reg def +R91285:91291 riscv_types <> x30_ref def +R91305:91313 Sail.Prompt_monad <> write_reg def +R91323:91330 riscv <> zero_reg def +R91315:91321 riscv_types <> x31_ref def +def 91357:91372 <> initial_regstate +R91376:91383 riscv_types <> regstate rec +R91393:91395 riscv_types <> x31 proj +R91393:91395 riscv_types <> x31 proj +R91441:91443 riscv_types <> x30 proj +R91489:91491 riscv_types <> x29 proj +R91537:91539 riscv_types <> x28 proj +R91585:91587 riscv_types <> x27 proj +R91633:91635 riscv_types <> x26 proj +R91681:91683 riscv_types <> x25 proj +R91729:91731 riscv_types <> x24 proj +R91777:91779 riscv_types <> x23 proj +R91825:91827 riscv_types <> x22 proj +R91873:91875 riscv_types <> x21 proj +R91921:91923 riscv_types <> x20 proj +R91969:91971 riscv_types <> x19 proj +R92017:92019 riscv_types <> x18 proj +R92065:92067 riscv_types <> x17 proj +R92113:92115 riscv_types <> x16 proj +R92161:92163 riscv_types <> x15 proj +R92209:92211 riscv_types <> x14 proj +R92257:92259 riscv_types <> x13 proj +R92305:92307 riscv_types <> x12 proj +R92353:92355 riscv_types <> x11 proj +R92401:92403 riscv_types <> x10 proj +R92449:92450 riscv_types <> x9 proj +R92496:92497 riscv_types <> x8 proj +R92543:92544 riscv_types <> x7 proj +R92590:92591 riscv_types <> x6 proj +R92637:92638 riscv_types <> x5 proj +R92684:92685 riscv_types <> x4 proj +R92731:92732 riscv_types <> x3 proj +R92778:92779 riscv_types <> x2 proj +R92825:92826 riscv_types <> x1 proj +R92872:92879 riscv_types <> instbits proj +R92925:92930 riscv_types <> nextPC proj +R92976:92977 riscv_types <> PC proj +R91425:91429 Sail.Values <> mword def +R91401:91402 bbv.HexNotationWord <> :::'Ox'_x not +R91473:91477 Sail.Values <> mword def +R91449:91450 bbv.HexNotationWord <> :::'Ox'_x not +R91521:91525 Sail.Values <> mword def +R91497:91498 bbv.HexNotationWord <> :::'Ox'_x not +R91569:91573 Sail.Values <> mword def +R91545:91546 bbv.HexNotationWord <> :::'Ox'_x not +R91617:91621 Sail.Values <> mword def +R91593:91594 bbv.HexNotationWord <> :::'Ox'_x not +R91665:91669 Sail.Values <> mword def +R91641:91642 bbv.HexNotationWord <> :::'Ox'_x not +R91713:91717 Sail.Values <> mword def +R91689:91690 bbv.HexNotationWord <> :::'Ox'_x not +R91761:91765 Sail.Values <> mword def +R91737:91738 bbv.HexNotationWord <> :::'Ox'_x not +R91809:91813 Sail.Values <> mword def +R91785:91786 bbv.HexNotationWord <> :::'Ox'_x not +R91857:91861 Sail.Values <> mword def +R91833:91834 bbv.HexNotationWord <> :::'Ox'_x not +R91905:91909 Sail.Values <> mword def +R91881:91882 bbv.HexNotationWord <> :::'Ox'_x not +R91953:91957 Sail.Values <> mword def +R91929:91930 bbv.HexNotationWord <> :::'Ox'_x not +R92001:92005 Sail.Values <> mword def +R91977:91978 bbv.HexNotationWord <> :::'Ox'_x not +R92049:92053 Sail.Values <> mword def +R92025:92026 bbv.HexNotationWord <> :::'Ox'_x not +R92097:92101 Sail.Values <> mword def +R92073:92074 bbv.HexNotationWord <> :::'Ox'_x not +R92145:92149 Sail.Values <> mword def +R92121:92122 bbv.HexNotationWord <> :::'Ox'_x not +R92193:92197 Sail.Values <> mword def +R92169:92170 bbv.HexNotationWord <> :::'Ox'_x not +R92241:92245 Sail.Values <> mword def +R92217:92218 bbv.HexNotationWord <> :::'Ox'_x not +R92289:92293 Sail.Values <> mword def +R92265:92266 bbv.HexNotationWord <> :::'Ox'_x not +R92337:92341 Sail.Values <> mword def +R92313:92314 bbv.HexNotationWord <> :::'Ox'_x not +R92385:92389 Sail.Values <> mword def +R92361:92362 bbv.HexNotationWord <> :::'Ox'_x not +R92433:92437 Sail.Values <> mword def +R92409:92410 bbv.HexNotationWord <> :::'Ox'_x not +R92480:92484 Sail.Values <> mword def +R92456:92457 bbv.HexNotationWord <> :::'Ox'_x not +R92527:92531 Sail.Values <> mword def +R92503:92504 bbv.HexNotationWord <> :::'Ox'_x not +R92574:92578 Sail.Values <> mword def +R92550:92551 bbv.HexNotationWord <> :::'Ox'_x not +R92621:92625 Sail.Values <> mword def +R92597:92598 bbv.HexNotationWord <> :::'Ox'_x not +R92668:92672 Sail.Values <> mword def +R92644:92645 bbv.HexNotationWord <> :::'Ox'_x not +R92715:92719 Sail.Values <> mword def +R92691:92692 bbv.HexNotationWord <> :::'Ox'_x not +R92762:92766 Sail.Values <> mword def +R92738:92739 bbv.HexNotationWord <> :::'Ox'_x not +R92809:92813 Sail.Values <> mword def +R92785:92786 bbv.HexNotationWord <> :::'Ox'_x not +R92856:92860 Sail.Values <> mword def +R92832:92833 bbv.HexNotationWord <> :::'Ox'_x not +R92909:92913 Sail.Values <> mword def +R92885:92886 bbv.HexNotationWord <> :::'Ox'_x not +R92960:92964 Sail.Values <> mword def +R92936:92937 bbv.HexNotationWord <> :::'Ox'_x not +R93007:93011 Sail.Values <> mword def +R92983:92984 bbv.HexNotationWord <> :::'Ox'_x not +R93033:93048 riscv <> initial_regstate def diff --git a/snapshot/riscv.v b/snapshot/riscv.v new file mode 100644 index 0000000..472a43b --- /dev/null +++ b/snapshot/riscv.v @@ -0,0 +1,1181 @@ +(*Generated by Sail from riscv.*) +Require Import Sail.Base. +Require Import Sail.Real. +Require Import riscv_types. +Import ListNotations. +Open Scope string. +Open Scope bool. +Open Scope Z. + + +Definition is_none {a : Type} (opt : option a) : bool := + match opt with | Some _ => false | None => true end. + +Definition is_some {a : Type} (opt : option a) : bool := + match opt with | Some _ => true | None => false end. + +Definition eq_unit (_ : unit) (_ : unit) : {_bool : bool & ArithFact (_bool)} := build_ex (true). + +Definition neq_int (x : Z) (y : Z) : {_bool : bool & ArithFact (Bool.eqb (negb (x =? y)) _bool)} := + build_ex (negb (Z.eqb x y)). + +Definition neq_bool (x : bool) (y : bool) : bool := negb (Bool.eqb x y). + +Definition __id (x : Z) : {_retval : Z & ArithFact (_retval =? x)} := build_ex (x). + +Definition fdiv_int (n : Z) (m : Z) : Z := + if sumbool_of_bool (andb (Z.ltb n 0) (Z.gtb m 0)) then Z.sub (Z.quot (Z.add n 1) m) 1 + else if sumbool_of_bool (andb (Z.gtb n 0) (Z.ltb m 0)) then Z.sub (Z.quot (Z.sub n 1) m) 1 + else Z.quot n m. + +Definition fmod_int (n : Z) (m : Z) : Z := Z.sub n (Z.mul m (fdiv_int n m)). + +Definition concat_str_bits {n : Z} (str : string) (x : mword n) : string := + String.append str (string_of_bits x). + +Definition concat_str_dec (str : string) (x : Z) : string := String.append str (dec_str x). + + + +Definition sail_mask {v0 : Z} (len : Z) (v : mword v0) `{ArithFact ((len >=? 0) && (v0 >=? 0))} + : mword len := + if sumbool_of_bool (Z.leb len (length_mword v)) then vector_truncate v len else zero_extend v len. + +Definition sail_ones (n : Z) `{ArithFact (n >=? 0)} : mword n := not_vec (zeros n). + +Definition slice_mask (n : Z) (i : Z) (l : Z) `{ArithFact (n >=? 0)} : mword n := + if sumbool_of_bool (Z.geb l n) then shiftl (sail_ones n) i + else + let one : bits n := sail_mask n ('b"1" : bits 1) in + shiftl (sub_vec (shiftl one l) one) i. + +Definition EXTS {n : Z} (m : Z) (v : mword n) `{ArithFact (m >=? n)} : mword m := sign_extend v m. + +Definition EXTZ {n : Z} (m : Z) (v : mword n) `{ArithFact (m >=? n)} : mword m := zero_extend v m. + +Definition zero_reg : regtype := EXTZ 64 (Ox"0" : mword 4). +Hint Unfold zero_reg : sail. +Definition regval_from_reg (r : mword 64) : mword 64 := r. + +Definition regval_into_reg (v : mword 64) : mword 64 := v. + +Definition rX (r : Z) `{ArithFact ((0 <=? r) && (r <? 32))} : M (mword 64) := + let l__32 := r in + (if sumbool_of_bool (Z.eqb l__32 0) then returnm zero_reg + else if sumbool_of_bool (Z.eqb l__32 1) then ((read_reg x1_ref) : M (mword 64)) : M (mword 64) + else if sumbool_of_bool (Z.eqb l__32 2) then ((read_reg x2_ref) : M (mword 64)) : M (mword 64) + else if sumbool_of_bool (Z.eqb l__32 3) then ((read_reg x3_ref) : M (mword 64)) : M (mword 64) + else if sumbool_of_bool (Z.eqb l__32 4) then ((read_reg x4_ref) : M (mword 64)) : M (mword 64) + else if sumbool_of_bool (Z.eqb l__32 5) then ((read_reg x5_ref) : M (mword 64)) : M (mword 64) + else if sumbool_of_bool (Z.eqb l__32 6) then ((read_reg x6_ref) : M (mword 64)) : M (mword 64) + else if sumbool_of_bool (Z.eqb l__32 7) then ((read_reg x7_ref) : M (mword 64)) : M (mword 64) + else if sumbool_of_bool (Z.eqb l__32 8) then ((read_reg x8_ref) : M (mword 64)) : M (mword 64) + else if sumbool_of_bool (Z.eqb l__32 9) then ((read_reg x9_ref) : M (mword 64)) : M (mword 64) + else if sumbool_of_bool (Z.eqb l__32 10) then + ((read_reg x10_ref) : M (mword 64)) + : M (mword 64) + else if sumbool_of_bool (Z.eqb l__32 11) then + ((read_reg x11_ref) : M (mword 64)) + : M (mword 64) + else if sumbool_of_bool (Z.eqb l__32 12) then + ((read_reg x12_ref) : M (mword 64)) + : M (mword 64) + else if sumbool_of_bool (Z.eqb l__32 13) then + ((read_reg x13_ref) : M (mword 64)) + : M (mword 64) + else if sumbool_of_bool (Z.eqb l__32 14) then + ((read_reg x14_ref) : M (mword 64)) + : M (mword 64) + else if sumbool_of_bool (Z.eqb l__32 15) then + ((read_reg x15_ref) : M (mword 64)) + : M (mword 64) + else if sumbool_of_bool (Z.eqb l__32 16) then + ((read_reg x16_ref) : M (mword 64)) + : M (mword 64) + else if sumbool_of_bool (Z.eqb l__32 17) then + ((read_reg x17_ref) : M (mword 64)) + : M (mword 64) + else if sumbool_of_bool (Z.eqb l__32 18) then + ((read_reg x18_ref) : M (mword 64)) + : M (mword 64) + else if sumbool_of_bool (Z.eqb l__32 19) then + ((read_reg x19_ref) : M (mword 64)) + : M (mword 64) + else if sumbool_of_bool (Z.eqb l__32 20) then + ((read_reg x20_ref) : M (mword 64)) + : M (mword 64) + else if sumbool_of_bool (Z.eqb l__32 21) then + ((read_reg x21_ref) : M (mword 64)) + : M (mword 64) + else if sumbool_of_bool (Z.eqb l__32 22) then + ((read_reg x22_ref) : M (mword 64)) + : M (mword 64) + else if sumbool_of_bool (Z.eqb l__32 23) then + ((read_reg x23_ref) : M (mword 64)) + : M (mword 64) + else if sumbool_of_bool (Z.eqb l__32 24) then + ((read_reg x24_ref) : M (mword 64)) + : M (mword 64) + else if sumbool_of_bool (Z.eqb l__32 25) then + ((read_reg x25_ref) : M (mword 64)) + : M (mword 64) + else if sumbool_of_bool (Z.eqb l__32 26) then + ((read_reg x26_ref) : M (mword 64)) + : M (mword 64) + else if sumbool_of_bool (Z.eqb l__32 27) then + ((read_reg x27_ref) : M (mword 64)) + : M (mword 64) + else if sumbool_of_bool (Z.eqb l__32 28) then + ((read_reg x28_ref) : M (mword 64)) + : M (mword 64) + else if sumbool_of_bool (Z.eqb l__32 29) then + ((read_reg x29_ref) : M (mword 64)) + : M (mword 64) + else if sumbool_of_bool (Z.eqb l__32 30) then + ((read_reg x30_ref) : M (mword 64)) + : M (mword 64) + else if sumbool_of_bool (Z.eqb l__32 31) then + ((read_reg x31_ref) : M (mword 64)) + : M (mword 64) + else assert_exp' false "invalid register number" >>= fun _ => exit tt) >>= fun v : regtype => + returnm (regval_from_reg v). + +Definition wX (r : Z) (in_v : mword 64) `{ArithFact ((0 <=? r) && (r <? 32))} : M (unit) := + let v := regval_into_reg in_v in + let l__0 := r in + (if sumbool_of_bool (Z.eqb l__0 0) then returnm tt + else if sumbool_of_bool (Z.eqb l__0 1) then write_reg x1_ref v : M (unit) + else if sumbool_of_bool (Z.eqb l__0 2) then write_reg x2_ref v : M (unit) + else if sumbool_of_bool (Z.eqb l__0 3) then write_reg x3_ref v : M (unit) + else if sumbool_of_bool (Z.eqb l__0 4) then write_reg x4_ref v : M (unit) + else if sumbool_of_bool (Z.eqb l__0 5) then write_reg x5_ref v : M (unit) + else if sumbool_of_bool (Z.eqb l__0 6) then write_reg x6_ref v : M (unit) + else if sumbool_of_bool (Z.eqb l__0 7) then write_reg x7_ref v : M (unit) + else if sumbool_of_bool (Z.eqb l__0 8) then write_reg x8_ref v : M (unit) + else if sumbool_of_bool (Z.eqb l__0 9) then write_reg x9_ref v : M (unit) + else if sumbool_of_bool (Z.eqb l__0 10) then write_reg x10_ref v : M (unit) + else if sumbool_of_bool (Z.eqb l__0 11) then write_reg x11_ref v : M (unit) + else if sumbool_of_bool (Z.eqb l__0 12) then write_reg x12_ref v : M (unit) + else if sumbool_of_bool (Z.eqb l__0 13) then write_reg x13_ref v : M (unit) + else if sumbool_of_bool (Z.eqb l__0 14) then write_reg x14_ref v : M (unit) + else if sumbool_of_bool (Z.eqb l__0 15) then write_reg x15_ref v : M (unit) + else if sumbool_of_bool (Z.eqb l__0 16) then write_reg x16_ref v : M (unit) + else if sumbool_of_bool (Z.eqb l__0 17) then write_reg x17_ref v : M (unit) + else if sumbool_of_bool (Z.eqb l__0 18) then write_reg x18_ref v : M (unit) + else if sumbool_of_bool (Z.eqb l__0 19) then write_reg x19_ref v : M (unit) + else if sumbool_of_bool (Z.eqb l__0 20) then write_reg x20_ref v : M (unit) + else if sumbool_of_bool (Z.eqb l__0 21) then write_reg x21_ref v : M (unit) + else if sumbool_of_bool (Z.eqb l__0 22) then write_reg x22_ref v : M (unit) + else if sumbool_of_bool (Z.eqb l__0 23) then write_reg x23_ref v : M (unit) + else if sumbool_of_bool (Z.eqb l__0 24) then write_reg x24_ref v : M (unit) + else if sumbool_of_bool (Z.eqb l__0 25) then write_reg x25_ref v : M (unit) + else if sumbool_of_bool (Z.eqb l__0 26) then write_reg x26_ref v : M (unit) + else if sumbool_of_bool (Z.eqb l__0 27) then write_reg x27_ref v : M (unit) + else if sumbool_of_bool (Z.eqb l__0 28) then write_reg x28_ref v : M (unit) + else if sumbool_of_bool (Z.eqb l__0 29) then write_reg x29_ref v : M (unit) + else if sumbool_of_bool (Z.eqb l__0 30) then write_reg x30_ref v : M (unit) + else if sumbool_of_bool (Z.eqb l__0 31) then write_reg x31_ref v : M (unit) + else assert_exp' false "invalid register number" >>= fun _ => exit tt) : M (unit). + +Definition rX_bits (i : mword 5) : M (mword 64) := (rX (projT1 (uint i))) : M (mword 64). + +Definition wX_bits (i : mword 5) (data : mword 64) : M (unit) := + (wX (projT1 (uint i)) data) : M (unit). + +Definition reg_name_abi (r : mword 5) : M (string) := + let b__0 := r in + (if eq_vec b__0 ('b"00000" : mword 5) then returnm "zero" + else if eq_vec b__0 ('b"00001" : mword 5) then returnm "ra" + else if eq_vec b__0 ('b"00010" : mword 5) then returnm "sp" + else if eq_vec b__0 ('b"00011" : mword 5) then returnm "gp" + else if eq_vec b__0 ('b"00100" : mword 5) then returnm "tp" + else if eq_vec b__0 ('b"00101" : mword 5) then returnm "t0" + else if eq_vec b__0 ('b"00110" : mword 5) then returnm "t1" + else if eq_vec b__0 ('b"00111" : mword 5) then returnm "t2" + else if eq_vec b__0 ('b"01000" : mword 5) then returnm "fp" + else if eq_vec b__0 ('b"01001" : mword 5) then returnm "s1" + else if eq_vec b__0 ('b"01010" : mword 5) then returnm "a0" + else if eq_vec b__0 ('b"01011" : mword 5) then returnm "a1" + else if eq_vec b__0 ('b"01100" : mword 5) then returnm "a2" + else if eq_vec b__0 ('b"01101" : mword 5) then returnm "a3" + else if eq_vec b__0 ('b"01110" : mword 5) then returnm "a4" + else if eq_vec b__0 ('b"01111" : mword 5) then returnm "a5" + else if eq_vec b__0 ('b"10000" : mword 5) then returnm "a6" + else if eq_vec b__0 ('b"10001" : mword 5) then returnm "a7" + else if eq_vec b__0 ('b"10010" : mword 5) then returnm "s2" + else if eq_vec b__0 ('b"10011" : mword 5) then returnm "s3" + else if eq_vec b__0 ('b"10100" : mword 5) then returnm "s4" + else if eq_vec b__0 ('b"10101" : mword 5) then returnm "s5" + else if eq_vec b__0 ('b"10110" : mword 5) then returnm "s6" + else if eq_vec b__0 ('b"10111" : mword 5) then returnm "s7" + else if eq_vec b__0 ('b"11000" : mword 5) then returnm "s8" + else if eq_vec b__0 ('b"11001" : mword 5) then returnm "s9" + else if eq_vec b__0 ('b"11010" : mword 5) then returnm "s10" + else if eq_vec b__0 ('b"11011" : mword 5) then returnm "s11" + else if eq_vec b__0 ('b"11100" : mword 5) then returnm "t3" + else if eq_vec b__0 ('b"11101" : mword 5) then returnm "t4" + else if eq_vec b__0 ('b"11110" : mword 5) then returnm "t5" + else if eq_vec b__0 ('b"11111" : mword 5) then returnm "t6" + else + assert_exp' false "Pattern match failure at riscv_regs.sail 160:2 - 193:3" >>= fun _ => exit tt) + : M (string). + +Definition reg_name_forwards (arg_ : mword 5) : M (string) := + let b__0 := arg_ in + (if eq_vec b__0 ('b"00000" : mword 5) then returnm "zero" + else if eq_vec b__0 ('b"00001" : mword 5) then returnm "ra" + else if eq_vec b__0 ('b"00010" : mword 5) then returnm "sp" + else if eq_vec b__0 ('b"00011" : mword 5) then returnm "gp" + else if eq_vec b__0 ('b"00100" : mword 5) then returnm "tp" + else if eq_vec b__0 ('b"00101" : mword 5) then returnm "t0" + else if eq_vec b__0 ('b"00110" : mword 5) then returnm "t1" + else if eq_vec b__0 ('b"00111" : mword 5) then returnm "t2" + else if eq_vec b__0 ('b"01000" : mword 5) then returnm "fp" + else if eq_vec b__0 ('b"01001" : mword 5) then returnm "s1" + else if eq_vec b__0 ('b"01010" : mword 5) then returnm "a0" + else if eq_vec b__0 ('b"01011" : mword 5) then returnm "a1" + else if eq_vec b__0 ('b"01100" : mword 5) then returnm "a2" + else if eq_vec b__0 ('b"01101" : mword 5) then returnm "a3" + else if eq_vec b__0 ('b"01110" : mword 5) then returnm "a4" + else if eq_vec b__0 ('b"01111" : mword 5) then returnm "a5" + else if eq_vec b__0 ('b"10000" : mword 5) then returnm "a6" + else if eq_vec b__0 ('b"10001" : mword 5) then returnm "a7" + else if eq_vec b__0 ('b"10010" : mword 5) then returnm "s2" + else if eq_vec b__0 ('b"10011" : mword 5) then returnm "s3" + else if eq_vec b__0 ('b"10100" : mword 5) then returnm "s4" + else if eq_vec b__0 ('b"10101" : mword 5) then returnm "s5" + else if eq_vec b__0 ('b"10110" : mword 5) then returnm "s6" + else if eq_vec b__0 ('b"10111" : mword 5) then returnm "s7" + else if eq_vec b__0 ('b"11000" : mword 5) then returnm "s8" + else if eq_vec b__0 ('b"11001" : mword 5) then returnm "s9" + else if eq_vec b__0 ('b"11010" : mword 5) then returnm "s10" + else if eq_vec b__0 ('b"11011" : mword 5) then returnm "s11" + else if eq_vec b__0 ('b"11100" : mword 5) then returnm "t3" + else if eq_vec b__0 ('b"11101" : mword 5) then returnm "t4" + else if eq_vec b__0 ('b"11110" : mword 5) then returnm "t5" + else if eq_vec b__0 ('b"11111" : mword 5) then returnm "t6" + else assert_exp' false "Pattern match failure at unknown location" >>= fun _ => exit tt) + : M (string). + +Definition reg_name_backwards (arg_ : string) : M (mword 5) := + let p0_ := arg_ in + (if generic_eq p0_ "zero" then returnm ('b"00000" : mword 5) + else if generic_eq p0_ "ra" then returnm ('b"00001" : mword 5) + else if generic_eq p0_ "sp" then returnm ('b"00010" : mword 5) + else if generic_eq p0_ "gp" then returnm ('b"00011" : mword 5) + else if generic_eq p0_ "tp" then returnm ('b"00100" : mword 5) + else if generic_eq p0_ "t0" then returnm ('b"00101" : mword 5) + else if generic_eq p0_ "t1" then returnm ('b"00110" : mword 5) + else if generic_eq p0_ "t2" then returnm ('b"00111" : mword 5) + else if generic_eq p0_ "fp" then returnm ('b"01000" : mword 5) + else if generic_eq p0_ "s1" then returnm ('b"01001" : mword 5) + else if generic_eq p0_ "a0" then returnm ('b"01010" : mword 5) + else if generic_eq p0_ "a1" then returnm ('b"01011" : mword 5) + else if generic_eq p0_ "a2" then returnm ('b"01100" : mword 5) + else if generic_eq p0_ "a3" then returnm ('b"01101" : mword 5) + else if generic_eq p0_ "a4" then returnm ('b"01110" : mword 5) + else if generic_eq p0_ "a5" then returnm ('b"01111" : mword 5) + else if generic_eq p0_ "a6" then returnm ('b"10000" : mword 5) + else if generic_eq p0_ "a7" then returnm ('b"10001" : mword 5) + else if generic_eq p0_ "s2" then returnm ('b"10010" : mword 5) + else if generic_eq p0_ "s3" then returnm ('b"10011" : mword 5) + else if generic_eq p0_ "s4" then returnm ('b"10100" : mword 5) + else if generic_eq p0_ "s5" then returnm ('b"10101" : mword 5) + else if generic_eq p0_ "s6" then returnm ('b"10110" : mword 5) + else if generic_eq p0_ "s7" then returnm ('b"10111" : mword 5) + else if generic_eq p0_ "s8" then returnm ('b"11000" : mword 5) + else if generic_eq p0_ "s9" then returnm ('b"11001" : mword 5) + else if generic_eq p0_ "s10" then returnm ('b"11010" : mword 5) + else if generic_eq p0_ "s11" then returnm ('b"11011" : mword 5) + else if generic_eq p0_ "t3" then returnm ('b"11100" : mword 5) + else if generic_eq p0_ "t4" then returnm ('b"11101" : mword 5) + else if generic_eq p0_ "t5" then returnm ('b"11110" : mword 5) + else if generic_eq p0_ "t6" then returnm ('b"11111" : mword 5) + else assert_exp' false "Pattern match failure at unknown location" >>= fun _ => exit tt) + : M (mword 5). + +Definition reg_name_forwards_matches (arg_ : mword 5) : bool := + let b__0 := arg_ in + if eq_vec b__0 ('b"00000" : mword 5) then true + else if eq_vec b__0 ('b"00001" : mword 5) then true + else if eq_vec b__0 ('b"00010" : mword 5) then true + else if eq_vec b__0 ('b"00011" : mword 5) then true + else if eq_vec b__0 ('b"00100" : mword 5) then true + else if eq_vec b__0 ('b"00101" : mword 5) then true + else if eq_vec b__0 ('b"00110" : mword 5) then true + else if eq_vec b__0 ('b"00111" : mword 5) then true + else if eq_vec b__0 ('b"01000" : mword 5) then true + else if eq_vec b__0 ('b"01001" : mword 5) then true + else if eq_vec b__0 ('b"01010" : mword 5) then true + else if eq_vec b__0 ('b"01011" : mword 5) then true + else if eq_vec b__0 ('b"01100" : mword 5) then true + else if eq_vec b__0 ('b"01101" : mword 5) then true + else if eq_vec b__0 ('b"01110" : mword 5) then true + else if eq_vec b__0 ('b"01111" : mword 5) then true + else if eq_vec b__0 ('b"10000" : mword 5) then true + else if eq_vec b__0 ('b"10001" : mword 5) then true + else if eq_vec b__0 ('b"10010" : mword 5) then true + else if eq_vec b__0 ('b"10011" : mword 5) then true + else if eq_vec b__0 ('b"10100" : mword 5) then true + else if eq_vec b__0 ('b"10101" : mword 5) then true + else if eq_vec b__0 ('b"10110" : mword 5) then true + else if eq_vec b__0 ('b"10111" : mword 5) then true + else if eq_vec b__0 ('b"11000" : mword 5) then true + else if eq_vec b__0 ('b"11001" : mword 5) then true + else if eq_vec b__0 ('b"11010" : mword 5) then true + else if eq_vec b__0 ('b"11011" : mword 5) then true + else if eq_vec b__0 ('b"11100" : mword 5) then true + else if eq_vec b__0 ('b"11101" : mword 5) then true + else if eq_vec b__0 ('b"11110" : mword 5) then true + else if eq_vec b__0 ('b"11111" : mword 5) then true + else false. + +Definition reg_name_backwards_matches (arg_ : string) : bool := + let p0_ := arg_ in + if generic_eq p0_ "zero" then true + else if generic_eq p0_ "ra" then true + else if generic_eq p0_ "sp" then true + else if generic_eq p0_ "gp" then true + else if generic_eq p0_ "tp" then true + else if generic_eq p0_ "t0" then true + else if generic_eq p0_ "t1" then true + else if generic_eq p0_ "t2" then true + else if generic_eq p0_ "fp" then true + else if generic_eq p0_ "s1" then true + else if generic_eq p0_ "a0" then true + else if generic_eq p0_ "a1" then true + else if generic_eq p0_ "a2" then true + else if generic_eq p0_ "a3" then true + else if generic_eq p0_ "a4" then true + else if generic_eq p0_ "a5" then true + else if generic_eq p0_ "a6" then true + else if generic_eq p0_ "a7" then true + else if generic_eq p0_ "s2" then true + else if generic_eq p0_ "s3" then true + else if generic_eq p0_ "s4" then true + else if generic_eq p0_ "s5" then true + else if generic_eq p0_ "s6" then true + else if generic_eq p0_ "s7" then true + else if generic_eq p0_ "s8" then true + else if generic_eq p0_ "s9" then true + else if generic_eq p0_ "s10" then true + else if generic_eq p0_ "s11" then true + else if generic_eq p0_ "t3" then true + else if generic_eq p0_ "t4" then true + else if generic_eq p0_ "t5" then true + else if generic_eq p0_ "t6" then true + else false. + +Definition _s124_ (_s125_ : string) : option string := + let _s126_ := _s125_ in + if string_startswith _s126_ "t6" then + match (string_drop _s126_ (projT1 (string_length "t6"))) with | s_ => Some s_ end + else None. + +Definition _s120_ (_s121_ : string) : option string := + let _s122_ := _s121_ in + if string_startswith _s122_ "t5" then + match (string_drop _s122_ (projT1 (string_length "t5"))) with | s_ => Some s_ end + else None. + +Definition _s116_ (_s117_ : string) : option string := + let _s118_ := _s117_ in + if string_startswith _s118_ "t4" then + match (string_drop _s118_ (projT1 (string_length "t4"))) with | s_ => Some s_ end + else None. + +Definition _s112_ (_s113_ : string) : option string := + let _s114_ := _s113_ in + if string_startswith _s114_ "t3" then + match (string_drop _s114_ (projT1 (string_length "t3"))) with | s_ => Some s_ end + else None. + +Definition _s108_ (_s109_ : string) : option string := + let _s110_ := _s109_ in + if string_startswith _s110_ "s11" then + match (string_drop _s110_ (projT1 (string_length "s11"))) with | s_ => Some s_ end + else None. + +Definition _s104_ (_s105_ : string) : option string := + let _s106_ := _s105_ in + if string_startswith _s106_ "s10" then + match (string_drop _s106_ (projT1 (string_length "s10"))) with | s_ => Some s_ end + else None. + +Definition _s100_ (_s101_ : string) : option string := + let _s102_ := _s101_ in + if string_startswith _s102_ "s9" then + match (string_drop _s102_ (projT1 (string_length "s9"))) with | s_ => Some s_ end + else None. + +Definition _s96_ (_s97_ : string) : option string := + let _s98_ := _s97_ in + if string_startswith _s98_ "s8" then + match (string_drop _s98_ (projT1 (string_length "s8"))) with | s_ => Some s_ end + else None. + +Definition _s92_ (_s93_ : string) : option string := + let _s94_ := _s93_ in + if string_startswith _s94_ "s7" then + match (string_drop _s94_ (projT1 (string_length "s7"))) with | s_ => Some s_ end + else None. + +Definition _s88_ (_s89_ : string) : option string := + let _s90_ := _s89_ in + if string_startswith _s90_ "s6" then + match (string_drop _s90_ (projT1 (string_length "s6"))) with | s_ => Some s_ end + else None. + +Definition _s84_ (_s85_ : string) : option string := + let _s86_ := _s85_ in + if string_startswith _s86_ "s5" then + match (string_drop _s86_ (projT1 (string_length "s5"))) with | s_ => Some s_ end + else None. + +Definition _s80_ (_s81_ : string) : option string := + let _s82_ := _s81_ in + if string_startswith _s82_ "s4" then + match (string_drop _s82_ (projT1 (string_length "s4"))) with | s_ => Some s_ end + else None. + +Definition _s76_ (_s77_ : string) : option string := + let _s78_ := _s77_ in + if string_startswith _s78_ "s3" then + match (string_drop _s78_ (projT1 (string_length "s3"))) with | s_ => Some s_ end + else None. + +Definition _s72_ (_s73_ : string) : option string := + let _s74_ := _s73_ in + if string_startswith _s74_ "s2" then + match (string_drop _s74_ (projT1 (string_length "s2"))) with | s_ => Some s_ end + else None. + +Definition _s68_ (_s69_ : string) : option string := + let _s70_ := _s69_ in + if string_startswith _s70_ "a7" then + match (string_drop _s70_ (projT1 (string_length "a7"))) with | s_ => Some s_ end + else None. + +Definition _s64_ (_s65_ : string) : option string := + let _s66_ := _s65_ in + if string_startswith _s66_ "a6" then + match (string_drop _s66_ (projT1 (string_length "a6"))) with | s_ => Some s_ end + else None. + +Definition _s60_ (_s61_ : string) : option string := + let _s62_ := _s61_ in + if string_startswith _s62_ "a5" then + match (string_drop _s62_ (projT1 (string_length "a5"))) with | s_ => Some s_ end + else None. + +Definition _s56_ (_s57_ : string) : option string := + let _s58_ := _s57_ in + if string_startswith _s58_ "a4" then + match (string_drop _s58_ (projT1 (string_length "a4"))) with | s_ => Some s_ end + else None. + +Definition _s52_ (_s53_ : string) : option string := + let _s54_ := _s53_ in + if string_startswith _s54_ "a3" then + match (string_drop _s54_ (projT1 (string_length "a3"))) with | s_ => Some s_ end + else None. + +Definition _s48_ (_s49_ : string) : option string := + let _s50_ := _s49_ in + if string_startswith _s50_ "a2" then + match (string_drop _s50_ (projT1 (string_length "a2"))) with | s_ => Some s_ end + else None. + +Definition _s44_ (_s45_ : string) : option string := + let _s46_ := _s45_ in + if string_startswith _s46_ "a1" then + match (string_drop _s46_ (projT1 (string_length "a1"))) with | s_ => Some s_ end + else None. + +Definition _s40_ (_s41_ : string) : option string := + let _s42_ := _s41_ in + if string_startswith _s42_ "a0" then + match (string_drop _s42_ (projT1 (string_length "a0"))) with | s_ => Some s_ end + else None. + +Definition _s36_ (_s37_ : string) : option string := + let _s38_ := _s37_ in + if string_startswith _s38_ "s1" then + match (string_drop _s38_ (projT1 (string_length "s1"))) with | s_ => Some s_ end + else None. + +Definition _s32_ (_s33_ : string) : option string := + let _s34_ := _s33_ in + if string_startswith _s34_ "fp" then + match (string_drop _s34_ (projT1 (string_length "fp"))) with | s_ => Some s_ end + else None. + +Definition _s28_ (_s29_ : string) : option string := + let _s30_ := _s29_ in + if string_startswith _s30_ "t2" then + match (string_drop _s30_ (projT1 (string_length "t2"))) with | s_ => Some s_ end + else None. + +Definition _s24_ (_s25_ : string) : option string := + let _s26_ := _s25_ in + if string_startswith _s26_ "t1" then + match (string_drop _s26_ (projT1 (string_length "t1"))) with | s_ => Some s_ end + else None. + +Definition _s20_ (_s21_ : string) : option string := + let _s22_ := _s21_ in + if string_startswith _s22_ "t0" then + match (string_drop _s22_ (projT1 (string_length "t0"))) with | s_ => Some s_ end + else None. + +Definition _s16_ (_s17_ : string) : option string := + let _s18_ := _s17_ in + if string_startswith _s18_ "tp" then + match (string_drop _s18_ (projT1 (string_length "tp"))) with | s_ => Some s_ end + else None. + +Definition _s12_ (_s13_ : string) : option string := + let _s14_ := _s13_ in + if string_startswith _s14_ "gp" then + match (string_drop _s14_ (projT1 (string_length "gp"))) with | s_ => Some s_ end + else None. + +Definition _s8_ (_s9_ : string) : option string := + let _s10_ := _s9_ in + if string_startswith _s10_ "sp" then + match (string_drop _s10_ (projT1 (string_length "sp"))) with | s_ => Some s_ end + else None. + +Definition _s4_ (_s5_ : string) : option string := + let _s6_ := _s5_ in + if string_startswith _s6_ "ra" then + match (string_drop _s6_ (projT1 (string_length "ra"))) with | s_ => Some s_ end + else None. + +Definition _s0_ (_s1_ : string) : option string := + let _s2_ := _s1_ in + if string_startswith _s2_ "zero" then + match (string_drop _s2_ (projT1 (string_length "zero"))) with | s_ => Some s_ end + else None. + +Definition reg_name_matches_prefix (arg_ : string) + : M (option ((mword 5 * {n : Z & ArithFact (n >=? 0)}))) := + let _s3_ := arg_ in + (if match (_s0_ _s3_) with | Some s_ => true | _ => false end then + (match (_s0_ _s3_) with + | Some s_ => + returnm (Some + ('b"00000" + : mword 5, build_ex + (projT1 + (sub_nat (projT1 (string_length arg_)) (projT1 (string_length s_)))))) + | _ => exit tt : M (option ((mword 5 * {n : Z & ArithFact (n >=? 0)}))) + end) + : M (option ((mword 5 * {n : Z & ArithFact (n >=? 0)}))) + else if match (_s4_ _s3_) with | Some s_ => true | _ => false end then + (match (_s4_ _s3_) with + | Some s_ => + returnm (Some + ('b"00001" + : mword 5, build_ex + (projT1 + (sub_nat (projT1 (string_length arg_)) (projT1 (string_length s_)))))) + | _ => exit tt : M (option ((mword 5 * {n : Z & ArithFact (n >=? 0)}))) + end) + : M (option ((mword 5 * {n : Z & ArithFact (n >=? 0)}))) + else if match (_s8_ _s3_) with | Some s_ => true | _ => false end then + (match (_s8_ _s3_) with + | Some s_ => + returnm (Some + ('b"00010" + : mword 5, build_ex + (projT1 + (sub_nat (projT1 (string_length arg_)) (projT1 (string_length s_)))))) + | _ => exit tt : M (option ((mword 5 * {n : Z & ArithFact (n >=? 0)}))) + end) + : M (option ((mword 5 * {n : Z & ArithFact (n >=? 0)}))) + else if match (_s12_ _s3_) with | Some s_ => true | _ => false end then + (match (_s12_ _s3_) with + | Some s_ => + returnm (Some + ('b"00011" + : mword 5, build_ex + (projT1 + (sub_nat (projT1 (string_length arg_)) (projT1 (string_length s_)))))) + | _ => exit tt : M (option ((mword 5 * {n : Z & ArithFact (n >=? 0)}))) + end) + : M (option ((mword 5 * {n : Z & ArithFact (n >=? 0)}))) + else if match (_s16_ _s3_) with | Some s_ => true | _ => false end then + (match (_s16_ _s3_) with + | Some s_ => + returnm (Some + ('b"00100" + : mword 5, build_ex + (projT1 + (sub_nat (projT1 (string_length arg_)) (projT1 (string_length s_)))))) + | _ => exit tt : M (option ((mword 5 * {n : Z & ArithFact (n >=? 0)}))) + end) + : M (option ((mword 5 * {n : Z & ArithFact (n >=? 0)}))) + else if match (_s20_ _s3_) with | Some s_ => true | _ => false end then + (match (_s20_ _s3_) with + | Some s_ => + returnm (Some + ('b"00101" + : mword 5, build_ex + (projT1 + (sub_nat (projT1 (string_length arg_)) (projT1 (string_length s_)))))) + | _ => exit tt : M (option ((mword 5 * {n : Z & ArithFact (n >=? 0)}))) + end) + : M (option ((mword 5 * {n : Z & ArithFact (n >=? 0)}))) + else if match (_s24_ _s3_) with | Some s_ => true | _ => false end then + (match (_s24_ _s3_) with + | Some s_ => + returnm (Some + ('b"00110" + : mword 5, build_ex + (projT1 + (sub_nat (projT1 (string_length arg_)) (projT1 (string_length s_)))))) + | _ => exit tt : M (option ((mword 5 * {n : Z & ArithFact (n >=? 0)}))) + end) + : M (option ((mword 5 * {n : Z & ArithFact (n >=? 0)}))) + else if match (_s28_ _s3_) with | Some s_ => true | _ => false end then + (match (_s28_ _s3_) with + | Some s_ => + returnm (Some + ('b"00111" + : mword 5, build_ex + (projT1 + (sub_nat (projT1 (string_length arg_)) (projT1 (string_length s_)))))) + | _ => exit tt : M (option ((mword 5 * {n : Z & ArithFact (n >=? 0)}))) + end) + : M (option ((mword 5 * {n : Z & ArithFact (n >=? 0)}))) + else if match (_s32_ _s3_) with | Some s_ => true | _ => false end then + (match (_s32_ _s3_) with + | Some s_ => + returnm (Some + ('b"01000" + : mword 5, build_ex + (projT1 + (sub_nat (projT1 (string_length arg_)) (projT1 (string_length s_)))))) + | _ => exit tt : M (option ((mword 5 * {n : Z & ArithFact (n >=? 0)}))) + end) + : M (option ((mword 5 * {n : Z & ArithFact (n >=? 0)}))) + else if match (_s36_ _s3_) with | Some s_ => true | _ => false end then + (match (_s36_ _s3_) with + | Some s_ => + returnm (Some + ('b"01001" + : mword 5, build_ex + (projT1 + (sub_nat (projT1 (string_length arg_)) (projT1 (string_length s_)))))) + | _ => exit tt : M (option ((mword 5 * {n : Z & ArithFact (n >=? 0)}))) + end) + : M (option ((mword 5 * {n : Z & ArithFact (n >=? 0)}))) + else if match (_s40_ _s3_) with | Some s_ => true | _ => false end then + (match (_s40_ _s3_) with + | Some s_ => + returnm (Some + ('b"01010" + : mword 5, build_ex + (projT1 + (sub_nat (projT1 (string_length arg_)) (projT1 (string_length s_)))))) + | _ => exit tt : M (option ((mword 5 * {n : Z & ArithFact (n >=? 0)}))) + end) + : M (option ((mword 5 * {n : Z & ArithFact (n >=? 0)}))) + else if match (_s44_ _s3_) with | Some s_ => true | _ => false end then + (match (_s44_ _s3_) with + | Some s_ => + returnm (Some + ('b"01011" + : mword 5, build_ex + (projT1 + (sub_nat (projT1 (string_length arg_)) (projT1 (string_length s_)))))) + | _ => exit tt : M (option ((mword 5 * {n : Z & ArithFact (n >=? 0)}))) + end) + : M (option ((mword 5 * {n : Z & ArithFact (n >=? 0)}))) + else if match (_s48_ _s3_) with | Some s_ => true | _ => false end then + (match (_s48_ _s3_) with + | Some s_ => + returnm (Some + ('b"01100" + : mword 5, build_ex + (projT1 + (sub_nat (projT1 (string_length arg_)) (projT1 (string_length s_)))))) + | _ => exit tt : M (option ((mword 5 * {n : Z & ArithFact (n >=? 0)}))) + end) + : M (option ((mword 5 * {n : Z & ArithFact (n >=? 0)}))) + else if match (_s52_ _s3_) with | Some s_ => true | _ => false end then + (match (_s52_ _s3_) with + | Some s_ => + returnm (Some + ('b"01101" + : mword 5, build_ex + (projT1 + (sub_nat (projT1 (string_length arg_)) (projT1 (string_length s_)))))) + | _ => exit tt : M (option ((mword 5 * {n : Z & ArithFact (n >=? 0)}))) + end) + : M (option ((mword 5 * {n : Z & ArithFact (n >=? 0)}))) + else if match (_s56_ _s3_) with | Some s_ => true | _ => false end then + (match (_s56_ _s3_) with + | Some s_ => + returnm (Some + ('b"01110" + : mword 5, build_ex + (projT1 + (sub_nat (projT1 (string_length arg_)) (projT1 (string_length s_)))))) + | _ => exit tt : M (option ((mword 5 * {n : Z & ArithFact (n >=? 0)}))) + end) + : M (option ((mword 5 * {n : Z & ArithFact (n >=? 0)}))) + else if match (_s60_ _s3_) with | Some s_ => true | _ => false end then + (match (_s60_ _s3_) with + | Some s_ => + returnm (Some + ('b"01111" + : mword 5, build_ex + (projT1 + (sub_nat (projT1 (string_length arg_)) (projT1 (string_length s_)))))) + | _ => exit tt : M (option ((mword 5 * {n : Z & ArithFact (n >=? 0)}))) + end) + : M (option ((mword 5 * {n : Z & ArithFact (n >=? 0)}))) + else if match (_s64_ _s3_) with | Some s_ => true | _ => false end then + (match (_s64_ _s3_) with + | Some s_ => + returnm (Some + ('b"10000" + : mword 5, build_ex + (projT1 + (sub_nat (projT1 (string_length arg_)) (projT1 (string_length s_)))))) + | _ => exit tt : M (option ((mword 5 * {n : Z & ArithFact (n >=? 0)}))) + end) + : M (option ((mword 5 * {n : Z & ArithFact (n >=? 0)}))) + else if match (_s68_ _s3_) with | Some s_ => true | _ => false end then + (match (_s68_ _s3_) with + | Some s_ => + returnm (Some + ('b"10001" + : mword 5, build_ex + (projT1 + (sub_nat (projT1 (string_length arg_)) (projT1 (string_length s_)))))) + | _ => exit tt : M (option ((mword 5 * {n : Z & ArithFact (n >=? 0)}))) + end) + : M (option ((mword 5 * {n : Z & ArithFact (n >=? 0)}))) + else if match (_s72_ _s3_) with | Some s_ => true | _ => false end then + (match (_s72_ _s3_) with + | Some s_ => + returnm (Some + ('b"10010" + : mword 5, build_ex + (projT1 + (sub_nat (projT1 (string_length arg_)) (projT1 (string_length s_)))))) + | _ => exit tt : M (option ((mword 5 * {n : Z & ArithFact (n >=? 0)}))) + end) + : M (option ((mword 5 * {n : Z & ArithFact (n >=? 0)}))) + else if match (_s76_ _s3_) with | Some s_ => true | _ => false end then + (match (_s76_ _s3_) with + | Some s_ => + returnm (Some + ('b"10011" + : mword 5, build_ex + (projT1 + (sub_nat (projT1 (string_length arg_)) (projT1 (string_length s_)))))) + | _ => exit tt : M (option ((mword 5 * {n : Z & ArithFact (n >=? 0)}))) + end) + : M (option ((mword 5 * {n : Z & ArithFact (n >=? 0)}))) + else if match (_s80_ _s3_) with | Some s_ => true | _ => false end then + (match (_s80_ _s3_) with + | Some s_ => + returnm (Some + ('b"10100" + : mword 5, build_ex + (projT1 + (sub_nat (projT1 (string_length arg_)) (projT1 (string_length s_)))))) + | _ => exit tt : M (option ((mword 5 * {n : Z & ArithFact (n >=? 0)}))) + end) + : M (option ((mword 5 * {n : Z & ArithFact (n >=? 0)}))) + else if match (_s84_ _s3_) with | Some s_ => true | _ => false end then + (match (_s84_ _s3_) with + | Some s_ => + returnm (Some + ('b"10101" + : mword 5, build_ex + (projT1 + (sub_nat (projT1 (string_length arg_)) (projT1 (string_length s_)))))) + | _ => exit tt : M (option ((mword 5 * {n : Z & ArithFact (n >=? 0)}))) + end) + : M (option ((mword 5 * {n : Z & ArithFact (n >=? 0)}))) + else if match (_s88_ _s3_) with | Some s_ => true | _ => false end then + (match (_s88_ _s3_) with + | Some s_ => + returnm (Some + ('b"10110" + : mword 5, build_ex + (projT1 + (sub_nat (projT1 (string_length arg_)) (projT1 (string_length s_)))))) + | _ => exit tt : M (option ((mword 5 * {n : Z & ArithFact (n >=? 0)}))) + end) + : M (option ((mword 5 * {n : Z & ArithFact (n >=? 0)}))) + else if match (_s92_ _s3_) with | Some s_ => true | _ => false end then + (match (_s92_ _s3_) with + | Some s_ => + returnm (Some + ('b"10111" + : mword 5, build_ex + (projT1 + (sub_nat (projT1 (string_length arg_)) (projT1 (string_length s_)))))) + | _ => exit tt : M (option ((mword 5 * {n : Z & ArithFact (n >=? 0)}))) + end) + : M (option ((mword 5 * {n : Z & ArithFact (n >=? 0)}))) + else if match (_s96_ _s3_) with | Some s_ => true | _ => false end then + (match (_s96_ _s3_) with + | Some s_ => + returnm (Some + ('b"11000" + : mword 5, build_ex + (projT1 + (sub_nat (projT1 (string_length arg_)) (projT1 (string_length s_)))))) + | _ => exit tt : M (option ((mword 5 * {n : Z & ArithFact (n >=? 0)}))) + end) + : M (option ((mword 5 * {n : Z & ArithFact (n >=? 0)}))) + else if match (_s100_ _s3_) with | Some s_ => true | _ => false end then + (match (_s100_ _s3_) with + | Some s_ => + returnm (Some + ('b"11001" + : mword 5, build_ex + (projT1 + (sub_nat (projT1 (string_length arg_)) (projT1 (string_length s_)))))) + | _ => exit tt : M (option ((mword 5 * {n : Z & ArithFact (n >=? 0)}))) + end) + : M (option ((mword 5 * {n : Z & ArithFact (n >=? 0)}))) + else if match (_s104_ _s3_) with | Some s_ => true | _ => false end then + (match (_s104_ _s3_) with + | Some s_ => + returnm (Some + ('b"11010" + : mword 5, build_ex + (projT1 + (sub_nat (projT1 (string_length arg_)) (projT1 (string_length s_)))))) + | _ => exit tt : M (option ((mword 5 * {n : Z & ArithFact (n >=? 0)}))) + end) + : M (option ((mword 5 * {n : Z & ArithFact (n >=? 0)}))) + else if match (_s108_ _s3_) with | Some s_ => true | _ => false end then + (match (_s108_ _s3_) with + | Some s_ => + returnm (Some + ('b"11011" + : mword 5, build_ex + (projT1 + (sub_nat (projT1 (string_length arg_)) (projT1 (string_length s_)))))) + | _ => exit tt : M (option ((mword 5 * {n : Z & ArithFact (n >=? 0)}))) + end) + : M (option ((mword 5 * {n : Z & ArithFact (n >=? 0)}))) + else if match (_s112_ _s3_) with | Some s_ => true | _ => false end then + (match (_s112_ _s3_) with + | Some s_ => + returnm (Some + ('b"11100" + : mword 5, build_ex + (projT1 + (sub_nat (projT1 (string_length arg_)) (projT1 (string_length s_)))))) + | _ => exit tt : M (option ((mword 5 * {n : Z & ArithFact (n >=? 0)}))) + end) + : M (option ((mword 5 * {n : Z & ArithFact (n >=? 0)}))) + else if match (_s116_ _s3_) with | Some s_ => true | _ => false end then + (match (_s116_ _s3_) with + | Some s_ => + returnm (Some + ('b"11101" + : mword 5, build_ex + (projT1 + (sub_nat (projT1 (string_length arg_)) (projT1 (string_length s_)))))) + | _ => exit tt : M (option ((mword 5 * {n : Z & ArithFact (n >=? 0)}))) + end) + : M (option ((mword 5 * {n : Z & ArithFact (n >=? 0)}))) + else if match (_s120_ _s3_) with | Some s_ => true | _ => false end then + (match (_s120_ _s3_) with + | Some s_ => + returnm (Some + ('b"11110" + : mword 5, build_ex + (projT1 + (sub_nat (projT1 (string_length arg_)) (projT1 (string_length s_)))))) + | _ => exit tt : M (option ((mword 5 * {n : Z & ArithFact (n >=? 0)}))) + end) + : M (option ((mword 5 * {n : Z & ArithFact (n >=? 0)}))) + else if match (_s124_ _s3_) with | Some s_ => true | _ => false end then + (match (_s124_ _s3_) with + | Some s_ => + returnm (Some + ('b"11111" + : mword 5, build_ex + (projT1 + (sub_nat (projT1 (string_length arg_)) (projT1 (string_length s_)))))) + | _ => exit tt : M (option ((mword 5 * {n : Z & ArithFact (n >=? 0)}))) + end) + : M (option ((mword 5 * {n : Z & ArithFact (n >=? 0)}))) + else returnm None) : M (option ((mword 5 * {n : Z & ArithFact (n >=? 0)}))). + +Definition creg_name_forwards (arg_ : mword 3) : M (string) := + let b__0 := arg_ in + (if eq_vec b__0 ('b"000" : mword 3) then returnm "s0" + else if eq_vec b__0 ('b"001" : mword 3) then returnm "s1" + else if eq_vec b__0 ('b"010" : mword 3) then returnm "a0" + else if eq_vec b__0 ('b"011" : mword 3) then returnm "a1" + else if eq_vec b__0 ('b"100" : mword 3) then returnm "a2" + else if eq_vec b__0 ('b"101" : mword 3) then returnm "a3" + else if eq_vec b__0 ('b"110" : mword 3) then returnm "a4" + else if eq_vec b__0 ('b"111" : mword 3) then returnm "a5" + else assert_exp' false "Pattern match failure at unknown location" >>= fun _ => exit tt) + : M (string). + +Definition creg_name_backwards (arg_ : string) : M (mword 3) := + let p0_ := arg_ in + (if generic_eq p0_ "s0" then returnm ('b"000" : mword 3) + else if generic_eq p0_ "s1" then returnm ('b"001" : mword 3) + else if generic_eq p0_ "a0" then returnm ('b"010" : mword 3) + else if generic_eq p0_ "a1" then returnm ('b"011" : mword 3) + else if generic_eq p0_ "a2" then returnm ('b"100" : mword 3) + else if generic_eq p0_ "a3" then returnm ('b"101" : mword 3) + else if generic_eq p0_ "a4" then returnm ('b"110" : mword 3) + else if generic_eq p0_ "a5" then returnm ('b"111" : mword 3) + else assert_exp' false "Pattern match failure at unknown location" >>= fun _ => exit tt) + : M (mword 3). + +Definition creg_name_forwards_matches (arg_ : mword 3) : bool := + let b__0 := arg_ in + if eq_vec b__0 ('b"000" : mword 3) then true + else if eq_vec b__0 ('b"001" : mword 3) then true + else if eq_vec b__0 ('b"010" : mword 3) then true + else if eq_vec b__0 ('b"011" : mword 3) then true + else if eq_vec b__0 ('b"100" : mword 3) then true + else if eq_vec b__0 ('b"101" : mword 3) then true + else if eq_vec b__0 ('b"110" : mword 3) then true + else if eq_vec b__0 ('b"111" : mword 3) then true + else false. + +Definition creg_name_backwards_matches (arg_ : string) : bool := + let p0_ := arg_ in + if generic_eq p0_ "s0" then true + else if generic_eq p0_ "s1" then true + else if generic_eq p0_ "a0" then true + else if generic_eq p0_ "a1" then true + else if generic_eq p0_ "a2" then true + else if generic_eq p0_ "a3" then true + else if generic_eq p0_ "a4" then true + else if generic_eq p0_ "a5" then true + else false. + +Definition _s156_ (_s157_ : string) : option string := + let _s158_ := _s157_ in + if string_startswith _s158_ "a5" then + match (string_drop _s158_ (projT1 (string_length "a5"))) with | s_ => Some s_ end + else None. + +Definition _s152_ (_s153_ : string) : option string := + let _s154_ := _s153_ in + if string_startswith _s154_ "a4" then + match (string_drop _s154_ (projT1 (string_length "a4"))) with | s_ => Some s_ end + else None. + +Definition _s148_ (_s149_ : string) : option string := + let _s150_ := _s149_ in + if string_startswith _s150_ "a3" then + match (string_drop _s150_ (projT1 (string_length "a3"))) with | s_ => Some s_ end + else None. + +Definition _s144_ (_s145_ : string) : option string := + let _s146_ := _s145_ in + if string_startswith _s146_ "a2" then + match (string_drop _s146_ (projT1 (string_length "a2"))) with | s_ => Some s_ end + else None. + +Definition _s140_ (_s141_ : string) : option string := + let _s142_ := _s141_ in + if string_startswith _s142_ "a1" then + match (string_drop _s142_ (projT1 (string_length "a1"))) with | s_ => Some s_ end + else None. + +Definition _s136_ (_s137_ : string) : option string := + let _s138_ := _s137_ in + if string_startswith _s138_ "a0" then + match (string_drop _s138_ (projT1 (string_length "a0"))) with | s_ => Some s_ end + else None. + +Definition _s132_ (_s133_ : string) : option string := + let _s134_ := _s133_ in + if string_startswith _s134_ "s1" then + match (string_drop _s134_ (projT1 (string_length "s1"))) with | s_ => Some s_ end + else None. + +Definition _s128_ (_s129_ : string) : option string := + let _s130_ := _s129_ in + if string_startswith _s130_ "s0" then + match (string_drop _s130_ (projT1 (string_length "s0"))) with | s_ => Some s_ end + else None. + +Definition creg_name_matches_prefix (arg_ : string) + : M (option ((mword 3 * {n : Z & ArithFact (n >=? 0)}))) := + let _s131_ := arg_ in + (if match (_s128_ _s131_) with | Some s_ => true | _ => false end then + (match (_s128_ _s131_) with + | Some s_ => + returnm (Some + ('b"000" + : mword 3, build_ex + (projT1 + (sub_nat (projT1 (string_length arg_)) (projT1 (string_length s_)))))) + | _ => exit tt : M (option ((mword 3 * {n : Z & ArithFact (n >=? 0)}))) + end) + : M (option ((mword 3 * {n : Z & ArithFact (n >=? 0)}))) + else if match (_s132_ _s131_) with | Some s_ => true | _ => false end then + (match (_s132_ _s131_) with + | Some s_ => + returnm (Some + ('b"001" + : mword 3, build_ex + (projT1 + (sub_nat (projT1 (string_length arg_)) (projT1 (string_length s_)))))) + | _ => exit tt : M (option ((mword 3 * {n : Z & ArithFact (n >=? 0)}))) + end) + : M (option ((mword 3 * {n : Z & ArithFact (n >=? 0)}))) + else if match (_s136_ _s131_) with | Some s_ => true | _ => false end then + (match (_s136_ _s131_) with + | Some s_ => + returnm (Some + ('b"010" + : mword 3, build_ex + (projT1 + (sub_nat (projT1 (string_length arg_)) (projT1 (string_length s_)))))) + | _ => exit tt : M (option ((mword 3 * {n : Z & ArithFact (n >=? 0)}))) + end) + : M (option ((mword 3 * {n : Z & ArithFact (n >=? 0)}))) + else if match (_s140_ _s131_) with | Some s_ => true | _ => false end then + (match (_s140_ _s131_) with + | Some s_ => + returnm (Some + ('b"011" + : mword 3, build_ex + (projT1 + (sub_nat (projT1 (string_length arg_)) (projT1 (string_length s_)))))) + | _ => exit tt : M (option ((mword 3 * {n : Z & ArithFact (n >=? 0)}))) + end) + : M (option ((mword 3 * {n : Z & ArithFact (n >=? 0)}))) + else if match (_s144_ _s131_) with | Some s_ => true | _ => false end then + (match (_s144_ _s131_) with + | Some s_ => + returnm (Some + ('b"100" + : mword 3, build_ex + (projT1 + (sub_nat (projT1 (string_length arg_)) (projT1 (string_length s_)))))) + | _ => exit tt : M (option ((mword 3 * {n : Z & ArithFact (n >=? 0)}))) + end) + : M (option ((mword 3 * {n : Z & ArithFact (n >=? 0)}))) + else if match (_s148_ _s131_) with | Some s_ => true | _ => false end then + (match (_s148_ _s131_) with + | Some s_ => + returnm (Some + ('b"101" + : mword 3, build_ex + (projT1 + (sub_nat (projT1 (string_length arg_)) (projT1 (string_length s_)))))) + | _ => exit tt : M (option ((mword 3 * {n : Z & ArithFact (n >=? 0)}))) + end) + : M (option ((mword 3 * {n : Z & ArithFact (n >=? 0)}))) + else if match (_s152_ _s131_) with | Some s_ => true | _ => false end then + (match (_s152_ _s131_) with + | Some s_ => + returnm (Some + ('b"110" + : mword 3, build_ex + (projT1 + (sub_nat (projT1 (string_length arg_)) (projT1 (string_length s_)))))) + | _ => exit tt : M (option ((mword 3 * {n : Z & ArithFact (n >=? 0)}))) + end) + : M (option ((mword 3 * {n : Z & ArithFact (n >=? 0)}))) + else if match (_s156_ _s131_) with | Some s_ => true | _ => false end then + (match (_s156_ _s131_) with + | Some s_ => + returnm (Some + ('b"111" + : mword 3, build_ex + (projT1 + (sub_nat (projT1 (string_length arg_)) (projT1 (string_length s_)))))) + | _ => exit tt : M (option ((mword 3 * {n : Z & ArithFact (n >=? 0)}))) + end) + : M (option ((mword 3 * {n : Z & ArithFact (n >=? 0)}))) + else returnm None) + : M (option ((mword 3 * {n : Z & ArithFact (n >=? 0)}))). + +Definition init_base_regs '(tt : unit) : M (unit) := + write_reg x1_ref zero_reg >> + write_reg x2_ref zero_reg >> + write_reg x3_ref zero_reg >> + write_reg x4_ref zero_reg >> + write_reg x5_ref zero_reg >> + write_reg x6_ref zero_reg >> + write_reg x7_ref zero_reg >> + write_reg x8_ref zero_reg >> + write_reg x9_ref zero_reg >> + write_reg x10_ref zero_reg >> + write_reg x11_ref zero_reg >> + write_reg x12_ref zero_reg >> + write_reg x13_ref zero_reg >> + write_reg x14_ref zero_reg >> + write_reg x15_ref zero_reg >> + write_reg x16_ref zero_reg >> + write_reg x17_ref zero_reg >> + write_reg x18_ref zero_reg >> + write_reg x19_ref zero_reg >> + write_reg x20_ref zero_reg >> + write_reg x21_ref zero_reg >> + write_reg x22_ref zero_reg >> + write_reg x23_ref zero_reg >> + write_reg x24_ref zero_reg >> + write_reg x25_ref zero_reg >> + write_reg x26_ref zero_reg >> + write_reg x27_ref zero_reg >> + write_reg x28_ref zero_reg >> + write_reg x29_ref zero_reg >> + write_reg x30_ref zero_reg >> write_reg x31_ref zero_reg : M (unit). + +Definition initial_regstate : regstate := + {| x31 := (Ox"0000000000000000" : mword 64); + x30 := (Ox"0000000000000000" : mword 64); + x29 := (Ox"0000000000000000" : mword 64); + x28 := (Ox"0000000000000000" : mword 64); + x27 := (Ox"0000000000000000" : mword 64); + x26 := (Ox"0000000000000000" : mword 64); + x25 := (Ox"0000000000000000" : mword 64); + x24 := (Ox"0000000000000000" : mword 64); + x23 := (Ox"0000000000000000" : mword 64); + x22 := (Ox"0000000000000000" : mword 64); + x21 := (Ox"0000000000000000" : mword 64); + x20 := (Ox"0000000000000000" : mword 64); + x19 := (Ox"0000000000000000" : mword 64); + x18 := (Ox"0000000000000000" : mword 64); + x17 := (Ox"0000000000000000" : mword 64); + x16 := (Ox"0000000000000000" : mword 64); + x15 := (Ox"0000000000000000" : mword 64); + x14 := (Ox"0000000000000000" : mword 64); + x13 := (Ox"0000000000000000" : mword 64); + x12 := (Ox"0000000000000000" : mword 64); + x11 := (Ox"0000000000000000" : mword 64); + x10 := (Ox"0000000000000000" : mword 64); + x9 := (Ox"0000000000000000" : mword 64); + x8 := (Ox"0000000000000000" : mword 64); + x7 := (Ox"0000000000000000" : mword 64); + x6 := (Ox"0000000000000000" : mword 64); + x5 := (Ox"0000000000000000" : mword 64); + x4 := (Ox"0000000000000000" : mword 64); + x3 := (Ox"0000000000000000" : mword 64); + x2 := (Ox"0000000000000000" : mword 64); + x1 := (Ox"0000000000000000" : mword 64); + instbits := (Ox"0000000000000000" : mword 64); + nextPC := (Ox"0000000000000000" : mword 64); + PC := (Ox"0000000000000000" : mword 64) |}. + + +Hint Unfold initial_regstate : sail. + + diff --git a/snapshot/riscv.vo b/snapshot/riscv.vo Binary files differnew file mode 100644 index 0000000..52bac8e --- /dev/null +++ b/snapshot/riscv.vo diff --git a/snapshot/riscv.vok b/snapshot/riscv.vok new file mode 100644 index 0000000..e69de29 --- /dev/null +++ b/snapshot/riscv.vok diff --git a/snapshot/riscv.vos b/snapshot/riscv.vos new file mode 100644 index 0000000..e69de29 --- /dev/null +++ b/snapshot/riscv.vos diff --git a/snapshot/riscv_types.glob b/snapshot/riscv_types.glob new file mode 100644 index 0000000..b3c962d --- /dev/null +++ b/snapshot/riscv_types.glob @@ -0,0 +1,1839 @@ +DIGEST 6d11d268a1391e92be18958ef8df7999 +Friscv_types +R49:57 Sail.Base <> <> lib +R75:83 Sail.Real <> <> lib +def 170:173 <> bits +R180:180 Coq.Numbers.BinNums <> Z ind +binder 176:176 <> n:1 +R193:197 Sail.Values <> mword def +R199:199 riscv_types <> n:1 var +def 214:217 <> xlen +R222:222 Coq.Numbers.BinNums <> Z ind +R243:246 riscv_types <> xlen def +def 268:277 <> xlen_bytes +R282:282 Coq.Numbers.BinNums <> Z ind +R302:311 riscv_types <> xlen_bytes def +def 333:340 <> xlenbits +R353:356 riscv_types <> bits def +def 374:380 <> regtype +R393:400 riscv_types <> xlenbits def +def 415:419 <> regno +R426:426 Coq.Numbers.BinNums <> Z ind +binder 422:422 <> n:2 +R430:438 Sail.Values <> ArithFact class +R441:441 Coq.Init.Datatypes <> ::bool_scope:x_'&&'_x not +R449:454 Coq.Init.Datatypes <> ::bool_scope:x_'&&'_x not +R462:462 Coq.Init.Datatypes <> ::bool_scope:x_'&&'_x not +R443:447 Coq.ZArith.BinInt <> ::Z_scope:x_'<=?'_x not +R448:448 riscv_types <> n:2 var +R456:459 Coq.ZArith.BinInt <> ::Z_scope:x_'<?'_x not +R455:455 riscv_types <> n:2 var +binder 430:463 <> H:3 +R476:476 Coq.Numbers.BinNums <> Z ind +def 491:496 <> regidx +R509:512 riscv_types <> bits def +def 529:535 <> cregidx +R548:551 riscv_types <> bits def +def 568:572 <> csreg +R585:588 riscv_types <> bits def +ind 605:618 <> register_value +constr 628:640 <> Regval_vector +constr 686:696 <> Regval_list +constr 742:754 <> Regval_option +constr 802:811 <> Regval_bit +constr 842:864 <> Regval_bitvector_64_dec +R663:666 Coq.Init.Logic <> ::type_scope:x_'->'_x not +R644:647 Coq.Init.Datatypes <> list ind +R649:662 riscv_types <> register_value:4 ind +R667:680 riscv_types <> register_value:4 ind +R719:722 Coq.Init.Logic <> ::type_scope:x_'->'_x not +R700:703 Coq.Init.Datatypes <> list ind +R705:718 riscv_types <> register_value:4 ind +R723:736 riscv_types <> register_value:4 ind +R779:782 Coq.Init.Logic <> ::type_scope:x_'->'_x not +R758:763 Coq.Init.Datatypes <> option ind +R765:778 riscv_types <> register_value:4 ind +R783:796 riscv_types <> register_value:4 ind +R819:822 Coq.Init.Logic <> ::type_scope:x_'->'_x not +R815:818 Sail.Values <> bitU ind +R823:836 riscv_types <> register_value:4 ind +R876:879 Coq.Init.Logic <> ::type_scope:x_'->'_x not +R868:872 Sail.Values <> mword def +R880:893 riscv_types <> register_value:4 ind +R906:919 riscv_types <> register_value ind +R906:919 riscv_types <> register_value ind +rec 948:955 <> regstate +proj 965:967 <> x31 +proj 985:987 <> x30 +proj 1005:1007 <> x29 +proj 1025:1027 <> x28 +proj 1045:1047 <> x27 +proj 1065:1067 <> x26 +proj 1085:1087 <> x25 +proj 1105:1107 <> x24 +proj 1125:1127 <> x23 +proj 1145:1147 <> x22 +proj 1165:1167 <> x21 +proj 1185:1187 <> x20 +proj 1205:1207 <> x19 +proj 1225:1227 <> x18 +proj 1245:1247 <> x17 +proj 1265:1267 <> x16 +proj 1285:1287 <> x15 +proj 1305:1307 <> x14 +proj 1325:1327 <> x13 +proj 1345:1347 <> x12 +proj 1365:1367 <> x11 +proj 1385:1387 <> x10 +proj 1405:1406 <> x9 +proj 1424:1425 <> x8 +proj 1443:1444 <> x7 +proj 1462:1463 <> x6 +proj 1481:1482 <> x5 +proj 1500:1501 <> x4 +proj 1519:1520 <> x3 +proj 1538:1539 <> x2 +proj 1557:1558 <> x1 +proj 1576:1583 <> instbits +proj 1601:1606 <> nextPC +proj 1624:1625 <> PC +R971:975 Sail.Values <> mword def +R991:995 Sail.Values <> mword def +R1011:1015 Sail.Values <> mword def +R1031:1035 Sail.Values <> mword def +R1051:1055 Sail.Values <> mword def +R1071:1075 Sail.Values <> mword def +R1091:1095 Sail.Values <> mword def +R1111:1115 Sail.Values <> mword def +R1131:1135 Sail.Values <> mword def +R1151:1155 Sail.Values <> mword def +R1171:1175 Sail.Values <> mword def +R1191:1195 Sail.Values <> mword def +R1211:1215 Sail.Values <> mword def +R1231:1235 Sail.Values <> mword def +R1251:1255 Sail.Values <> mword def +R1271:1275 Sail.Values <> mword def +R1291:1295 Sail.Values <> mword def +R1311:1315 Sail.Values <> mword def +R1331:1335 Sail.Values <> mword def +R1351:1355 Sail.Values <> mword def +R1371:1375 Sail.Values <> mword def +R1391:1395 Sail.Values <> mword def +R1410:1414 Sail.Values <> mword def +R1429:1433 Sail.Values <> mword def +R1448:1452 Sail.Values <> mword def +R1467:1471 Sail.Values <> mword def +R1486:1490 Sail.Values <> mword def +R1505:1509 Sail.Values <> mword def +R1524:1528 Sail.Values <> mword def +R1543:1547 Sail.Values <> mword def +R1562:1566 Sail.Values <> mword def +R1587:1591 Sail.Values <> mword def +R1610:1614 Sail.Values <> mword def +R1629:1633 Sail.Values <> mword def +R1653:1660 riscv_types <> regstate rec +R1653:1660 riscv_types <> regstate rec +R1737:1750 riscv_types <> Build_regstate constr +R1884:1897 riscv_types <> Build_regstate constr +not 1691:1691 <> :::'{['_x_'with'_'x31'_':='_x_']}' +R2090:2103 riscv_types <> Build_regstate constr +R2237:2250 riscv_types <> Build_regstate constr +not 2044:2044 <> :::'{['_x_'with'_'x30'_':='_x_']}' +R2443:2456 riscv_types <> Build_regstate constr +R2590:2603 riscv_types <> Build_regstate constr +not 2397:2397 <> :::'{['_x_'with'_'x29'_':='_x_']}' +R2796:2809 riscv_types <> Build_regstate constr +R2943:2956 riscv_types <> Build_regstate constr +not 2750:2750 <> :::'{['_x_'with'_'x28'_':='_x_']}' +R3149:3162 riscv_types <> Build_regstate constr +R3296:3309 riscv_types <> Build_regstate constr +not 3103:3103 <> :::'{['_x_'with'_'x27'_':='_x_']}' +R3502:3515 riscv_types <> Build_regstate constr +R3649:3662 riscv_types <> Build_regstate constr +not 3456:3456 <> :::'{['_x_'with'_'x26'_':='_x_']}' +R3855:3868 riscv_types <> Build_regstate constr +R4002:4015 riscv_types <> Build_regstate constr +not 3809:3809 <> :::'{['_x_'with'_'x25'_':='_x_']}' +R4208:4221 riscv_types <> Build_regstate constr +R4355:4368 riscv_types <> Build_regstate constr +not 4162:4162 <> :::'{['_x_'with'_'x24'_':='_x_']}' +R4561:4574 riscv_types <> Build_regstate constr +R4708:4721 riscv_types <> Build_regstate constr +not 4515:4515 <> :::'{['_x_'with'_'x23'_':='_x_']}' +R4914:4927 riscv_types <> Build_regstate constr +R5061:5074 riscv_types <> Build_regstate constr +not 4868:4868 <> :::'{['_x_'with'_'x22'_':='_x_']}' +R5267:5280 riscv_types <> Build_regstate constr +R5413:5426 riscv_types <> Build_regstate constr +not 5221:5221 <> :::'{['_x_'with'_'x21'_':='_x_']}' +R5618:5631 riscv_types <> Build_regstate constr +R5764:5777 riscv_types <> Build_regstate constr +not 5572:5572 <> :::'{['_x_'with'_'x20'_':='_x_']}' +R5969:5982 riscv_types <> Build_regstate constr +R6115:6128 riscv_types <> Build_regstate constr +not 5923:5923 <> :::'{['_x_'with'_'x19'_':='_x_']}' +R6320:6333 riscv_types <> Build_regstate constr +R6466:6479 riscv_types <> Build_regstate constr +not 6274:6274 <> :::'{['_x_'with'_'x18'_':='_x_']}' +R6671:6684 riscv_types <> Build_regstate constr +R6817:6830 riscv_types <> Build_regstate constr +not 6625:6625 <> :::'{['_x_'with'_'x17'_':='_x_']}' +R7022:7035 riscv_types <> Build_regstate constr +R7168:7181 riscv_types <> Build_regstate constr +not 6976:6976 <> :::'{['_x_'with'_'x16'_':='_x_']}' +R7373:7386 riscv_types <> Build_regstate constr +R7519:7532 riscv_types <> Build_regstate constr +not 7327:7327 <> :::'{['_x_'with'_'x15'_':='_x_']}' +R7724:7737 riscv_types <> Build_regstate constr +R7870:7883 riscv_types <> Build_regstate constr +not 7678:7678 <> :::'{['_x_'with'_'x14'_':='_x_']}' +R8075:8088 riscv_types <> Build_regstate constr +R8221:8234 riscv_types <> Build_regstate constr +not 8029:8029 <> :::'{['_x_'with'_'x13'_':='_x_']}' +R8426:8439 riscv_types <> Build_regstate constr +R8572:8585 riscv_types <> Build_regstate constr +not 8380:8380 <> :::'{['_x_'with'_'x12'_':='_x_']}' +R8777:8790 riscv_types <> Build_regstate constr +R8923:8936 riscv_types <> Build_regstate constr +not 8731:8731 <> :::'{['_x_'with'_'x11'_':='_x_']}' +R9128:9141 riscv_types <> Build_regstate constr +R9274:9287 riscv_types <> Build_regstate constr +not 9082:9082 <> :::'{['_x_'with'_'x10'_':='_x_']}' +R9478:9491 riscv_types <> Build_regstate constr +R9624:9637 riscv_types <> Build_regstate constr +not 9433:9433 <> :::'{['_x_'with'_'x9'_':='_x_']}' +R9828:9841 riscv_types <> Build_regstate constr +R9974:9987 riscv_types <> Build_regstate constr +not 9783:9783 <> :::'{['_x_'with'_'x8'_':='_x_']}' +R10178:10191 riscv_types <> Build_regstate constr +R10324:10337 riscv_types <> Build_regstate constr +not 10133:10133 <> :::'{['_x_'with'_'x7'_':='_x_']}' +R10528:10541 riscv_types <> Build_regstate constr +R10674:10687 riscv_types <> Build_regstate constr +not 10483:10483 <> :::'{['_x_'with'_'x6'_':='_x_']}' +R10878:10891 riscv_types <> Build_regstate constr +R11024:11037 riscv_types <> Build_regstate constr +not 10833:10833 <> :::'{['_x_'with'_'x5'_':='_x_']}' +R11228:11241 riscv_types <> Build_regstate constr +R11374:11387 riscv_types <> Build_regstate constr +not 11183:11183 <> :::'{['_x_'with'_'x4'_':='_x_']}' +R11578:11591 riscv_types <> Build_regstate constr +R11724:11737 riscv_types <> Build_regstate constr +not 11533:11533 <> :::'{['_x_'with'_'x3'_':='_x_']}' +R11928:11941 riscv_types <> Build_regstate constr +R12074:12087 riscv_types <> Build_regstate constr +not 11883:11883 <> :::'{['_x_'with'_'x2'_':='_x_']}' +R12278:12291 riscv_types <> Build_regstate constr +R12424:12437 riscv_types <> Build_regstate constr +not 12233:12233 <> :::'{['_x_'with'_'x1'_':='_x_']}' +R12634:12647 riscv_types <> Build_regstate constr +R12780:12793 riscv_types <> Build_regstate constr +not 12583:12583 <> :::'{['_x_'with'_'instbits'_':='_x_']}' +R12988:13001 riscv_types <> Build_regstate constr +R13134:13147 riscv_types <> Build_regstate constr +not 12939:12939 <> :::'{['_x_'with'_'nextPC'_':='_x_']}' +R13338:13351 riscv_types <> Build_regstate constr +R13484:13497 riscv_types <> Build_regstate constr +not 13293:13293 <> :::'{['_x_'with'_'PC'_':='_x_']}' +def 13648:13660 <> bit_of_regval +R13675:13688 riscv_types <> register_value ind +binder 13663:13671 <> merge_var:41 +R13693:13698 Coq.Init.Datatypes <> option ind +R13700:13703 Sail.Values <> bitU ind +R13717:13725 riscv_types <> merge_var:41 var +R13734:13743 riscv_types <> Regval_bit constr +R13750:13753 Coq.Init.Datatypes <> Some constr +R13764:13767 Coq.Init.Datatypes <> None constr +def 13786:13798 <> regval_of_bit +R13805:13808 Sail.Values <> bitU ind +binder 13801:13801 <> v:43 +R13813:13826 riscv_types <> register_value ind +R13831:13840 riscv_types <> Regval_bit constr +R13842:13842 riscv_types <> v:43 var +def 13857:13882 <> bitvector_64_dec_of_regval +R13897:13910 riscv_types <> register_value ind +binder 13885:13893 <> merge_var:44 +R13915:13920 Coq.Init.Datatypes <> option ind +R13923:13927 Sail.Values <> mword def +R13945:13953 riscv_types <> merge_var:44 var +R13962:13984 riscv_types <> Regval_bitvector_64_dec constr +R13991:13994 Coq.Init.Datatypes <> Some constr +R14005:14008 Coq.Init.Datatypes <> None constr +def 14027:14052 <> regval_of_bitvector_64_dec +R14059:14063 Sail.Values <> mword def +binder 14055:14055 <> v:46 +R14071:14084 riscv_types <> register_value ind +R14089:14111 riscv_types <> Regval_bitvector_64_dec constr +R14113:14113 riscv_types <> v:46 var +def 14130:14145 <> vector_of_regval +binder 14148:14148 <> a:47 +binder 14151:14151 <> n:48 +R14180:14183 Coq.Init.Logic <> ::type_scope:x_'->'_x not +R14166:14179 riscv_types <> register_value ind +R14184:14189 Coq.Init.Datatypes <> option ind +R14191:14191 riscv_types <> a:47 var +binder 14154:14162 <> of_regval:49 +R14200:14213 riscv_types <> register_value ind +binder 14195:14196 <> rv:50 +R14218:14223 Coq.Init.Datatypes <> option ind +R14226:14228 Sail.Values <> vec def +R14230:14230 riscv_types <> a:47 var +R14232:14232 riscv_types <> n:48 var +R14244:14245 riscv_types <> rv:50 var +R14256:14268 riscv_types <> Regval_vector constr +R14279:14282 Coq.ZArith.BinInt <> ::Z_scope:x_'=?'_x not +R14278:14278 riscv_types <> n:48 var +R14283:14293 Sail.Values <> length_list def +R14367:14370 Coq.Init.Datatypes <> None constr +R14302:14309 Sail.Values <> map_bind def +R14328:14336 Sail.Values <> just_list def +R14339:14346 Coq.Lists.List <> map def +R14348:14356 riscv_types <> of_regval:49 var +R14312:14322 Sail.Values <> vec_of_list def +R14324:14324 riscv_types <> n:48 var +R14381:14384 Coq.Init.Datatypes <> None constr +def 14403:14418 <> regval_of_vector +binder 14421:14421 <> a:52 +binder 14423:14426 <> size:53 +R14443:14446 Coq.Init.Logic <> ::type_scope:x_'->'_x not +R14442:14442 riscv_types <> a:52 var +R14447:14460 riscv_types <> register_value ind +binder 14430:14438 <> regval_of:54 +R14469:14471 Sail.Values <> vec def +R14473:14473 riscv_types <> a:52 var +R14475:14478 riscv_types <> size:53 var +binder 14464:14465 <> xs:55 +R14483:14496 riscv_types <> register_value ind +R14501:14513 riscv_types <> Regval_vector constr +R14516:14523 Coq.Lists.List <> map def +R14536:14546 Sail.Values <> list_of_vec def +R14548:14549 riscv_types <> xs:55 var +R14525:14533 riscv_types <> regval_of:54 var +def 14566:14579 <> list_of_regval +binder 14582:14582 <> a:56 +R14612:14615 Coq.Init.Logic <> ::type_scope:x_'->'_x not +R14598:14611 riscv_types <> register_value ind +R14616:14621 Coq.Init.Datatypes <> option ind +R14623:14623 riscv_types <> a:56 var +binder 14586:14594 <> of_regval:57 +R14632:14645 riscv_types <> register_value ind +binder 14627:14628 <> rv:58 +R14650:14655 Coq.Init.Datatypes <> option ind +R14658:14661 Coq.Init.Datatypes <> list ind +R14663:14663 riscv_types <> a:56 var +R14675:14676 riscv_types <> rv:58 var +R14687:14697 riscv_types <> Regval_list constr +R14704:14712 Sail.Values <> just_list def +R14715:14722 Coq.Lists.List <> map def +R14724:14732 riscv_types <> of_regval:57 var +R14746:14749 Coq.Init.Datatypes <> None constr +def 14768:14781 <> regval_of_list +binder 14784:14784 <> a:60 +R14801:14804 Coq.Init.Logic <> ::type_scope:x_'->'_x not +R14800:14800 riscv_types <> a:60 var +R14805:14818 riscv_types <> register_value ind +binder 14788:14796 <> regval_of:61 +R14827:14830 Coq.Init.Datatypes <> list ind +R14832:14832 riscv_types <> a:60 var +binder 14822:14823 <> xs:62 +R14837:14850 riscv_types <> register_value ind +R14855:14865 riscv_types <> Regval_list constr +R14868:14875 Coq.Lists.List <> map def +R14887:14888 riscv_types <> xs:62 var +R14877:14885 riscv_types <> regval_of:61 var +def 14904:14919 <> option_of_regval +binder 14922:14922 <> a:63 +R14952:14955 Coq.Init.Logic <> ::type_scope:x_'->'_x not +R14938:14951 riscv_types <> register_value ind +R14956:14961 Coq.Init.Datatypes <> option ind +R14963:14963 riscv_types <> a:63 var +binder 14926:14934 <> of_regval:64 +R14972:14985 riscv_types <> register_value ind +binder 14967:14968 <> rv:65 +R14990:14995 Coq.Init.Datatypes <> option ind +R14998:15003 Coq.Init.Datatypes <> option ind +R15005:15005 riscv_types <> a:63 var +R15017:15018 riscv_types <> rv:65 var +R15029:15041 riscv_types <> Regval_option constr +R15048:15057 Coq.Init.Datatypes <> option_map def +R15059:15067 riscv_types <> of_regval:64 var +R15080:15083 Coq.Init.Datatypes <> None constr +def 15102:15117 <> regval_of_option +binder 15120:15120 <> a:67 +R15137:15140 Coq.Init.Logic <> ::type_scope:x_'->'_x not +R15136:15136 riscv_types <> a:67 var +R15141:15154 riscv_types <> register_value ind +binder 15124:15132 <> regval_of:68 +R15162:15167 Coq.Init.Datatypes <> option ind +R15169:15169 riscv_types <> a:67 var +binder 15158:15158 <> v:69 +R15175:15187 riscv_types <> Regval_option constr +R15190:15199 Coq.Init.Datatypes <> option_map def +R15211:15211 riscv_types <> v:69 var +R15201:15209 riscv_types <> regval_of:68 var +def 15228:15234 <> x31_ref +R15244:15247 Sail.Values <> name proj +R15244:15247 Sail.Values <> name proj +R15261:15269 Sail.Values <> read_from proj +R15296:15303 Sail.Values <> write_to proj +R15348:15356 Sail.Values <> of_regval proj +R15404:15412 Sail.Values <> regval_of proj +binder 15279:15279 <> s:70 +R15287:15289 riscv_types <> x31 proj +R15284:15284 riscv_types <> s:70 var +binder 15313:15313 <> v:71 +binder 15315:15315 <> s:72 +R15321:15323 riscv_types <> :::'{['_x_'with'_'x31'_':='_x_']}' not +R15325:15337 riscv_types <> :::'{['_x_'with'_'x31'_':='_x_']}' not +R15339:15341 riscv_types <> :::'{['_x_'with'_'x31'_':='_x_']}' not +R15324:15324 riscv_types <> s:72 var +R15338:15338 riscv_types <> v:71 var +binder 15366:15366 <> v:73 +R15371:15396 riscv_types <> bitvector_64_dec_of_regval def +R15398:15398 riscv_types <> v:73 var +binder 15422:15422 <> v:74 +R15427:15452 riscv_types <> regval_of_bitvector_64_dec def +R15454:15454 riscv_types <> v:74 var +def 15473:15479 <> x30_ref +R15489:15492 Sail.Values <> name proj +R15489:15492 Sail.Values <> name proj +R15506:15514 Sail.Values <> read_from proj +R15541:15548 Sail.Values <> write_to proj +R15593:15601 Sail.Values <> of_regval proj +R15649:15657 Sail.Values <> regval_of proj +binder 15524:15524 <> s:75 +R15532:15534 riscv_types <> x30 proj +R15529:15529 riscv_types <> s:75 var +binder 15558:15558 <> v:76 +binder 15560:15560 <> s:77 +R15566:15568 riscv_types <> :::'{['_x_'with'_'x30'_':='_x_']}' not +R15570:15582 riscv_types <> :::'{['_x_'with'_'x30'_':='_x_']}' not +R15584:15586 riscv_types <> :::'{['_x_'with'_'x30'_':='_x_']}' not +R15569:15569 riscv_types <> s:77 var +R15583:15583 riscv_types <> v:76 var +binder 15611:15611 <> v:78 +R15616:15641 riscv_types <> bitvector_64_dec_of_regval def +R15643:15643 riscv_types <> v:78 var +binder 15667:15667 <> v:79 +R15672:15697 riscv_types <> regval_of_bitvector_64_dec def +R15699:15699 riscv_types <> v:79 var +def 15718:15724 <> x29_ref +R15734:15737 Sail.Values <> name proj +R15734:15737 Sail.Values <> name proj +R15751:15759 Sail.Values <> read_from proj +R15786:15793 Sail.Values <> write_to proj +R15838:15846 Sail.Values <> of_regval proj +R15894:15902 Sail.Values <> regval_of proj +binder 15769:15769 <> s:80 +R15777:15779 riscv_types <> x29 proj +R15774:15774 riscv_types <> s:80 var +binder 15803:15803 <> v:81 +binder 15805:15805 <> s:82 +R15811:15813 riscv_types <> :::'{['_x_'with'_'x29'_':='_x_']}' not +R15815:15827 riscv_types <> :::'{['_x_'with'_'x29'_':='_x_']}' not +R15829:15831 riscv_types <> :::'{['_x_'with'_'x29'_':='_x_']}' not +R15814:15814 riscv_types <> s:82 var +R15828:15828 riscv_types <> v:81 var +binder 15856:15856 <> v:83 +R15861:15886 riscv_types <> bitvector_64_dec_of_regval def +R15888:15888 riscv_types <> v:83 var +binder 15912:15912 <> v:84 +R15917:15942 riscv_types <> regval_of_bitvector_64_dec def +R15944:15944 riscv_types <> v:84 var +def 15963:15969 <> x28_ref +R15979:15982 Sail.Values <> name proj +R15979:15982 Sail.Values <> name proj +R15996:16004 Sail.Values <> read_from proj +R16031:16038 Sail.Values <> write_to proj +R16083:16091 Sail.Values <> of_regval proj +R16139:16147 Sail.Values <> regval_of proj +binder 16014:16014 <> s:85 +R16022:16024 riscv_types <> x28 proj +R16019:16019 riscv_types <> s:85 var +binder 16048:16048 <> v:86 +binder 16050:16050 <> s:87 +R16056:16058 riscv_types <> :::'{['_x_'with'_'x28'_':='_x_']}' not +R16060:16072 riscv_types <> :::'{['_x_'with'_'x28'_':='_x_']}' not +R16074:16076 riscv_types <> :::'{['_x_'with'_'x28'_':='_x_']}' not +R16059:16059 riscv_types <> s:87 var +R16073:16073 riscv_types <> v:86 var +binder 16101:16101 <> v:88 +R16106:16131 riscv_types <> bitvector_64_dec_of_regval def +R16133:16133 riscv_types <> v:88 var +binder 16157:16157 <> v:89 +R16162:16187 riscv_types <> regval_of_bitvector_64_dec def +R16189:16189 riscv_types <> v:89 var +def 16208:16214 <> x27_ref +R16224:16227 Sail.Values <> name proj +R16224:16227 Sail.Values <> name proj +R16241:16249 Sail.Values <> read_from proj +R16276:16283 Sail.Values <> write_to proj +R16328:16336 Sail.Values <> of_regval proj +R16384:16392 Sail.Values <> regval_of proj +binder 16259:16259 <> s:90 +R16267:16269 riscv_types <> x27 proj +R16264:16264 riscv_types <> s:90 var +binder 16293:16293 <> v:91 +binder 16295:16295 <> s:92 +R16301:16303 riscv_types <> :::'{['_x_'with'_'x27'_':='_x_']}' not +R16305:16317 riscv_types <> :::'{['_x_'with'_'x27'_':='_x_']}' not +R16319:16321 riscv_types <> :::'{['_x_'with'_'x27'_':='_x_']}' not +R16304:16304 riscv_types <> s:92 var +R16318:16318 riscv_types <> v:91 var +binder 16346:16346 <> v:93 +R16351:16376 riscv_types <> bitvector_64_dec_of_regval def +R16378:16378 riscv_types <> v:93 var +binder 16402:16402 <> v:94 +R16407:16432 riscv_types <> regval_of_bitvector_64_dec def +R16434:16434 riscv_types <> v:94 var +def 16453:16459 <> x26_ref +R16469:16472 Sail.Values <> name proj +R16469:16472 Sail.Values <> name proj +R16486:16494 Sail.Values <> read_from proj +R16521:16528 Sail.Values <> write_to proj +R16573:16581 Sail.Values <> of_regval proj +R16629:16637 Sail.Values <> regval_of proj +binder 16504:16504 <> s:95 +R16512:16514 riscv_types <> x26 proj +R16509:16509 riscv_types <> s:95 var +binder 16538:16538 <> v:96 +binder 16540:16540 <> s:97 +R16546:16548 riscv_types <> :::'{['_x_'with'_'x26'_':='_x_']}' not +R16550:16562 riscv_types <> :::'{['_x_'with'_'x26'_':='_x_']}' not +R16564:16566 riscv_types <> :::'{['_x_'with'_'x26'_':='_x_']}' not +R16549:16549 riscv_types <> s:97 var +R16563:16563 riscv_types <> v:96 var +binder 16591:16591 <> v:98 +R16596:16621 riscv_types <> bitvector_64_dec_of_regval def +R16623:16623 riscv_types <> v:98 var +binder 16647:16647 <> v:99 +R16652:16677 riscv_types <> regval_of_bitvector_64_dec def +R16679:16679 riscv_types <> v:99 var +def 16698:16704 <> x25_ref +R16714:16717 Sail.Values <> name proj +R16714:16717 Sail.Values <> name proj +R16731:16739 Sail.Values <> read_from proj +R16766:16773 Sail.Values <> write_to proj +R16818:16826 Sail.Values <> of_regval proj +R16874:16882 Sail.Values <> regval_of proj +binder 16749:16749 <> s:100 +R16757:16759 riscv_types <> x25 proj +R16754:16754 riscv_types <> s:100 var +binder 16783:16783 <> v:101 +binder 16785:16785 <> s:102 +R16791:16793 riscv_types <> :::'{['_x_'with'_'x25'_':='_x_']}' not +R16795:16807 riscv_types <> :::'{['_x_'with'_'x25'_':='_x_']}' not +R16809:16811 riscv_types <> :::'{['_x_'with'_'x25'_':='_x_']}' not +R16794:16794 riscv_types <> s:102 var +R16808:16808 riscv_types <> v:101 var +binder 16836:16836 <> v:103 +R16841:16866 riscv_types <> bitvector_64_dec_of_regval def +R16868:16868 riscv_types <> v:103 var +binder 16892:16892 <> v:104 +R16897:16922 riscv_types <> regval_of_bitvector_64_dec def +R16924:16924 riscv_types <> v:104 var +def 16943:16949 <> x24_ref +R16959:16962 Sail.Values <> name proj +R16959:16962 Sail.Values <> name proj +R16976:16984 Sail.Values <> read_from proj +R17011:17018 Sail.Values <> write_to proj +R17063:17071 Sail.Values <> of_regval proj +R17119:17127 Sail.Values <> regval_of proj +binder 16994:16994 <> s:105 +R17002:17004 riscv_types <> x24 proj +R16999:16999 riscv_types <> s:105 var +binder 17028:17028 <> v:106 +binder 17030:17030 <> s:107 +R17036:17038 riscv_types <> :::'{['_x_'with'_'x24'_':='_x_']}' not +R17040:17052 riscv_types <> :::'{['_x_'with'_'x24'_':='_x_']}' not +R17054:17056 riscv_types <> :::'{['_x_'with'_'x24'_':='_x_']}' not +R17039:17039 riscv_types <> s:107 var +R17053:17053 riscv_types <> v:106 var +binder 17081:17081 <> v:108 +R17086:17111 riscv_types <> bitvector_64_dec_of_regval def +R17113:17113 riscv_types <> v:108 var +binder 17137:17137 <> v:109 +R17142:17167 riscv_types <> regval_of_bitvector_64_dec def +R17169:17169 riscv_types <> v:109 var +def 17188:17194 <> x23_ref +R17204:17207 Sail.Values <> name proj +R17204:17207 Sail.Values <> name proj +R17221:17229 Sail.Values <> read_from proj +R17256:17263 Sail.Values <> write_to proj +R17308:17316 Sail.Values <> of_regval proj +R17364:17372 Sail.Values <> regval_of proj +binder 17239:17239 <> s:110 +R17247:17249 riscv_types <> x23 proj +R17244:17244 riscv_types <> s:110 var +binder 17273:17273 <> v:111 +binder 17275:17275 <> s:112 +R17281:17283 riscv_types <> :::'{['_x_'with'_'x23'_':='_x_']}' not +R17285:17297 riscv_types <> :::'{['_x_'with'_'x23'_':='_x_']}' not +R17299:17301 riscv_types <> :::'{['_x_'with'_'x23'_':='_x_']}' not +R17284:17284 riscv_types <> s:112 var +R17298:17298 riscv_types <> v:111 var +binder 17326:17326 <> v:113 +R17331:17356 riscv_types <> bitvector_64_dec_of_regval def +R17358:17358 riscv_types <> v:113 var +binder 17382:17382 <> v:114 +R17387:17412 riscv_types <> regval_of_bitvector_64_dec def +R17414:17414 riscv_types <> v:114 var +def 17433:17439 <> x22_ref +R17449:17452 Sail.Values <> name proj +R17449:17452 Sail.Values <> name proj +R17466:17474 Sail.Values <> read_from proj +R17501:17508 Sail.Values <> write_to proj +R17553:17561 Sail.Values <> of_regval proj +R17609:17617 Sail.Values <> regval_of proj +binder 17484:17484 <> s:115 +R17492:17494 riscv_types <> x22 proj +R17489:17489 riscv_types <> s:115 var +binder 17518:17518 <> v:116 +binder 17520:17520 <> s:117 +R17526:17528 riscv_types <> :::'{['_x_'with'_'x22'_':='_x_']}' not +R17530:17542 riscv_types <> :::'{['_x_'with'_'x22'_':='_x_']}' not +R17544:17546 riscv_types <> :::'{['_x_'with'_'x22'_':='_x_']}' not +R17529:17529 riscv_types <> s:117 var +R17543:17543 riscv_types <> v:116 var +binder 17571:17571 <> v:118 +R17576:17601 riscv_types <> bitvector_64_dec_of_regval def +R17603:17603 riscv_types <> v:118 var +binder 17627:17627 <> v:119 +R17632:17657 riscv_types <> regval_of_bitvector_64_dec def +R17659:17659 riscv_types <> v:119 var +def 17678:17684 <> x21_ref +R17694:17697 Sail.Values <> name proj +R17694:17697 Sail.Values <> name proj +R17711:17719 Sail.Values <> read_from proj +R17746:17753 Sail.Values <> write_to proj +R17798:17806 Sail.Values <> of_regval proj +R17854:17862 Sail.Values <> regval_of proj +binder 17729:17729 <> s:120 +R17737:17739 riscv_types <> x21 proj +R17734:17734 riscv_types <> s:120 var +binder 17763:17763 <> v:121 +binder 17765:17765 <> s:122 +R17771:17773 riscv_types <> :::'{['_x_'with'_'x21'_':='_x_']}' not +R17775:17787 riscv_types <> :::'{['_x_'with'_'x21'_':='_x_']}' not +R17789:17791 riscv_types <> :::'{['_x_'with'_'x21'_':='_x_']}' not +R17774:17774 riscv_types <> s:122 var +R17788:17788 riscv_types <> v:121 var +binder 17816:17816 <> v:123 +R17821:17846 riscv_types <> bitvector_64_dec_of_regval def +R17848:17848 riscv_types <> v:123 var +binder 17872:17872 <> v:124 +R17877:17902 riscv_types <> regval_of_bitvector_64_dec def +R17904:17904 riscv_types <> v:124 var +def 17923:17929 <> x20_ref +R17939:17942 Sail.Values <> name proj +R17939:17942 Sail.Values <> name proj +R17956:17964 Sail.Values <> read_from proj +R17991:17998 Sail.Values <> write_to proj +R18043:18051 Sail.Values <> of_regval proj +R18099:18107 Sail.Values <> regval_of proj +binder 17974:17974 <> s:125 +R17982:17984 riscv_types <> x20 proj +R17979:17979 riscv_types <> s:125 var +binder 18008:18008 <> v:126 +binder 18010:18010 <> s:127 +R18016:18018 riscv_types <> :::'{['_x_'with'_'x20'_':='_x_']}' not +R18020:18032 riscv_types <> :::'{['_x_'with'_'x20'_':='_x_']}' not +R18034:18036 riscv_types <> :::'{['_x_'with'_'x20'_':='_x_']}' not +R18019:18019 riscv_types <> s:127 var +R18033:18033 riscv_types <> v:126 var +binder 18061:18061 <> v:128 +R18066:18091 riscv_types <> bitvector_64_dec_of_regval def +R18093:18093 riscv_types <> v:128 var +binder 18117:18117 <> v:129 +R18122:18147 riscv_types <> regval_of_bitvector_64_dec def +R18149:18149 riscv_types <> v:129 var +def 18168:18174 <> x19_ref +R18184:18187 Sail.Values <> name proj +R18184:18187 Sail.Values <> name proj +R18201:18209 Sail.Values <> read_from proj +R18236:18243 Sail.Values <> write_to proj +R18288:18296 Sail.Values <> of_regval proj +R18344:18352 Sail.Values <> regval_of proj +binder 18219:18219 <> s:130 +R18227:18229 riscv_types <> x19 proj +R18224:18224 riscv_types <> s:130 var +binder 18253:18253 <> v:131 +binder 18255:18255 <> s:132 +R18261:18263 riscv_types <> :::'{['_x_'with'_'x19'_':='_x_']}' not +R18265:18277 riscv_types <> :::'{['_x_'with'_'x19'_':='_x_']}' not +R18279:18281 riscv_types <> :::'{['_x_'with'_'x19'_':='_x_']}' not +R18264:18264 riscv_types <> s:132 var +R18278:18278 riscv_types <> v:131 var +binder 18306:18306 <> v:133 +R18311:18336 riscv_types <> bitvector_64_dec_of_regval def +R18338:18338 riscv_types <> v:133 var +binder 18362:18362 <> v:134 +R18367:18392 riscv_types <> regval_of_bitvector_64_dec def +R18394:18394 riscv_types <> v:134 var +def 18413:18419 <> x18_ref +R18429:18432 Sail.Values <> name proj +R18429:18432 Sail.Values <> name proj +R18446:18454 Sail.Values <> read_from proj +R18481:18488 Sail.Values <> write_to proj +R18533:18541 Sail.Values <> of_regval proj +R18589:18597 Sail.Values <> regval_of proj +binder 18464:18464 <> s:135 +R18472:18474 riscv_types <> x18 proj +R18469:18469 riscv_types <> s:135 var +binder 18498:18498 <> v:136 +binder 18500:18500 <> s:137 +R18506:18508 riscv_types <> :::'{['_x_'with'_'x18'_':='_x_']}' not +R18510:18522 riscv_types <> :::'{['_x_'with'_'x18'_':='_x_']}' not +R18524:18526 riscv_types <> :::'{['_x_'with'_'x18'_':='_x_']}' not +R18509:18509 riscv_types <> s:137 var +R18523:18523 riscv_types <> v:136 var +binder 18551:18551 <> v:138 +R18556:18581 riscv_types <> bitvector_64_dec_of_regval def +R18583:18583 riscv_types <> v:138 var +binder 18607:18607 <> v:139 +R18612:18637 riscv_types <> regval_of_bitvector_64_dec def +R18639:18639 riscv_types <> v:139 var +def 18658:18664 <> x17_ref +R18674:18677 Sail.Values <> name proj +R18674:18677 Sail.Values <> name proj +R18691:18699 Sail.Values <> read_from proj +R18726:18733 Sail.Values <> write_to proj +R18778:18786 Sail.Values <> of_regval proj +R18834:18842 Sail.Values <> regval_of proj +binder 18709:18709 <> s:140 +R18717:18719 riscv_types <> x17 proj +R18714:18714 riscv_types <> s:140 var +binder 18743:18743 <> v:141 +binder 18745:18745 <> s:142 +R18751:18753 riscv_types <> :::'{['_x_'with'_'x17'_':='_x_']}' not +R18755:18767 riscv_types <> :::'{['_x_'with'_'x17'_':='_x_']}' not +R18769:18771 riscv_types <> :::'{['_x_'with'_'x17'_':='_x_']}' not +R18754:18754 riscv_types <> s:142 var +R18768:18768 riscv_types <> v:141 var +binder 18796:18796 <> v:143 +R18801:18826 riscv_types <> bitvector_64_dec_of_regval def +R18828:18828 riscv_types <> v:143 var +binder 18852:18852 <> v:144 +R18857:18882 riscv_types <> regval_of_bitvector_64_dec def +R18884:18884 riscv_types <> v:144 var +def 18903:18909 <> x16_ref +R18919:18922 Sail.Values <> name proj +R18919:18922 Sail.Values <> name proj +R18936:18944 Sail.Values <> read_from proj +R18971:18978 Sail.Values <> write_to proj +R19023:19031 Sail.Values <> of_regval proj +R19079:19087 Sail.Values <> regval_of proj +binder 18954:18954 <> s:145 +R18962:18964 riscv_types <> x16 proj +R18959:18959 riscv_types <> s:145 var +binder 18988:18988 <> v:146 +binder 18990:18990 <> s:147 +R18996:18998 riscv_types <> :::'{['_x_'with'_'x16'_':='_x_']}' not +R19000:19012 riscv_types <> :::'{['_x_'with'_'x16'_':='_x_']}' not +R19014:19016 riscv_types <> :::'{['_x_'with'_'x16'_':='_x_']}' not +R18999:18999 riscv_types <> s:147 var +R19013:19013 riscv_types <> v:146 var +binder 19041:19041 <> v:148 +R19046:19071 riscv_types <> bitvector_64_dec_of_regval def +R19073:19073 riscv_types <> v:148 var +binder 19097:19097 <> v:149 +R19102:19127 riscv_types <> regval_of_bitvector_64_dec def +R19129:19129 riscv_types <> v:149 var +def 19148:19154 <> x15_ref +R19164:19167 Sail.Values <> name proj +R19164:19167 Sail.Values <> name proj +R19181:19189 Sail.Values <> read_from proj +R19216:19223 Sail.Values <> write_to proj +R19268:19276 Sail.Values <> of_regval proj +R19324:19332 Sail.Values <> regval_of proj +binder 19199:19199 <> s:150 +R19207:19209 riscv_types <> x15 proj +R19204:19204 riscv_types <> s:150 var +binder 19233:19233 <> v:151 +binder 19235:19235 <> s:152 +R19241:19243 riscv_types <> :::'{['_x_'with'_'x15'_':='_x_']}' not +R19245:19257 riscv_types <> :::'{['_x_'with'_'x15'_':='_x_']}' not +R19259:19261 riscv_types <> :::'{['_x_'with'_'x15'_':='_x_']}' not +R19244:19244 riscv_types <> s:152 var +R19258:19258 riscv_types <> v:151 var +binder 19286:19286 <> v:153 +R19291:19316 riscv_types <> bitvector_64_dec_of_regval def +R19318:19318 riscv_types <> v:153 var +binder 19342:19342 <> v:154 +R19347:19372 riscv_types <> regval_of_bitvector_64_dec def +R19374:19374 riscv_types <> v:154 var +def 19393:19399 <> x14_ref +R19409:19412 Sail.Values <> name proj +R19409:19412 Sail.Values <> name proj +R19426:19434 Sail.Values <> read_from proj +R19461:19468 Sail.Values <> write_to proj +R19513:19521 Sail.Values <> of_regval proj +R19569:19577 Sail.Values <> regval_of proj +binder 19444:19444 <> s:155 +R19452:19454 riscv_types <> x14 proj +R19449:19449 riscv_types <> s:155 var +binder 19478:19478 <> v:156 +binder 19480:19480 <> s:157 +R19486:19488 riscv_types <> :::'{['_x_'with'_'x14'_':='_x_']}' not +R19490:19502 riscv_types <> :::'{['_x_'with'_'x14'_':='_x_']}' not +R19504:19506 riscv_types <> :::'{['_x_'with'_'x14'_':='_x_']}' not +R19489:19489 riscv_types <> s:157 var +R19503:19503 riscv_types <> v:156 var +binder 19531:19531 <> v:158 +R19536:19561 riscv_types <> bitvector_64_dec_of_regval def +R19563:19563 riscv_types <> v:158 var +binder 19587:19587 <> v:159 +R19592:19617 riscv_types <> regval_of_bitvector_64_dec def +R19619:19619 riscv_types <> v:159 var +def 19638:19644 <> x13_ref +R19654:19657 Sail.Values <> name proj +R19654:19657 Sail.Values <> name proj +R19671:19679 Sail.Values <> read_from proj +R19706:19713 Sail.Values <> write_to proj +R19758:19766 Sail.Values <> of_regval proj +R19814:19822 Sail.Values <> regval_of proj +binder 19689:19689 <> s:160 +R19697:19699 riscv_types <> x13 proj +R19694:19694 riscv_types <> s:160 var +binder 19723:19723 <> v:161 +binder 19725:19725 <> s:162 +R19731:19733 riscv_types <> :::'{['_x_'with'_'x13'_':='_x_']}' not +R19735:19747 riscv_types <> :::'{['_x_'with'_'x13'_':='_x_']}' not +R19749:19751 riscv_types <> :::'{['_x_'with'_'x13'_':='_x_']}' not +R19734:19734 riscv_types <> s:162 var +R19748:19748 riscv_types <> v:161 var +binder 19776:19776 <> v:163 +R19781:19806 riscv_types <> bitvector_64_dec_of_regval def +R19808:19808 riscv_types <> v:163 var +binder 19832:19832 <> v:164 +R19837:19862 riscv_types <> regval_of_bitvector_64_dec def +R19864:19864 riscv_types <> v:164 var +def 19883:19889 <> x12_ref +R19899:19902 Sail.Values <> name proj +R19899:19902 Sail.Values <> name proj +R19916:19924 Sail.Values <> read_from proj +R19951:19958 Sail.Values <> write_to proj +R20003:20011 Sail.Values <> of_regval proj +R20059:20067 Sail.Values <> regval_of proj +binder 19934:19934 <> s:165 +R19942:19944 riscv_types <> x12 proj +R19939:19939 riscv_types <> s:165 var +binder 19968:19968 <> v:166 +binder 19970:19970 <> s:167 +R19976:19978 riscv_types <> :::'{['_x_'with'_'x12'_':='_x_']}' not +R19980:19992 riscv_types <> :::'{['_x_'with'_'x12'_':='_x_']}' not +R19994:19996 riscv_types <> :::'{['_x_'with'_'x12'_':='_x_']}' not +R19979:19979 riscv_types <> s:167 var +R19993:19993 riscv_types <> v:166 var +binder 20021:20021 <> v:168 +R20026:20051 riscv_types <> bitvector_64_dec_of_regval def +R20053:20053 riscv_types <> v:168 var +binder 20077:20077 <> v:169 +R20082:20107 riscv_types <> regval_of_bitvector_64_dec def +R20109:20109 riscv_types <> v:169 var +def 20128:20134 <> x11_ref +R20144:20147 Sail.Values <> name proj +R20144:20147 Sail.Values <> name proj +R20161:20169 Sail.Values <> read_from proj +R20196:20203 Sail.Values <> write_to proj +R20248:20256 Sail.Values <> of_regval proj +R20304:20312 Sail.Values <> regval_of proj +binder 20179:20179 <> s:170 +R20187:20189 riscv_types <> x11 proj +R20184:20184 riscv_types <> s:170 var +binder 20213:20213 <> v:171 +binder 20215:20215 <> s:172 +R20221:20223 riscv_types <> :::'{['_x_'with'_'x11'_':='_x_']}' not +R20225:20237 riscv_types <> :::'{['_x_'with'_'x11'_':='_x_']}' not +R20239:20241 riscv_types <> :::'{['_x_'with'_'x11'_':='_x_']}' not +R20224:20224 riscv_types <> s:172 var +R20238:20238 riscv_types <> v:171 var +binder 20266:20266 <> v:173 +R20271:20296 riscv_types <> bitvector_64_dec_of_regval def +R20298:20298 riscv_types <> v:173 var +binder 20322:20322 <> v:174 +R20327:20352 riscv_types <> regval_of_bitvector_64_dec def +R20354:20354 riscv_types <> v:174 var +def 20373:20379 <> x10_ref +R20389:20392 Sail.Values <> name proj +R20389:20392 Sail.Values <> name proj +R20406:20414 Sail.Values <> read_from proj +R20441:20448 Sail.Values <> write_to proj +R20493:20501 Sail.Values <> of_regval proj +R20549:20557 Sail.Values <> regval_of proj +binder 20424:20424 <> s:175 +R20432:20434 riscv_types <> x10 proj +R20429:20429 riscv_types <> s:175 var +binder 20458:20458 <> v:176 +binder 20460:20460 <> s:177 +R20466:20468 riscv_types <> :::'{['_x_'with'_'x10'_':='_x_']}' not +R20470:20482 riscv_types <> :::'{['_x_'with'_'x10'_':='_x_']}' not +R20484:20486 riscv_types <> :::'{['_x_'with'_'x10'_':='_x_']}' not +R20469:20469 riscv_types <> s:177 var +R20483:20483 riscv_types <> v:176 var +binder 20511:20511 <> v:178 +R20516:20541 riscv_types <> bitvector_64_dec_of_regval def +R20543:20543 riscv_types <> v:178 var +binder 20567:20567 <> v:179 +R20572:20597 riscv_types <> regval_of_bitvector_64_dec def +R20599:20599 riscv_types <> v:179 var +def 20618:20623 <> x9_ref +R20633:20636 Sail.Values <> name proj +R20633:20636 Sail.Values <> name proj +R20649:20657 Sail.Values <> read_from proj +R20683:20690 Sail.Values <> write_to proj +R20734:20742 Sail.Values <> of_regval proj +R20790:20798 Sail.Values <> regval_of proj +binder 20667:20667 <> s:180 +R20675:20676 riscv_types <> x9 proj +R20672:20672 riscv_types <> s:180 var +binder 20700:20700 <> v:181 +binder 20702:20702 <> s:182 +R20708:20710 riscv_types <> :::'{['_x_'with'_'x9'_':='_x_']}' not +R20712:20723 riscv_types <> :::'{['_x_'with'_'x9'_':='_x_']}' not +R20725:20727 riscv_types <> :::'{['_x_'with'_'x9'_':='_x_']}' not +R20711:20711 riscv_types <> s:182 var +R20724:20724 riscv_types <> v:181 var +binder 20752:20752 <> v:183 +R20757:20782 riscv_types <> bitvector_64_dec_of_regval def +R20784:20784 riscv_types <> v:183 var +binder 20808:20808 <> v:184 +R20813:20838 riscv_types <> regval_of_bitvector_64_dec def +R20840:20840 riscv_types <> v:184 var +def 20859:20864 <> x8_ref +R20874:20877 Sail.Values <> name proj +R20874:20877 Sail.Values <> name proj +R20890:20898 Sail.Values <> read_from proj +R20924:20931 Sail.Values <> write_to proj +R20975:20983 Sail.Values <> of_regval proj +R21031:21039 Sail.Values <> regval_of proj +binder 20908:20908 <> s:185 +R20916:20917 riscv_types <> x8 proj +R20913:20913 riscv_types <> s:185 var +binder 20941:20941 <> v:186 +binder 20943:20943 <> s:187 +R20949:20951 riscv_types <> :::'{['_x_'with'_'x8'_':='_x_']}' not +R20953:20964 riscv_types <> :::'{['_x_'with'_'x8'_':='_x_']}' not +R20966:20968 riscv_types <> :::'{['_x_'with'_'x8'_':='_x_']}' not +R20952:20952 riscv_types <> s:187 var +R20965:20965 riscv_types <> v:186 var +binder 20993:20993 <> v:188 +R20998:21023 riscv_types <> bitvector_64_dec_of_regval def +R21025:21025 riscv_types <> v:188 var +binder 21049:21049 <> v:189 +R21054:21079 riscv_types <> regval_of_bitvector_64_dec def +R21081:21081 riscv_types <> v:189 var +def 21100:21105 <> x7_ref +R21115:21118 Sail.Values <> name proj +R21115:21118 Sail.Values <> name proj +R21131:21139 Sail.Values <> read_from proj +R21165:21172 Sail.Values <> write_to proj +R21216:21224 Sail.Values <> of_regval proj +R21272:21280 Sail.Values <> regval_of proj +binder 21149:21149 <> s:190 +R21157:21158 riscv_types <> x7 proj +R21154:21154 riscv_types <> s:190 var +binder 21182:21182 <> v:191 +binder 21184:21184 <> s:192 +R21190:21192 riscv_types <> :::'{['_x_'with'_'x7'_':='_x_']}' not +R21194:21205 riscv_types <> :::'{['_x_'with'_'x7'_':='_x_']}' not +R21207:21209 riscv_types <> :::'{['_x_'with'_'x7'_':='_x_']}' not +R21193:21193 riscv_types <> s:192 var +R21206:21206 riscv_types <> v:191 var +binder 21234:21234 <> v:193 +R21239:21264 riscv_types <> bitvector_64_dec_of_regval def +R21266:21266 riscv_types <> v:193 var +binder 21290:21290 <> v:194 +R21295:21320 riscv_types <> regval_of_bitvector_64_dec def +R21322:21322 riscv_types <> v:194 var +def 21341:21346 <> x6_ref +R21356:21359 Sail.Values <> name proj +R21356:21359 Sail.Values <> name proj +R21372:21380 Sail.Values <> read_from proj +R21406:21413 Sail.Values <> write_to proj +R21457:21465 Sail.Values <> of_regval proj +R21513:21521 Sail.Values <> regval_of proj +binder 21390:21390 <> s:195 +R21398:21399 riscv_types <> x6 proj +R21395:21395 riscv_types <> s:195 var +binder 21423:21423 <> v:196 +binder 21425:21425 <> s:197 +R21431:21433 riscv_types <> :::'{['_x_'with'_'x6'_':='_x_']}' not +R21435:21446 riscv_types <> :::'{['_x_'with'_'x6'_':='_x_']}' not +R21448:21450 riscv_types <> :::'{['_x_'with'_'x6'_':='_x_']}' not +R21434:21434 riscv_types <> s:197 var +R21447:21447 riscv_types <> v:196 var +binder 21475:21475 <> v:198 +R21480:21505 riscv_types <> bitvector_64_dec_of_regval def +R21507:21507 riscv_types <> v:198 var +binder 21531:21531 <> v:199 +R21536:21561 riscv_types <> regval_of_bitvector_64_dec def +R21563:21563 riscv_types <> v:199 var +def 21582:21587 <> x5_ref +R21597:21600 Sail.Values <> name proj +R21597:21600 Sail.Values <> name proj +R21613:21621 Sail.Values <> read_from proj +R21647:21654 Sail.Values <> write_to proj +R21698:21706 Sail.Values <> of_regval proj +R21754:21762 Sail.Values <> regval_of proj +binder 21631:21631 <> s:200 +R21639:21640 riscv_types <> x5 proj +R21636:21636 riscv_types <> s:200 var +binder 21664:21664 <> v:201 +binder 21666:21666 <> s:202 +R21672:21674 riscv_types <> :::'{['_x_'with'_'x5'_':='_x_']}' not +R21676:21687 riscv_types <> :::'{['_x_'with'_'x5'_':='_x_']}' not +R21689:21691 riscv_types <> :::'{['_x_'with'_'x5'_':='_x_']}' not +R21675:21675 riscv_types <> s:202 var +R21688:21688 riscv_types <> v:201 var +binder 21716:21716 <> v:203 +R21721:21746 riscv_types <> bitvector_64_dec_of_regval def +R21748:21748 riscv_types <> v:203 var +binder 21772:21772 <> v:204 +R21777:21802 riscv_types <> regval_of_bitvector_64_dec def +R21804:21804 riscv_types <> v:204 var +def 21823:21828 <> x4_ref +R21838:21841 Sail.Values <> name proj +R21838:21841 Sail.Values <> name proj +R21854:21862 Sail.Values <> read_from proj +R21888:21895 Sail.Values <> write_to proj +R21939:21947 Sail.Values <> of_regval proj +R21995:22003 Sail.Values <> regval_of proj +binder 21872:21872 <> s:205 +R21880:21881 riscv_types <> x4 proj +R21877:21877 riscv_types <> s:205 var +binder 21905:21905 <> v:206 +binder 21907:21907 <> s:207 +R21913:21915 riscv_types <> :::'{['_x_'with'_'x4'_':='_x_']}' not +R21917:21928 riscv_types <> :::'{['_x_'with'_'x4'_':='_x_']}' not +R21930:21932 riscv_types <> :::'{['_x_'with'_'x4'_':='_x_']}' not +R21916:21916 riscv_types <> s:207 var +R21929:21929 riscv_types <> v:206 var +binder 21957:21957 <> v:208 +R21962:21987 riscv_types <> bitvector_64_dec_of_regval def +R21989:21989 riscv_types <> v:208 var +binder 22013:22013 <> v:209 +R22018:22043 riscv_types <> regval_of_bitvector_64_dec def +R22045:22045 riscv_types <> v:209 var +def 22064:22069 <> x3_ref +R22079:22082 Sail.Values <> name proj +R22079:22082 Sail.Values <> name proj +R22095:22103 Sail.Values <> read_from proj +R22129:22136 Sail.Values <> write_to proj +R22180:22188 Sail.Values <> of_regval proj +R22236:22244 Sail.Values <> regval_of proj +binder 22113:22113 <> s:210 +R22121:22122 riscv_types <> x3 proj +R22118:22118 riscv_types <> s:210 var +binder 22146:22146 <> v:211 +binder 22148:22148 <> s:212 +R22154:22156 riscv_types <> :::'{['_x_'with'_'x3'_':='_x_']}' not +R22158:22169 riscv_types <> :::'{['_x_'with'_'x3'_':='_x_']}' not +R22171:22173 riscv_types <> :::'{['_x_'with'_'x3'_':='_x_']}' not +R22157:22157 riscv_types <> s:212 var +R22170:22170 riscv_types <> v:211 var +binder 22198:22198 <> v:213 +R22203:22228 riscv_types <> bitvector_64_dec_of_regval def +R22230:22230 riscv_types <> v:213 var +binder 22254:22254 <> v:214 +R22259:22284 riscv_types <> regval_of_bitvector_64_dec def +R22286:22286 riscv_types <> v:214 var +def 22305:22310 <> x2_ref +R22320:22323 Sail.Values <> name proj +R22320:22323 Sail.Values <> name proj +R22336:22344 Sail.Values <> read_from proj +R22370:22377 Sail.Values <> write_to proj +R22421:22429 Sail.Values <> of_regval proj +R22477:22485 Sail.Values <> regval_of proj +binder 22354:22354 <> s:215 +R22362:22363 riscv_types <> x2 proj +R22359:22359 riscv_types <> s:215 var +binder 22387:22387 <> v:216 +binder 22389:22389 <> s:217 +R22395:22397 riscv_types <> :::'{['_x_'with'_'x2'_':='_x_']}' not +R22399:22410 riscv_types <> :::'{['_x_'with'_'x2'_':='_x_']}' not +R22412:22414 riscv_types <> :::'{['_x_'with'_'x2'_':='_x_']}' not +R22398:22398 riscv_types <> s:217 var +R22411:22411 riscv_types <> v:216 var +binder 22439:22439 <> v:218 +R22444:22469 riscv_types <> bitvector_64_dec_of_regval def +R22471:22471 riscv_types <> v:218 var +binder 22495:22495 <> v:219 +R22500:22525 riscv_types <> regval_of_bitvector_64_dec def +R22527:22527 riscv_types <> v:219 var +def 22546:22551 <> x1_ref +R22561:22564 Sail.Values <> name proj +R22561:22564 Sail.Values <> name proj +R22577:22585 Sail.Values <> read_from proj +R22611:22618 Sail.Values <> write_to proj +R22662:22670 Sail.Values <> of_regval proj +R22718:22726 Sail.Values <> regval_of proj +binder 22595:22595 <> s:220 +R22603:22604 riscv_types <> x1 proj +R22600:22600 riscv_types <> s:220 var +binder 22628:22628 <> v:221 +binder 22630:22630 <> s:222 +R22636:22638 riscv_types <> :::'{['_x_'with'_'x1'_':='_x_']}' not +R22640:22651 riscv_types <> :::'{['_x_'with'_'x1'_':='_x_']}' not +R22653:22655 riscv_types <> :::'{['_x_'with'_'x1'_':='_x_']}' not +R22639:22639 riscv_types <> s:222 var +R22652:22652 riscv_types <> v:221 var +binder 22680:22680 <> v:223 +R22685:22710 riscv_types <> bitvector_64_dec_of_regval def +R22712:22712 riscv_types <> v:223 var +binder 22736:22736 <> v:224 +R22741:22766 riscv_types <> regval_of_bitvector_64_dec def +R22768:22768 riscv_types <> v:224 var +def 22787:22798 <> instbits_ref +R22808:22811 Sail.Values <> name proj +R22808:22811 Sail.Values <> name proj +R22830:22838 Sail.Values <> read_from proj +R22870:22877 Sail.Values <> write_to proj +R22927:22935 Sail.Values <> of_regval proj +R22983:22991 Sail.Values <> regval_of proj +binder 22848:22848 <> s:225 +R22856:22863 riscv_types <> instbits proj +R22853:22853 riscv_types <> s:225 var +binder 22887:22887 <> v:226 +binder 22889:22889 <> s:227 +R22895:22897 riscv_types <> :::'{['_x_'with'_'instbits'_':='_x_']}' not +R22899:22916 riscv_types <> :::'{['_x_'with'_'instbits'_':='_x_']}' not +R22918:22920 riscv_types <> :::'{['_x_'with'_'instbits'_':='_x_']}' not +R22898:22898 riscv_types <> s:227 var +R22917:22917 riscv_types <> v:226 var +binder 22945:22945 <> v:228 +R22950:22975 riscv_types <> bitvector_64_dec_of_regval def +R22977:22977 riscv_types <> v:228 var +binder 23001:23001 <> v:229 +R23006:23031 riscv_types <> regval_of_bitvector_64_dec def +R23033:23033 riscv_types <> v:229 var +def 23052:23061 <> nextPC_ref +R23071:23074 Sail.Values <> name proj +R23071:23074 Sail.Values <> name proj +R23091:23099 Sail.Values <> read_from proj +R23129:23136 Sail.Values <> write_to proj +R23184:23192 Sail.Values <> of_regval proj +R23240:23248 Sail.Values <> regval_of proj +binder 23109:23109 <> s:230 +R23117:23122 riscv_types <> nextPC proj +R23114:23114 riscv_types <> s:230 var +binder 23146:23146 <> v:231 +binder 23148:23148 <> s:232 +R23154:23156 riscv_types <> :::'{['_x_'with'_'nextPC'_':='_x_']}' not +R23158:23173 riscv_types <> :::'{['_x_'with'_'nextPC'_':='_x_']}' not +R23175:23177 riscv_types <> :::'{['_x_'with'_'nextPC'_':='_x_']}' not +R23157:23157 riscv_types <> s:232 var +R23174:23174 riscv_types <> v:231 var +binder 23202:23202 <> v:233 +R23207:23232 riscv_types <> bitvector_64_dec_of_regval def +R23234:23234 riscv_types <> v:233 var +binder 23258:23258 <> v:234 +R23263:23288 riscv_types <> regval_of_bitvector_64_dec def +R23290:23290 riscv_types <> v:234 var +def 23309:23314 <> PC_ref +R23324:23327 Sail.Values <> name proj +R23324:23327 Sail.Values <> name proj +R23340:23348 Sail.Values <> read_from proj +R23374:23381 Sail.Values <> write_to proj +R23425:23433 Sail.Values <> of_regval proj +R23481:23489 Sail.Values <> regval_of proj +binder 23358:23358 <> s:235 +R23366:23367 riscv_types <> PC proj +R23363:23363 riscv_types <> s:235 var +binder 23391:23391 <> v:236 +binder 23393:23393 <> s:237 +R23399:23401 riscv_types <> :::'{['_x_'with'_'PC'_':='_x_']}' not +R23403:23414 riscv_types <> :::'{['_x_'with'_'PC'_':='_x_']}' not +R23416:23418 riscv_types <> :::'{['_x_'with'_'PC'_':='_x_']}' not +R23402:23402 riscv_types <> s:237 var +R23415:23415 riscv_types <> v:236 var +binder 23443:23443 <> v:238 +R23448:23473 riscv_types <> bitvector_64_dec_of_regval def +R23475:23475 riscv_types <> v:238 var +binder 23499:23499 <> v:239 +R23504:23529 riscv_types <> regval_of_bitvector_64_dec def +R23531:23531 riscv_types <> v:239 var +def 23575:23584 <> get_regval +R23598:23603 Coq.Strings.String <> string ind +binder 23587:23594 <> reg_name:240 +R23611:23618 riscv_types <> regstate rec +binder 23607:23607 <> s:241 +R23623:23628 Coq.Init.Datatypes <> option ind +R23630:23643 riscv_types <> register_value ind +R23653:23662 Coq.Strings.String <> string_dec def +R23664:23671 riscv_types <> reg_name:240 var +R23745:23754 Coq.Strings.String <> string_dec def +R23756:23763 riscv_types <> reg_name:240 var +R23837:23846 Coq.Strings.String <> string_dec def +R23848:23855 riscv_types <> reg_name:240 var +R23929:23938 Coq.Strings.String <> string_dec def +R23940:23947 riscv_types <> reg_name:240 var +R24021:24030 Coq.Strings.String <> string_dec def +R24032:24039 riscv_types <> reg_name:240 var +R24113:24122 Coq.Strings.String <> string_dec def +R24124:24131 riscv_types <> reg_name:240 var +R24205:24214 Coq.Strings.String <> string_dec def +R24216:24223 riscv_types <> reg_name:240 var +R24297:24306 Coq.Strings.String <> string_dec def +R24308:24315 riscv_types <> reg_name:240 var +R24389:24398 Coq.Strings.String <> string_dec def +R24400:24407 riscv_types <> reg_name:240 var +R24481:24490 Coq.Strings.String <> string_dec def +R24492:24499 riscv_types <> reg_name:240 var +R24573:24582 Coq.Strings.String <> string_dec def +R24584:24591 riscv_types <> reg_name:240 var +R24665:24674 Coq.Strings.String <> string_dec def +R24676:24683 riscv_types <> reg_name:240 var +R24757:24766 Coq.Strings.String <> string_dec def +R24768:24775 riscv_types <> reg_name:240 var +R24849:24858 Coq.Strings.String <> string_dec def +R24860:24867 riscv_types <> reg_name:240 var +R24941:24950 Coq.Strings.String <> string_dec def +R24952:24959 riscv_types <> reg_name:240 var +R25033:25042 Coq.Strings.String <> string_dec def +R25044:25051 riscv_types <> reg_name:240 var +R25125:25134 Coq.Strings.String <> string_dec def +R25136:25143 riscv_types <> reg_name:240 var +R25217:25226 Coq.Strings.String <> string_dec def +R25228:25235 riscv_types <> reg_name:240 var +R25309:25318 Coq.Strings.String <> string_dec def +R25320:25327 riscv_types <> reg_name:240 var +R25401:25410 Coq.Strings.String <> string_dec def +R25412:25419 riscv_types <> reg_name:240 var +R25493:25502 Coq.Strings.String <> string_dec def +R25504:25511 riscv_types <> reg_name:240 var +R25585:25594 Coq.Strings.String <> string_dec def +R25596:25603 riscv_types <> reg_name:240 var +R25677:25686 Coq.Strings.String <> string_dec def +R25688:25695 riscv_types <> reg_name:240 var +R25766:25775 Coq.Strings.String <> string_dec def +R25777:25784 riscv_types <> reg_name:240 var +R25855:25864 Coq.Strings.String <> string_dec def +R25866:25873 riscv_types <> reg_name:240 var +R25944:25953 Coq.Strings.String <> string_dec def +R25955:25962 riscv_types <> reg_name:240 var +R26033:26042 Coq.Strings.String <> string_dec def +R26044:26051 riscv_types <> reg_name:240 var +R26122:26131 Coq.Strings.String <> string_dec def +R26133:26140 riscv_types <> reg_name:240 var +R26211:26220 Coq.Strings.String <> string_dec def +R26222:26229 riscv_types <> reg_name:240 var +R26300:26309 Coq.Strings.String <> string_dec def +R26311:26318 riscv_types <> reg_name:240 var +R26389:26398 Coq.Strings.String <> string_dec def +R26400:26407 riscv_types <> reg_name:240 var +R26478:26487 Coq.Strings.String <> string_dec def +R26489:26496 riscv_types <> reg_name:240 var +R26585:26594 Coq.Strings.String <> string_dec def +R26596:26603 riscv_types <> reg_name:240 var +R26686:26695 Coq.Strings.String <> string_dec def +R26697:26704 riscv_types <> reg_name:240 var +R26772:26775 Coq.Init.Datatypes <> None constr +R26716:26719 Coq.Init.Datatypes <> Some constr +R26730:26738 Sail.Values <> regval_of proj +R26750:26758 Sail.Values <> read_from proj +R26761:26761 riscv_types <> s:241 var +R26742:26747 riscv_types <> PC_ref def +R26722:26727 riscv_types <> PC_ref def +R26619:26622 Coq.Init.Datatypes <> Some constr +R26637:26645 Sail.Values <> regval_of proj +R26661:26669 Sail.Values <> read_from proj +R26672:26672 riscv_types <> s:241 var +R26649:26658 riscv_types <> nextPC_ref def +R26625:26634 riscv_types <> nextPC_ref def +R26514:26517 Coq.Init.Datatypes <> Some constr +R26534:26542 Sail.Values <> regval_of proj +R26560:26568 Sail.Values <> read_from proj +R26571:26571 riscv_types <> s:241 var +R26546:26557 riscv_types <> instbits_ref def +R26520:26531 riscv_types <> instbits_ref def +R26419:26422 Coq.Init.Datatypes <> Some constr +R26433:26441 Sail.Values <> regval_of proj +R26453:26461 Sail.Values <> read_from proj +R26464:26464 riscv_types <> s:241 var +R26445:26450 riscv_types <> x1_ref def +R26425:26430 riscv_types <> x1_ref def +R26330:26333 Coq.Init.Datatypes <> Some constr +R26344:26352 Sail.Values <> regval_of proj +R26364:26372 Sail.Values <> read_from proj +R26375:26375 riscv_types <> s:241 var +R26356:26361 riscv_types <> x2_ref def +R26336:26341 riscv_types <> x2_ref def +R26241:26244 Coq.Init.Datatypes <> Some constr +R26255:26263 Sail.Values <> regval_of proj +R26275:26283 Sail.Values <> read_from proj +R26286:26286 riscv_types <> s:241 var +R26267:26272 riscv_types <> x3_ref def +R26247:26252 riscv_types <> x3_ref def +R26152:26155 Coq.Init.Datatypes <> Some constr +R26166:26174 Sail.Values <> regval_of proj +R26186:26194 Sail.Values <> read_from proj +R26197:26197 riscv_types <> s:241 var +R26178:26183 riscv_types <> x4_ref def +R26158:26163 riscv_types <> x4_ref def +R26063:26066 Coq.Init.Datatypes <> Some constr +R26077:26085 Sail.Values <> regval_of proj +R26097:26105 Sail.Values <> read_from proj +R26108:26108 riscv_types <> s:241 var +R26089:26094 riscv_types <> x5_ref def +R26069:26074 riscv_types <> x5_ref def +R25974:25977 Coq.Init.Datatypes <> Some constr +R25988:25996 Sail.Values <> regval_of proj +R26008:26016 Sail.Values <> read_from proj +R26019:26019 riscv_types <> s:241 var +R26000:26005 riscv_types <> x6_ref def +R25980:25985 riscv_types <> x6_ref def +R25885:25888 Coq.Init.Datatypes <> Some constr +R25899:25907 Sail.Values <> regval_of proj +R25919:25927 Sail.Values <> read_from proj +R25930:25930 riscv_types <> s:241 var +R25911:25916 riscv_types <> x7_ref def +R25891:25896 riscv_types <> x7_ref def +R25796:25799 Coq.Init.Datatypes <> Some constr +R25810:25818 Sail.Values <> regval_of proj +R25830:25838 Sail.Values <> read_from proj +R25841:25841 riscv_types <> s:241 var +R25822:25827 riscv_types <> x8_ref def +R25802:25807 riscv_types <> x8_ref def +R25707:25710 Coq.Init.Datatypes <> Some constr +R25721:25729 Sail.Values <> regval_of proj +R25741:25749 Sail.Values <> read_from proj +R25752:25752 riscv_types <> s:241 var +R25733:25738 riscv_types <> x9_ref def +R25713:25718 riscv_types <> x9_ref def +R25616:25619 Coq.Init.Datatypes <> Some constr +R25631:25639 Sail.Values <> regval_of proj +R25652:25660 Sail.Values <> read_from proj +R25663:25663 riscv_types <> s:241 var +R25643:25649 riscv_types <> x10_ref def +R25622:25628 riscv_types <> x10_ref def +R25524:25527 Coq.Init.Datatypes <> Some constr +R25539:25547 Sail.Values <> regval_of proj +R25560:25568 Sail.Values <> read_from proj +R25571:25571 riscv_types <> s:241 var +R25551:25557 riscv_types <> x11_ref def +R25530:25536 riscv_types <> x11_ref def +R25432:25435 Coq.Init.Datatypes <> Some constr +R25447:25455 Sail.Values <> regval_of proj +R25468:25476 Sail.Values <> read_from proj +R25479:25479 riscv_types <> s:241 var +R25459:25465 riscv_types <> x12_ref def +R25438:25444 riscv_types <> x12_ref def +R25340:25343 Coq.Init.Datatypes <> Some constr +R25355:25363 Sail.Values <> regval_of proj +R25376:25384 Sail.Values <> read_from proj +R25387:25387 riscv_types <> s:241 var +R25367:25373 riscv_types <> x13_ref def +R25346:25352 riscv_types <> x13_ref def +R25248:25251 Coq.Init.Datatypes <> Some constr +R25263:25271 Sail.Values <> regval_of proj +R25284:25292 Sail.Values <> read_from proj +R25295:25295 riscv_types <> s:241 var +R25275:25281 riscv_types <> x14_ref def +R25254:25260 riscv_types <> x14_ref def +R25156:25159 Coq.Init.Datatypes <> Some constr +R25171:25179 Sail.Values <> regval_of proj +R25192:25200 Sail.Values <> read_from proj +R25203:25203 riscv_types <> s:241 var +R25183:25189 riscv_types <> x15_ref def +R25162:25168 riscv_types <> x15_ref def +R25064:25067 Coq.Init.Datatypes <> Some constr +R25079:25087 Sail.Values <> regval_of proj +R25100:25108 Sail.Values <> read_from proj +R25111:25111 riscv_types <> s:241 var +R25091:25097 riscv_types <> x16_ref def +R25070:25076 riscv_types <> x16_ref def +R24972:24975 Coq.Init.Datatypes <> Some constr +R24987:24995 Sail.Values <> regval_of proj +R25008:25016 Sail.Values <> read_from proj +R25019:25019 riscv_types <> s:241 var +R24999:25005 riscv_types <> x17_ref def +R24978:24984 riscv_types <> x17_ref def +R24880:24883 Coq.Init.Datatypes <> Some constr +R24895:24903 Sail.Values <> regval_of proj +R24916:24924 Sail.Values <> read_from proj +R24927:24927 riscv_types <> s:241 var +R24907:24913 riscv_types <> x18_ref def +R24886:24892 riscv_types <> x18_ref def +R24788:24791 Coq.Init.Datatypes <> Some constr +R24803:24811 Sail.Values <> regval_of proj +R24824:24832 Sail.Values <> read_from proj +R24835:24835 riscv_types <> s:241 var +R24815:24821 riscv_types <> x19_ref def +R24794:24800 riscv_types <> x19_ref def +R24696:24699 Coq.Init.Datatypes <> Some constr +R24711:24719 Sail.Values <> regval_of proj +R24732:24740 Sail.Values <> read_from proj +R24743:24743 riscv_types <> s:241 var +R24723:24729 riscv_types <> x20_ref def +R24702:24708 riscv_types <> x20_ref def +R24604:24607 Coq.Init.Datatypes <> Some constr +R24619:24627 Sail.Values <> regval_of proj +R24640:24648 Sail.Values <> read_from proj +R24651:24651 riscv_types <> s:241 var +R24631:24637 riscv_types <> x21_ref def +R24610:24616 riscv_types <> x21_ref def +R24512:24515 Coq.Init.Datatypes <> Some constr +R24527:24535 Sail.Values <> regval_of proj +R24548:24556 Sail.Values <> read_from proj +R24559:24559 riscv_types <> s:241 var +R24539:24545 riscv_types <> x22_ref def +R24518:24524 riscv_types <> x22_ref def +R24420:24423 Coq.Init.Datatypes <> Some constr +R24435:24443 Sail.Values <> regval_of proj +R24456:24464 Sail.Values <> read_from proj +R24467:24467 riscv_types <> s:241 var +R24447:24453 riscv_types <> x23_ref def +R24426:24432 riscv_types <> x23_ref def +R24328:24331 Coq.Init.Datatypes <> Some constr +R24343:24351 Sail.Values <> regval_of proj +R24364:24372 Sail.Values <> read_from proj +R24375:24375 riscv_types <> s:241 var +R24355:24361 riscv_types <> x24_ref def +R24334:24340 riscv_types <> x24_ref def +R24236:24239 Coq.Init.Datatypes <> Some constr +R24251:24259 Sail.Values <> regval_of proj +R24272:24280 Sail.Values <> read_from proj +R24283:24283 riscv_types <> s:241 var +R24263:24269 riscv_types <> x25_ref def +R24242:24248 riscv_types <> x25_ref def +R24144:24147 Coq.Init.Datatypes <> Some constr +R24159:24167 Sail.Values <> regval_of proj +R24180:24188 Sail.Values <> read_from proj +R24191:24191 riscv_types <> s:241 var +R24171:24177 riscv_types <> x26_ref def +R24150:24156 riscv_types <> x26_ref def +R24052:24055 Coq.Init.Datatypes <> Some constr +R24067:24075 Sail.Values <> regval_of proj +R24088:24096 Sail.Values <> read_from proj +R24099:24099 riscv_types <> s:241 var +R24079:24085 riscv_types <> x27_ref def +R24058:24064 riscv_types <> x27_ref def +R23960:23963 Coq.Init.Datatypes <> Some constr +R23975:23983 Sail.Values <> regval_of proj +R23996:24004 Sail.Values <> read_from proj +R24007:24007 riscv_types <> s:241 var +R23987:23993 riscv_types <> x28_ref def +R23966:23972 riscv_types <> x28_ref def +R23868:23871 Coq.Init.Datatypes <> Some constr +R23883:23891 Sail.Values <> regval_of proj +R23904:23912 Sail.Values <> read_from proj +R23915:23915 riscv_types <> s:241 var +R23895:23901 riscv_types <> x29_ref def +R23874:23880 riscv_types <> x29_ref def +R23776:23779 Coq.Init.Datatypes <> Some constr +R23791:23799 Sail.Values <> regval_of proj +R23812:23820 Sail.Values <> read_from proj +R23823:23823 riscv_types <> s:241 var +R23803:23809 riscv_types <> x30_ref def +R23782:23788 riscv_types <> x30_ref def +R23684:23687 Coq.Init.Datatypes <> Some constr +R23699:23707 Sail.Values <> regval_of proj +R23720:23728 Sail.Values <> read_from proj +R23731:23731 riscv_types <> s:241 var +R23711:23717 riscv_types <> x31_ref def +R23690:23696 riscv_types <> x31_ref def +def 26790:26799 <> set_regval +R26813:26818 Coq.Strings.String <> string ind +binder 26802:26809 <> reg_name:242 +R26826:26839 riscv_types <> register_value ind +binder 26822:26822 <> v:243 +R26847:26854 riscv_types <> regstate rec +binder 26843:26843 <> s:244 +R26859:26864 Coq.Init.Datatypes <> option ind +R26866:26873 riscv_types <> regstate rec +R26883:26892 Coq.Strings.String <> string_dec def +R26894:26901 riscv_types <> reg_name:242 var +R26993:27002 Coq.Strings.String <> string_dec def +R27004:27011 riscv_types <> reg_name:242 var +R27103:27112 Coq.Strings.String <> string_dec def +R27114:27121 riscv_types <> reg_name:242 var +R27213:27222 Coq.Strings.String <> string_dec def +R27224:27231 riscv_types <> reg_name:242 var +R27323:27332 Coq.Strings.String <> string_dec def +R27334:27341 riscv_types <> reg_name:242 var +R27433:27442 Coq.Strings.String <> string_dec def +R27444:27451 riscv_types <> reg_name:242 var +R27543:27552 Coq.Strings.String <> string_dec def +R27554:27561 riscv_types <> reg_name:242 var +R27653:27662 Coq.Strings.String <> string_dec def +R27664:27671 riscv_types <> reg_name:242 var +R27763:27772 Coq.Strings.String <> string_dec def +R27774:27781 riscv_types <> reg_name:242 var +R27873:27882 Coq.Strings.String <> string_dec def +R27884:27891 riscv_types <> reg_name:242 var +R27983:27992 Coq.Strings.String <> string_dec def +R27994:28001 riscv_types <> reg_name:242 var +R28093:28102 Coq.Strings.String <> string_dec def +R28104:28111 riscv_types <> reg_name:242 var +R28203:28212 Coq.Strings.String <> string_dec def +R28214:28221 riscv_types <> reg_name:242 var +R28313:28322 Coq.Strings.String <> string_dec def +R28324:28331 riscv_types <> reg_name:242 var +R28423:28432 Coq.Strings.String <> string_dec def +R28434:28441 riscv_types <> reg_name:242 var +R28533:28542 Coq.Strings.String <> string_dec def +R28544:28551 riscv_types <> reg_name:242 var +R28643:28652 Coq.Strings.String <> string_dec def +R28654:28661 riscv_types <> reg_name:242 var +R28753:28762 Coq.Strings.String <> string_dec def +R28764:28771 riscv_types <> reg_name:242 var +R28863:28872 Coq.Strings.String <> string_dec def +R28874:28881 riscv_types <> reg_name:242 var +R28973:28982 Coq.Strings.String <> string_dec def +R28984:28991 riscv_types <> reg_name:242 var +R29083:29092 Coq.Strings.String <> string_dec def +R29094:29101 riscv_types <> reg_name:242 var +R29193:29202 Coq.Strings.String <> string_dec def +R29204:29211 riscv_types <> reg_name:242 var +R29303:29312 Coq.Strings.String <> string_dec def +R29314:29321 riscv_types <> reg_name:242 var +R29410:29419 Coq.Strings.String <> string_dec def +R29421:29428 riscv_types <> reg_name:242 var +R29517:29526 Coq.Strings.String <> string_dec def +R29528:29535 riscv_types <> reg_name:242 var +R29624:29633 Coq.Strings.String <> string_dec def +R29635:29642 riscv_types <> reg_name:242 var +R29731:29740 Coq.Strings.String <> string_dec def +R29742:29749 riscv_types <> reg_name:242 var +R29838:29847 Coq.Strings.String <> string_dec def +R29849:29856 riscv_types <> reg_name:242 var +R29945:29954 Coq.Strings.String <> string_dec def +R29956:29963 riscv_types <> reg_name:242 var +R30052:30061 Coq.Strings.String <> string_dec def +R30063:30070 riscv_types <> reg_name:242 var +R30159:30168 Coq.Strings.String <> string_dec def +R30170:30177 riscv_types <> reg_name:242 var +R30266:30275 Coq.Strings.String <> string_dec def +R30277:30284 riscv_types <> reg_name:242 var +R30391:30400 Coq.Strings.String <> string_dec def +R30402:30409 riscv_types <> reg_name:242 var +R30510:30519 Coq.Strings.String <> string_dec def +R30521:30528 riscv_types <> reg_name:242 var +R30614:30617 Coq.Init.Datatypes <> None constr +R30540:30549 Coq.Init.Datatypes <> option_map def +R30593:30601 Sail.Values <> of_regval proj +R30604:30604 riscv_types <> v:243 var +R30585:30590 riscv_types <> PC_ref def +binder 30556:30556 <> v:245 +R30569:30576 Sail.Values <> write_to proj +R30581:30581 riscv_types <> s:244 var +R30579:30579 riscv_types <> v:245 var +R30561:30566 riscv_types <> PC_ref def +R30425:30434 Coq.Init.Datatypes <> option_map def +R30486:30494 Sail.Values <> of_regval proj +R30497:30497 riscv_types <> v:243 var +R30474:30483 riscv_types <> nextPC_ref def +binder 30441:30441 <> v:246 +R30458:30465 Sail.Values <> write_to proj +R30470:30470 riscv_types <> s:244 var +R30468:30468 riscv_types <> v:246 var +R30446:30455 riscv_types <> nextPC_ref def +R30302:30311 Coq.Init.Datatypes <> option_map def +R30367:30375 Sail.Values <> of_regval proj +R30378:30378 riscv_types <> v:243 var +R30353:30364 riscv_types <> instbits_ref def +binder 30318:30318 <> v:247 +R30337:30344 Sail.Values <> write_to proj +R30349:30349 riscv_types <> s:244 var +R30347:30347 riscv_types <> v:247 var +R30323:30334 riscv_types <> instbits_ref def +R30189:30198 Coq.Init.Datatypes <> option_map def +R30242:30250 Sail.Values <> of_regval proj +R30253:30253 riscv_types <> v:243 var +R30234:30239 riscv_types <> x1_ref def +binder 30205:30205 <> v:248 +R30218:30225 Sail.Values <> write_to proj +R30230:30230 riscv_types <> s:244 var +R30228:30228 riscv_types <> v:248 var +R30210:30215 riscv_types <> x1_ref def +R30082:30091 Coq.Init.Datatypes <> option_map def +R30135:30143 Sail.Values <> of_regval proj +R30146:30146 riscv_types <> v:243 var +R30127:30132 riscv_types <> x2_ref def +binder 30098:30098 <> v:249 +R30111:30118 Sail.Values <> write_to proj +R30123:30123 riscv_types <> s:244 var +R30121:30121 riscv_types <> v:249 var +R30103:30108 riscv_types <> x2_ref def +R29975:29984 Coq.Init.Datatypes <> option_map def +R30028:30036 Sail.Values <> of_regval proj +R30039:30039 riscv_types <> v:243 var +R30020:30025 riscv_types <> x3_ref def +binder 29991:29991 <> v:250 +R30004:30011 Sail.Values <> write_to proj +R30016:30016 riscv_types <> s:244 var +R30014:30014 riscv_types <> v:250 var +R29996:30001 riscv_types <> x3_ref def +R29868:29877 Coq.Init.Datatypes <> option_map def +R29921:29929 Sail.Values <> of_regval proj +R29932:29932 riscv_types <> v:243 var +R29913:29918 riscv_types <> x4_ref def +binder 29884:29884 <> v:251 +R29897:29904 Sail.Values <> write_to proj +R29909:29909 riscv_types <> s:244 var +R29907:29907 riscv_types <> v:251 var +R29889:29894 riscv_types <> x4_ref def +R29761:29770 Coq.Init.Datatypes <> option_map def +R29814:29822 Sail.Values <> of_regval proj +R29825:29825 riscv_types <> v:243 var +R29806:29811 riscv_types <> x5_ref def +binder 29777:29777 <> v:252 +R29790:29797 Sail.Values <> write_to proj +R29802:29802 riscv_types <> s:244 var +R29800:29800 riscv_types <> v:252 var +R29782:29787 riscv_types <> x5_ref def +R29654:29663 Coq.Init.Datatypes <> option_map def +R29707:29715 Sail.Values <> of_regval proj +R29718:29718 riscv_types <> v:243 var +R29699:29704 riscv_types <> x6_ref def +binder 29670:29670 <> v:253 +R29683:29690 Sail.Values <> write_to proj +R29695:29695 riscv_types <> s:244 var +R29693:29693 riscv_types <> v:253 var +R29675:29680 riscv_types <> x6_ref def +R29547:29556 Coq.Init.Datatypes <> option_map def +R29600:29608 Sail.Values <> of_regval proj +R29611:29611 riscv_types <> v:243 var +R29592:29597 riscv_types <> x7_ref def +binder 29563:29563 <> v:254 +R29576:29583 Sail.Values <> write_to proj +R29588:29588 riscv_types <> s:244 var +R29586:29586 riscv_types <> v:254 var +R29568:29573 riscv_types <> x7_ref def +R29440:29449 Coq.Init.Datatypes <> option_map def +R29493:29501 Sail.Values <> of_regval proj +R29504:29504 riscv_types <> v:243 var +R29485:29490 riscv_types <> x8_ref def +binder 29456:29456 <> v:255 +R29469:29476 Sail.Values <> write_to proj +R29481:29481 riscv_types <> s:244 var +R29479:29479 riscv_types <> v:255 var +R29461:29466 riscv_types <> x8_ref def +R29333:29342 Coq.Init.Datatypes <> option_map def +R29386:29394 Sail.Values <> of_regval proj +R29397:29397 riscv_types <> v:243 var +R29378:29383 riscv_types <> x9_ref def +binder 29349:29349 <> v:256 +R29362:29369 Sail.Values <> write_to proj +R29374:29374 riscv_types <> s:244 var +R29372:29372 riscv_types <> v:256 var +R29354:29359 riscv_types <> x9_ref def +R29224:29233 Coq.Init.Datatypes <> option_map def +R29279:29287 Sail.Values <> of_regval proj +R29290:29290 riscv_types <> v:243 var +R29270:29276 riscv_types <> x10_ref def +binder 29240:29240 <> v:257 +R29254:29261 Sail.Values <> write_to proj +R29266:29266 riscv_types <> s:244 var +R29264:29264 riscv_types <> v:257 var +R29245:29251 riscv_types <> x10_ref def +R29114:29123 Coq.Init.Datatypes <> option_map def +R29169:29177 Sail.Values <> of_regval proj +R29180:29180 riscv_types <> v:243 var +R29160:29166 riscv_types <> x11_ref def +binder 29130:29130 <> v:258 +R29144:29151 Sail.Values <> write_to proj +R29156:29156 riscv_types <> s:244 var +R29154:29154 riscv_types <> v:258 var +R29135:29141 riscv_types <> x11_ref def +R29004:29013 Coq.Init.Datatypes <> option_map def +R29059:29067 Sail.Values <> of_regval proj +R29070:29070 riscv_types <> v:243 var +R29050:29056 riscv_types <> x12_ref def +binder 29020:29020 <> v:259 +R29034:29041 Sail.Values <> write_to proj +R29046:29046 riscv_types <> s:244 var +R29044:29044 riscv_types <> v:259 var +R29025:29031 riscv_types <> x12_ref def +R28894:28903 Coq.Init.Datatypes <> option_map def +R28949:28957 Sail.Values <> of_regval proj +R28960:28960 riscv_types <> v:243 var +R28940:28946 riscv_types <> x13_ref def +binder 28910:28910 <> v:260 +R28924:28931 Sail.Values <> write_to proj +R28936:28936 riscv_types <> s:244 var +R28934:28934 riscv_types <> v:260 var +R28915:28921 riscv_types <> x13_ref def +R28784:28793 Coq.Init.Datatypes <> option_map def +R28839:28847 Sail.Values <> of_regval proj +R28850:28850 riscv_types <> v:243 var +R28830:28836 riscv_types <> x14_ref def +binder 28800:28800 <> v:261 +R28814:28821 Sail.Values <> write_to proj +R28826:28826 riscv_types <> s:244 var +R28824:28824 riscv_types <> v:261 var +R28805:28811 riscv_types <> x14_ref def +R28674:28683 Coq.Init.Datatypes <> option_map def +R28729:28737 Sail.Values <> of_regval proj +R28740:28740 riscv_types <> v:243 var +R28720:28726 riscv_types <> x15_ref def +binder 28690:28690 <> v:262 +R28704:28711 Sail.Values <> write_to proj +R28716:28716 riscv_types <> s:244 var +R28714:28714 riscv_types <> v:262 var +R28695:28701 riscv_types <> x15_ref def +R28564:28573 Coq.Init.Datatypes <> option_map def +R28619:28627 Sail.Values <> of_regval proj +R28630:28630 riscv_types <> v:243 var +R28610:28616 riscv_types <> x16_ref def +binder 28580:28580 <> v:263 +R28594:28601 Sail.Values <> write_to proj +R28606:28606 riscv_types <> s:244 var +R28604:28604 riscv_types <> v:263 var +R28585:28591 riscv_types <> x16_ref def +R28454:28463 Coq.Init.Datatypes <> option_map def +R28509:28517 Sail.Values <> of_regval proj +R28520:28520 riscv_types <> v:243 var +R28500:28506 riscv_types <> x17_ref def +binder 28470:28470 <> v:264 +R28484:28491 Sail.Values <> write_to proj +R28496:28496 riscv_types <> s:244 var +R28494:28494 riscv_types <> v:264 var +R28475:28481 riscv_types <> x17_ref def +R28344:28353 Coq.Init.Datatypes <> option_map def +R28399:28407 Sail.Values <> of_regval proj +R28410:28410 riscv_types <> v:243 var +R28390:28396 riscv_types <> x18_ref def +binder 28360:28360 <> v:265 +R28374:28381 Sail.Values <> write_to proj +R28386:28386 riscv_types <> s:244 var +R28384:28384 riscv_types <> v:265 var +R28365:28371 riscv_types <> x18_ref def +R28234:28243 Coq.Init.Datatypes <> option_map def +R28289:28297 Sail.Values <> of_regval proj +R28300:28300 riscv_types <> v:243 var +R28280:28286 riscv_types <> x19_ref def +binder 28250:28250 <> v:266 +R28264:28271 Sail.Values <> write_to proj +R28276:28276 riscv_types <> s:244 var +R28274:28274 riscv_types <> v:266 var +R28255:28261 riscv_types <> x19_ref def +R28124:28133 Coq.Init.Datatypes <> option_map def +R28179:28187 Sail.Values <> of_regval proj +R28190:28190 riscv_types <> v:243 var +R28170:28176 riscv_types <> x20_ref def +binder 28140:28140 <> v:267 +R28154:28161 Sail.Values <> write_to proj +R28166:28166 riscv_types <> s:244 var +R28164:28164 riscv_types <> v:267 var +R28145:28151 riscv_types <> x20_ref def +R28014:28023 Coq.Init.Datatypes <> option_map def +R28069:28077 Sail.Values <> of_regval proj +R28080:28080 riscv_types <> v:243 var +R28060:28066 riscv_types <> x21_ref def +binder 28030:28030 <> v:268 +R28044:28051 Sail.Values <> write_to proj +R28056:28056 riscv_types <> s:244 var +R28054:28054 riscv_types <> v:268 var +R28035:28041 riscv_types <> x21_ref def +R27904:27913 Coq.Init.Datatypes <> option_map def +R27959:27967 Sail.Values <> of_regval proj +R27970:27970 riscv_types <> v:243 var +R27950:27956 riscv_types <> x22_ref def +binder 27920:27920 <> v:269 +R27934:27941 Sail.Values <> write_to proj +R27946:27946 riscv_types <> s:244 var +R27944:27944 riscv_types <> v:269 var +R27925:27931 riscv_types <> x22_ref def +R27794:27803 Coq.Init.Datatypes <> option_map def +R27849:27857 Sail.Values <> of_regval proj +R27860:27860 riscv_types <> v:243 var +R27840:27846 riscv_types <> x23_ref def +binder 27810:27810 <> v:270 +R27824:27831 Sail.Values <> write_to proj +R27836:27836 riscv_types <> s:244 var +R27834:27834 riscv_types <> v:270 var +R27815:27821 riscv_types <> x23_ref def +R27684:27693 Coq.Init.Datatypes <> option_map def +R27739:27747 Sail.Values <> of_regval proj +R27750:27750 riscv_types <> v:243 var +R27730:27736 riscv_types <> x24_ref def +binder 27700:27700 <> v:271 +R27714:27721 Sail.Values <> write_to proj +R27726:27726 riscv_types <> s:244 var +R27724:27724 riscv_types <> v:271 var +R27705:27711 riscv_types <> x24_ref def +R27574:27583 Coq.Init.Datatypes <> option_map def +R27629:27637 Sail.Values <> of_regval proj +R27640:27640 riscv_types <> v:243 var +R27620:27626 riscv_types <> x25_ref def +binder 27590:27590 <> v:272 +R27604:27611 Sail.Values <> write_to proj +R27616:27616 riscv_types <> s:244 var +R27614:27614 riscv_types <> v:272 var +R27595:27601 riscv_types <> x25_ref def +R27464:27473 Coq.Init.Datatypes <> option_map def +R27519:27527 Sail.Values <> of_regval proj +R27530:27530 riscv_types <> v:243 var +R27510:27516 riscv_types <> x26_ref def +binder 27480:27480 <> v:273 +R27494:27501 Sail.Values <> write_to proj +R27506:27506 riscv_types <> s:244 var +R27504:27504 riscv_types <> v:273 var +R27485:27491 riscv_types <> x26_ref def +R27354:27363 Coq.Init.Datatypes <> option_map def +R27409:27417 Sail.Values <> of_regval proj +R27420:27420 riscv_types <> v:243 var +R27400:27406 riscv_types <> x27_ref def +binder 27370:27370 <> v:274 +R27384:27391 Sail.Values <> write_to proj +R27396:27396 riscv_types <> s:244 var +R27394:27394 riscv_types <> v:274 var +R27375:27381 riscv_types <> x27_ref def +R27244:27253 Coq.Init.Datatypes <> option_map def +R27299:27307 Sail.Values <> of_regval proj +R27310:27310 riscv_types <> v:243 var +R27290:27296 riscv_types <> x28_ref def +binder 27260:27260 <> v:275 +R27274:27281 Sail.Values <> write_to proj +R27286:27286 riscv_types <> s:244 var +R27284:27284 riscv_types <> v:275 var +R27265:27271 riscv_types <> x28_ref def +R27134:27143 Coq.Init.Datatypes <> option_map def +R27189:27197 Sail.Values <> of_regval proj +R27200:27200 riscv_types <> v:243 var +R27180:27186 riscv_types <> x29_ref def +binder 27150:27150 <> v:276 +R27164:27171 Sail.Values <> write_to proj +R27176:27176 riscv_types <> s:244 var +R27174:27174 riscv_types <> v:276 var +R27155:27161 riscv_types <> x29_ref def +R27024:27033 Coq.Init.Datatypes <> option_map def +R27079:27087 Sail.Values <> of_regval proj +R27090:27090 riscv_types <> v:243 var +R27070:27076 riscv_types <> x30_ref def +binder 27040:27040 <> v:277 +R27054:27061 Sail.Values <> write_to proj +R27066:27066 riscv_types <> s:244 var +R27064:27064 riscv_types <> v:277 var +R27045:27051 riscv_types <> x30_ref def +R26914:26923 Coq.Init.Datatypes <> option_map def +R26969:26977 Sail.Values <> of_regval proj +R26980:26980 riscv_types <> v:243 var +R26960:26966 riscv_types <> x31_ref def +binder 26930:26930 <> v:278 +R26944:26951 Sail.Values <> write_to proj +R26956:26956 riscv_types <> s:244 var +R26954:26954 riscv_types <> v:278 var +R26935:26941 riscv_types <> x31_ref def +def 30632:30649 <> register_accessors +R30654:30654 Coq.Init.Datatypes <> ::core_scope:'('_x_','_x_','_'..'_','_x_')' not +R30665:30666 Coq.Init.Datatypes <> ::core_scope:'('_x_','_x_','_'..'_','_x_')' not +R30677:30677 Coq.Init.Datatypes <> ::core_scope:'('_x_','_x_','_'..'_','_x_')' not +R30655:30664 riscv_types <> get_regval def +R30667:30676 riscv_types <> set_regval def +def 30693:30694 <> MR +binder 30696:30696 <> a:279 +binder 30698:30698 <> r:280 +R30703:30708 Sail.Prompt_monad <> monadR def +R30710:30723 riscv_types <> register_value ind +R30725:30725 riscv_types <> a:279 var +R30727:30727 riscv_types <> r:280 var +R30729:30732 Coq.Init.Datatypes <> unit ind +def 30746:30746 <> M +binder 30748:30748 <> a:281 +R30753:30757 Sail.Prompt_monad <> monad ind +R30759:30772 riscv_types <> register_value ind +R30774:30774 riscv_types <> a:281 var +R30776:30779 Coq.Init.Datatypes <> unit ind diff --git a/snapshot/riscv_types.v b/snapshot/riscv_types.v new file mode 100644 index 0000000..331002b --- /dev/null +++ b/snapshot/riscv_types.v @@ -0,0 +1,565 @@ +(*Generated by Sail from riscv.*) +Require Import Sail.Base. +Require Import Sail.Real. +Import ListNotations. +Open Scope string. +Open Scope bool. +Open Scope Z. + +Definition bits (n : Z) : Type := mword n. + +Definition xlen : Z := 64. +Hint Unfold xlen : sail. + +Definition xlen_bytes : Z := 8. +Hint Unfold xlen_bytes : sail. + +Definition xlenbits : Type := bits 64. + +Definition regtype : Type := xlenbits. + +Definition regno (n : Z)`{ArithFact ((0 <=? n) && (n <? 32))} : Type := Z. + +Definition regidx : Type := bits 5. + +Definition cregidx : Type := bits 3. + +Definition csreg : Type := bits 12. + +Inductive register_value := + | Regval_vector : list register_value -> register_value + | Regval_list : list register_value -> register_value + | Regval_option : option register_value -> register_value + | Regval_bit : bitU -> register_value + | Regval_bitvector_64_dec : mword 64 -> register_value. +Arguments register_value : clear implicits. + +Record regstate := + { x31 : mword 64; + x30 : mword 64; + x29 : mword 64; + x28 : mword 64; + x27 : mword 64; + x26 : mword 64; + x25 : mword 64; + x24 : mword 64; + x23 : mword 64; + x22 : mword 64; + x21 : mword 64; + x20 : mword 64; + x19 : mword 64; + x18 : mword 64; + x17 : mword 64; + x16 : mword 64; + x15 : mword 64; + x14 : mword 64; + x13 : mword 64; + x12 : mword 64; + x11 : mword 64; + x10 : mword 64; + x9 : mword 64; + x8 : mword 64; + x7 : mword 64; + x6 : mword 64; + x5 : mword 64; + x4 : mword 64; + x3 : mword 64; + x2 : mword 64; + x1 : mword 64; + instbits : mword 64; + nextPC : mword 64; + PC : mword 64; }. + +Arguments regstate : clear implicits. + +Notation "{[ r 'with' 'x31' := e ]}" := + match r with Build_regstate _ f1 f2 f3 f4 f5 f6 f7 f8 f9 f10 f11 f12 f13 f14 f15 f16 f17 f18 f19 f20 f21 f22 f23 f24 f25 f26 f27 f28 f29 f30 f31 f32 f33 => + Build_regstate e f1 f2 f3 f4 f5 f6 f7 f8 f9 f10 f11 f12 f13 f14 f15 f16 f17 f18 f19 f20 f21 f22 f23 f24 f25 f26 f27 f28 f29 f30 f31 f32 f33 + end. +Notation "{[ r 'with' 'x30' := e ]}" := + match r with Build_regstate f0 _ f2 f3 f4 f5 f6 f7 f8 f9 f10 f11 f12 f13 f14 f15 f16 f17 f18 f19 f20 f21 f22 f23 f24 f25 f26 f27 f28 f29 f30 f31 f32 f33 => + Build_regstate f0 e f2 f3 f4 f5 f6 f7 f8 f9 f10 f11 f12 f13 f14 f15 f16 f17 f18 f19 f20 f21 f22 f23 f24 f25 f26 f27 f28 f29 f30 f31 f32 f33 + end. +Notation "{[ r 'with' 'x29' := e ]}" := + match r with Build_regstate f0 f1 _ f3 f4 f5 f6 f7 f8 f9 f10 f11 f12 f13 f14 f15 f16 f17 f18 f19 f20 f21 f22 f23 f24 f25 f26 f27 f28 f29 f30 f31 f32 f33 => + Build_regstate f0 f1 e f3 f4 f5 f6 f7 f8 f9 f10 f11 f12 f13 f14 f15 f16 f17 f18 f19 f20 f21 f22 f23 f24 f25 f26 f27 f28 f29 f30 f31 f32 f33 + end. +Notation "{[ r 'with' 'x28' := e ]}" := + match r with Build_regstate f0 f1 f2 _ f4 f5 f6 f7 f8 f9 f10 f11 f12 f13 f14 f15 f16 f17 f18 f19 f20 f21 f22 f23 f24 f25 f26 f27 f28 f29 f30 f31 f32 f33 => + Build_regstate f0 f1 f2 e f4 f5 f6 f7 f8 f9 f10 f11 f12 f13 f14 f15 f16 f17 f18 f19 f20 f21 f22 f23 f24 f25 f26 f27 f28 f29 f30 f31 f32 f33 + end. +Notation "{[ r 'with' 'x27' := e ]}" := + match r with Build_regstate f0 f1 f2 f3 _ f5 f6 f7 f8 f9 f10 f11 f12 f13 f14 f15 f16 f17 f18 f19 f20 f21 f22 f23 f24 f25 f26 f27 f28 f29 f30 f31 f32 f33 => + Build_regstate f0 f1 f2 f3 e f5 f6 f7 f8 f9 f10 f11 f12 f13 f14 f15 f16 f17 f18 f19 f20 f21 f22 f23 f24 f25 f26 f27 f28 f29 f30 f31 f32 f33 + end. +Notation "{[ r 'with' 'x26' := e ]}" := + match r with Build_regstate f0 f1 f2 f3 f4 _ f6 f7 f8 f9 f10 f11 f12 f13 f14 f15 f16 f17 f18 f19 f20 f21 f22 f23 f24 f25 f26 f27 f28 f29 f30 f31 f32 f33 => + Build_regstate f0 f1 f2 f3 f4 e f6 f7 f8 f9 f10 f11 f12 f13 f14 f15 f16 f17 f18 f19 f20 f21 f22 f23 f24 f25 f26 f27 f28 f29 f30 f31 f32 f33 + end. +Notation "{[ r 'with' 'x25' := e ]}" := + match r with Build_regstate f0 f1 f2 f3 f4 f5 _ f7 f8 f9 f10 f11 f12 f13 f14 f15 f16 f17 f18 f19 f20 f21 f22 f23 f24 f25 f26 f27 f28 f29 f30 f31 f32 f33 => + Build_regstate f0 f1 f2 f3 f4 f5 e f7 f8 f9 f10 f11 f12 f13 f14 f15 f16 f17 f18 f19 f20 f21 f22 f23 f24 f25 f26 f27 f28 f29 f30 f31 f32 f33 + end. +Notation "{[ r 'with' 'x24' := e ]}" := + match r with Build_regstate f0 f1 f2 f3 f4 f5 f6 _ f8 f9 f10 f11 f12 f13 f14 f15 f16 f17 f18 f19 f20 f21 f22 f23 f24 f25 f26 f27 f28 f29 f30 f31 f32 f33 => + Build_regstate f0 f1 f2 f3 f4 f5 f6 e f8 f9 f10 f11 f12 f13 f14 f15 f16 f17 f18 f19 f20 f21 f22 f23 f24 f25 f26 f27 f28 f29 f30 f31 f32 f33 + end. +Notation "{[ r 'with' 'x23' := e ]}" := + match r with Build_regstate f0 f1 f2 f3 f4 f5 f6 f7 _ f9 f10 f11 f12 f13 f14 f15 f16 f17 f18 f19 f20 f21 f22 f23 f24 f25 f26 f27 f28 f29 f30 f31 f32 f33 => + Build_regstate f0 f1 f2 f3 f4 f5 f6 f7 e f9 f10 f11 f12 f13 f14 f15 f16 f17 f18 f19 f20 f21 f22 f23 f24 f25 f26 f27 f28 f29 f30 f31 f32 f33 + end. +Notation "{[ r 'with' 'x22' := e ]}" := + match r with Build_regstate f0 f1 f2 f3 f4 f5 f6 f7 f8 _ f10 f11 f12 f13 f14 f15 f16 f17 f18 f19 f20 f21 f22 f23 f24 f25 f26 f27 f28 f29 f30 f31 f32 f33 => + Build_regstate f0 f1 f2 f3 f4 f5 f6 f7 f8 e f10 f11 f12 f13 f14 f15 f16 f17 f18 f19 f20 f21 f22 f23 f24 f25 f26 f27 f28 f29 f30 f31 f32 f33 + end. +Notation "{[ r 'with' 'x21' := e ]}" := + match r with Build_regstate f0 f1 f2 f3 f4 f5 f6 f7 f8 f9 _ f11 f12 f13 f14 f15 f16 f17 f18 f19 f20 f21 f22 f23 f24 f25 f26 f27 f28 f29 f30 f31 f32 f33 => + Build_regstate f0 f1 f2 f3 f4 f5 f6 f7 f8 f9 e f11 f12 f13 f14 f15 f16 f17 f18 f19 f20 f21 f22 f23 f24 f25 f26 f27 f28 f29 f30 f31 f32 f33 + end. +Notation "{[ r 'with' 'x20' := e ]}" := + match r with Build_regstate f0 f1 f2 f3 f4 f5 f6 f7 f8 f9 f10 _ f12 f13 f14 f15 f16 f17 f18 f19 f20 f21 f22 f23 f24 f25 f26 f27 f28 f29 f30 f31 f32 f33 => + Build_regstate f0 f1 f2 f3 f4 f5 f6 f7 f8 f9 f10 e f12 f13 f14 f15 f16 f17 f18 f19 f20 f21 f22 f23 f24 f25 f26 f27 f28 f29 f30 f31 f32 f33 + end. +Notation "{[ r 'with' 'x19' := e ]}" := + match r with Build_regstate f0 f1 f2 f3 f4 f5 f6 f7 f8 f9 f10 f11 _ f13 f14 f15 f16 f17 f18 f19 f20 f21 f22 f23 f24 f25 f26 f27 f28 f29 f30 f31 f32 f33 => + Build_regstate f0 f1 f2 f3 f4 f5 f6 f7 f8 f9 f10 f11 e f13 f14 f15 f16 f17 f18 f19 f20 f21 f22 f23 f24 f25 f26 f27 f28 f29 f30 f31 f32 f33 + end. +Notation "{[ r 'with' 'x18' := e ]}" := + match r with Build_regstate f0 f1 f2 f3 f4 f5 f6 f7 f8 f9 f10 f11 f12 _ f14 f15 f16 f17 f18 f19 f20 f21 f22 f23 f24 f25 f26 f27 f28 f29 f30 f31 f32 f33 => + Build_regstate f0 f1 f2 f3 f4 f5 f6 f7 f8 f9 f10 f11 f12 e f14 f15 f16 f17 f18 f19 f20 f21 f22 f23 f24 f25 f26 f27 f28 f29 f30 f31 f32 f33 + end. +Notation "{[ r 'with' 'x17' := e ]}" := + match r with Build_regstate f0 f1 f2 f3 f4 f5 f6 f7 f8 f9 f10 f11 f12 f13 _ f15 f16 f17 f18 f19 f20 f21 f22 f23 f24 f25 f26 f27 f28 f29 f30 f31 f32 f33 => + Build_regstate f0 f1 f2 f3 f4 f5 f6 f7 f8 f9 f10 f11 f12 f13 e f15 f16 f17 f18 f19 f20 f21 f22 f23 f24 f25 f26 f27 f28 f29 f30 f31 f32 f33 + end. +Notation "{[ r 'with' 'x16' := e ]}" := + match r with Build_regstate f0 f1 f2 f3 f4 f5 f6 f7 f8 f9 f10 f11 f12 f13 f14 _ f16 f17 f18 f19 f20 f21 f22 f23 f24 f25 f26 f27 f28 f29 f30 f31 f32 f33 => + Build_regstate f0 f1 f2 f3 f4 f5 f6 f7 f8 f9 f10 f11 f12 f13 f14 e f16 f17 f18 f19 f20 f21 f22 f23 f24 f25 f26 f27 f28 f29 f30 f31 f32 f33 + end. +Notation "{[ r 'with' 'x15' := e ]}" := + match r with Build_regstate f0 f1 f2 f3 f4 f5 f6 f7 f8 f9 f10 f11 f12 f13 f14 f15 _ f17 f18 f19 f20 f21 f22 f23 f24 f25 f26 f27 f28 f29 f30 f31 f32 f33 => + Build_regstate f0 f1 f2 f3 f4 f5 f6 f7 f8 f9 f10 f11 f12 f13 f14 f15 e f17 f18 f19 f20 f21 f22 f23 f24 f25 f26 f27 f28 f29 f30 f31 f32 f33 + end. +Notation "{[ r 'with' 'x14' := e ]}" := + match r with Build_regstate f0 f1 f2 f3 f4 f5 f6 f7 f8 f9 f10 f11 f12 f13 f14 f15 f16 _ f18 f19 f20 f21 f22 f23 f24 f25 f26 f27 f28 f29 f30 f31 f32 f33 => + Build_regstate f0 f1 f2 f3 f4 f5 f6 f7 f8 f9 f10 f11 f12 f13 f14 f15 f16 e f18 f19 f20 f21 f22 f23 f24 f25 f26 f27 f28 f29 f30 f31 f32 f33 + end. +Notation "{[ r 'with' 'x13' := e ]}" := + match r with Build_regstate f0 f1 f2 f3 f4 f5 f6 f7 f8 f9 f10 f11 f12 f13 f14 f15 f16 f17 _ f19 f20 f21 f22 f23 f24 f25 f26 f27 f28 f29 f30 f31 f32 f33 => + Build_regstate f0 f1 f2 f3 f4 f5 f6 f7 f8 f9 f10 f11 f12 f13 f14 f15 f16 f17 e f19 f20 f21 f22 f23 f24 f25 f26 f27 f28 f29 f30 f31 f32 f33 + end. +Notation "{[ r 'with' 'x12' := e ]}" := + match r with Build_regstate f0 f1 f2 f3 f4 f5 f6 f7 f8 f9 f10 f11 f12 f13 f14 f15 f16 f17 f18 _ f20 f21 f22 f23 f24 f25 f26 f27 f28 f29 f30 f31 f32 f33 => + Build_regstate f0 f1 f2 f3 f4 f5 f6 f7 f8 f9 f10 f11 f12 f13 f14 f15 f16 f17 f18 e f20 f21 f22 f23 f24 f25 f26 f27 f28 f29 f30 f31 f32 f33 + end. +Notation "{[ r 'with' 'x11' := e ]}" := + match r with Build_regstate f0 f1 f2 f3 f4 f5 f6 f7 f8 f9 f10 f11 f12 f13 f14 f15 f16 f17 f18 f19 _ f21 f22 f23 f24 f25 f26 f27 f28 f29 f30 f31 f32 f33 => + Build_regstate f0 f1 f2 f3 f4 f5 f6 f7 f8 f9 f10 f11 f12 f13 f14 f15 f16 f17 f18 f19 e f21 f22 f23 f24 f25 f26 f27 f28 f29 f30 f31 f32 f33 + end. +Notation "{[ r 'with' 'x10' := e ]}" := + match r with Build_regstate f0 f1 f2 f3 f4 f5 f6 f7 f8 f9 f10 f11 f12 f13 f14 f15 f16 f17 f18 f19 f20 _ f22 f23 f24 f25 f26 f27 f28 f29 f30 f31 f32 f33 => + Build_regstate f0 f1 f2 f3 f4 f5 f6 f7 f8 f9 f10 f11 f12 f13 f14 f15 f16 f17 f18 f19 f20 e f22 f23 f24 f25 f26 f27 f28 f29 f30 f31 f32 f33 + end. +Notation "{[ r 'with' 'x9' := e ]}" := + match r with Build_regstate f0 f1 f2 f3 f4 f5 f6 f7 f8 f9 f10 f11 f12 f13 f14 f15 f16 f17 f18 f19 f20 f21 _ f23 f24 f25 f26 f27 f28 f29 f30 f31 f32 f33 => + Build_regstate f0 f1 f2 f3 f4 f5 f6 f7 f8 f9 f10 f11 f12 f13 f14 f15 f16 f17 f18 f19 f20 f21 e f23 f24 f25 f26 f27 f28 f29 f30 f31 f32 f33 + end. +Notation "{[ r 'with' 'x8' := e ]}" := + match r with Build_regstate f0 f1 f2 f3 f4 f5 f6 f7 f8 f9 f10 f11 f12 f13 f14 f15 f16 f17 f18 f19 f20 f21 f22 _ f24 f25 f26 f27 f28 f29 f30 f31 f32 f33 => + Build_regstate f0 f1 f2 f3 f4 f5 f6 f7 f8 f9 f10 f11 f12 f13 f14 f15 f16 f17 f18 f19 f20 f21 f22 e f24 f25 f26 f27 f28 f29 f30 f31 f32 f33 + end. +Notation "{[ r 'with' 'x7' := e ]}" := + match r with Build_regstate f0 f1 f2 f3 f4 f5 f6 f7 f8 f9 f10 f11 f12 f13 f14 f15 f16 f17 f18 f19 f20 f21 f22 f23 _ f25 f26 f27 f28 f29 f30 f31 f32 f33 => + Build_regstate f0 f1 f2 f3 f4 f5 f6 f7 f8 f9 f10 f11 f12 f13 f14 f15 f16 f17 f18 f19 f20 f21 f22 f23 e f25 f26 f27 f28 f29 f30 f31 f32 f33 + end. +Notation "{[ r 'with' 'x6' := e ]}" := + match r with Build_regstate f0 f1 f2 f3 f4 f5 f6 f7 f8 f9 f10 f11 f12 f13 f14 f15 f16 f17 f18 f19 f20 f21 f22 f23 f24 _ f26 f27 f28 f29 f30 f31 f32 f33 => + Build_regstate f0 f1 f2 f3 f4 f5 f6 f7 f8 f9 f10 f11 f12 f13 f14 f15 f16 f17 f18 f19 f20 f21 f22 f23 f24 e f26 f27 f28 f29 f30 f31 f32 f33 + end. +Notation "{[ r 'with' 'x5' := e ]}" := + match r with Build_regstate f0 f1 f2 f3 f4 f5 f6 f7 f8 f9 f10 f11 f12 f13 f14 f15 f16 f17 f18 f19 f20 f21 f22 f23 f24 f25 _ f27 f28 f29 f30 f31 f32 f33 => + Build_regstate f0 f1 f2 f3 f4 f5 f6 f7 f8 f9 f10 f11 f12 f13 f14 f15 f16 f17 f18 f19 f20 f21 f22 f23 f24 f25 e f27 f28 f29 f30 f31 f32 f33 + end. +Notation "{[ r 'with' 'x4' := e ]}" := + match r with Build_regstate f0 f1 f2 f3 f4 f5 f6 f7 f8 f9 f10 f11 f12 f13 f14 f15 f16 f17 f18 f19 f20 f21 f22 f23 f24 f25 f26 _ f28 f29 f30 f31 f32 f33 => + Build_regstate f0 f1 f2 f3 f4 f5 f6 f7 f8 f9 f10 f11 f12 f13 f14 f15 f16 f17 f18 f19 f20 f21 f22 f23 f24 f25 f26 e f28 f29 f30 f31 f32 f33 + end. +Notation "{[ r 'with' 'x3' := e ]}" := + match r with Build_regstate f0 f1 f2 f3 f4 f5 f6 f7 f8 f9 f10 f11 f12 f13 f14 f15 f16 f17 f18 f19 f20 f21 f22 f23 f24 f25 f26 f27 _ f29 f30 f31 f32 f33 => + Build_regstate f0 f1 f2 f3 f4 f5 f6 f7 f8 f9 f10 f11 f12 f13 f14 f15 f16 f17 f18 f19 f20 f21 f22 f23 f24 f25 f26 f27 e f29 f30 f31 f32 f33 + end. +Notation "{[ r 'with' 'x2' := e ]}" := + match r with Build_regstate f0 f1 f2 f3 f4 f5 f6 f7 f8 f9 f10 f11 f12 f13 f14 f15 f16 f17 f18 f19 f20 f21 f22 f23 f24 f25 f26 f27 f28 _ f30 f31 f32 f33 => + Build_regstate f0 f1 f2 f3 f4 f5 f6 f7 f8 f9 f10 f11 f12 f13 f14 f15 f16 f17 f18 f19 f20 f21 f22 f23 f24 f25 f26 f27 f28 e f30 f31 f32 f33 + end. +Notation "{[ r 'with' 'x1' := e ]}" := + match r with Build_regstate f0 f1 f2 f3 f4 f5 f6 f7 f8 f9 f10 f11 f12 f13 f14 f15 f16 f17 f18 f19 f20 f21 f22 f23 f24 f25 f26 f27 f28 f29 _ f31 f32 f33 => + Build_regstate f0 f1 f2 f3 f4 f5 f6 f7 f8 f9 f10 f11 f12 f13 f14 f15 f16 f17 f18 f19 f20 f21 f22 f23 f24 f25 f26 f27 f28 f29 e f31 f32 f33 + end. +Notation "{[ r 'with' 'instbits' := e ]}" := + match r with Build_regstate f0 f1 f2 f3 f4 f5 f6 f7 f8 f9 f10 f11 f12 f13 f14 f15 f16 f17 f18 f19 f20 f21 f22 f23 f24 f25 f26 f27 f28 f29 f30 _ f32 f33 => + Build_regstate f0 f1 f2 f3 f4 f5 f6 f7 f8 f9 f10 f11 f12 f13 f14 f15 f16 f17 f18 f19 f20 f21 f22 f23 f24 f25 f26 f27 f28 f29 f30 e f32 f33 + end. +Notation "{[ r 'with' 'nextPC' := e ]}" := + match r with Build_regstate f0 f1 f2 f3 f4 f5 f6 f7 f8 f9 f10 f11 f12 f13 f14 f15 f16 f17 f18 f19 f20 f21 f22 f23 f24 f25 f26 f27 f28 f29 f30 f31 _ f33 => + Build_regstate f0 f1 f2 f3 f4 f5 f6 f7 f8 f9 f10 f11 f12 f13 f14 f15 f16 f17 f18 f19 f20 f21 f22 f23 f24 f25 f26 f27 f28 f29 f30 f31 e f33 + end. +Notation "{[ r 'with' 'PC' := e ]}" := + match r with Build_regstate f0 f1 f2 f3 f4 f5 f6 f7 f8 f9 f10 f11 f12 f13 f14 f15 f16 f17 f18 f19 f20 f21 f22 f23 f24 f25 f26 f27 f28 f29 f30 f31 f32 _ => + Build_regstate f0 f1 f2 f3 f4 f5 f6 f7 f8 f9 f10 f11 f12 f13 f14 f15 f16 f17 f18 f19 f20 f21 f22 f23 f24 f25 f26 f27 f28 f29 f30 f31 f32 e + end. + + + +Definition bit_of_regval (merge_var : register_value) : option bitU := + match merge_var with | Regval_bit v => Some v | _ => None end. + +Definition regval_of_bit (v : bitU) : register_value := Regval_bit v. + +Definition bitvector_64_dec_of_regval (merge_var : register_value) : option (mword 64) := + match merge_var with | Regval_bitvector_64_dec v => Some v | _ => None end. + +Definition regval_of_bitvector_64_dec (v : mword 64) : register_value := Regval_bitvector_64_dec v. + + + +Definition vector_of_regval {a} n (of_regval : register_value -> option a) (rv : register_value) : option (vec a n) := match rv with + | Regval_vector v => if n =? length_list v then map_bind (vec_of_list n) (just_list (List.map of_regval v)) else None + | _ => None +end. + +Definition regval_of_vector {a size} (regval_of : a -> register_value) (xs : vec a size) : register_value := Regval_vector (List.map regval_of (list_of_vec xs)). + +Definition list_of_regval {a} (of_regval : register_value -> option a) (rv : register_value) : option (list a) := match rv with + | Regval_list v => just_list (List.map of_regval v) + | _ => None +end. + +Definition regval_of_list {a} (regval_of : a -> register_value) (xs : list a) : register_value := Regval_list (List.map regval_of xs). + +Definition option_of_regval {a} (of_regval : register_value -> option a) (rv : register_value) : option (option a) := match rv with + | Regval_option v => option_map of_regval v + | _ => None +end. + +Definition regval_of_option {a} (regval_of : a -> register_value) (v : option a) := Regval_option (option_map regval_of v). + + +Definition x31_ref := {| + name := "x31"; + read_from := (fun s => s.(x31)); + write_to := (fun v s => ({[ s with x31 := v ]})); + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. + +Definition x30_ref := {| + name := "x30"; + read_from := (fun s => s.(x30)); + write_to := (fun v s => ({[ s with x30 := v ]})); + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. + +Definition x29_ref := {| + name := "x29"; + read_from := (fun s => s.(x29)); + write_to := (fun v s => ({[ s with x29 := v ]})); + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. + +Definition x28_ref := {| + name := "x28"; + read_from := (fun s => s.(x28)); + write_to := (fun v s => ({[ s with x28 := v ]})); + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. + +Definition x27_ref := {| + name := "x27"; + read_from := (fun s => s.(x27)); + write_to := (fun v s => ({[ s with x27 := v ]})); + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. + +Definition x26_ref := {| + name := "x26"; + read_from := (fun s => s.(x26)); + write_to := (fun v s => ({[ s with x26 := v ]})); + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. + +Definition x25_ref := {| + name := "x25"; + read_from := (fun s => s.(x25)); + write_to := (fun v s => ({[ s with x25 := v ]})); + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. + +Definition x24_ref := {| + name := "x24"; + read_from := (fun s => s.(x24)); + write_to := (fun v s => ({[ s with x24 := v ]})); + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. + +Definition x23_ref := {| + name := "x23"; + read_from := (fun s => s.(x23)); + write_to := (fun v s => ({[ s with x23 := v ]})); + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. + +Definition x22_ref := {| + name := "x22"; + read_from := (fun s => s.(x22)); + write_to := (fun v s => ({[ s with x22 := v ]})); + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. + +Definition x21_ref := {| + name := "x21"; + read_from := (fun s => s.(x21)); + write_to := (fun v s => ({[ s with x21 := v ]})); + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. + +Definition x20_ref := {| + name := "x20"; + read_from := (fun s => s.(x20)); + write_to := (fun v s => ({[ s with x20 := v ]})); + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. + +Definition x19_ref := {| + name := "x19"; + read_from := (fun s => s.(x19)); + write_to := (fun v s => ({[ s with x19 := v ]})); + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. + +Definition x18_ref := {| + name := "x18"; + read_from := (fun s => s.(x18)); + write_to := (fun v s => ({[ s with x18 := v ]})); + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. + +Definition x17_ref := {| + name := "x17"; + read_from := (fun s => s.(x17)); + write_to := (fun v s => ({[ s with x17 := v ]})); + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. + +Definition x16_ref := {| + name := "x16"; + read_from := (fun s => s.(x16)); + write_to := (fun v s => ({[ s with x16 := v ]})); + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. + +Definition x15_ref := {| + name := "x15"; + read_from := (fun s => s.(x15)); + write_to := (fun v s => ({[ s with x15 := v ]})); + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. + +Definition x14_ref := {| + name := "x14"; + read_from := (fun s => s.(x14)); + write_to := (fun v s => ({[ s with x14 := v ]})); + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. + +Definition x13_ref := {| + name := "x13"; + read_from := (fun s => s.(x13)); + write_to := (fun v s => ({[ s with x13 := v ]})); + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. + +Definition x12_ref := {| + name := "x12"; + read_from := (fun s => s.(x12)); + write_to := (fun v s => ({[ s with x12 := v ]})); + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. + +Definition x11_ref := {| + name := "x11"; + read_from := (fun s => s.(x11)); + write_to := (fun v s => ({[ s with x11 := v ]})); + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. + +Definition x10_ref := {| + name := "x10"; + read_from := (fun s => s.(x10)); + write_to := (fun v s => ({[ s with x10 := v ]})); + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. + +Definition x9_ref := {| + name := "x9"; + read_from := (fun s => s.(x9)); + write_to := (fun v s => ({[ s with x9 := v ]})); + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. + +Definition x8_ref := {| + name := "x8"; + read_from := (fun s => s.(x8)); + write_to := (fun v s => ({[ s with x8 := v ]})); + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. + +Definition x7_ref := {| + name := "x7"; + read_from := (fun s => s.(x7)); + write_to := (fun v s => ({[ s with x7 := v ]})); + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. + +Definition x6_ref := {| + name := "x6"; + read_from := (fun s => s.(x6)); + write_to := (fun v s => ({[ s with x6 := v ]})); + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. + +Definition x5_ref := {| + name := "x5"; + read_from := (fun s => s.(x5)); + write_to := (fun v s => ({[ s with x5 := v ]})); + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. + +Definition x4_ref := {| + name := "x4"; + read_from := (fun s => s.(x4)); + write_to := (fun v s => ({[ s with x4 := v ]})); + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. + +Definition x3_ref := {| + name := "x3"; + read_from := (fun s => s.(x3)); + write_to := (fun v s => ({[ s with x3 := v ]})); + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. + +Definition x2_ref := {| + name := "x2"; + read_from := (fun s => s.(x2)); + write_to := (fun v s => ({[ s with x2 := v ]})); + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. + +Definition x1_ref := {| + name := "x1"; + read_from := (fun s => s.(x1)); + write_to := (fun v s => ({[ s with x1 := v ]})); + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. + +Definition instbits_ref := {| + name := "instbits"; + read_from := (fun s => s.(instbits)); + write_to := (fun v s => ({[ s with instbits := v ]})); + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. + +Definition nextPC_ref := {| + name := "nextPC"; + read_from := (fun s => s.(nextPC)); + write_to := (fun v s => ({[ s with nextPC := v ]})); + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. + +Definition PC_ref := {| + name := "PC"; + read_from := (fun s => s.(PC)); + write_to := (fun v s => ({[ s with PC := v ]})); + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. + +Local Open Scope string. +Definition get_regval (reg_name : string) (s : regstate) : option register_value := + if string_dec reg_name "x31" then Some (x31_ref.(regval_of) (x31_ref.(read_from) s)) else + if string_dec reg_name "x30" then Some (x30_ref.(regval_of) (x30_ref.(read_from) s)) else + if string_dec reg_name "x29" then Some (x29_ref.(regval_of) (x29_ref.(read_from) s)) else + if string_dec reg_name "x28" then Some (x28_ref.(regval_of) (x28_ref.(read_from) s)) else + if string_dec reg_name "x27" then Some (x27_ref.(regval_of) (x27_ref.(read_from) s)) else + if string_dec reg_name "x26" then Some (x26_ref.(regval_of) (x26_ref.(read_from) s)) else + if string_dec reg_name "x25" then Some (x25_ref.(regval_of) (x25_ref.(read_from) s)) else + if string_dec reg_name "x24" then Some (x24_ref.(regval_of) (x24_ref.(read_from) s)) else + if string_dec reg_name "x23" then Some (x23_ref.(regval_of) (x23_ref.(read_from) s)) else + if string_dec reg_name "x22" then Some (x22_ref.(regval_of) (x22_ref.(read_from) s)) else + if string_dec reg_name "x21" then Some (x21_ref.(regval_of) (x21_ref.(read_from) s)) else + if string_dec reg_name "x20" then Some (x20_ref.(regval_of) (x20_ref.(read_from) s)) else + if string_dec reg_name "x19" then Some (x19_ref.(regval_of) (x19_ref.(read_from) s)) else + if string_dec reg_name "x18" then Some (x18_ref.(regval_of) (x18_ref.(read_from) s)) else + if string_dec reg_name "x17" then Some (x17_ref.(regval_of) (x17_ref.(read_from) s)) else + if string_dec reg_name "x16" then Some (x16_ref.(regval_of) (x16_ref.(read_from) s)) else + if string_dec reg_name "x15" then Some (x15_ref.(regval_of) (x15_ref.(read_from) s)) else + if string_dec reg_name "x14" then Some (x14_ref.(regval_of) (x14_ref.(read_from) s)) else + if string_dec reg_name "x13" then Some (x13_ref.(regval_of) (x13_ref.(read_from) s)) else + if string_dec reg_name "x12" then Some (x12_ref.(regval_of) (x12_ref.(read_from) s)) else + if string_dec reg_name "x11" then Some (x11_ref.(regval_of) (x11_ref.(read_from) s)) else + if string_dec reg_name "x10" then Some (x10_ref.(regval_of) (x10_ref.(read_from) s)) else + if string_dec reg_name "x9" then Some (x9_ref.(regval_of) (x9_ref.(read_from) s)) else + if string_dec reg_name "x8" then Some (x8_ref.(regval_of) (x8_ref.(read_from) s)) else + if string_dec reg_name "x7" then Some (x7_ref.(regval_of) (x7_ref.(read_from) s)) else + if string_dec reg_name "x6" then Some (x6_ref.(regval_of) (x6_ref.(read_from) s)) else + if string_dec reg_name "x5" then Some (x5_ref.(regval_of) (x5_ref.(read_from) s)) else + if string_dec reg_name "x4" then Some (x4_ref.(regval_of) (x4_ref.(read_from) s)) else + if string_dec reg_name "x3" then Some (x3_ref.(regval_of) (x3_ref.(read_from) s)) else + if string_dec reg_name "x2" then Some (x2_ref.(regval_of) (x2_ref.(read_from) s)) else + if string_dec reg_name "x1" then Some (x1_ref.(regval_of) (x1_ref.(read_from) s)) else + if string_dec reg_name "instbits" then Some (instbits_ref.(regval_of) (instbits_ref.(read_from) s)) else + if string_dec reg_name "nextPC" then Some (nextPC_ref.(regval_of) (nextPC_ref.(read_from) s)) else + if string_dec reg_name "PC" then Some (PC_ref.(regval_of) (PC_ref.(read_from) s)) else + None. + +Definition set_regval (reg_name : string) (v : register_value) (s : regstate) : option regstate := + if string_dec reg_name "x31" then option_map (fun v => x31_ref.(write_to) v s) (x31_ref.(of_regval) v) else + if string_dec reg_name "x30" then option_map (fun v => x30_ref.(write_to) v s) (x30_ref.(of_regval) v) else + if string_dec reg_name "x29" then option_map (fun v => x29_ref.(write_to) v s) (x29_ref.(of_regval) v) else + if string_dec reg_name "x28" then option_map (fun v => x28_ref.(write_to) v s) (x28_ref.(of_regval) v) else + if string_dec reg_name "x27" then option_map (fun v => x27_ref.(write_to) v s) (x27_ref.(of_regval) v) else + if string_dec reg_name "x26" then option_map (fun v => x26_ref.(write_to) v s) (x26_ref.(of_regval) v) else + if string_dec reg_name "x25" then option_map (fun v => x25_ref.(write_to) v s) (x25_ref.(of_regval) v) else + if string_dec reg_name "x24" then option_map (fun v => x24_ref.(write_to) v s) (x24_ref.(of_regval) v) else + if string_dec reg_name "x23" then option_map (fun v => x23_ref.(write_to) v s) (x23_ref.(of_regval) v) else + if string_dec reg_name "x22" then option_map (fun v => x22_ref.(write_to) v s) (x22_ref.(of_regval) v) else + if string_dec reg_name "x21" then option_map (fun v => x21_ref.(write_to) v s) (x21_ref.(of_regval) v) else + if string_dec reg_name "x20" then option_map (fun v => x20_ref.(write_to) v s) (x20_ref.(of_regval) v) else + if string_dec reg_name "x19" then option_map (fun v => x19_ref.(write_to) v s) (x19_ref.(of_regval) v) else + if string_dec reg_name "x18" then option_map (fun v => x18_ref.(write_to) v s) (x18_ref.(of_regval) v) else + if string_dec reg_name "x17" then option_map (fun v => x17_ref.(write_to) v s) (x17_ref.(of_regval) v) else + if string_dec reg_name "x16" then option_map (fun v => x16_ref.(write_to) v s) (x16_ref.(of_regval) v) else + if string_dec reg_name "x15" then option_map (fun v => x15_ref.(write_to) v s) (x15_ref.(of_regval) v) else + if string_dec reg_name "x14" then option_map (fun v => x14_ref.(write_to) v s) (x14_ref.(of_regval) v) else + if string_dec reg_name "x13" then option_map (fun v => x13_ref.(write_to) v s) (x13_ref.(of_regval) v) else + if string_dec reg_name "x12" then option_map (fun v => x12_ref.(write_to) v s) (x12_ref.(of_regval) v) else + if string_dec reg_name "x11" then option_map (fun v => x11_ref.(write_to) v s) (x11_ref.(of_regval) v) else + if string_dec reg_name "x10" then option_map (fun v => x10_ref.(write_to) v s) (x10_ref.(of_regval) v) else + if string_dec reg_name "x9" then option_map (fun v => x9_ref.(write_to) v s) (x9_ref.(of_regval) v) else + if string_dec reg_name "x8" then option_map (fun v => x8_ref.(write_to) v s) (x8_ref.(of_regval) v) else + if string_dec reg_name "x7" then option_map (fun v => x7_ref.(write_to) v s) (x7_ref.(of_regval) v) else + if string_dec reg_name "x6" then option_map (fun v => x6_ref.(write_to) v s) (x6_ref.(of_regval) v) else + if string_dec reg_name "x5" then option_map (fun v => x5_ref.(write_to) v s) (x5_ref.(of_regval) v) else + if string_dec reg_name "x4" then option_map (fun v => x4_ref.(write_to) v s) (x4_ref.(of_regval) v) else + if string_dec reg_name "x3" then option_map (fun v => x3_ref.(write_to) v s) (x3_ref.(of_regval) v) else + if string_dec reg_name "x2" then option_map (fun v => x2_ref.(write_to) v s) (x2_ref.(of_regval) v) else + if string_dec reg_name "x1" then option_map (fun v => x1_ref.(write_to) v s) (x1_ref.(of_regval) v) else + if string_dec reg_name "instbits" then option_map (fun v => instbits_ref.(write_to) v s) (instbits_ref.(of_regval) v) else + if string_dec reg_name "nextPC" then option_map (fun v => nextPC_ref.(write_to) v s) (nextPC_ref.(of_regval) v) else + if string_dec reg_name "PC" then option_map (fun v => PC_ref.(write_to) v s) (PC_ref.(of_regval) v) else + None. + +Definition register_accessors := (get_regval, set_regval). + + +Definition MR a r := monadR register_value a r unit. +Definition M a := monad register_value a unit. diff --git a/snapshot/riscv_types.vo b/snapshot/riscv_types.vo Binary files differnew file mode 100644 index 0000000..1e088b5 --- /dev/null +++ b/snapshot/riscv_types.vo diff --git a/snapshot/riscv_types.vok b/snapshot/riscv_types.vok new file mode 100644 index 0000000..e69de29 --- /dev/null +++ b/snapshot/riscv_types.vok diff --git a/snapshot/riscv_types.vos b/snapshot/riscv_types.vos new file mode 100644 index 0000000..e69de29 --- /dev/null +++ b/snapshot/riscv_types.vos |