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2016-05-04Change BlackBox.io.setRef into commentStephen Twigg
Setting the io ref there wasn't doing anything meaningful
2016-05-04Rewrite BlackBox IO contract, replace _clock|_resetStephen Twigg
The old blackbox behavior still emitted extmodules that have a clk, reset pin and prepended all io's with io_ (ultimately). Most verilog modules do not follow this distinction (or use a slightly different name for clock and so on). Thus, instead BlackBox has been rewritten to not assume a clk or reset pin. Instead, the io Bundle specified is flattened directly into the Module.ports declaration. The tests have been rewritten to compensate for this. Also, added a test that uses the clock pin. As a secondary change, the _clock and _reset module parameters were bad for two reasons. One, they used null as a default, which is a scala best practices violation. Two, they were just not good names. Instead the primary constructor has been rewritten to take an Option[Clock] called override_clock and an Option[Bool] called override_reset, which default to None. (Note how the getOrElse call down below is much more natural now.) However, users may not want to specify the Some(their_clock) so I also added secondary constructors that take parameters named clock and reset and wrap them into Some calls into the primary constructor. This is a better UX because now you can just stipulate clock=blah in instantiation of that module in symmetry with using the clock in the definition of the module by invoking clock. PS: We could also back out of allowing any overrides via the Module constructor and just require the instantiating Module to do submodule.clock := newclock, etc.
2016-05-04Add HasId=Module|Data.suggestName, TransitName utilStephen Twigg
Often times the scala runtime reflection fails to find an appropriate name for a given net. This commit tries to partially ameliorate the issue by exposing a suggestName function onto HasId (i.e. Module, Data) that the user can call to 'suggest' a name. Only the first suggestion is taken so repeated calls to suggestName will not change the name for that node. This type of name exposure is slightly risky as there is a chance the same name is suggested in the same namespace. Thus, naming within a Module occurs in two passes: The suggestion phase is when the user calls suggestName, etc. Near the 'end,' the Module uses runtime reflection to suggest names as well. The forcing phase is when all the nodes are run through and a name is 'forced' onto them, using the namespace to suggest alternatives if the desired one is taken. If no suggestion is present, the default name is T, as before. Second, there is an issue that commonly comes up when a component library creates intermediate logic and then only returns a piece, or even a piece of a piece (like part of a module IO). Any names suggested by the Module by reflection onto that return value are either lost or not fully applied. This issue is resolved by TransitName. TransitName attaches a hook to the suggestName function of a HasId. With that hook, any time suggestName is called on the hooked ID, that name suggestion is also applied to other nodes. For example, if Queue(in) is called, then any attempts to name the returned output DecoupledIO will actually translate to naming attempts on the backing Queue.
2016-05-02more kind assert on chiselMainDonggyu Kim
2016-04-26Replace deprecated usage in tests. Issue #149Jim Lawson
2016-04-26Scalastyle fixes and "ignores". - No functional changes.Jim Lawson
2016-04-18Add whenever method to TblSpec forall to weed out invalid test values.Jim Lawson
2016-04-18Only elaborate once in chiselMain.run()Palmer Dabbelt
I had a def instead of a val.
2016-04-15Test FIRRTL string literals more aggressivelyAndrew Waterman
2016-04-14Disallow Counters with negative nAndrew Waterman
One could make an argument for disallowing n=0, too, but HW generators will benefit from our leniency. Closes #107. Thanks @jackkoenig
2016-04-14Use mkString to clarify and speed up DefPrim emissionAndrew Waterman
2016-04-14Don't eagerly evaluate assertion failure stringsAndrew Waterman
Users should assume it's OK to make them expensive to evaluate.
2016-04-14Improve performance of hashing HasId (e.g. Data)Andrew Waterman
2016-04-14Eliminate RefMapAndrew Waterman
It's an unconvincing means to pretend there isn't mutable state when there really is. It's more confusing and less performant than just calling a spade a spade.
2016-04-14Reject log2Up on negative inputsAndrew Waterman
Mathematically, we should also reject 0, like log2Ceil does. But accepting 0 and returning 1 is more in the spirit of the special case for widths.
2016-04-13Remove underscores from constant creationColin Schmidt
This makes chisel2's behaviour and makes it easier to read large constants.
2016-04-05Make Wire(init = x) behave the same as Wire(t = x) := xAndrew Waterman
There's a separate debate to be had about whether we want to default-initialize Wires to invalid. This patch just fixes the implementation of the previous, unsafe approach, which was usually, but not always, defaulting to invalid.
2016-04-01Clearly delineate pipe/flow behavior in QueueAndrew Waterman
2016-04-01Reduce FIRRTL node count for CounterAndrew Waterman
This would ultimately get DCE'd, but it's easy enough to not generate the dead code in the first place.
2016-04-01Improve Arbiter implementation and QoRAndrew Waterman
- Remove power-of-2 restriction on count - Avoid redundancy between lockIdx and chosen signals, reducing area - Infer locked from lockCount, rather than maintaining separate state - Reduce FIRRTL node count in several places - Special-case simple Arbiter, which avoids serializing the computation of io.chosen with io.out.valid/bits. This lops off a few FO4 delays at no area cost, and actually reduces area if io.chosen isn't used.
2016-04-01Make ArbiterCtrl private; make O(n), not O(n^2)Andrew Waterman
It was never meant to be a public API, and the implementation left something to be desired.
2016-04-01Return Seq, not Vec, from PriorityEncoderOHAndrew Waterman
It doesn't really make sense to create a one-hot result then follow it with a decoder. It's more performant to use a PriorityEncoder followed by a comparator. Discourage the former by returning Seq, not Vec. In Chisel2, it seems the return type was originally Seq, but was at some point inadvertently changed to Vec.
2016-03-31Fix fromBits for this.width > that.widthAndrew Waterman
Sign- or zero-extend the argument to match.
2016-03-28Allow invocation of printf without applying resetAndrew Waterman
For internal purposes only. Avoids redundant code emission for assertions.
2016-03-28Apply DeMorgan's law to improve assert code readabilityAndrew Waterman
2016-03-18Add test for assertions in modules with pipedlined resetjackkoenig
2016-03-18Make Chisel self-testing work with new FIRRTL printf/stop guardsjackkoenig
2016-03-18Only randomize directory names during testingjackkoenig
2016-03-15Add =/= to SIntjackkoenig
2016-03-14Scalastyle cleanup - no functional differences.Jim Lawson
2016-03-08Added -Wno-WIDTH and -Wno-STMTDLY warning suppressors to verilator commandchick
show verilator command on starndard out Changed --Wno-fatal to -Wno-fatal (double dash became single dash) in accordance with verilator docs println the verilator command to the standard out, so it can be seen along with the various compiler calls
2016-03-06Print a better message on constant width failuresPalmer Dabbelt
I'm getting this error and the message is awful.
2016-03-05Actually parse "--targetDir"Palmer Dabbelt
I'm trying to get RocketChip to work with Chisel3 again, and we need to run in multiple directories. This fixes the workaround I made earlier to actually parse the passed command-line arguments so I can emit FIRRTL in the correct directory.
2016-02-25Fixed comment punctuation and made it clearer that using an init() method ↵chick
for DeqIO and EnqIO initialization is likely to change.
2016-02-24Remove the assignment statements in EnqIO and DeqIO Bundle constructors.chick
Make the corresponding test run faster by giving it a Counter.
2016-02-24Create a test that breaks because of assignment statements in DeqIO and ↵chick
EnqIO bundles
2016-02-23Emit no width instead of <?> for unknown width UInt and SInt literals and typesjackkoenig
2016-02-22Merge pull request #99 from ucb-bar/chisel_tester_supportRichard Lin
Chisel tester support
2016-02-22Fixed improper apostrophe in it's in TesterDriverSpec commentschick
2016-02-10TesterDriverSpec is simpler and cleaner, extraneous circuit has been removed.chick
Cleanup comment for finish method in BasicTester, and finishWrapper in TesterDriver.
2016-02-10The TesterDriverSpec has been made stronger by altering circuit in finish methodchick
2016-02-10Added some comments describing potential use of the finish method hookchick
clean up the test example
2016-02-09Added license and alpha versionazidar
2016-02-09Merge pull request #98 from ucb-bar/prettyassertAndrew Waterman
Separate assertion failure message from source locator line
2016-02-09fixed test for finish method being put in the wrong placechick
2016-02-09Added support for finish method of BasicTester to be overridden in a ↵chick
subclass which allows tester to have clean up and other construction code executed after a user code executed during constructor of that subclass
2016-02-08Merge pull request #95 from ucb-bar/flippedChick Markley
Add Flipped trait; fix DeqIO, this fix looks good to go
2016-02-08Added a simple tests that DeqIO and EnqIO get their directions right and are ↵chick
clonable
2016-02-08Separate assertion failure message from source locator lineducky
2016-02-08Escape control characters in Printf string literalsAndrew Waterman
If we end up generalizing Strings, this code should be moved elsewhere. Note FIRRTL doesn't handle this stuff right, so I'm not committing the companion test yet.