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AgeCommit message (Expand)Author
2018-08-31Support for verilog memory loading. (#840)Chick Markley
2018-08-29Inhibit aggressive resource file name mangling. (#884)Jim Lawson
2018-08-23Add FlattenInstance APISchuyler Eldridge
2018-08-23Add InlineInstance APISchuyler Eldridge
2018-08-22Implement varargs MixedVec APIEdward Wang
2018-08-22Make MixedVec wire init consistent with VecInitEdward Wang
2018-08-22Remove dynamic indexing for nowEdward Wang
2018-08-22Use a mix-in to override Seq errorEdward Wang
2018-08-22MixedVec: clarify dynamic indexing of heterogeneous elementsEdward Wang
2018-08-22Warn user that using Seq for hardware construction in Bundle is not supportedEdward Wang
2018-08-22Remove redundant := methodEdward Wang
2018-08-22MixedVec implementationEdward Wang
2018-08-07BoringUtils / Synthesizable Cross Module References (#718)Schuyler Eldridge
2018-07-31Cleanup implicit conversions (#868)Jack Koenig
2018-07-31Ensure names work for bundles and literals. (#853)Jim Lawson
2018-07-31Revert removal of bit extraction const prop for literals (#857)Jack Koenig
2018-07-19Add support for Input() and Output() (available in Chisel2 since ucb-bar/chis...Jim Lawson
2018-07-10Fix use of read-only refs on rhs of connect in compatibility mode (#854)Jack Koenig
2018-07-06Undeprecate log2Up and log2Down (#846)Jack Koenig
2018-07-04Add test that UInt, SInt, and FP literals do not impact namingJack Koenig
2018-07-04Prefer litValue, eliminate litToBigIntducky
2018-07-04Change [public] Data.elementLitArg => [protected] Aggregate.litArgOfBitsducky
2018-07-04Style fixesducky
2018-07-04properly fix undefined clock/reset issuesducky
2018-07-04Add BundleLiteralSpecRichard Lin
2018-07-04Comment out assertion test, fix ref generationRichard Lin
2018-07-04Add new test LitInsideOutsideTesterchick
2018-07-04unbrokenducky
2018-07-04brokenducky
2018-07-04delete debugging stuffducky
2018-07-04lol=(Richard Lin
2018-07-04bundle literal mockup, but broken =(Richard Lin
2018-07-04work on new style literal accessorsducky
2018-07-02Direct to FIRRTL (#829)Jack Koenig
2018-06-29Catch returns from within when blocks and provide an error message (#842)Jack Koenig
2018-06-25Correcting documentation errors in Arbiter.scala (#839)Brendan Sweeney
2018-06-20Programmatic Port Creation (#833)Jack Koenig
2018-06-18Fixed UIntToOH(x, 1) invocation with x.width == 0 (#778)Wesley W. Terpstra
2018-06-01Literals set their ref so they no longer get named (#826)Jack Koenig
2018-05-24Fix UIntToOH for output widths larger than 2^(input width) (#823)Andrew Waterman
2018-05-23Add test for zero-width Mems. (#821)grebe
2018-04-22Add Module.currentModule for getting a reference to the current Module (#810)Jack Koenig
2018-03-23Fallback null insertion for autoclonetype (#801)Richard Lin
2018-03-06Fix SyncReadMem.read; add test (#796)Andrew Waterman
2018-03-02Fix for 792 (#793)Richard Lin
2018-02-28Refactor Annotations (#767)Jack Koenig
2018-02-28Auto Clone Bundles in Companion Objects (#788)Richard Lin
2018-02-21Support zero-entry queues (but not for irrevocable) (#780)Andrew Waterman
2018-02-20Make Bundle abstract (#774)Jack Koenig
2018-02-07Cloning IO with compatibility 🦆 (#754)Richard Lin
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