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authorJack Koenig2018-07-31 15:43:54 -0700
committerGitHub2018-07-31 15:43:54 -0700
commit4de6848ef746ca40945dc95a113e820bc7265cea (patch)
treed9ffbb7f9c118ebc0eb8f40d6ec64b626dcad7d5 /src
parent64a8f52c48905e9bf28e709cde2de89215a35c80 (diff)
Cleanup implicit conversions (#868)
Diffstat (limited to 'src')
-rw-r--r--src/main/scala/chisel3/compatibility.scala20
-rw-r--r--src/main/scala/chisel3/package.scala24
-rw-r--r--src/main/scala/chisel3/util/Decoupled.scala2
-rw-r--r--src/test/scala/chiselTests/ImplicitConversionsSpec.scala43
4 files changed, 66 insertions, 23 deletions
diff --git a/src/main/scala/chisel3/compatibility.scala b/src/main/scala/chisel3/compatibility.scala
index 7eebcee0..0212aca9 100644
--- a/src/main/scala/chisel3/compatibility.scala
+++ b/src/main/scala/chisel3/compatibility.scala
@@ -26,13 +26,13 @@ package object Chisel { // scalastyle:ignore package.object.name
def apply[T<:Data](target: T): T = chisel3.core.Flipped[T](target)
}
- implicit class AddDirectionToData[T<:Data](val target: T) extends AnyVal {
+ implicit class AddDirectionToData[T<:Data](target: T) {
def asInput: T = chisel3.core.Input(target)
def asOutput: T = chisel3.core.Output(target)
def flip(): T = chisel3.core.Flipped(target)
}
- implicit class AddDirMethodToData[T<:Data](val target: T) extends AnyVal {
+ implicit class AddDirMethodToData[T<:Data](target: T) {
import chisel3.core.{DataMirror, ActualDirection, requireIsHardware}
def dir: Direction = {
requireIsHardware(target) // This has the side effect of calling _autoWrapPorts
@@ -46,7 +46,7 @@ package object Chisel { // scalastyle:ignore package.object.name
}
}
}
- implicit class cloneTypeable[T <: Data](val target: T) extends AnyVal {
+ implicit class cloneTypeable[T <: Data](target: T) {
import chisel3.core.DataMirror
def chiselCloneType: T = {
DataMirror.internal.chiselTypeClone(target).asInstanceOf[T]
@@ -80,7 +80,7 @@ package object Chisel { // scalastyle:ignore package.object.name
type Clock = chisel3.core.Clock
// Implicit conversion to allow fromBits because it's being deprecated in chisel3
- implicit class fromBitsable[T <: Data](val data: T) {
+ implicit class fromBitsable[T <: Data](data: T) {
import chisel3.core.CompileOptions
import chisel3.internal.sourceinfo.SourceInfo
@@ -352,12 +352,12 @@ package object Chisel { // scalastyle:ignore package.object.name
val when = chisel3.core.when
type WhenContext = chisel3.core.WhenContext
- implicit class fromBigIntToLiteral(val x: BigInt) extends chisel3.core.fromBigIntToLiteral(x)
- implicit class fromtIntToLiteral(val x: Int) extends chisel3.core.fromIntToLiteral(x)
- implicit class fromtLongToLiteral(val x: Long) extends chisel3.core.fromLongToLiteral(x)
- implicit class fromStringToLiteral(val x: String) extends chisel3.core.fromStringToLiteral(x)
- implicit class fromBooleanToLiteral(val x: Boolean) extends chisel3.core.fromBooleanToLiteral(x)
- implicit class fromIntToWidth(val x: Int) extends chisel3.core.fromIntToWidth(x)
+ implicit class fromBigIntToLiteral(x: BigInt) extends chisel3.core.fromBigIntToLiteral(x)
+ implicit class fromtIntToLiteral(x: Int) extends chisel3.core.fromIntToLiteral(x)
+ implicit class fromtLongToLiteral(x: Long) extends chisel3.core.fromLongToLiteral(x)
+ implicit class fromStringToLiteral(x: String) extends chisel3.core.fromStringToLiteral(x)
+ implicit class fromBooleanToLiteral(x: Boolean) extends chisel3.core.fromBooleanToLiteral(x)
+ implicit class fromIntToWidth(x: Int) extends chisel3.core.fromIntToWidth(x)
type BackendCompilationUtilities = firrtl.util.BackendCompilationUtilities
val Driver = chisel3.Driver
diff --git a/src/main/scala/chisel3/package.scala b/src/main/scala/chisel3/package.scala
index 5f0e31de..81056483 100644
--- a/src/main/scala/chisel3/package.scala
+++ b/src/main/scala/chisel3/package.scala
@@ -46,7 +46,7 @@ package object chisel3 { // scalastyle:ignore package.object.name
val Clock = chisel3.core.Clock
type Clock = chisel3.core.Clock
- implicit class AddDirectionToData[T<:Data](val target: T) extends AnyVal {
+ implicit class AddDirectionToData[T<:Data](target: T) {
@chiselRuntimeDeprecated
@deprecated("Input(Data) should be used over Data.asInput", "chisel3")
def asInput: T = Input(target)
@@ -60,7 +60,7 @@ package object chisel3 { // scalastyle:ignore package.object.name
def flip(): T = Flipped(target)
}
- implicit class fromBitsable[T <: Data](val data: T) {
+ implicit class fromBitsable[T <: Data](data: T) {
import chisel3.core.CompileOptions
import chisel3.internal.sourceinfo.SourceInfo
@@ -71,7 +71,7 @@ package object chisel3 { // scalastyle:ignore package.object.name
}
}
- implicit class cloneTypeable[T <: Data](val target: T) extends AnyVal {
+ implicit class cloneTypeable[T <: Data](target: T) {
@chiselRuntimeDeprecated
@deprecated("chiselCloneType is deprecated, use chiselTypeOf(...) to get the Chisel Type of a hardware object", "chisel3")
def chiselCloneType: T = {
@@ -355,16 +355,16 @@ package object chisel3 { // scalastyle:ignore package.object.name
implicit def string2Printable(str: String): Printable = PString(str)
- implicit class fromBigIntToLiteral(val x: BigInt) extends chisel3.core.fromBigIntToLiteral(x)
- implicit class fromtIntToLiteral(val x: Int) extends chisel3.core.fromIntToLiteral(x)
- implicit class fromtLongToLiteral(val x: Long) extends chisel3.core.fromLongToLiteral(x)
- implicit class fromStringToLiteral(val x: String) extends chisel3.core.fromStringToLiteral(x)
- implicit class fromBooleanToLiteral(val x: Boolean) extends chisel3.core.fromBooleanToLiteral(x)
- implicit class fromDoubleToLiteral(val x: Double) extends chisel3.core.fromDoubleToLiteral(x)
- implicit class fromIntToWidth(val x: Int) extends chisel3.core.fromIntToWidth(x)
- implicit class fromIntToBinaryPoint(val x: Int) extends chisel3.core.fromIntToBinaryPoint(x)
+ implicit class fromBigIntToLiteral(x: BigInt) extends chisel3.core.fromBigIntToLiteral(x)
+ implicit class fromtIntToLiteral(x: Int) extends chisel3.core.fromIntToLiteral(x)
+ implicit class fromtLongToLiteral(x: Long) extends chisel3.core.fromLongToLiteral(x)
+ implicit class fromStringToLiteral(x: String) extends chisel3.core.fromStringToLiteral(x)
+ implicit class fromBooleanToLiteral(x: Boolean) extends chisel3.core.fromBooleanToLiteral(x)
+ implicit class fromDoubleToLiteral(x: Double) extends chisel3.core.fromDoubleToLiteral(x)
+ implicit class fromIntToWidth(x: Int) extends chisel3.core.fromIntToWidth(x)
+ implicit class fromIntToBinaryPoint(x: Int) extends chisel3.core.fromIntToBinaryPoint(x)
- implicit class fromUIntToBitPatComparable(val x: UInt) {
+ implicit class fromUIntToBitPatComparable(x: UInt) {
import scala.language.experimental.macros
import internal.sourceinfo.{SourceInfo, SourceInfoTransform}
diff --git a/src/main/scala/chisel3/util/Decoupled.scala b/src/main/scala/chisel3/util/Decoupled.scala
index f9fc2b90..89ad3115 100644
--- a/src/main/scala/chisel3/util/Decoupled.scala
+++ b/src/main/scala/chisel3/util/Decoupled.scala
@@ -33,7 +33,7 @@ abstract class ReadyValidIO[+T <: Data](gen: T) extends Bundle
object ReadyValidIO {
- implicit class AddMethodsToReadyValid[T<:Data](val target: ReadyValidIO[T]) extends AnyVal {
+ implicit class AddMethodsToReadyValid[T<:Data](target: ReadyValidIO[T]) {
def fire(): Bool = target.ready && target.valid
/** push dat onto the output bits of this interface to let the consumer know it has happened.
diff --git a/src/test/scala/chiselTests/ImplicitConversionsSpec.scala b/src/test/scala/chiselTests/ImplicitConversionsSpec.scala
new file mode 100644
index 00000000..d5939b24
--- /dev/null
+++ b/src/test/scala/chiselTests/ImplicitConversionsSpec.scala
@@ -0,0 +1,43 @@
+// See LICENSE for license details.
+
+package chiselTests
+
+import chisel3._
+
+class ImplicitConversionsSpec extends ChiselFlatSpec {
+ ".data on arbitrary Data objects" should "not work" in {
+ assertTypeError("UInt(8.W).data")
+ assertTypeError("8.S.data")
+ assertTypeError("(new Bundle {}).data")
+ assertTypeError("VecInit(1.U).data")
+ }
+
+ ".target on arbitrary Data objects" should "not work" in {
+ assertTypeError("UInt(8.W).target")
+ assertTypeError("8.S.target")
+ assertTypeError("(new Bundle {}).target")
+ assertTypeError("VecInit(1.U).target")
+ }
+
+ ".x on Strings and Numerical values" should "not work" in {
+ assertTypeError("3.x")
+ assertTypeError("3L.x")
+ assertTypeError("BigInt(-4).x")
+ assertTypeError("false.x")
+ assertTypeError(""""a".x""")
+ }
+
+ ".bigint on Strings and Numerical values" should "not work" in {
+ assertTypeError("3.bigint")
+ assertTypeError("3L.bigint")
+ assertTypeError("BigInt(-4).bigint")
+ assertTypeError("false.bigint")
+ assertTypeError(""""a".bigint""")
+ }
+
+ ".target on DecoupledIO" should "not work" in {
+ import chisel3.util._
+ assertTypeError("Decoupled(UInt(8.W)).target")
+ }
+}
+