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Co-authored-by: Jack Koenig <koenig@sifive.com>
(cherry picked from commit 3c6c044b6bdee850ad9ba375324abaf3813c557d)
Co-authored-by: Adam Izraelevitz <adam.izraelevitz@sifive.com>
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Include the function being called in the suggestion.
(cherry picked from commit 296623f6f41eb9f54899277621902679bb6b497c)
Co-authored-by: Jack Koenig <koenig@sifive.com>
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(cherry picked from commit 255c56c3955a8c16191a6751e7d547cfcfd96705)
Co-authored-by: Jared Barocsi <82000041+jared-barocsi@users.noreply.github.com>
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* Factor buildName into reusable function
The new function is chisel3.internal.buildName.
(cherry picked from commit 370ca8ac68f6d888dd99e1b9e63f0371add398cf)
* Add --warn:reflective-naming
This new argument (and associated annotation) will turn on a warning
whenever reflective naming changes the name of a signal. This is
provided to help migrate from Chisel 3.5 to 3.6 since reflective naming
is removed in Chisel 3.6.
(cherry picked from commit 97afd9b9a1155fa7cd5cedf19f9e0c15fbe899ec)
Co-authored-by: Jack Koenig <koenig@sifive.com>
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#2534) (#2559)
* Deprecate .U() and .S() syntax for literal bit extracts (#2534)
(cherry picked from commit cadaf33a650ef898fdab2f81244e4ad6a07a9ea8)
# Conflicts:
# macros/src/main/scala/chisel3/internal/sourceinfo/SourceInfoTransform.scala
* Fix backport conflict (#2560)
Co-authored-by: Jared Barocsi <82000041+jared-barocsi@users.noreply.github.com>
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Previously, verification statements (assert, assume, cover, and printf)
were only named via reflection.
(cherry picked from commit 7fa2691f670813eef4ec59fc27c4e4f625d598de)
Co-authored-by: Jack Koenig <koenig@sifive.com>
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This is a formatted version of the p"..." interpolator analogous to
Scala's f"..." interpolator. The primary difference is that it supports
formatting interpolated variables by following the variable with
"%<specifier>". For example:
printf(cf"myWire = $myWire%x\n")
This will format the hardware value "myWire" as a hexidecimal value in
the emitted Verilog. Note that literal "%" must be escaped as "%%".
Scala types and format specifiers are supported and are handled in the
same manner as in standard Scala f"..." interpolators.
(cherry picked from commit 037f7b2ff3a46184d1b82e1b590a7572bfa6a76b)
Co-authored-by: Girish Pai <girish.pai@sifive.com>
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This includes (and is tested) for both the old .*Name APIs and
.toTarget
(cherry picked from commit 6e0d8d6b12e9d8f94c2cc43b92b2366ec70dfd50)
Co-authored-by: Jack Koenig <koenig@sifive.com>
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ExtModule now uses the same namePorts implementation as regular Modules.
Previously, ExtModules only allowed port naming via runtime reflection.
This meant that .suggestName and other naming APIs do not work. It also
breaks FlatIO for ExtModule which is a potential replacement API for
BlackBox's special `val io` handling.
(cherry picked from commit 83cccfb782d9141bf2c843246c2a525c62392924)
Co-authored-by: Jack Koenig <koenig@sifive.com>
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(cherry picked from commit a1e3a6b5324997864168111bee8c02a60abb0acc)
Co-authored-by: Jack Koenig <koenig@sifive.com>
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(cherry picked from commit 77a6c93592d5766d66f199720fc6d69478005091)
Co-authored-by: Jack Koenig <koenig@sifive.com>
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(cherry picked from commit 68510515467ef7a86c54b2e710bfc5e736f7a2aa)
Co-authored-by: Gonsolo <gonsolo@gmail.com>
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These methods will start using def macros and since def macros do not
supported named arguments this will be a source-incompatible change.
This deprecation will warn users that they need to remove any uses of
named arguments on these methods.
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* Update CONTRIBUTING.md with backport cleanup process (#2523)
(cherry picked from commit ac19ff70458959e795933c7aad6bab88a16fcf5d)
# Conflicts:
# CONTRIBUTING.md
* Resolve conflicts
Co-authored-by: Megan Wachs <megan@sifive.com>
Co-authored-by: Jack Koenig <koenig@sifive.com>
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(backport #2512) (#2520)
* Support separately elaborating definition and instance in ChiselStage (#2512)
(cherry picked from commit a0aa4d1550e3fbde199a98529cffeb176fb4bed8)
# Conflicts:
# core/src/main/scala/chisel3/experimental/hierarchy/Definition.scala
# core/src/main/scala/chisel3/experimental/hierarchy/Instance.scala
# core/src/main/scala/chisel3/internal/Builder.scala
* fixing imports (#2522)
Co-authored-by: Deborah Soung <debs@sifive.com>
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For traits or abstract classes that extend Bundle but have no concrete
methods, the plugin will print a benign warning that the user cannot
fix. It will no longer print that warning.
(cherry picked from commit ed4a98188ee1fe43efbd3a1ba43a657a128764d6)
Co-authored-by: Jack Koenig <koenig@sifive.com>
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(cherry picked from commit f9aee1f72744abc6ee13aafc4d1a51a2783cbab8)
Co-authored-by: Jack Koenig <koenig@sifive.com>
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In Scala 2.13, Auto-application to `()` is deprecated. Any nullary
method (ie. a method with no arguments) that is defined with () must now
be called with (). @chiselName used to inject a case of this warning
into user code which would then cause a warning on the @chiselName macro
that the user has no way to fix.
(cherry picked from commit ca902680df772445371e6c3dd907c01113afb1f5)
Co-authored-by: Jack Koenig <koenig@sifive.com>
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The difference in logic depth for various paths now has a maximum of 1.
Also make treeReduce order the same for 2.12 and 2.13
.grouped(_) returns an Iterator
.toSeq on an Iterator returns a Stream in 2.12 and a List in 2.13
This can lead to changes in order when bumping from 2.12 to 2.13 that
can be avoided by simply using an eager collection explicitly.
Co-authored-by: Jack Koenig <koenig@sifive.com>
(cherry picked from commit 6975f77f3325dec46c613552eac663c29011a67c)
Co-authored-by: Martin Schoeberl <martin@jopdesign.com>
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Fixes #2470
(cherry picked from commit 44165a259bb16733a41798edca6b554b13f1d54a)
Co-authored-by: Kevin Laeufer <laeufer@cs.berkeley.edu>
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This is a quick fix for issue #2408
(cherry picked from commit d4ef9a96c4131252a0a49002a28be3391eb67258)
Co-authored-by: Kevin Laeufer <laeufer@cs.berkeley.edu>
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(cherry picked from commit 52165fe2796d08c664069c148868aedc64ea3777)
Co-authored-by: Lucheng Zhang <79909456+geekLucian@users.noreply.github.com>
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(cherry picked from commit d6a357d29cfa7120b3c0c90684b33be1863e5599)
Co-authored-by: Megan Wachs <megan@sifive.com>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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Loosen restrictions on clocks to enable them to be connected to
DontCare, i.e., be invalidated.
Co-authored-by: Jack Koenig <koenig@sifive.com>
Signed-off-by: Schuyler Eldridge <schuyler.eldridge@sifive.com>
Co-authored-by: Jack Koenig <koenig@sifive.com>
(cherry picked from commit 5d8a0c8e406376f7ceda91273fb0fa7a646865aa)
Co-authored-by: Schuyler Eldridge <schuyler.eldridge@sifive.com>
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* Use a single field instead of two in HasId (4-bytes per HasId)
* Set the prefix to Nil after setting ref to free up memory
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
(cherry picked from commit 3aa179f0dc1a29403fd25be7d3dc08630976d018)
Co-authored-by: Jack Koenig <koenig@sifive.com>
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(backport #2476) (#2479)
* Capture 1:1 mappings of Aggregates inside of views
This is implemented by including any corresponding Aggregates from the
DataView.mapping in the AggregateViewBinding.childMap (which is now of
type Map[Data, Data]).
This enables dynamically indexing Vecs that are themselves elements of
larger Aggregates in views when the corresponding element of the view is
a Vec of the same type. It also increases the number of cases where a
single Target can represent part of a view.
(cherry picked from commit 1f6b1ca14ccf86918065073c3f6f3626dd83a68e)
* Add FlatIO API for creating ports from Bundles without a prefix
(cherry picked from commit 772a3a1fe3b9372b7c2d7cd2d424b2adcd633cdb)
* [docs] Add FlatIO to the general cookbook
(cherry picked from commit b4159641350f238f0f899b69954142ce8ee11544)
Co-authored-by: Jack Koenig <koenig@sifive.com>
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* During sanitize, only filter the String if needed
* Do not recurse on name, saving an unnecessary call to sanitize
(cherry picked from commit 559b3df3e5bd6c73588638aa44a6df1244a11a53)
Co-authored-by: Jack Koenig <koenig@sifive.com>
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(cherry picked from commit 3940136bec72fc44e40d454f2c2dcc421fc92d82)
Co-authored-by: Jack Koenig <koenig@sifive.com>
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(cherry picked from commit 4da1e89f3a0b79adcb39ea5defb393ed6c00fa2f)
Co-authored-by: fzi-hielscher <47524191+fzi-hielscher@users.noreply.github.com>
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This reduces memory use of every HasId by 64 bytes.
Every instance of HasId (including all Data) had 2 ListBuffer vals for
recording post-naming hooks, yet this feature is almost never used.
These are now vars of type List which allows the common case of Nil to
add no incremental memory use per instance of HasId.
(cherry picked from commit cf410180ac8de854d8d7ecf89f4813ac8541dcdb)
Co-authored-by: Jack Koenig <koenig@sifive.com>
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Signed-off-by: Schuyler Eldridge <schuyler.eldridge@sifive.com>
(cherry picked from commit 2c2d72ceaa494b6acc351ff4300dbb40d4a7d863)
Co-authored-by: Schuyler Eldridge <schuyler.eldridge@sifive.com>
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(cherry picked from commit d4dd21191c63a3b125193a7ffb83d478aa945d5a)
Co-authored-by: Jack Koenig <koenig@sifive.com>
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Chisel <> semantics differ somewhat from FIRRTL <= semantics,
so we only emit <= when it would be legal. Otherwise we continue
the old behavior of emitting a connection for every leaf-level
Element.
Co-authored-by: Deborah Soung <debs@sifive.com>
Co-authored-by: Jack Koenig <koenig@sifive.com>
(cherry picked from commit 3553a1583403824718923a6cc530cec3b38f5704)
Co-authored-by: Jared Barocsi <82000041+jared-barocsi@users.noreply.github.com>
Co-authored-by: Jack Koenig <koenig@sifive.com>
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Also delete an errant println in InstanceSpec
(cherry picked from commit 3462c54c018a52a377f1c89121b6ed99c5b0ae1d)
Co-authored-by: Jack Koenig <koenig@sifive.com>
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Co-authored-by: Jiuyang Liu <liu@jiuyang.me>
Co-authored-by: Megan Wachs <megan@sifive.com>
Co-authored-by: Jack Koenig <koenig@sifive.com>
(cherry picked from commit 73d3c26029c07c17ce179dfead092eab4fb8ae2c)
Co-authored-by: Liu Xiaoyi <circuitcoder0@gmail.com>
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* Tweaks to the Verilog-vs-Chisel Page
* Update cookbook.md
* Update verilog-vs-chisel.md
* Update verilog-vs-chisel.md
(cherry picked from commit 7432bdff8369ba55db73c7934e41bb6f4060bb6d)
Co-authored-by: Megan Wachs <megan@sifive.com>
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(cherry picked from commit 98fdfc5e609099cb4fb1749132cc62236148c6da)
Co-authored-by: Megan Wachs <megan@sifive.com>
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* Issue errors on out-of-range extracts when width is known
Firrtl will catch this later on, but better to error early if possible.
* Test that errors are generated on OOB extracts when width is known
(cherry picked from commit 462def429aa87becb544533880a3075a806c53e4)
Co-authored-by: Andrew Waterman <andrew@sifive.com>
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Co-authored-by: Shola Ogunkelu @Shorla
Co-authored-by: Megan Wachs <megan@sifive.com>
Co-authored-by: Deborah Soung <debs@sifive.com>
Completed as part of Outreachy Internship Dec 2021-March 2022.
(cherry picked from commit 362702f3fd79bf1071db4acecc679f25a0b94a8a)
Co-authored-by: Olushola Ogunkelu <77856859+Shorla@users.noreply.github.com>
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Widths are now padded to the maximum width of the inputs.
Co-authored-by: Jack Koenig <koenig@sifive.com>
(cherry picked from commit 546b4e13fe90ff09d24b63664c072d46c13c0c38)
Co-authored-by: Jiuyang Liu <liu@jiuyang.me>
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(cherry picked from commit 2a985ac376698a2e6300fbee13001d82d3e13989)
Co-authored-by: Deborah Soung <debs@sifive.com>
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(cherry picked from commit 024847d75079a125e5946e9dcf2ed9c14d2db730)
Co-authored-by: Megan Wachs <megan@sifive.com>
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(cherry picked from commit b55dc36d4edd1d22db37616235c003c89d68d29b)
Co-authored-by: Carlos Eduardo <me@carlosedp.com>
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