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-rw-r--r--src/main/scala/chisel3/internal/firrtl/Emitter.scala2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/main/scala/chisel3/internal/firrtl/Emitter.scala b/src/main/scala/chisel3/internal/firrtl/Emitter.scala
index 354be0c0..ad4df80a 100644
--- a/src/main/scala/chisel3/internal/firrtl/Emitter.scala
+++ b/src/main/scala/chisel3/internal/firrtl/Emitter.scala
@@ -29,7 +29,7 @@ private class Emitter(circuit: Circuit) {
case d: Clock => "Clock"
case _: AsyncReset => "AsyncReset"
case _: ResetType => "Reset"
- case d: chisel3.core.EnumType => s"UInt${d.width}"
+ case d: chisel3.experimental.EnumType => s"UInt${d.width}"
case d: UInt => s"UInt${d.width}"
case d: SInt => s"SInt${d.width}"
case d: FixedPoint => s"Fixed${d.width}${d.binaryPoint}"