diff options
Diffstat (limited to 'src/main/scala/chisel3')
| -rw-r--r-- | src/main/scala/chisel3/Driver.scala | 200 | ||||
| -rw-r--r-- | src/main/scala/chisel3/compatibility.scala | 3 | ||||
| -rw-r--r-- | src/main/scala/chisel3/internal/firrtl/Emitter.scala | 2 | ||||
| -rw-r--r-- | src/main/scala/chisel3/util/BitPat.scala | 13 | ||||
| -rw-r--r-- | src/main/scala/chisel3/util/BlackBoxUtils.scala | 3 | ||||
| -rw-r--r-- | src/main/scala/chisel3/util/Conditional.scala | 9 |
6 files changed, 1 insertions, 229 deletions
diff --git a/src/main/scala/chisel3/Driver.scala b/src/main/scala/chisel3/Driver.scala index 998f5ca0..fb564446 100644 --- a/src/main/scala/chisel3/Driver.scala +++ b/src/main/scala/chisel3/Driver.scala @@ -84,203 +84,3 @@ case class ChiselExecutionSuccess( */ @deprecated("This will be removed in Chisel 3.5", "Chisel 3.4") case class ChiselExecutionFailure(message: String) extends ChiselExecutionResult - -@deprecated("Please switch to chisel3.stage.ChiselStage", "3.2.4") -object Driver extends BackendCompilationUtilities { - - /** - * Elaborate the Module specified in the gen function into a Chisel IR Circuit. - * - * @param gen A function that creates a Module hierarchy. - * @return The resulting Chisel IR in the form of a Circuit. (TODO: Should be FIRRTL IR) - */ - @deprecated("Use ChiselStage.elaborate or use a ChiselStage class. This will be removed in 3.4.", "3.2.4") - def elaborate[T <: RawModule](gen: () => T): Circuit = internal.Builder.build(Module(gen()))._1 - - /** - * Convert the given Chisel IR Circuit to a FIRRTL Circuit. - * - * @param ir Chisel IR Circuit, generated e.g. by elaborate(). - */ - @deprecated("Use ChiselStage.convert or use a ChiselStage class. This will be removed in 3.4.", "3.2.4") - def toFirrtl(ir: Circuit): firrtl.ir.Circuit = Converter.convert(ir) - - /** - * Emit the Module specified in the gen function directly as a FIRRTL string without - * invoking FIRRTL. - * - * @param gen A function that creates a Module hierarchy. - */ - @deprecated("Use (new chisel3.stage.ChiselStage).emitChirrtl. This will be removed in 3.4.", "3.2.2") - def emit[T <: RawModule](gen: () => T): String = Driver.emit(elaborate(gen)) - - /** - * Emit the given Chisel IR Circuit as a FIRRTL string, without invoking FIRRTL. - * - * @param ir Chisel IR Circuit, generated e.g. by elaborate(). - */ - @deprecated("Use (new chisel3.stage.ChiselStage).emitChirrtl", "3.2.2") - def emit[T <: RawModule](ir: Circuit): String = Emitter.emit(ir) - - /** - * Elaborate the Module specified in the gen function into Verilog. - * - * @param gen A function that creates a Module hierarchy. - * @return A String containing the design in Verilog. - */ - @deprecated("Use (new chisel3.stage.ChiselStage).emitVerilog. This will be removed in 3.4.", "3.2.2") - def emitVerilog[T <: RawModule](gen: => T): String = { - execute(Array[String](), { () => gen }) match { - case ChiselExecutionSuccess(_, _, Some(firrtl.FirrtlExecutionSuccess(_, verilog))) => verilog - case _ => sys.error("Cannot get Verilog!") - } - } - - /** - * Dump the elaborated Chisel IR Circuit as a FIRRTL String, without invoking FIRRTL. - * - * If no File is given as input, it will dump to a default filename based on the name of the - * top Module. - * - * @param c Elaborated Chisel Circuit. - * @param optName File to dump to. If unspecified, defaults to "<topmodule>.fir". - * @return The File the circuit was dumped to. - */ - @deprecated("Migrate to chisel3.stage.ChiselStage. This will be removed in 3.4.", "3.2.4") - def dumpFirrtl(ir: Circuit, optName: Option[File]): File = { - val f = optName.getOrElse(new File(ir.name + ".fir")) - val w = new FileWriter(f) - w.write(Driver.emit(ir)) - w.close() - f - } - - /** - * Emit the annotations of a circuit - * - * @param ir The circuit containing annotations to be emitted - * @param optName An optional filename (will use s"\${ir.name}.json" otherwise) - */ - @deprecated("Migrate to chisel3.stage.ChiselStage. This will be removed in 3.4.", "3.2.4") - def dumpAnnotations(ir: Circuit, optName: Option[File]): File = { - val f = optName.getOrElse(new File(ir.name + ".anno.json")) - val w = new FileWriter(f) - w.write(JsonProtocol.serialize(ir.annotations.map(_.toFirrtl))) - w.close() - f - } - - /** - * Dump the elaborated Circuit to ProtoBuf. - * - * If no File is given as input, it will dump to a default filename based on the name of the - * top Module. - * - * @param c Elaborated Chisel Circuit. - * @param optFile Optional File to dump to. If unspecified, defaults to "<topmodule>.pb". - * @return The File the circuit was dumped to. - */ - @deprecated("Migrate to chisel3.stage.ChiselStage. This will be removed in 3.4.", "3.2.4") - def dumpProto(c: Circuit, optFile: Option[File]): File = { - val f = optFile.getOrElse(new File(c.name + ".pb")) - val ostream = new java.io.FileOutputStream(f) - // Lazily convert modules to make intermediate objects garbage collectable - val modules = c.components.map(m => () => Converter.convert(m)) - firrtl.proto.ToProto.writeToStreamFast(ostream, ir.NoInfo, modules, c.name) - f - } - - private var target_dir: Option[String] = None - @deprecated("Use chisel3.stage.ChiselStage with '--target-directory'. This will be removed in 3.4.", "3.2.2") - def parseArgs(args: Array[String]): Unit = { - for (i <- 0 until args.size) { - if (args(i) == "--targetDir") { - target_dir = Some(args(i + 1)) - } - } - } - - @deprecated("This has no effect on Chisel3 Driver! This will be removed in 3.4.", "3.2.2") - def targetDir(): String = { target_dir getOrElse new File(".").getCanonicalPath } - - /** - * Run the chisel3 compiler and possibly the firrtl compiler with options specified - * - * @param optionsManager The options specified - * @param dut The device under test - * @return An execution result with useful stuff, or failure with message - */ - @deprecated("Use chisel3.stage.ChiselStage.execute. This will be removed in 3.4.", "3.2.2") - def execute( - optionsManager: ExecutionOptionsManager with HasChiselExecutionOptions with HasFirrtlOptions, - dut: () => RawModule): ChiselExecutionResult = { - - val annos: AnnotationSeq = - Seq(DriverCompatibility.OptionsManagerAnnotation(optionsManager), ChiselGeneratorAnnotation(dut)) ++ - optionsManager.chiselOptions.toAnnotations ++ - optionsManager.firrtlOptions.toAnnotations ++ - optionsManager.commonOptions.toAnnotations - - val targets = - Seq( Dependency[DriverCompatibility.AddImplicitOutputFile], - Dependency[DriverCompatibility.AddImplicitOutputAnnotationFile], - Dependency[DriverCompatibility.DisableFirrtlStage], - Dependency[ChiselStage], - Dependency[DriverCompatibility.MutateOptionsManager], - Dependency[DriverCompatibility.ReEnableFirrtlStage], - Dependency[DriverCompatibility.FirrtlPreprocessing], - Dependency[chisel3.stage.phases.MaybeFirrtlStage] ) - val currentState = - Seq( Dependency[firrtl.stage.phases.DriverCompatibility.AddImplicitFirrtlFile], - Dependency[chisel3.stage.phases.Convert] ) - - val phases: Seq[Phase] = new PhaseManager(targets, currentState) { - override val wrappers = Seq( DeletedWrapper(_: Phase) ) - }.transformOrder - - val annosx = try { - phases.foldLeft(annos)( (a, p) => p.transform(a) ) - } catch { - /* ChiselStage and FirrtlStage can throw StageError. Since Driver is not a StageMain, it cannot catch these. While - * Driver is deprecated and removed in 3.2.1+, the Driver catches all errors. - */ - case e: StageError => annos - } - - view[ChiselExecutionResult](annosx) - } - - /** - * Run the chisel3 compiler and possibly the firrtl compiler with options specified via an array of Strings - * - * @param args The options specified, command line style - * @param dut The device under test - * @return An execution result with useful stuff, or failure with message - */ - @deprecated("Use chisel3.stage.ChiselStage.execute. This will be removed in 3.4.", "3.2.2") - def execute(args: Array[String], dut: () => RawModule): ChiselExecutionResult = { - val optionsManager = new ExecutionOptionsManager("chisel3") with HasChiselExecutionOptions with HasFirrtlOptions - - optionsManager.parse(args) match { - case true => - execute(optionsManager, dut) - case _ => - ChiselExecutionFailure("could not parse results") - } - } - - /** - * This is just here as command line way to see what the options are - * It will not successfully run - * TODO: Look into dynamic class loading as way to make this main useful - * - * @param args unused args - */ - @deprecated("Use chisel3.stage.ChiselMain. This will be removed in 3.4.", "3.2.2") - def main(args: Array[String]) { - execute(Array("--help"), null) - } - - val version = BuildInfo.version - val chiselVersionString = BuildInfo.toString -} diff --git a/src/main/scala/chisel3/compatibility.scala b/src/main/scala/chisel3/compatibility.scala index e62cba7d..3b9a3dcc 100644 --- a/src/main/scala/chisel3/compatibility.scala +++ b/src/main/scala/chisel3/compatibility.scala @@ -363,8 +363,6 @@ package object Chisel { implicit class fromIntToWidth(x: Int) extends chisel3.fromIntToWidth(x) type BackendCompilationUtilities = firrtl.util.BackendCompilationUtilities - @deprecated("Please switch to chisel3.stage.ChiselStage", "3.4") - val Driver = chisel3.Driver val ImplicitConversions = chisel3.util.ImplicitConversions // Deprecated as of Chisel3 @@ -455,7 +453,6 @@ package object Chisel { val Log2 = chisel3.util.Log2 - val unless = chisel3.util.unless type SwitchContext[T <: Bits] = chisel3.util.SwitchContext[T] val is = chisel3.util.is val switch = chisel3.util.switch diff --git a/src/main/scala/chisel3/internal/firrtl/Emitter.scala b/src/main/scala/chisel3/internal/firrtl/Emitter.scala index 354be0c0..ad4df80a 100644 --- a/src/main/scala/chisel3/internal/firrtl/Emitter.scala +++ b/src/main/scala/chisel3/internal/firrtl/Emitter.scala @@ -29,7 +29,7 @@ private class Emitter(circuit: Circuit) { case d: Clock => "Clock" case _: AsyncReset => "AsyncReset" case _: ResetType => "Reset" - case d: chisel3.core.EnumType => s"UInt${d.width}" + case d: chisel3.experimental.EnumType => s"UInt${d.width}" case d: UInt => s"UInt${d.width}" case d: SInt => s"SInt${d.width}" case d: FixedPoint => s"Fixed${d.width}${d.binaryPoint}" diff --git a/src/main/scala/chisel3/util/BitPat.scala b/src/main/scala/chisel3/util/BitPat.scala index 40563e23..12a421a0 100644 --- a/src/main/scala/chisel3/util/BitPat.scala +++ b/src/main/scala/chisel3/util/BitPat.scala @@ -91,12 +91,6 @@ object BitPat { /** @group SourceInfoTransformMacro */ def do_=/= (that: BitPat) (implicit sourceInfo: SourceInfo, compileOptions: CompileOptions): Bool = that =/= x - - final def != (that: BitPat): Bool = macro SourceInfoTransform.thatArg - @chiselRuntimeDeprecated - @deprecated("Use '=/=', which avoids potential precedence problems", "3.0") - def do_!= (that: BitPat) - (implicit sourceInfo: SourceInfo, compileOptions: CompileOptions): Bool = that != x } } @@ -125,11 +119,4 @@ sealed class BitPat(val value: BigInt, val mask: BigInt, width: Int) extends Sou !(this === that) } - def != (that: UInt): Bool = macro SourceInfoTransform.thatArg - @chiselRuntimeDeprecated - @deprecated("Use '=/=', which avoids potential precedence problems", "3.0") - def do_!= (that: UInt) - (implicit sourceInfo: SourceInfo, compileOptions: CompileOptions): Bool = { - this =/= that - } } diff --git a/src/main/scala/chisel3/util/BlackBoxUtils.scala b/src/main/scala/chisel3/util/BlackBoxUtils.scala index 21bd4dfa..3cd704b3 100644 --- a/src/main/scala/chisel3/util/BlackBoxUtils.scala +++ b/src/main/scala/chisel3/util/BlackBoxUtils.scala @@ -9,9 +9,6 @@ import firrtl.transforms.{BlackBoxPathAnno, BlackBoxResourceAnno, BlackBoxInline trait HasBlackBoxResource extends BlackBox { self: BlackBox => - @deprecated("Use addResource instead", "3.2") - def setResource(blackBoxResource: String): Unit = addResource(blackBoxResource) - /** Copies a resource file to the target directory * * Resource files are located in project_root/src/main/resources/. diff --git a/src/main/scala/chisel3/util/Conditional.scala b/src/main/scala/chisel3/util/Conditional.scala index b934f27f..1ac94bfe 100644 --- a/src/main/scala/chisel3/util/Conditional.scala +++ b/src/main/scala/chisel3/util/Conditional.scala @@ -12,15 +12,6 @@ import scala.reflect.macros.blackbox._ import chisel3._ import chisel3.internal.sourceinfo.SourceInfo -@deprecated("The unless conditional is deprecated, use when(!condition){...} instead", "3.2") -object unless { - /** Does the same thing as [[when$ when]], but with the condition inverted. - */ - def apply(c: Bool)(block: => Any) { - when (!c) { block } - } -} - /** Implementation details for [[switch]]. See [[switch]] and [[chisel3.util.is is]] for the * user-facing API. * @note DO NOT USE. This API is subject to change without warning. |