diff options
Diffstat (limited to 'chiselFrontend/src')
7 files changed, 29 insertions, 15 deletions
diff --git a/chiselFrontend/src/main/scala/chisel3/core/Assert.scala b/chiselFrontend/src/main/scala/chisel3/core/Assert.scala index 8616154b..7f67f244 100644 --- a/chiselFrontend/src/main/scala/chisel3/core/Assert.scala +++ b/chiselFrontend/src/main/scala/chisel3/core/Assert.scala @@ -51,7 +51,7 @@ object assert { // scalastyle:ignore object.name } def apply_impl_do(cond: Bool, line: String, message: Option[String], data: Bits*)(implicit sourceInfo: SourceInfo, compileOptions: CompileOptions) { - when (!(cond || Builder.forcedReset)) { + when (!(cond || Module.reset.toBool)) { val fmt = message match { case Some(str) => s"Assertion failed: $str\n at $line\n" case None => s"Assertion failed\n at $line\n" @@ -77,7 +77,7 @@ object assert { // scalastyle:ignore object.name object stop { // scalastyle:ignore object.name /** Terminate execution with a failure code. */ def apply(code: Int)(implicit sourceInfo: SourceInfo, compileOptions: CompileOptions): Unit = { - when (!Builder.forcedReset) { + when (!Module.reset.toBool) { pushCommand(Stop(sourceInfo, Node(Builder.forcedClock), code)) } } diff --git a/chiselFrontend/src/main/scala/chisel3/core/Bits.scala b/chiselFrontend/src/main/scala/chisel3/core/Bits.scala index f61ca5a9..090c320b 100644 --- a/chiselFrontend/src/main/scala/chisel3/core/Bits.scala +++ b/chiselFrontend/src/main/scala/chisel3/core/Bits.scala @@ -36,12 +36,26 @@ abstract class Element(private[chisel3] val width: Width) extends Data { pushCommand(Connect(sourceInfo, this.lref, that.ref)) } +/** Exists to unify common interfaces of [[Bits]] and [[Reset]] + * Workaround because macros cannot override abstract methods + */ +private[chisel3] sealed trait ToBoolable extends Element { + + /** Casts this object to a [[Bool]] + * + * @note Width must be known and equal to 1 + */ + final def toBool(): Bool = macro SourceInfoWhiteboxTransform.noArg + + def do_toBool(implicit sourceInfo: SourceInfo, compileOptions: CompileOptions): Bool +} + /** A data type for values represented by a single bitvector. Provides basic * bitwise operations. */ //scalastyle:off number.of.methods sealed abstract class Bits(width: Width, override val litArg: Option[LitArg]) - extends Element(width) { + extends Element(width) with ToBoolable { // TODO: perhaps make this concrete? // Arguments for: self-checking code (can't do arithmetic on bits) // Arguments against: generates down to a FIRRTL UInt anyways @@ -266,9 +280,7 @@ sealed abstract class Bits(width: Width, override val litArg: Option[LitArg]) @deprecated("Use asUInt, which makes the reinterpret cast more explicit", "chisel3") final def toUInt(implicit compileOptions: CompileOptions): UInt = do_asUInt(DeprecatedSourceInfo, compileOptions) - final def toBool(): Bool = macro SourceInfoTransform.noArg - - def do_toBool(implicit sourceInfo: SourceInfo, compileOptions: CompileOptions): Bool = { + final def do_toBool(implicit sourceInfo: SourceInfo, compileOptions: CompileOptions): Bool = { width match { case KnownWidth(1) => this(0) case _ => throwException(s"can't covert UInt<$width> to Bool") @@ -699,11 +711,13 @@ trait SIntFactory { object SInt extends SIntFactory +sealed trait Reset extends Element with ToBoolable + // REVIEW TODO: Why does this extend UInt and not Bits? Does defining airth // operations on a Bool make sense? /** A data type for booleans, defined as a single bit indicating true or false. */ -sealed class Bool(lit: Option[ULit] = None) extends UInt(1.W, lit) { +sealed class Bool(lit: Option[ULit] = None) extends UInt(1.W, lit) with Reset { private[core] override def cloneTypeWidth(w: Width): this.type = { require(!w.known || w.get == 1) new Bool().asInstanceOf[this.type] diff --git a/chiselFrontend/src/main/scala/chisel3/core/Module.scala b/chiselFrontend/src/main/scala/chisel3/core/Module.scala index dfb9081c..0e919d3c 100644 --- a/chiselFrontend/src/main/scala/chisel3/core/Module.scala +++ b/chiselFrontend/src/main/scala/chisel3/core/Module.scala @@ -70,7 +70,7 @@ object Module { /** Returns the implicit Clock */ def clock: Clock = Builder.forcedClock /** Returns the implicit Reset */ - def reset: Bool = Builder.forcedReset + def reset: Reset = Builder.forcedReset } /** Abstract base class for Modules, an instantiable organizational unit for RTL. diff --git a/chiselFrontend/src/main/scala/chisel3/core/MultiClock.scala b/chiselFrontend/src/main/scala/chisel3/core/MultiClock.scala index 62163318..6af4da41 100644 --- a/chiselFrontend/src/main/scala/chisel3/core/MultiClock.scala +++ b/chiselFrontend/src/main/scala/chisel3/core/MultiClock.scala @@ -9,7 +9,7 @@ import chisel3.internal.Builder.pushCommand import chisel3.internal.firrtl._ import chisel3.internal.sourceinfo.{SourceInfo} -private[chisel3] final case class ClockAndReset(clock: Clock, reset: Bool) +private[chisel3] final case class ClockAndReset(clock: Clock, reset: Reset) object withClockAndReset { // scalastyle:ignore object.name /** Creates a new Clock and Reset scope @@ -19,7 +19,7 @@ object withClockAndReset { // scalastyle:ignore object.name * @param block the block of code to run with new implicit Clock and Reset * @return the result of the block */ - def apply[T](clock: Clock, reset: Bool)(block: => T): T = { + def apply[T](clock: Clock, reset: Reset)(block: => T): T = { // Save parentScope val parentScope = Builder.currentClockAndReset Builder.currentClockAndReset = Some(ClockAndReset(clock, reset)) @@ -48,7 +48,7 @@ object withReset { // scalastyle:ignore object.name * @param block the block of code to run with new implicit Reset * @return the result of the block */ - def apply[T](reset: Bool)(block: => T): T = + def apply[T](reset: Reset)(block: => T): T = withClockAndReset(Module.clock, reset)(block) } diff --git a/chiselFrontend/src/main/scala/chisel3/core/Printf.scala b/chiselFrontend/src/main/scala/chisel3/core/Printf.scala index d6e2c8de..87134eda 100644 --- a/chiselFrontend/src/main/scala/chisel3/core/Printf.scala +++ b/chiselFrontend/src/main/scala/chisel3/core/Printf.scala @@ -55,7 +55,7 @@ object printf { // scalastyle:ignore object.name * @param pable [[Printable]] to print */ def apply(pable: Printable)(implicit sourceInfo: SourceInfo, compileOptions: CompileOptions): Unit = { - when (!Builder.forcedReset) { + when (!Module.reset.toBool) { printfWithoutReset(pable) } } diff --git a/chiselFrontend/src/main/scala/chisel3/core/UserModule.scala b/chiselFrontend/src/main/scala/chisel3/core/UserModule.scala index 8b176c3b..218b27c6 100644 --- a/chiselFrontend/src/main/scala/chisel3/core/UserModule.scala +++ b/chiselFrontend/src/main/scala/chisel3/core/UserModule.scala @@ -88,8 +88,8 @@ abstract class UserModule(implicit moduleCompileOptions: CompileOptions) abstract class ImplicitModule(implicit moduleCompileOptions: CompileOptions) extends UserModule { // Implicit clock and reset pins - val clock = IO(Input(Clock())) - val reset = IO(Input(Bool())) + val clock: Clock = IO(Input(Clock())) + val reset: Reset = IO(Input(Bool())) // Setup ClockAndReset Builder.currentClockAndReset = Some(ClockAndReset(clock, reset)) diff --git a/chiselFrontend/src/main/scala/chisel3/internal/Builder.scala b/chiselFrontend/src/main/scala/chisel3/internal/Builder.scala index 1d7a45e0..8af1835d 100644 --- a/chiselFrontend/src/main/scala/chisel3/internal/Builder.scala +++ b/chiselFrontend/src/main/scala/chisel3/internal/Builder.scala @@ -205,7 +205,7 @@ private[chisel3] object Builder { case None => throwException("Error: No implicit clock and reset.") } def forcedClock: Clock = forcedClockAndReset.clock - def forcedReset: Bool = forcedClockAndReset.reset + def forcedReset: Reset = forcedClockAndReset.reset // TODO(twigg): Ideally, binding checks and new bindings would all occur here // However, rest of frontend can't support this yet. |