| Age | Commit message (Expand) | Author |
|---|---|---|
| 2022-01-27 | Fix faulty MemorySynthInit behavior (#2468) | John's Brew |
| 2021-07-14 | Fix memory annotation deduplication (#2286) | Jared Barocsi |
| 2021-04-01 | Add memory initialization options for synthesis (#2166) | Carlos Eduardo |
| 2021-03-09 | Create annotation to allow inline readmem in Verilog (#2107) | Carlos Eduardo |
| 2020-09-16 | Change to Apache 2.0 License (#1901) | Chick Markley |
| 2020-08-14 | All of src/ formatted with scalafmt | chick |
| 2020-08-12 | Combined Uniquify and LowerTypes pass (#1784) | Kevin Laeufer |
| 2020-06-22 | Support Memory Initialization for Simulation and FPGA Flows (#1645) | Kevin Laeufer |
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index : sfcX | |
| Scala FIRRTL Compiler for chiselX |
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