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* Implement MFC-style source locator compression
* Fix formatting issues
* Fix emitting empty FileInfo if the firrtl doesn't have one
* Remove '.scala' requirement in FileInfo parsing regex
* Handle parsing of FileInfos with no line/col nums
* Split FileInfos only if they match
This should fix any issues with FileInfos that do not use the "file line:col"
format, and allow any valid firrtl using these info comments to compile.
* Add unit tests for locator compression
* Move InfoTests to InfoSpec class
* Fix existing unit tests with fileinfo comments
* Add unit tests to ignore the algorithm's own output
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Due to inlining of Boolean expressions, the following circuit is handled
directly by the VerilogEmitter:
input a: UInt<4>
input b: SInt<1>
output o: UInt<5>
o <= dshl(a, asUInt(cvt(b)))
Priot to this change, this could crash due to mishandling of cvt in the
logic to inject parentheses based on Verilog precedence rules.
This is a corner case, but similar bugs would drop up if we open up the
VerilogEmitter to more expression inlining.
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* test multiinfo comparison and mux cond inlining
* loosen inlining conditions
* fix typo
* include dshlw
* fix test
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Also rename --Wno-scala-version-warning to
--warn:no-scala-version-deprecation and adopt naming convention where
resulting annotation matches the CLI option
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* InlineBooleanExpressions: test DontTouch
* run scalafmt
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* run scalafmtAll
* ci: scalafmtCheckAll to check all code instead of just the main sources
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The following conditions must be satisfied to inline:
1. has type Utils.BoolType
2. is bound to a DefNode with name starting with '_'
3. is bound to a DefNode with a source locator that
points at the same file and line number. If it is a MultiInfo source
locator, the set of file and line number pairs must be the same. Source
locators may point to different column numbers.
4. InlineBooleanExpressionsMax has not been exceeded
5. is not a Mux
Also updates the Verilog emitter to break up lines greater than 120 characters
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