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path: root/src/test/scala/firrtlTests/InferResetsSpec.scala
AgeCommit message (Collapse)Author
2020-09-16Change to Apache 2.0 License (#1901)Chick Markley
2020-08-14All of src/ formatted with scalafmtchick
2020-03-17[RFC] Factor out common test classes; package them (#1412)David Biancolin
* Pull out common test utilities into a separate package * Project a fat jar for test utilities Co-authored-by: Albert Magyar <albert.magyar@gmail.com>
2020-02-18Remove last connect semantics from reset inference (#1396)Jack Koenig
* Revert "Infer resets last connect semantics (#1291)" * Fix handling of invalidated and undriven components of type Reset * Run CheckTypes after InferResets * Make reset inference bidirectional on connect * Support AsyncResetType in RemoveValidIf * Fix InferResets for parent constraints on child ports * Apply suggestions from code review * Add ScalaDoc to InferResets Co-authored-by: Albert Magyar <albert.magyar@gmail.com> Co-authored-by: Schuyler Eldridge <schuyler.eldridge@gmail.com>
2019-12-30Respect last connect semantics in InferResetsJack Koenig
InferResets will now support last connect semantics (within the same scope) when determining the concrete reset type for components of type Reset. This only includes *unconditional* last connects; it remains illegal to drive a component of type Reset with different concrete types under differing when conditions. For example, the following is now legal: input a : UInt<1> input b : AsyncReset output z : Reset z <= a z <= b The second connect will when and z will be of type AsyncReset. The following remains illegal: input a : UInt<1> input b : AsyncReset input c : UInt<1> output z : Reset z <= a when c : z <= b This commit also ensures that components of type Reset with no drivers (or only invalidation) default to type UInt<1>. This fixes a bug where the transform would crash with such input.
2019-08-13Infer reset (#1068)Jack Koenig
* Add abstract "Reset" which can be inferred to AsyncReset or UInt<1> * Enhance async reset initial value literal check to support aggregates