sfcX - Scala FIRRTL Compiler for chiselX

Age	Commit message (Expand)	Author
2020-09-16	Change to Apache 2.0 License (#1901)	Chick Markley
2020-08-14	All of src/ formatted with scalafmt	chick
2020-03-17	[RFC] Factor out common test classes; package them (#1412)	David Biancolin
2019-10-18	Upstream intervals (#870)	Adam Izraelevitz
2019-09-16	Rename gender to flow	Schuyler Eldridge
2019-08-07	DRY check chirrtl (#1148)	Albert Magyar
2019-02-22	Add Width Constraints with Annotations (#956)	Albert Chen
2018-09-26	Enforce port uniqueness in Chirrtl/High Checks	Schuyler Eldridge
2017-05-10	Update rename2 (#478)	Adam Izraelevitz
2016-12-08	Clk2clock - rename the implicit "clk" module input "clock" (#387)	Jim Lawson
2016-11-05	Fix CHIRRTL bugs (#355)	Donggyu
2016-11-04	Cleanup license at top of every file (#364)	Jack Koenig
2016-10-26	Improve integration test API and add support for Verilog resources	jackkoenig
2016-07-21	Added a Chirrtl check for undeclared wires, etc.	azidar
2016-06-10	API Cleanup - AST	Jack
2016-05-12	Restructured Compiler to use Transforms. Added an InlineInstance pass.	Adam Izraelevitz
2016-05-12	Implement File Info	jackkoenig
2016-04-20	Add tests for CHIRRTL mem port definitions.	jackkoenig