aboutsummaryrefslogtreecommitdiff
path: root/src/test/scala/firrtlTests/AttachSpec.scala
AgeCommit message (Expand)Author
2020-09-16Change to Apache 2.0 License (#1901)Chick Markley
2020-08-14All of src/ formatted with scalafmtchick
2020-03-17[RFC] Factor out common test classes; package them (#1412)David Biancolin
2020-02-12Removed unused imports in src/test/ (#1381)Jim Lawson
2019-02-22Add Width Constraints with Annotations (#956)Albert Chen
2018-06-06ConstProp attached wires if there is also a port (#818)Jack Koenig
2018-03-21GroupModule Transform (#766)Adam Izraelevitz
2017-12-27Removed top preamble (#640)Adam Izraelevitz
2017-06-12Fixes a typo in the verilog `elsif code generation (#603)Shreesha Srinath
2017-05-11Improved Global Dead Code Elimination (#549)Jack Koenig
2017-03-06Add ability to emit 1 file per module (#443)Jack Koenig
2017-02-14Add support for Analog types in partial connect (#435)Jack Koenig
2017-02-07Rework Attach to work on arbitrary Analog hierarchies (#415)Jack Koenig
2016-12-08Clk2clock - rename the implicit "clk" module input "clock" (#387)Jim Lawson
2016-11-23Stringified annotations (#367)Adam Izraelevitz
2016-11-04Cleanup license at top of every file (#364)Jack Koenig
2016-11-04Add a pass to deduplicate modulesazidar
2016-11-04Refactor Compilers and Transformsjackkoenig
2016-09-25Spec features added: AnalogType and Attach (#295)Adam Izraelevitz