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AgeCommit message (Expand)Author
2020-03-12Avoid generating out-of-bounds indices in ReplaceAccessesAlbert Magyar
2020-03-11Don't const-prop a register's self-init (#1441)Albert Magyar
2020-03-11Migrate to DependencyAPISchuyler Eldridge
2020-03-11Remove dead passes.DeadCodeElimination code (#1440)Albert Magyar
2020-03-10Fix copy-paste error in DiGraph.linearize documentation (#1324)Sahand Kashani-Akhavan
2020-03-09Provide an annotation mix-in that marks RTs as dontTouch (#1433)David Biancolin
2020-03-07Add firrtl-json serializers (#1430)Adam Izraelevitz
2020-03-06Check sign of primop constants where appropriate (#1421)Albert Magyar
2020-03-04Incorporate new AddNot formal regression testAlbert Magyar
2020-03-04Revert "Verilog emitter transform InlineNots (#1270)"Albert Magyar
2020-03-04Remove RenameMap logging from EliminateTargetPaths (#1416)Jack Koenig
2020-03-03Fix error message for NegWidthException (#1418)Albert Magyar
2020-03-02Remove DiGraph.seededLinearize (#1413)Schuyler Eldridge
2020-03-02Remove new unreachables in EliminateTargetPathsSchuyler Eldridge
2020-02-20Don't add ResolvePaths annotations if no targets (#1392)Schuyler Eldridge
2020-02-19Add optionalPrerequisites to Dependency APISchuyler Eldridge
2020-02-19Add dependency prettyPrint, visualization updatesSchuyler Eldridge
2020-02-19Make PreservesAll invalidates finalSchuyler Eldridge
2020-02-19Support Singleton Dependencies (#1275)Albert Magyar
2020-02-18Update reachableFrom ScalaDocAlbert Magyar
2020-02-18Revert "Repl seq mem renaming (#1286)" (#1399)Jack Koenig
2020-02-18Remove last connect semantics from reset inference (#1396)Jack Koenig
2020-02-13Constant prop binary PrimOps with matching argumentsAlbert Magyar
2020-02-13Add InstanceGraph helpers: reachable/unreachableSchuyler Eldridge
2020-02-12Update RenameMap Scaladoc for self-rename, distincSchuyler Eldridge
2020-02-12Record self-renames in RenameMap, distinct renamesSchuyler Eldridge
2020-02-12Repl seq mem renaming (#1286)Jack Koenig
2020-02-11Report dead modules in staticInstanceCountSchuyler Eldridge
2020-02-12Fixing lint error: x + -1 (#1374)Adam Izraelevitz
2020-02-12Support MemConfs with very deep memories (#1367)Jerry Zhao
2020-02-10Rename modules when duplicating instancesSchuyler Eldridge
2020-02-10Add Target utility referringModuleSchuyler Eldridge
2020-02-07Refactor handling of reg const prop entries to cover more casesAlbert Magyar
2020-02-06Better register const prop through speculative de-optimizationAlbert Magyar
2020-02-06Add constant prop to async regs (#1355)Adam Izraelevitz
2020-02-06[Behavior change] Andr of zero-width wire now returns UIntLiteral(1)Albert Magyar
2020-02-06Emit 'else' case for trivial-valued async reset regs to avoid latches (#1359)Albert Magyar
2020-02-03Dedup: check if moduleOpt exists before getting (#1323)Albert Chen
2020-02-03Fix conversion of Reference-containing expressions to ReferenceTargets (#1349)Albert Magyar
2020-01-28add IsModule, IsMember, CompleteTarget serializers (#1321)Albert Chen
2020-01-21Refactoring checkCatArgumentLegality (#1317)Derek Pappas
2020-01-20clean up warnings: trim unused imports (#1315)John Ingalls
2020-01-15Verilog emitter transform InlineBitExtractions (#1296)John Ingalls
2020-01-15improve the tail ir usability. (#1241)Sequencer
2020-01-15Filter ResolvePaths in EliminateTargetPaths (#1310)Schuyler Eldridge
2020-01-10Change LoggerState.globalLevel to Warn (#1307)Jim Lawson
2020-01-10Change default LogLevel to Warn (#1305)Schuyler Eldridge
2020-01-07Change printing of FIRRTL runtime from error to warnJack Koenig
2020-01-07Redirect testing shell commands to loggerJack Koenig
2020-01-07Fix literals cast to Clocks in Print and StopJack Koenig
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