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Directly subclassing Iterable is lazy-ish, but if you call any operation
on the resulting value (eg. map or ++) it will evaluate the Iterable and
return a List.
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This will make it easier to compile circuits with
older compiler versions.
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* [smem] fix read-under-write serialization
Also adds some tests for the parser and
the serializer.
* Serializer: always serialize smem ruw behavior
* test: simplify smem test circuit
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Also get rid of whitespace-only lines that were emitted after every when
block.
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This is needed for emitting modules that serialize to Strings larger
than 2 GiB (the maximum String size on the JVM). It includes
micro-optimized logic for turning arbitrarily nested when scopes into
Iterable[String].
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* Parse version and hardcode emitted version
* Throw error if version is too high
* Parse version even if rest is invalid
* Change pattern match to if statement
* Improve version grammar
* Update tests
* Remove outdated comment
* Simplify grammar and use version class
* Simplify and add no version test
* Fix for conflicting lexer rule
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This will allow chiseltest to save
the hash code to disk for the purpose
of caching simulation binaries.
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* Implement MFC-style source locator compression
* Fix formatting issues
* Fix emitting empty FileInfo if the firrtl doesn't have one
* Remove '.scala' requirement in FileInfo parsing regex
* Handle parsing of FileInfos with no line/col nums
* Split FileInfos only if they match
This should fix any issues with FileInfos that do not use the "file line:col"
format, and allow any valid firrtl using these info comments to compile.
* Add unit tests for locator compression
* Move InfoTests to InfoSpec class
* Fix existing unit tests with fileinfo comments
* Add unit tests to ignore the algorithm's own output
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Using Utils.indent() gives deprecation warnings to use Serializer instead. However,
the Serializer class itself doesn't provide a means to manually indent a FirrtlNode
string a certain number of times.
The indent variable, previously hardcoded to 0, is now exposed as a second parameter
for the modified serialize function, and the old serialize function just calls the
modified serialize with indents = 0 for binary compatibility
Co-authored-by: Megan Wachs <megan@sifive.com>
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With this PR the smt backend now supports memories
with more than two write ports and the conservative
memory modelling can be selectively turned off with
a new annotation.
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* firrtl: add optional statement labels for stop, printf, assert, assume and cover
* test: parsing of statement labels
* ir: ensure that name is properly retained
* SymbolTable: add support for labled statements
* test: parsing statement labels
* test: lower types name collisions with named statements
* ignore empty names
* Inline: deal with named and unnamed statements
* RemoveWires: treat stop, printf and verification statements as "others"
* test: fix InlineInstance tests
* DeadCodeEliminations: statements are now als declarations
* CheckHighForm: ensure that statement names are not used as references
* CheckSpec: throw error if statement name collides
* add pass to automatically add missing statement names
* check: make sure that two statements cannot have the same name
* stmtLabel -> stmtName
* scalafmt
* add statement names to spec
* spec: meta data -> metadata
* EnsureStatementNames: explain naming algorithm
* remove returns
* better namespace use
* ir: add CanBeReferenced trait
* ir: add newline as jack requested
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* build: add data-class dependency
* ir: turn Print, Stop and Verification nodes into data classes
This is in preparation to add a name field to them.
Co-authored-by: Jack Koenig <jack.koenig3@gmail.com>
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* Check Unidoc on all versions of Scala
It is required for publishing and we publish every version
* Fix conflicting cross-version suffixes issue
When running `sbt ++2.13.4 unidoc`, SBT would set the Scala version
for the fuzzer and benchmark projects even though they aren't really
relevant to the command. This may be a misconfiguration or a bug in
the unidoc plugin. Whatever the case, simply making it possible for
them to use the same version of Scala as the firrtl project (on which
they depend) fixes the issue.
* Match versions of Scala in build.sbt and CI
* Fix unidoc issues in 2.13.4
There is some bug in ScalaDoc not finding some links in firrtl.options
so those links were made absolute as a workaround.
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Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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* Utils: add to_dir helper function
* firrt.SymbolTable trait for scanning declarations
* ir: RefLikeExpression trait to represent SubField, SubIndex, SubAccess and Reference nodes
* add new implementation of the LowerTypes pass
* replace LowerTypes with NewLowerTypes
* remove dependencies on Uniquify
* GroupComponentSpec: GroupComponents is run before lower types
* NewLowerTypes: address Adam's suggestions
* LoweringCompilerSpec: Uniquify was removed and NewLowerTypes
* LowerTypesSpec: add newline at the end of file
* LowerTypesSpec: port Uniquify tests to combined pass
* NewLowerTypes: ensure that internal methods are not visible
* NewLowerTypes: extend DependencyAPIMigration
* NewLowerTypes: lower ports without looking at the body
* LowerTypesSpec: use TransformManager instead of hard coded passes.
* NewLowerTypes: names are already assumed to be part of the namespace
* LowerTypesSpec: test name clashes between ports and nodes, inst, mem
* NewLowerTypes: correctly rename nodes, mems and instances that clash with port names
* NewLowerTypes: Iterable[String] instead of Seq[String] for 2.13
* NewLowerTypes: add a fast path for ground types without renaming
* LowerTypesSpec: remove trailing commans for 2.11
* LowerTypesSpec: explain why there are two
* Uniquify: use loweredName from NewLowerType
* replace old LowerTypes pass with NewLowerTypes pass
* Uniquify: deprecate pass usage
There are some functions that are still used by other passes.
* LowerTypes: InstanceKeyGraph now has a private constructor
* LowerTypes: remove remaining references to NewLowerTypes
* LoweringCompilerSpec: fix transform order to LowerTypes
* SymbolTable: add improvements from PR
* LoweringCompilerSpec: ignore failing CustomTransform tests
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Using the new trait to overwrite serialize at the
leaf classes, we ensure that new, e.g., Expression
nodes will not automatically try to call
`Serializer.serialize` which would fail by default.
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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* ir: use Serializer.serialize where possible
* ir.Serializer: serialize MultiInfo correctly
* ir.Serializer: empty body needs to result in a skip statement
The firrtl grammar requires at least one statement.
* ir.Serializer: correctly serialize fixed point types and literals
* Serializer: change Seq -> Iterable in order to be Scala 2.13 compatible
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* ConstProp: test bitwise op of signed literals
* ConstProp: use bit mask for FoldOr/FoldXor
* handle and also
* add UIntLiteral.masked helper
Co-authored-by: Jack Koenig <koenig@sifive.com>
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* [WIP] Propagate source locators to Verilog if-else emission
* Add and fix tests for reg update info propagation
* Add limited source locator propagation in ConstProp
Support propagating source locators on connections or nodes where the
right-hand side is simply a reference. This case comes up a lot for
registers without a synchronous reset.
node _T_1 = x @[MyFile.scala 12:10]
node _T_2 = _T_1
z <= x
Previousy the source locator would be lost, now the result is:
z <= x @[MyFile.scala 12:10]
* Address review comments
Co-authored-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>
Co-authored-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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This should speed up the common case
as the compiler never operates on the
unescaped string.
The new escape function also fixes a bug
where ']' was not escaped even though it
is the delimiting character for FileInfo.
In order to maintain backwards
compatibility for the ProtoBuf format,
this patch adds escape/unescape calls
when going from/to protobuf format.
For better performance we should consider
changing the protobuf format.
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* benchmark: add hot.DedupBenchmark
* dedup: use structural md5 hash instead of agnostify and serialize
* StructuralHash: generate PrimOp LUT
* StructuralHash: change MessageDigestHasher to not be a case class
* StructuralHash: we want Blocks and EmptyStmt to be ignored
* StructuralHash: use SHA-256 instead of MD5
* StructuralHash: clarify extmodule port name agnistification
* StructuralHash: hash the name of width vars instead of trying to agnostify
This should be in line with the old Dedup behavior.
The prior use of n(..) was incorrect since the namespace
of these vars is different from the normal module scope namespace.
* StructuralHash: address Schuyler's review comments
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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This Serializer which is implemented
external to the IR node definition
uses a StringBuilder to achieve about a
1.7x performance improvement when serializing.
Eventually, all implementations of the
`serialize` methd should be replaced with
a call to `Serializer.serialize`.
However, for this PR we keep the old
code in place in order to allow for easy
regression testing with the benchmark JAR
like this:
> java -cp utils/bin/firrtl-benchmark.jar \
firrtl.benchmark.hot.SerializationBenchmark \
~/benchmarks/medium.pb 2 5 test
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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* Add assume, assert, cover statements
* Assert submodule assumptions
* Add warning when removing verification statements
* Remove System Verilog behaviour emitter warning
* Add option to disable AssertSubmoduleAssumptions
* Document verification statements in the spec
The syntax for the new statements is
assert(clk, cond, en, msg)
assume(clk, cond, en, msg)
cover(clk, cond, en, msg)
With assert as a representative example, the semantics is as follows:
`clk` is the clock, `cond` is the expression being asserted, `en` is the
enable signal (if `en` is low then the assert is not checked) and `msg`
is a string message intended to be reported as an error message by the
model checker if the assertion fails.
In the Verilog emitter, the new statements are handled by a new
`formals` map, which groups the statements by clock domain. All model
checking statements are then emitted within the context of an `ifdef
FORMAL` block, which allows model checking tools (like Symbiyosys) to
utilize the statements while keeping them out of synthesis flows.
Co-authored-by: Albert Magyar <albert.magyar@gmail.com>
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* Build ArrayBuffers in Block.mapStmt
* Have empty Block serialize as "skip"
The FIRRTL parser requires at least one indented line in each module.
Sometimes tests emit and parse modules with no contents; this ensures
there's always at least a "skip" in empty modules.
Also fix tests that expected certain skips
* Use var List as stack in Block.mapStmt impl
This replaces Iterator concatenation. In Scala 2.11, RHS recursion on
Iterators is not stack safe. This seems to have been fixed in 2.12 by
Scala PR 5033.
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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* This will help encourage use of these rather than WIR
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* Absorb WRef into Reference
* Absorb WSubField into SubField
* Absorb WSubIndex into SubIndex
* Absorb WSubAccess into SubAccess
* Absorb WDefInstance into DefInstance
------------------------- API CHANGE SEVERITY --------------------------
This is projected to not break source-level compatibility with any known
user code. However, it will break *binary* compatibility with all
existing user FIRRTL passes, as is generally allowed with major
releases of FIRRTL.
--------------------------- DESCRIPTION --------------------------------
Previously, there were several nodes in WIR.scala that had a one-to-one
correspondance with existing nodes in the standard firrtl.ir hierarchy.
These nodes would have a case class resembling the corresponding
standard IR node, but with the addition of one or more "analysis"
fields.
Since these fields (such as kind) represent helpful info that can be
invalidated or set to Unknown (e.g. UnknownKind for Kind), it does not
cause any issues to simply include these fields on any in-memory
representation of FIRRTL IR. Although other systems for tracking FIRRTL
analyses have evolved over time, the ubiquity of pattern-matching on
these fields has lead most core and custom transforms to be written
against WIR, rather than IR.
This PR unifies the IRs by adding the fields that would be in an
"augmented" WIR node directly into the corresponding IR node; i.e., the
"type" and "kind" fields from WRef are added directly to the definition
of the Reference case class, while these "repetitive" WIR case classes
are removed entirely.
-------------------- SOURCE-COMPATIBILITY ADAPTERS ---------------------
Several object methods are added to WIR.scala to maintain
source-compatiblity for passes that used WIR. These objects define
factory methods and unapply methods, so passes that relied on implicit
case class factories or pattern matching for the removed WIR types will
remain perfectly source-compatible. However, these do not guarantee
compatibility at the binary level.
The types of the removed WIR case classes are also added as type aliases
to the top-level firrtl package, which allows code that relies on
explicit constructor calls or reflection to retain source-compatibility.
Finally, additional explicit factory methods are added to the companion
objects of the newly-augmented IR case classes, which allows user code
to avoid having to specify any of the new analysis fields. Existing code
that created non-WIR IR nodes will be able to continue using the
previous factory signatures, which will cause all omitted analysis
fields to be set to Unknown.
---------------------- UNMITIGATED API CHANGES -------------------------
While passes that used WIR will be source-compatible with this change,
there is one significant change that affects any pass currently using
non-WIR IR: the signatures of pattern-matching cases for Reference,
SubField, SubIndex, SubAccess, and DefInstance must change to
accommodate the extra fields.
This cannot be worked at the API level due to restrictions on unapply
overloading, but it could theoretically be solved with macros or other
static rewriting. However, only four core transforms (RemoveProto,
ToWorkingIR, Dedup, and RemoveChirrtl) use non-WIR IR, and it is
expected that no user code currently relies on it, so the expected
migration strategy is simply to change the small fraction of code
relying on these nodes.
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Major features:
- Added Interval type, as well as PrimOps asInterval, clip, wrap, and sqz.
- Changed PrimOp names: bpset -> setp, bpshl -> incp, bpshr -> decp
- Refactored width/bound inferencer into a separate constraint solver
- Added transforms to infer, trim, and remove interval bounds
- Tests for said features
Plan to be released with 1.3
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* Make the read-under-write (RUW) parameter typesafe
* Add RUW support to the FIRRTL proto and CHIRRTL grammar
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* Add abstract "Reset" which can be inferred to AsyncReset or UInt<1>
* Enhance async reset initial value literal check to support aggregates
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Fixes #219
* Adds AsyncResetType (similar to ClockType)
* Registers with reset signal of type AsyncResetType are async reset
registers
* Registers with async reset can only be reset to literal values
* Add initialization logic for async reset registers
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* Seal Direction trait
* Add WRef factories for ports and instances
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* Added Foreachers
* Changed CheckTypes to use foreach
* Check widths now uses foreach
* Finished merge, added foreachers to added stmts
* Address reviewer feedback
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Escape raw params using \'
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Also minor cleanup to literal construction in Visitor
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* Collects Infos found for symbols
* Merges multiple sources for symbol into MultiInfo
* Restores these Infos on connect statements.
* Add test showing preserved Infos
* Changed ++ methods on the Info sub-classes
* Ignore NoInfo being added
* Fixed way adding was implemented in MultiInfo
* Made InfoMap a class which defines the default value function
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* Added grouping pass
* Added InfoMagnet and infomappers
* Changed return type of execute to allow final CircuitState inspection
* Updated dedup. Now is name-agnostic
* Added GroupAndDedup transform
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