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This adds three new transforms:
- (abstract) LetterCaseTransform parent of case manipulation
- LowerCaseNames to lower case all names
- UpperCaseNames to upper case all names
Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>
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{Lower,Upper}CaseNames Transforms (#1651)
* Revert "Add test of {Lower, Upper}CaseNames"
This reverts commit 93c078b8469bc55cd2d33147c33e2b5421fda9d9.
Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>
* Revert "Add --change-name-case <lower|upper> option"
This reverts commit d3ab7e2db66fe3a63778f427dad6c08f64695ba5.
Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>
* Revert "Add features.{LowerCaseNames, UpperCaseNames} transforms"
This reverts commit c8dcdacf313f19a4d0238be694478a325432edd4.
Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>
* Revert "Refactor RemoveKeywordCollisions->ManipulateNames"
This reverts commit c534c5abae7b80a725ec9925569b3383b3c24a34.
Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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Creates the features package and populates it with two new transforms:
LowerCaseNames and UpperCaseNames. These transforms convert all names
in a FIRRTL circuit to lower case or upper case. This is intended to
help align generated Verilog with the policies of the
company/institution using it.
Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>
squash! Add LowerCaseNames and UpperCaseNames transforms
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