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AgeCommit message (Expand)Author
2019-10-29Check that all annotations provide the typeHintDavid Biancolin
2019-10-29Try implementing recursive typeHint look upDavid Biancolin
2019-10-29Change findInstancesInHierarchy to return implicit top instanceAlbert Magyar
2019-10-25Only emit the DeserilizationTypeHintsAnno when neededDavid Biancolin
2019-10-24Merge pull request #1208 from freechipsproject/comb-loop-error-infoAlbert Magyar
2019-10-24Enhance CheckCombLoops errors with connection infoAlbert Magyar
2019-10-24Add EdgeData trait to mix in to graphsAlbert Magyar
2019-10-24Supply a trait to allow user annotations to provide SERDES type hintsDavid Biancolin
2019-10-22Merge pull request #1204 from freechipsproject/else-ifSchuyler Eldridge
2019-10-22Add Register Updates/else-if Verilog Emitter testsSchuyler Eldridge
2019-10-22Emit Verilog "else if" in register updatesSchuyler Eldridge
2019-10-21Merge pull request #1202 from freechipsproject/fix-verilog-mem-delay-enAlbert Magyar
2019-10-21Add tests for memories with latency >1, toggling enablesAlbert Magyar
2019-10-21Add library for streamlined Verilog execution testsAlbert Magyar
2019-10-21Add test for #1179: comb-loops from VerilogMemDelaysAlbert Magyar
2019-10-21Fix write-first mem enable handling in VerilogMemDelaysAlbert Magyar
2019-10-18Upstream intervals (#870)Adam Izraelevitz
2019-10-09Merge pull request #1199 from freechipsproject/top-wiring-idempotentSchuyler Eldridge
2019-10-08Add test for TopWiringTransform idempotencySchuyler Eldridge
2019-10-08Make TopWiringTransform idempotentSchuyler Eldridge
2019-10-07Absorb some instance analysis into InstanceGraph, use safer boxed Strings (#1...Albert Magyar
2019-10-03Add Block factory from argument list of Statements (#1197)Albert Magyar
2019-10-01Restore ResolveGenders to its status as a Pass (#1192)Jack Koenig
2019-10-01Merge pull request #1183 from freechipsproject/mem-read-under-writeAlbert Magyar
2019-09-30Implement read-first memories in VerilogMemDelaysAlbert Magyar
2019-09-30Add read-under-write checks for memory emissionAlbert Magyar
2019-09-30Improve read-under-write parameter supportAlbert Magyar
2019-09-30Define read-write collison for independently clocked mem ports (#1188)Albert Magyar
2019-09-30Bump sbt to 1.3.2 (#1187)Jim Lawson
2019-09-25Add explicit hline instead of phantom h1 (#1189)Schuyler Eldridge
2019-09-19Faster inline renaming (#1184)Albert Chen
2019-09-17Speed up InlineInstances (#1182)Jack Koenig
2019-09-16Bump sbt to 1.3.0 (#1181)Jim Lawson
2019-09-16Merge pull request #1124 from freechipsproject/gender-to-flowSchuyler Eldridge
2019-09-16Update Spec from Gender to FlowSchuyler Eldridge
2019-09-16Deprecate Gender and add implicit Flow conversionSchuyler Eldridge
2019-09-16Rename gender to flowSchuyler Eldridge
2019-09-13Add cold benchmarking script (#1167)Jack Koenig
2019-09-13Update Travis stage names to match new versions (#1180)Jack Koenig
2019-09-13Bump Scala to 2.12.10 (#1155)Jack Koenig
2019-09-12Provide a name for each Travis build stage (#1174)Schuyler Eldridge
2019-09-12Add space, s/Github/GitHub/ in DontTouchException (#1177)Schuyler Eldridge
2019-09-12update inline transform and testcasesAbert Chen
2019-09-06Refactor: remove redundancy code (#1166)Leway Colin
2019-09-05Filter out more filename extensions for blackbox source headers (#1134)Albert Magyar
2019-09-05clean up spacing in inline testabejgonzalez
2019-09-05Bump dependency versions (#1156)Jim Lawson
2019-08-27Merge pull request #1158 from freechipsproject/apoptosisSchuyler Eldridge
2019-08-27Add StageErrorSchuyler Eldridge
2019-08-27Add firrtl.options.ExitCode type hierarchySchuyler Eldridge