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2020-01-07Switch compileFirrtlTest from Driver to FirrtlStageJack Koenig
2020-01-07Redirect testing shell commands to loggerJack Koenig
This includes the built-in functions in BackendCompilationUtilities which are a public API
2020-01-07Merge pull request #1264 from freechipsproject/cleanup-verilog-emitter-castsJack Koenig
Cleanup verilog emitter casts
2020-01-07Fix literals cast to Clocks in Print and StopJack Koenig
Many tools don't except 'always @(posedge 1'h0)' so we assign the literal to a wire and use that as the posedge target.
2020-01-07Remove unnecessary $signed casts for PrimOps in Verilog EmitterJack Koenig
[skip formal checks] Adds new InlineCastsTransform to the VerilogEmitter which removes Statements that do nothing but cast by inlining the cast Expression
2020-01-07Remove unnecessary casts in Constant PropagationJack Koenig
2020-01-07Fix .run_formal_checks.sh skipping logic (#1297)Jack Koenig
Fetch and checkout the base branch before attempting to inspect the log
2020-01-06Verilog emitter transform InlineNots (#1270)John Ingalls
[skip formal checks] * ConstProp FoldEqual/FoldNotEqual propagate boolean (non-)equality with true/false * transform InlineNots * transform back-to-back Nots into straight rename * swap mux with inverted select Co-authored-by: Jack Koenig <jack.koenig3@gmail.com>
2020-01-06Remove incorrect --firrtl-source option (#1266)Schuyler Eldridge
This removes the incorrect short --firrtl-source option. This was supposed to be the helpValueName. Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com> Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
2020-01-06Make EmittedAnnotation Unserializable (#1288)Schuyler Eldridge
Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com> Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
2019-12-31Merge pull request #1291 from ↵Jack Koenig
freechipsproject/infer-resets-last-connect-semantics Infer resets last connect semantics
2019-12-30Minor code cleansup in InferResetsJack Koenig
* Move Map lookup into closure so it only occurs if necessary * Replace gender with flow and improve code clarity
2019-12-30Respect last connect semantics in InferResetsJack Koenig
InferResets will now support last connect semantics (within the same scope) when determining the concrete reset type for components of type Reset. This only includes *unconditional* last connects; it remains illegal to drive a component of type Reset with different concrete types under differing when conditions. For example, the following is now legal: input a : UInt<1> input b : AsyncReset output z : Reset z <= a z <= b The second connect will when and z will be of type AsyncReset. The following remains illegal: input a : UInt<1> input b : AsyncReset input c : UInt<1> output z : Reset z <= a when c : z <= b This commit also ensures that components of type Reset with no drivers (or only invalidation) default to type UInt<1>. This fixes a bug where the transform would crash with such input.
2019-12-18Improve Scaladoc (#1284)Schuyler Eldridge
Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>
2019-12-18Fix incorrect ScalaDoc link (#1282)Schuyler Eldridge
Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>
2019-12-16{Firrtl, Circuit}Option should be Unserializable (#1278)Schuyler Eldridge
FirrtlOption and CircuitOption represent, respectively, something that is convertible to FirrtlOptions or something that is convertible to a FirrtlCircuitAnnotation. Neither of these is intended to be serialized automatically in output JSON. This has the effect of *not* JSON-serializing the FirrtlCircuitAnnotation. This serialization is supposed to be to a file via an emitter. Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>
2019-12-11Make the member 'logger' added by the trait LazyLogging protected. (#1271)Jim Lawson
The switch to using our own Logger triggered a latent bug, described in comments to #1258. Make the `val logger` introduced by the 'trait LazyLogging` protected.
2019-12-06Move --no-dedup from stage-global to firrtl-local (#1265)Schuyler Eldridge
This moves the --no-dedup option to be FIRRTL-stage specific as opposed to a global option common to all stages. Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>
2019-12-03Logger tweaks (#1190)edwardcwang
2019-11-29Merge pull request #1258 from freechipsproject/remove-old-loggerJack Koenig
Remove scala-logging fully in favor of our own logger
2019-11-29Remove scala-logging fully in favor of our own loggerJack Koenig
There was some vestigial logging that conflicts with the homebrewed logger used by most of the codebase
2019-11-19Error when blackboxing memories with unsupported masking (#1238)Abraham Gonzalez
* Types containing bundles can't generally be converted to a single mask granularity * Update ReplSeqMemTests to check for illegal masks
2019-11-19Merge pull request #1245 from freechipsproject/auto-merge-backportsAlbert Magyar
[Mergify] Automatically merge backport PRs when ready
2019-11-18[Mergify] Drop review requirement for backport PRsAlbert Magyar
2019-11-18[Mergify] Automatically merge backport PRs when readyAlbert Magyar
2019-11-18Make updated type info available in VerilogMemDelays (#1243)Albert Magyar
* Closes #1242
2019-11-18Merge pull request #1231 from freechipsproject/automate-backportsAlbert Magyar
Use Mergify to automate backporting to 1.2.x
2019-11-18Merge branch 'master' into automate-backportsAlbert Magyar
2019-11-15Merge pull request #1228 from freechipsproject/getSimpleName-considered-harmfulJack Koenig
getSimpleName considered harmful
2019-11-14Use getName instead of getSimpleNameSchuyler Eldridge
This changes uses of `getSimpleName` to `getName`. The former throws idiotic exceptions under Java 8, e.g., `getSimpleName` will fail if used on a class inside an object. This fixes a bug where any call to the `name` method of a custom transform defined inside an object (or in an environment wrapping things in objects like a REPL) will throw a malformed class name exception. E.g., if you do this and run with `-ll info` or your custom transform deletes annotations. Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>
2019-11-14Add test with Transform inside objectSchuyler Eldridge
Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>
2019-11-13Add spec for Analog type and attach statement (#1222)Albert Magyar
* Add spec for Analog type and attach statement * Describe role of attaches in partial connection algorithm * Change references that describe ground types where appropriate * Closes #1194 * Fix typo
2019-11-11Add labeling to Mergify backportingJack Koenig
2019-11-11Use Mergify to automate backporting to 1.2.xJack Koenig
2019-11-07Add check for multiple sources for same wiring pin (#1191)Jack Koenig
2019-11-06Merge pull request #1206 from freechipsproject/issue-templatesSchuyler Eldridge
Add separate Issue and PR templates
2019-11-06Add separate Issue and PR templatesSchuyler Eldridge
Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>
2019-11-05Move CheckResets after CheckCombLoops (#1224)Jack Koenig
Recursive literal lookup needs to be guarded against combinational loops Added a test-case to illustrate the issue when CheckResets is run before CheckCombLoops
2019-11-05Bump to 1.3-SNAPSHOT (#1221)Jack Koenig
2019-11-05Merge pull request #1211 from freechipsproject/serialization-utilsDavid Biancolin
Supply a trait to allow user annotations to provide JsonProtocol type hints
2019-11-04Merge branch 'master' into serialization-utilsJack Koenig
2019-11-04Ignore extmodule instances in Flatten (#1218)Albert Magyar
* Closes #1162 * Instances of extmodules remain in the final hierarchy * Extmodule definitions are not renamed or duplicated * The rest of the pass may proceed as normal
2019-11-04Add explicit EOF to top-level parser rule (#1217)Albert Magyar
* Fixes #1154 * Tests that #1154 example produces SyntaxErrorsException * Generally helps catch trailing syntax errors * Performance-neutral relative to previous grammar * Recommended by antlr4 devs, can help performance in some cases * See antlr/antlr4#1540
2019-10-31Merge pull request #1219 from freechipsproject/ifdef-initial-blockJack Koenig
Guard initial blocks in emitted Verilog with `ifndef SYNTHESIS
2019-10-31Guard initial blocks in emitted Verilog with `ifndef SYNTHESISJack Koenig
2019-10-31Merge pull request #1216 from freechipsproject/find-instsAlbert Magyar
Change findInstancesInHierarchy to return implicit top instance
2019-10-30Add some simple tests to demonstrate how to provide type hintsDavid Biancolin
2019-10-29Remove an unneeded castDavid Biancolin
2019-10-29Some cleanupDavid Biancolin
2019-10-29Update src/main/scala/firrtl/annotations/JsonProtocol.scalaDavid Biancolin
Co-Authored-By: Jack Koenig <koenig@sifive.com>
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