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2016-09-25Merge pull request #260 from ucb-bar/mem_latency_pipesDonggyu
Mem latency pipes
2016-09-25offload latency pipe generation for memories from VerilogEmitterDonggyu Kim
discussed with @azidar
2016-09-25more readable verilog generation for register updatesDonggyu Kim
2016-09-25Merge pull request #316 from ucb-bar/style-cleanup-take-3Donggyu
Style cleanup take 3
2016-09-25Syntactic sugar says use (A, B) instead of Tuple2[A, B]chick
2016-09-25use sys.error instead of deprecated errorchick
2016-09-25stuff like this mutable.LinkedHashMap needs the mutable prefixchick
2016-09-25remove unnecessary blockschick
example 1 s"${x}" example 2 case blah => { ??? }
2016-09-25implicit functions should specify return typechick
2016-09-25 use name parameter when calling a function with boolean constantchick
2016-09-25Change file name ReplacesSubAccesses ReplaceAccesschick
2016-09-25convert all occurencess of BigInt == Int to BigInt == BigIntchick
2016-09-25Fix Anonymous function convertible to a method valuechick
if methods has parens, then referencing without parens is a method value, you don't need following underscore
2016-09-25Minor fixes, typo in wordchick
missing declarations in scala doc
2016-09-25Use empty-parens as appropriate for f: => Unit callschick
2016-09-25Update README.mdAdam Izraelevitz
2016-09-23Update Verilator on Travis to 3.886 (#315)Jack Koenig
2016-09-23use .count instead of filter and sizechick
2016-09-23Use parens on Unit methodschick
2016-09-23use .isEmpty, .nonEmpty, isDefinedchick
2016-09-23use .indiceschick
2016-09-23use .head instead of (0)chick
2016-09-22Fixed width inference for add, sub (#312)Adam Izraelevitz
Fixes #308 Fixes #193
2016-09-21Fix clock connections in InferReadWrite (#310)Donggyu
2016-09-21Merge pull request #306 from ucb-bar/refactor_mem_passesDonggyu
Style Fixes for Memory Passes
2016-09-21swap functions in MemPortUtils and MemTransformUtils properly for further ↵Donggyu Kim
refactoring
2016-09-21refactor AnnotateValidMemConfigsDonggyu Kim
2016-09-21refactor ReplaceMemMacrosDonggyu Kim
2016-09-21refactor UpdateDuplicateMemMacrosDonggyu Kim
2016-09-21clean up ReplSeqMemDonggyu Kim
2016-09-21refactor AnnotateMemMacrosDonggyu Kim
2016-09-21refactor InferReadWriteDonggyu Kim
2016-09-21generalize Analysis.getConnects for code resuseDonggyu Kim
2016-09-16fill empty module body with "begin end" (#305)Yunsup Lee
* fill empty module body with "begin end" apparently vivado treats an empty module as a black box and triggers an error * Changed empty module to use always @(*) begin end
2016-09-15Fix non-determinism bug in ExpandWhens (#303)Jack Koenig
Despite the fact that LinkedHashMaps preserve insertion order in traversal, it appears that .keys and .keySet return Sets that do not provide the same guarantee
2016-09-15Merge pull request #302 from ucb-bar/fix_more_stylesDonggyu
Style Fixes for Compiler, LoweringCompiler, WIR
2016-09-14fix spaces in WIR.scalaDonggyu Kim
2016-09-14style fixes for Compiler.scala, LoweringCompiler.scalaDonggyu Kim
2016-09-14Fix for more general case of getConnectOrigin with reg feedback (#301)Angie Wang
2016-09-14Added Rob.fir for regression testing (#258)Donggyu
2016-09-14fix enable signal inferecne for smems' read ports (#289)Donggyu
2016-09-14Fixed infinite loop for finding connect origin in ReplSeqMem (#300)Angie Wang
* Addressed the fact that a node can be connected to itself (updating reg)
2016-09-13Fix a lurking width-inference bug; improve adjacent style (#298)Andrew Waterman
ceil(log(x) / log(2)) does not, in general, round to ceil(log2(x)). I noticed this because of #297.
2016-09-13Merge pull request #291 from ucb-bar/case_object_WVoid_WInvalidDonggyu
Case object for WVoid WInvalid
2016-09-13cache IntWidths to avoid redudant object creations (#290)Donggyu
2016-09-13use case object for Kind (#267)Donggyu
use case object for Kind
2016-09-13use BoolType for UIntType(IntWidth(1))Donggyu Kim
2016-09-13remove VIndentDonggyu Kim
2016-09-13use case object for WVoid, WInvalidDonggyu Kim
2016-09-13cache IntWidths to avoid redudant object creationsDonggyu Kim
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