4 files changed, 14 insertions, 14 deletions
diff --git a/test/passes/remove-accesses/bundle-vecs.fir b/test/passes/remove-accesses/bundle-vecs.fir
index 13f9d8d6..e916bfa8 100644
--- a/test/passes/remove-accesses/bundle-vecs.fir
+++ b/test/passes/remove-accesses/bundle-vecs.fir
@@ -29,10 +29,10 @@ circuit top :
 ; CHECK: a[1].x <= UInt("h1")
 ; CHECK: a[1].y <= UInt("h1")
 ; CHECK: wire b : { x : UInt<32>, flip y : UInt<32>}
-; CHECK: wire GEN : UInt<32>
-; CHECK: GEN <= a[0].x
-; CHECK: when eqv(UInt("h1"), i) : GEN <= a[1].x
-; CHECK: b.x <= GEN
+; CHECK: wire GEN_0 : UInt<32>
+; CHECK: GEN_0 <= a[0].x
+; CHECK: when eqv(UInt("h1"), i) : GEN_0 <= a[1].x
+; CHECK: b.x <= GEN_0
 ; CHECK: wire GEN_1 : UInt<32>
 ; CHECK: when eqv(UInt("h0"), i) : a[0].y <= GEN_1
 ; CHECK: when eqv(UInt("h1"), i) : a[1].y <= GEN_1
diff --git a/test/passes/remove-accesses/simple3.fir b/test/passes/remove-accesses/simple3.fir
index c7d00aff..b19c4130 100644
--- a/test/passes/remove-accesses/simple3.fir
+++ b/test/passes/remove-accesses/simple3.fir
@@ -12,10 +12,10 @@ circuit top :
       m[i] <= a
       a <= in
 
-;CHECK: wire GEN : UInt<32>
-;CHECK: when eqv(UInt("h0"), i) : m[0] <= GEN
-;CHECK: when eqv(UInt("h1"), i) : m[1] <= GEN
-;CHECK: GEN <= a
+;CHECK: wire GEN_0 : UInt<32>
+;CHECK: when eqv(UInt("h0"), i) : m[0] <= GEN_0
+;CHECK: when eqv(UInt("h1"), i) : m[1] <= GEN_0
+;CHECK: GEN_0 <= a
 
 ;CHECK: Finished Remove Accesses
 
diff --git a/test/passes/remove-accesses/simple4.fir b/test/passes/remove-accesses/simple4.fir
index 4772c549..06ff7481 100644
--- a/test/passes/remove-accesses/simple4.fir
+++ b/test/passes/remove-accesses/simple4.fir
@@ -12,9 +12,9 @@ circuit top :
       m[1].y <= UInt("h1")
       m[i].x <= in.x
 
-;CHECK: when eqv(UInt("h0"), i) : m[0].x <= GEN
-;CHECK: when eqv(UInt("h1"), i) : m[1].x <= GEN
-;CHECK: GEN <= in
+;CHECK: when eqv(UInt("h0"), i) : m[0].x <= GEN_0
+;CHECK: when eqv(UInt("h1"), i) : m[1].x <= GEN_0
+;CHECK: GEN_0 <= in
 ;CHECK: Finished Remove Accesses
 ;CHECK: Done!
 
diff --git a/test/passes/remove-accesses/simple5.fir b/test/passes/remove-accesses/simple5.fir
index 099f020c..0a1baed6 100644
--- a/test/passes/remove-accesses/simple5.fir
+++ b/test/passes/remove-accesses/simple5.fir
@@ -14,8 +14,8 @@ circuit top :
          o <= m[i] 
 
 ;CHECK: when i :
-;CHECK: GEN <= m[0]
-;CHECK: when eqv(UInt("h1"), i) : GEN <= m[1]
-;CHECK: o <= GEN
+;CHECK: GEN_0 <= m[0]
+;CHECK: when eqv(UInt("h1"), i) : GEN_0 <= m[1]
+;CHECK: o <= GEN_0
 ;CHECK: Finished Remove Accesses
 ;CHECK: Done!