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-rw-r--r--test/errors/width/SmallWidth.fir12
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diff --git a/test/errors/width/SmallWidth.fir b/test/errors/width/SmallWidth.fir
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-; RUN: firrtl -i %s -o %s.v -X verilog -p ciwT 2>&1 | tee %s.out | FileCheck %s
-; CHECK: Width too small for UIntValue.
-
-circuit Top :
- module Top :
- output z : UInt
-
- z <= add(UInt<4>("h121"),UInt<3>("h13333"))
-
-
-
-