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Diffstat (limited to 'test/chisel3/Stack.fir')
| -rw-r--r-- | test/chisel3/Stack.fir | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/test/chisel3/Stack.fir b/test/chisel3/Stack.fir index 84cb6ccd..caa70da5 100644 --- a/test/chisel3/Stack.fir +++ b/test/chisel3/Stack.fir @@ -1,4 +1,4 @@ -; RUN: firrtl -i %s -o %s.flo -X flo -p c | tee %s.out | FileCheck %s +; RUN: firrtl -i %s -o %s.v -X verilog -p c | tee %s.out | FileCheck %s ;CHECK: Done! circuit Stack : @@ -9,7 +9,7 @@ circuit Stack : output dataOut : UInt<32> input dataIn : UInt<32> - mem stack_mem : UInt<32>[16] + cmem stack_mem : UInt<32>[16] reg sp : UInt<5> on-reset sp := UInt<5>(0) reg out : UInt<32> |