diff options
Diffstat (limited to 'src')
| -rw-r--r-- | src/main/scala/firrtl/Compiler.scala | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/src/main/scala/firrtl/Compiler.scala b/src/main/scala/firrtl/Compiler.scala index cf2fc43d..08ff421f 100644 --- a/src/main/scala/firrtl/Compiler.scala +++ b/src/main/scala/firrtl/Compiler.scala @@ -86,11 +86,13 @@ object VerilogCompiler extends Compiler { InferTypes, ResolveGenders, InferWidths, - SplitExp, + RemoveValidIf, ConstProp, + PadWidths, + VerilogWrap, + SplitExpressions, CommonSubexpressionElimination, DeadCodeElimination, - VerilogWrap, VerilogRename ) def run(c: Circuit, w: Writer) |