diff options
Diffstat (limited to 'src')
| -rw-r--r-- | src/main/stanza/ir-utils.stanza | 8 | ||||
| -rw-r--r-- | src/main/stanza/passes.stanza | 11 |
2 files changed, 8 insertions, 11 deletions
diff --git a/src/main/stanza/ir-utils.stanza b/src/main/stanza/ir-utils.stanza index 7201b8ed..9c997f39 100644 --- a/src/main/stanza/ir-utils.stanza +++ b/src/main/stanza/ir-utils.stanza @@ -339,12 +339,12 @@ defmethod print (o:OutputStream, t:Type) : print(o, "Clock") (t:UIntType) : match(width(t)) : - (w:UnknownWidth) : print-all(o, ["UInt"]) - (w) : print-all(o, ["UInt<" width(t) ">"]) + (w:IntWidth) : print-all(o, ["UInt<" width(t) ">"]) + (w) : print-all(o, ["UInt"]) (t:SIntType) : match(width(t)) : - (w:UnknownWidth) : print-all(o, ["SInt"]) - (w) : print-all(o, ["SInt<" width(t) ">"]) + (w:IntWidth) : print-all(o, ["SInt<" width(t) ">"]) + (w) : print-all(o, ["SInt"]) (t:BundleType) : print(o, "{") print-all(o, join(fields(t), ", ")) diff --git a/src/main/stanza/passes.stanza b/src/main/stanza/passes.stanza index 01ec034c..14e3e75d 100644 --- a/src/main/stanza/passes.stanza +++ b/src/main/stanza/passes.stanza @@ -298,7 +298,7 @@ defmethod print-debug (o:OutputStream, e:Expression|Stmt|Type|Port|Field|Module| match(t) : (t:UIntType) : UIntType(UnknownWidth()) (t:SIntType) : SIntType(UnknownWidth()) - (t) : t + (t) : map(wipe-width,t) if any-debug?(e) : print(o,"@") if PRINT-KINDS and hasKind(e) : print-all(o,["<k:" kind(e as ?) ">"]) @@ -727,9 +727,7 @@ defn infer-types (c:Circuit) -> Circuit : (e:DoPrim) : set-primop-type(e) (e:UIntValue|SIntValue) : e defn infer-types-s (s:Stmt) -> Stmt : - map{infer-types-e,_} $ map(infer-types-s,s) - defn build-types (s:Stmt) -> Stmt : - match(s) : + match(map(infer-types-e,s)) : (s:DefWire|DefPoison|DefRegister|DefNode) : val t = remove-unknowns(get-type(s)) types[name(s)] = t @@ -742,13 +740,12 @@ defn infer-types (c:Circuit) -> Circuit : (s:WDefInstance) : types[name(s)] = module-types[module(s)] WDefInstance(info(s),name(s),module(s),module-types[module(s)]) - (s) : map(build-types,s) + (s) : map(infer-types-s,s) for p in ports(m) do : types[name(p)] = type(p) match(m) : (m:InModule) : - val s* = build-types(body(m)) - InModule(info(m),name(m),ports(m),infer-types-s(s*)) + InModule(info(m),name(m),ports(m),infer-types-s(body(m))) (m:ExModule) : m ; MAIN |