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-rw-r--r--src/test/scala/firrtlTests/ReplSeqMemTests.scala2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/test/scala/firrtlTests/ReplSeqMemTests.scala b/src/test/scala/firrtlTests/ReplSeqMemTests.scala
index 3f911fea..57a274c2 100644
--- a/src/test/scala/firrtlTests/ReplSeqMemTests.scala
+++ b/src/test/scala/firrtlTests/ReplSeqMemTests.scala
@@ -17,7 +17,7 @@ class ReplSeqMemSpec extends SimpleTransformSpec {
new EmitFirrtl(writer)
)
- "ReplSeqMem" should "generated blackbox wrappers (no wmask, r, w ports)" in {
+ "ReplSeqMem" should "generate blackbox wrappers (no wmask, r, w ports)" in {
val input = """
circuit sram6t :
module sram6t :