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-rw-r--r--src/main/scala/firrtl/annotations/MemoryInitAnnotation.scala35
1 files changed, 35 insertions, 0 deletions
diff --git a/src/main/scala/firrtl/annotations/MemoryInitAnnotation.scala b/src/main/scala/firrtl/annotations/MemoryInitAnnotation.scala
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+++ b/src/main/scala/firrtl/annotations/MemoryInitAnnotation.scala
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+// See LICENSE for license details.
+
+package firrtl.annotations
+
+import firrtl.{MemoryArrayInit, MemoryEmissionOption, MemoryInitValue, MemoryRandomInit, MemoryScalarInit}
+
+/**
+ * Represents the initial value of the annotated memory.
+ * While not supported on normal ASIC flows, it can be useful for simulation and FPGA flows.
+ * This annotation is consumed by the verilog emitter.
+ */
+sealed trait MemoryInitAnnotation extends SingleTargetAnnotation[ReferenceTarget] with MemoryEmissionOption {
+ def isRandomInit: Boolean
+}
+
+/** Randomly initialize the `target` memory. This is the same as the default behavior. */
+case class MemoryRandomInitAnnotation(target: ReferenceTarget) extends MemoryInitAnnotation {
+ override def duplicate(n: ReferenceTarget): Annotation = copy(n)
+ override def initValue: MemoryInitValue = MemoryRandomInit
+ override def isRandomInit: Boolean = true
+}
+
+/** Initialize all entries of the `target` memory with the scalar `value`. */
+case class MemoryScalarInitAnnotation(target: ReferenceTarget, value: BigInt) extends MemoryInitAnnotation {
+ override def duplicate(n: ReferenceTarget): Annotation = copy(n)
+ override def initValue: MemoryInitValue = MemoryScalarInit(value)
+ override def isRandomInit: Boolean = false
+}
+
+/** Initialize the `target` memory with the array of `values` which must be the same size as the memory depth. */
+case class MemoryArrayInitAnnotation(target: ReferenceTarget, values: Seq[BigInt]) extends MemoryInitAnnotation {
+ override def duplicate(n: ReferenceTarget): Annotation = copy(n)
+ override def initValue: MemoryInitValue = MemoryArrayInit(values)
+ override def isRandomInit: Boolean = false
+} \ No newline at end of file