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authorjackbackrack2015-04-30 10:50:55 -0700
committerjackbackrack2015-04-30 10:50:55 -0700
commit837c418b9899a43e2927738262fd39301661eeb3 (patch)
tree7a7d894d1eb16e5dc63899a09476d7883fd3c726 /test
parent8bd45aa18687f035ff9590ae631ed670fc4a1d90 (diff)
parenta0834153e1e5a506dc66d8d792f6f9594052b546 (diff)
merge
Diffstat (limited to 'test')
-rw-r--r--test/passes/jacktest/Counter.fir17
1 files changed, 17 insertions, 0 deletions
diff --git a/test/passes/jacktest/Counter.fir b/test/passes/jacktest/Counter.fir
new file mode 100644
index 00000000..839a8590
--- /dev/null
+++ b/test/passes/jacktest/Counter.fir
@@ -0,0 +1,17 @@
+; RUN: firrtl -i %s -o %s.flo -x X -p cTwd | tee %s.out | FileCheck %s
+; CHECK: Done!
+
+circuit Counter :
+ module Counter :
+ input inc : UInt<1>
+ output tot : UInt<8>
+ input amt : UInt<4>
+
+ reg T_13 : UInt<8>
+ on-reset T_13 := Pad(UInt<8>(0),?)
+ when inc :
+ node T_14 = add-wrap(Pad(T_13,?), Pad(amt,?))
+ node T_15 = gt(Pad(T_14,?), Pad(UInt<8>(255),?))
+ node T_16 = mux(Pad(T_15,?), Pad(UInt<1>(0),?), Pad(T_14,?))
+ T_13 := Pad(T_16,?)
+ tot := Pad(T_13,?)