From a0834153e1e5a506dc66d8d792f6f9594052b546 Mon Sep 17 00:00:00 2001
From: azidar
Date: Thu, 30 Apr 2015 10:48:19 -0700
Subject: Fixed assignment to outputs not getting emitted from Expand When pass

---
 test/passes/jacktest/Counter.fir | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)
 create mode 100644 test/passes/jacktest/Counter.fir

(limited to 'test')

diff --git a/test/passes/jacktest/Counter.fir b/test/passes/jacktest/Counter.fir
new file mode 100644
index 00000000..839a8590
--- /dev/null
+++ b/test/passes/jacktest/Counter.fir
@@ -0,0 +1,17 @@
+; RUN: firrtl -i %s -o %s.flo -x X -p cTwd | tee %s.out | FileCheck %s
+; CHECK: Done!
+
+circuit Counter : 
+  module Counter : 
+    input inc : UInt<1>
+    output tot : UInt<8>
+    input amt : UInt<4>
+    
+    reg T_13 : UInt<8>
+    on-reset T_13 := Pad(UInt<8>(0),?)
+    when inc : 
+      node T_14 = add-wrap(Pad(T_13,?), Pad(amt,?))
+      node T_15 = gt(Pad(T_14,?), Pad(UInt<8>(255),?))
+      node T_16 = mux(Pad(T_15,?), Pad(UInt<1>(0),?), Pad(T_14,?))
+      T_13 := Pad(T_16,?)
+    tot := Pad(T_13,?)
-- 
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