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| author | azidar | 2016-01-25 11:29:45 -0800 |
|---|---|---|
| committer | azidar | 2016-01-25 11:29:45 -0800 |
| commit | f6ea3dc1bb5efb4455fd3b995ced36add85a44c0 (patch) | |
| tree | dbc0135e3a4ef0ac387fa9fe02b6f7bba2d4dbe5 /test/passes/split-exp | |
| parent | a637f4f0cedadf5e81fc9d9d3b1392daf99db603 (diff) | |
Changed tests to pass with change to postfix of generated name
Diffstat (limited to 'test/passes/split-exp')
| -rw-r--r-- | test/passes/split-exp/split-in-when.fir | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/test/passes/split-exp/split-in-when.fir b/test/passes/split-exp/split-in-when.fir index 69e2b96e..e4d0da36 100644 --- a/test/passes/split-exp/split-in-when.fir +++ b/test/passes/split-exp/split-in-when.fir @@ -13,8 +13,8 @@ circuit Top : when bit(subw(a,c),3) : out <= mux(eqv(bits(UInt(32),4,0),UInt(13)),addw(a,addw(b,c)),subw(c,b)) -;CHECK: node GEN = subw(a, c) -;CHECK: node GEN_1 = bit(GEN, 3) +;CHECK: node GEN_0 = subw(a, c) +;CHECK: node GEN_1 = bit(GEN_0, 3) ;CHECK: node GEN_2 = eqv(UInt("h0"), UInt("hd")) ;CHECK: node GEN_3 = addw(b, c) ;CHECK: node GEN_4 = addw(a, GEN_3) |