Rewrote the initialize-register pass, now correctly implemented

with a new IR construct - Null. LetRec is not implemented, but is
marked with a TODO.

Test cases for this pass are now located in
test/passes/initialize-register

1 files changed, 48 insertions, 0 deletions

diff --git a/test/passes/resolve-kinds/ab.fir b/test/passes/resolve-kinds/ab.fir
new file mode 100644
index 00000000..e6f28c21
--- /dev/null
+++ b/test/passes/resolve-kinds/ab.fir
@@ -0,0 +1,48 @@
+; RUN: firrtl %s ab | tee %s.out | FileCheck %s
+
+circuit top :
+   module subtracter :
+      input x : UInt
+      input y : UInt
+      output z : UInt
+      z := sub-mod(x, y)
+; CHECK: port:z := sub-mod(port:x, port:y)
+   module gcd :
+      input a : UInt(16)
+      input b : UInt(16)
+      input e : UInt(1)
+      output z : UInt(16)
+      output v : UInt(1)
+      reg x : UInt
+      reg y : UInt
+      x.init := UInt(0)
+      y.init := UInt(42)
+      when greater(x, y) :
+         inst s of subtracter
+         s.x := x
+; CHECK: inst:s.x := reg:x
+         s.y := y
+         x := s.z
+      else :
+         inst s2 of subtracter
+         s2.x := x
+         s2.y := y
+         y := s2.z
+      when e :
+         x := a
+         y := b
+      v := equal(v, UInt(0))
+      z := x
+   module top :
+      input a : UInt(16)
+      input b : UInt(16)
+      output z : UInt
+      inst i of gcd
+; CHECK: inst i of module:gcd
+      i.a := a
+      i.b := b
+      i.e := UInt(1)
+      z := i.z
+; CHECK: port:z := inst:i.z
+
+