Updated tests to pipe from stderr to stdout

15 files changed, 15 insertions, 15 deletions

diff --git a/test/passes/jacktest/ALUTop.fir b/test/passes/jacktest/ALUTop.fir
index bc803e97..a8dbe4c7 100644
--- a/test/passes/jacktest/ALUTop.fir
+++ b/test/passes/jacktest/ALUTop.fir
@@ -1,4 +1,4 @@
-; RUN: firrtl -i %s -o %s.flo -X flo -p c | tee %s.out | FileCheck %s
+; RUN: firrtl -i %s -o %s.flo -X flo -p c 2>&1 | tee %s.out | FileCheck %s
 ;CHECK: Done!
 circuit ALUTop : 
   module ALU : 
diff --git a/test/passes/jacktest/ComplexAssign.fir b/test/passes/jacktest/ComplexAssign.fir
index 8e508d7d..157d96e4 100644
--- a/test/passes/jacktest/ComplexAssign.fir
+++ b/test/passes/jacktest/ComplexAssign.fir
@@ -1,4 +1,4 @@
-; RUN: firrtl -i %s -o %s.flo -X flo -p c | tee %s.out | FileCheck %s
+; RUN: firrtl -i %s -o %s.flo -X flo -p c 2>&1 | tee %s.out | FileCheck %s
 ;CHECK: Done!
 circuit ComplexAssign : 
   module ComplexAssign : 
diff --git a/test/passes/jacktest/Counter.fir b/test/passes/jacktest/Counter.fir
index 65efb47f..e19cc0d8 100644
--- a/test/passes/jacktest/Counter.fir
+++ b/test/passes/jacktest/Counter.fir
@@ -1,4 +1,4 @@
-; RUN: firrtl -i %s -o %s.flo -X flo -p c | tee %s.out | FileCheck %s
+; RUN: firrtl -i %s -o %s.flo -X flo -p c 2>&1 | tee %s.out | FileCheck %s
 ;CHECK: Done!
 circuit Counter : 
   module Counter : 
diff --git a/test/passes/jacktest/EnableShiftRegister.fir b/test/passes/jacktest/EnableShiftRegister.fir
index 4e0387d0..531f71b2 100644
--- a/test/passes/jacktest/EnableShiftRegister.fir
+++ b/test/passes/jacktest/EnableShiftRegister.fir
@@ -1,4 +1,4 @@
-; RUN: firrtl -i %s -o %s.flo -X flo -p c | tee %s.out | FileCheck %s
+; RUN: firrtl -i %s -o %s.flo -X flo -p c 2>&1 | tee %s.out | FileCheck %s
 ;CHECK: Done!
 circuit EnableShiftRegister : 
   module EnableShiftRegister : 
diff --git a/test/passes/jacktest/LFSR16.fir b/test/passes/jacktest/LFSR16.fir
index 9baa05a6..f72c994c 100644
--- a/test/passes/jacktest/LFSR16.fir
+++ b/test/passes/jacktest/LFSR16.fir
@@ -1,4 +1,4 @@
-; RUN: firrtl -i %s -o %s.flo -X flo -p c | tee %s.out | FileCheck %s
+; RUN: firrtl -i %s -o %s.flo -X flo -p c 2>&1 | tee %s.out | FileCheck %s
 ;CHECK: Done!
 circuit LFSR16 : 
   module LFSR16 : 
diff --git a/test/passes/jacktest/MemorySearch.fir b/test/passes/jacktest/MemorySearch.fir
index ca530ea2..2b965f3d 100644
--- a/test/passes/jacktest/MemorySearch.fir
+++ b/test/passes/jacktest/MemorySearch.fir
@@ -1,4 +1,4 @@
-; RUN: firrtl -i %s -o %s.flo -X flo -p c | tee %s.out | FileCheck %s
+; RUN: firrtl -i %s -o %s.flo -X flo -p c 2>&1 | tee %s.out | FileCheck %s
 ;CHECK: Done!
 circuit MemorySearch : 
   module MemorySearch : 
diff --git a/test/passes/jacktest/ModuleVec.fir b/test/passes/jacktest/ModuleVec.fir
index 2fde69f3..5f8d57a8 100644
--- a/test/passes/jacktest/ModuleVec.fir
+++ b/test/passes/jacktest/ModuleVec.fir
@@ -1,4 +1,4 @@
-; RUN: firrtl -i %s -o %s.flo -X flo -p c | tee %s.out | FileCheck %s
+; RUN: firrtl -i %s -o %s.flo -X flo -p c 2>&1 | tee %s.out | FileCheck %s
 ;CHECK: Done!
 circuit ModuleVec : 
   module PlusOne : 
diff --git a/test/passes/jacktest/Mul.fir b/test/passes/jacktest/Mul.fir
index 1552e959..0e868d7a 100644
--- a/test/passes/jacktest/Mul.fir
+++ b/test/passes/jacktest/Mul.fir
@@ -1,4 +1,4 @@
-; RUN: firrtl -i %s -o %s.flo -X flo -p c | tee %s.out | FileCheck %s
+; RUN: firrtl -i %s -o %s.flo -X flo -p c 2>&1 | tee %s.out | FileCheck %s
 ;CHECK: Done!
 circuit Mul : 
   module Mul : 
diff --git a/test/passes/jacktest/RegisterVecShift.fir b/test/passes/jacktest/RegisterVecShift.fir
index cca645d1..c87f38ac 100644
--- a/test/passes/jacktest/RegisterVecShift.fir
+++ b/test/passes/jacktest/RegisterVecShift.fir
@@ -1,4 +1,4 @@
-; RUN: firrtl -i %s -o %s.flo -X flo -p c | tee %s.out | FileCheck %s
+; RUN: firrtl -i %s -o %s.flo -X flo -p c 2>&1 | tee %s.out | FileCheck %s
 ;CHECK: Done!
 circuit RegisterVecShift : 
   module RegisterVecShift : 
diff --git a/test/passes/jacktest/Rom.fir b/test/passes/jacktest/Rom.fir
index 3c70c670..2878f2d9 100644
--- a/test/passes/jacktest/Rom.fir
+++ b/test/passes/jacktest/Rom.fir
@@ -1,4 +1,4 @@
-; RUN: firrtl -i %s -o %s.flo -X flo -p c | tee %s.out | FileCheck %s
+; RUN: firrtl -i %s -o %s.flo -X flo -p c 2>&1 | tee %s.out | FileCheck %s
 ;CHECK: Done!
 circuit Rom : 
   module Rom : 
diff --git a/test/passes/jacktest/Stack.fir b/test/passes/jacktest/Stack.fir
index 5bbec6d2..f3fd331b 100644
--- a/test/passes/jacktest/Stack.fir
+++ b/test/passes/jacktest/Stack.fir
@@ -1,4 +1,4 @@
-; RUN: firrtl -i %s -o %s.flo -X flo -p c | tee %s.out | FileCheck %s
+; RUN: firrtl -i %s -o %s.flo -X flo -p c 2>&1 | tee %s.out | FileCheck %s
 ;CHECK: Done!
 circuit Stack : 
   module Stack : 
diff --git a/test/passes/jacktest/Tbl.fir b/test/passes/jacktest/Tbl.fir
index b916e0f0..472a2e5a 100644
--- a/test/passes/jacktest/Tbl.fir
+++ b/test/passes/jacktest/Tbl.fir
@@ -1,4 +1,4 @@
-; RUN: firrtl -i %s -o %s.flo -X flo -p c | tee %s.out | FileCheck %s
+; RUN: firrtl -i %s -o %s.flo -X flo -p c 2>&1 | tee %s.out | FileCheck %s
 ;CHECK: Done!
 circuit Tbl : 
   module Tbl : 
diff --git a/test/passes/jacktest/VendingMachine.fir b/test/passes/jacktest/VendingMachine.fir
index 0f4bf941..54fe9c48 100644
--- a/test/passes/jacktest/VendingMachine.fir
+++ b/test/passes/jacktest/VendingMachine.fir
@@ -1,4 +1,4 @@
-; RUN: firrtl -i %s -o %s.flo -X flo -p c | tee %s.out | FileCheck %s
+; RUN: firrtl -i %s -o %s.flo -X flo -p c 2>&1 | tee %s.out | FileCheck %s
 ;CHECK: Done!
 circuit VendingMachine : 
   module VendingMachine : 
diff --git a/test/passes/jacktest/gcd.fir b/test/passes/jacktest/gcd.fir
index f3f12017..6dc9beac 100644
--- a/test/passes/jacktest/gcd.fir
+++ b/test/passes/jacktest/gcd.fir
@@ -1,4 +1,4 @@
-; RUN: firrtl -i %s -o %s.flo -X flo -p c | tee %s.out | FileCheck %s
+; RUN: firrtl -i %s -o %s.flo -X flo -p c 2>&1 | tee %s.out | FileCheck %s
 ;CHECK: Done!
 circuit GCD : 
   module GCD : 
diff --git a/test/passes/jacktest/risc.fir b/test/passes/jacktest/risc.fir
index fda21820..3b58fb81 100644
--- a/test/passes/jacktest/risc.fir
+++ b/test/passes/jacktest/risc.fir
@@ -1,4 +1,4 @@
-; RUN: firrtl -i %s -o %s.flo -X flo -p c | tee %s.out | FileCheck %s
+; RUN: firrtl -i %s -o %s.flo -X flo -p c 2>&1 | tee %s.out | FileCheck %s
 ; CHECK: Done!
 circuit Risc : 
   module Risc :