aboutsummaryrefslogtreecommitdiff
path: root/test/passes/jacktest/MemorySearch.fir
diff options
context:
space:
mode:
authorazidar2015-04-27 11:14:06 -0700
committerazidar2015-04-27 11:14:06 -0700
commit2d2120a05549a5d31072aa792dc96fb7e6e7c629 (patch)
tree900e95aecdd6af6dc0e62a889ab2b81c8b4d2f80 /test/passes/jacktest/MemorySearch.fir
parent55a4ce521e06aa51aa005eb37c47918c0eece57c (diff)
Added on-reset
Diffstat (limited to 'test/passes/jacktest/MemorySearch.fir')
-rw-r--r--test/passes/jacktest/MemorySearch.fir50
1 files changed, 25 insertions, 25 deletions
diff --git a/test/passes/jacktest/MemorySearch.fir b/test/passes/jacktest/MemorySearch.fir
index 955d44f2..60b62ac7 100644
--- a/test/passes/jacktest/MemorySearch.fir
+++ b/test/passes/jacktest/MemorySearch.fir
@@ -3,43 +3,43 @@
circuit MemorySearch :
module MemorySearch :
- input target : UInt(4)
- output address : UInt(3)
- input en : UInt(1)
- output done : UInt(1)
+ input target : UInt<4>
+ output address : UInt<3>
+ input en : UInt<1>
+ output done : UInt<1>
- node T_35 = UInt(0, 3)
- reg index : UInt(3)
- index.init := T_35
- node T_36 = UInt(0, 1)
- node T_37 = UInt(4, 3)
- node T_38 = UInt(15, 4)
- node T_39 = UInt(14, 4)
- node T_40 = UInt(2, 2)
- node T_41 = UInt(5, 3)
- node T_42 = UInt(13, 4)
- wire elts : UInt(1)[7]
- elts.0 := Pad(T_36,?)
- elts.1 := Pad(T_37,?)
- elts.2 := Pad(T_38,?)
- elts.3 := Pad(T_39,?)
- elts.4 := Pad(T_40,?)
- elts.5 := Pad(T_41,?)
- elts.6 := Pad(T_42,?)
+ node T_35 = UInt<3>(0)
+ reg index : UInt<3>
+ on-reset index := T_35
+ node T_36 = UInt<1>(0)
+ node T_37 = UInt<3>(4)
+ node T_38 = UInt<4>(15)
+ node T_39 = UInt<4>(14)
+ node T_40 = UInt<2>(2)
+ node T_41 = UInt<3>(5)
+ node T_42 = UInt<4>(13)
+ wire elts : UInt<1>[7]
+ elts[0] := Pad(T_36,?)
+ elts[1] := Pad(T_37,?)
+ elts[2] := Pad(T_38,?)
+ elts[3] := Pad(T_39,?)
+ elts[4] := Pad(T_40,?)
+ elts[5] := Pad(T_41,?)
+ elts[6] := Pad(T_42,?)
accessor elt = elts[index]
node T_43 = bit-not(en)
node T_44 = eq(Pad(elt,?), Pad(target,?))
- node T_45 = UInt(7, 3)
+ node T_45 = UInt<3>(7)
node T_46 = eq(Pad(index,?), Pad(T_45,?))
node T_47 = bit-or(T_44, T_46)
node end = bit-and(T_43, T_47)
when en :
- node T_48 = UInt(0, 1)
+ node T_48 = UInt<1>(0)
index := Pad(T_48,?)
else :
node T_49 = bit-not(end)
when T_49 :
- node T_50 = UInt(1, 1)
+ node T_50 = UInt<1>(1)
node T_51 = add-wrap(Pad(index,?), Pad(T_50,?))
index := Pad(T_51,?)
done := Pad(end,?)