Fixed a bunch of tests, and minor bugs

3 files changed, 6 insertions, 6 deletions

diff --git a/test/errors/high-form/Flip-Mem.fir b/test/errors/high-form/Flip-Mem.fir
index ebc3ddbf..a8cb67ca 100644
--- a/test/errors/high-form/Flip-Mem.fir
+++ b/test/errors/high-form/Flip-Mem.fir
@@ -1,6 +1,5 @@
 ; RUN: firrtl -i %s -o %s.v -X verilog -p c 2>&1 | tee %s.out | FileCheck %s
 ; CHECK: Memory mc cannot be a bundle type with flips.
-; CHECK: Memory ms cannot be a bundle type with flips.
 
 circuit Flip-Mem : 
   module Flip-Mem : 
diff --git a/test/errors/high-form/InvalidSubexp.fir b/test/errors/high-form/InvalidSubexp.fir
index 23c155e2..d0ad34c0 100644
--- a/test/errors/high-form/InvalidSubexp.fir
+++ b/test/errors/high-form/InvalidSubexp.fir
@@ -1,6 +1,6 @@
 ; RUN: firrtl -i %s -o %s.v -X verilog -p c 2>&1 | tee %s.out | FileCheck %s
-; CHECK: Invalid index access to non-reference.
-; CHECK: Invalid subfield access to non-reference.
+; CHECK: Invalid access to non-reference.
+; CHECK: Invalid access to non-reference.
 
 circuit Top :
   module Top :
diff --git a/test/errors/high-form/Printf.fir b/test/errors/high-form/Printf.fir
index 7f285d3e..5580182b 100644
--- a/test/errors/high-form/Printf.fir
+++ b/test/errors/high-form/Printf.fir
@@ -4,9 +4,10 @@ circuit Top :
   module Top : 
     input x : {y : UInt<1>}
     input p : UInt<1>
-    printf("Hello World%!\n",x)
-    printf("Hello World%")
-    printf("Hello World%d %s %h %x",x,x,x)
+    input clk : Clock
+    printf(clk,p,"Hello World%!\n",x)
+    printf(clk,p,"Hello World%")
+    printf(clk,p,"Hello World%d %s %h %x",x,x,x)
 
 ;CHECK: Bad printf format: "%!"
 ;CHECK: Bad printf format: trailing "%"