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authorazidar2015-05-02 15:25:04 -0700
committerazidar2015-05-02 15:25:04 -0700
commit2006604530fb8fd214fe4e8e182bedacd71b49b3 (patch)
tree5a846b880ef8bf71a860faead945bc64d44cd4de /test/errors/high-form
parent93ba0196dc2ba88e4e34346e5fbc105743a8eaa0 (diff)
Added a infrastructure for check passes, and wrote a few
Diffstat (limited to 'test/errors/high-form')
-rw-r--r--test/errors/high-form/Flip-Mem.fir6
-rw-r--r--test/errors/high-form/Top.fir9
2 files changed, 15 insertions, 0 deletions
diff --git a/test/errors/high-form/Flip-Mem.fir b/test/errors/high-form/Flip-Mem.fir
new file mode 100644
index 00000000..67fae14f
--- /dev/null
+++ b/test/errors/high-form/Flip-Mem.fir
@@ -0,0 +1,6 @@
+; RUN: firrtl -i %s -o %s.flo -x X -p c | tee %s.out | FileCheck %s
+; CHECK: Memory m cannot be a bundle type with flips.
+
+circuit Flip-Mem :
+ module Flip-Mem :
+ mem m : {x : UInt<3>, flip y : UInt<5>}[10]
diff --git a/test/errors/high-form/Top.fir b/test/errors/high-form/Top.fir
new file mode 100644
index 00000000..1d663c9c
--- /dev/null
+++ b/test/errors/high-form/Top.fir
@@ -0,0 +1,9 @@
+
+; RUN: firrtl -i %s -o %s.flo -x X -p c | tee %s.out | FileCheck %s
+; CHECK: A single module must be named Top.
+
+circuit Top :
+ module Top1 :
+ wire x : UInt<1>
+ module Top2 :
+ wire x : UInt<1>