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-rw-r--r--.gitignore7
-rw-r--r--Makefile6
-rw-r--r--TODO1
-rw-r--r--src/main/stanza/errors.stanza139
-rw-r--r--src/main/stanza/firrtl-ir.stanza5
-rw-r--r--src/main/stanza/firrtl-main.stanza1
-rw-r--r--src/main/stanza/firrtl-test-main.stanza1
-rw-r--r--src/main/stanza/passes.stanza6
-rw-r--r--src/main/stanza/primop.stanza1
-rw-r--r--test/chisel3/Control.fir653
-rw-r--r--test/chisel3/Datapath.fir377
-rw-r--r--test/errors/high-form/Flip-Mem.fir6
-rw-r--r--test/errors/high-form/Top.fir9
-rw-r--r--test/errors/parser/Nested-Module.fir6
-rw-r--r--test/errors/parser/Statements-in-Circuit.fir5
-rw-r--r--test/syntax/letrec-non-struct.fir9
16 files changed, 1218 insertions, 14 deletions
diff --git a/.gitignore b/.gitignore
index e0cb2df0..a6993b83 100644
--- a/.gitignore
+++ b/.gitignore
@@ -9,16 +9,15 @@
*/*/*/*.swp
*/*/*.flo
*/*/*.out
+*/*/Output
*/*/*/*.flo
+*/*/*/*.out
+*/*/*/Output
src/lib/stanzam
src/lib/stanza
src/*/__MACOSX
src/main/stanza/firrtl-main
utils/bin/firrtl
-test/passes/Output
-test/passes/*/Output
-test/passes/*.out
-test/passes/*/*.out
spec/spec.aux
spec/spec.log
spec/spec.synctex.gz
diff --git a/Makefile b/Makefile
index 51d30ae1..3f3322af 100644
--- a/Makefile
+++ b/Makefile
@@ -21,8 +21,14 @@ build:
cd $(firrtl_dir) && stanza -i firrtl-test-main.stanza -o $(root_dir)/utils/bin/firrtl
check:
+ cd $(test_dir) && lit -v . --path=$(root_dir)/utils/bin/
+
+passes:
cd $(test_dir)/passes && lit -v . --path=$(root_dir)/utils/bin/
+errors:
+ cd $(test_dir)/errors && lit -v . --path=$(root_dir)/utils/bin/
+
chisel3:
cd $(test_dir)/chisel3 && lit -v . --path=$(root_dir)/utils/bin/
diff --git a/TODO b/TODO
index d651b479..d5ff2955 100644
--- a/TODO
+++ b/TODO
@@ -31,6 +31,7 @@ Well-formed high firrtl
node's value cannot be a bundle with a flip in it
mems cannot be a bundle with flips
2nd arg in dshr/l must be UInt
+ pred in conditionally must be of type UInt
After adding dynamic assertions, insert bounds check with accessor expansion
Well-formed low firrtl
All things only assigned to once
diff --git a/src/main/stanza/errors.stanza b/src/main/stanza/errors.stanza
new file mode 100644
index 00000000..43575854
--- /dev/null
+++ b/src/main/stanza/errors.stanza
@@ -0,0 +1,139 @@
+defpackage firrtl/errors :
+ import core
+ import verse
+ import firrtl/ir2
+ import firrtl/ir-utils
+ import firrtl/primops
+ import firrtl/passes
+ import firrtl-main
+
+;========== ALL CHECKS =================
+;CAUGHT IN PARSER
+; No nested modules <- parser
+; Only modules in circuit (no statements or expressions) <- parser
+
+;CAUGHT in HIGH FORM CHECK
+; Unique names per module
+; No name can be a prefix of any other name.
+; Can only connect to a Ref or Subfield or Index
+; UInt only has positive ints
+; all references are declared
+; mems cannot be a bundle with flips
+; cannot connect to Register or ReadPort
+
+;AFTER KIND RESOLUTION
+; Cannot connect directly to a mem ever
+; onreset can only handle a register
+
+;AFTER TYPE INFERENCE
+; expression in pad must be a ground type
+; Subfields are only on bundles, before type inference <- need to not error, just do unknown-type
+; node's value cannot be a bundle with a flip in it
+; 2nd arg in dshr/l must be UInt
+; pred in conditionally must be of type UInt
+; Type checking
+
+;AFTER WIDTH INFERENCE
+; No names
+; No Unknowns
+; All widths are positive
+; Pad's width is greater than value's width
+; pad's width is greater than value's width
+
+;AFTER LOWERING
+; All things connect to once
+
+; ??
+; No combinational loops
+; cannot connect to a pad, or a register. only connct to a reference
+
+definterface HighFormException <: Exception
+defn HighFormException (s:String) :
+ new HighFormException :
+ defmethod print (o:OutputStream, this) :
+ print(o, s)
+
+defn HighFormExceptions (xs:Streamable<HighFormException>) :
+ HighFormException(string-join(xs, "\n"))
+
+defn NotUnique (info:FileInfo|False, name:Symbol) :
+ HighFormException $ string-join $
+ [info ": Reference " name " does not have a unique name."]
+
+defn IsPrefix (info:FileInfo|False, name:Symbol, prefix:Symbol, dec:FileInfo|False) :
+ HighFormException $ string-join $
+ [info ": Reference " name " is an invalid name because the prefix " prefix " is declared at " dec "."]
+
+defn InvalidLOC (info:FileInfo|False) :
+ HighFormException $ string-join $
+ [info ": Invalid connect to an expression that is not a reference or a WritePort."]
+
+defn NegUInt (info:FileInfo|False) :
+ HighFormException $ string-join $
+ [info ": UInt has a negative value."]
+
+defn UndeclaredReference (info:FileInfo|False, name:Symbol) :
+ HighFormException $ string-join $
+ [info ": Reference " name " is not declared."]
+
+defn MemWithFlip (info:FileInfo|False, name:Symbol) :
+ HighFormException $ string-join $
+ [info ": Memory " name " cannot be a bundle type with flips."]
+
+defn InvalidSubfield (info:FileInfo|False, name:Symbol) :
+ HighFormException $ string-join $
+ [info ": Invalid subfield access to non-reference."]
+
+defn InvalidIndex (info:FileInfo|False, name:Symbol) :
+ HighFormException $ string-join $
+ [info ": Invalid index access to non-reference."]
+
+defn NoTopModule (info:FileInfo|False, name:Symbol) :
+ HighFormException $ string-join $
+ [info ": A single module must be named " name "."]
+
+;================ Check Helper Functions ==============
+defn has-flip? (t:Type) -> True|False :
+ var has? = false
+ defn find-flip (t:Type) -> Type :
+ match(t) :
+ (t:BundleType) :
+ for f in fields(t) do :
+ if flip(f) == REVERSE : has? = true
+ t
+ (t) : t
+ find-flip(t)
+ map(find-flip,t)
+ has?
+;================= High Form Check ==========================
+;CAUGHT in HIGH FORM CHECK
+; o Unique names per module
+; o No name can be a prefix of any other name.
+; o Can only connect to a Ref or Subfield or Index
+; o UInt only has positive ints
+; o all references are declared
+; o cannot connect to Register or ReadPort
+; * A module has the same name as main of circuit
+; * mems cannot be a bundle with flips
+
+public defn check-high-form (c:Circuit) -> Circuit :
+ val errors = Vector<HighFormException>()
+
+ defn check-high-form-s (s:Stmt) -> Stmt :
+ map{check-high-form-s,_} $ match(s) :
+ (s:DefMemory) :
+ if has-flip?(type(s)) : add(errors, MemWithFlip(info!(s), name(s)))
+ s
+ (s) : s
+ defn check-high-form-m (ms:List<Module>) -> False :
+ var number-top-m = 0
+ for m in ms do :
+ if name(m) == main(c) : number-top-m = number-top-m + 1
+ check-high-form-s(body(m))
+ if number-top-m != 1 : add(errors,NoTopModule(info!(c),main(c)))
+
+ check-high-form-m(modules(c))
+ throw(HighFormExceptions(errors)) when not empty?(errors)
+ c
+
+
diff --git a/src/main/stanza/firrtl-ir.stanza b/src/main/stanza/firrtl-ir.stanza
index 63a28211..67d2c2d9 100644
--- a/src/main/stanza/firrtl-ir.stanza
+++ b/src/main/stanza/firrtl-ir.stanza
@@ -2,6 +2,9 @@ defpackage firrtl/ir2 :
import core
import verse
+public defmulti info! (x:?) -> False
+public defmethod info! (x:?) : false
+
public definterface Direction
public val INPUT = new Direction
public val OUTPUT = new Direction
@@ -236,3 +239,5 @@ public defstruct Module :
public defstruct Circuit :
modules: List<Module>
main: Symbol
+
+
diff --git a/src/main/stanza/firrtl-main.stanza b/src/main/stanza/firrtl-main.stanza
index 92bb066f..efc6a7d0 100644
--- a/src/main/stanza/firrtl-main.stanza
+++ b/src/main/stanza/firrtl-main.stanza
@@ -8,6 +8,7 @@
#include("ir-parser.stanza")
#include("passes.stanza")
#include("primop.stanza")
+#include("errors.stanza")
defpackage firrtl-main :
import core
diff --git a/src/main/stanza/firrtl-test-main.stanza b/src/main/stanza/firrtl-test-main.stanza
index f929455d..ca9bfa33 100644
--- a/src/main/stanza/firrtl-test-main.stanza
+++ b/src/main/stanza/firrtl-test-main.stanza
@@ -8,6 +8,7 @@
#include("ir-parser.stanza")
#include("passes.stanza")
#include("primop.stanza")
+#include("errors.stanza")
defpackage firrtl-main :
import core
diff --git a/src/main/stanza/passes.stanza b/src/main/stanza/passes.stanza
index 1b752c27..7d5cd481 100644
--- a/src/main/stanza/passes.stanza
+++ b/src/main/stanza/passes.stanza
@@ -5,6 +5,7 @@ defpackage firrtl/passes :
import firrtl/ir-utils
import firrtl/primops
import firrtl-main
+ import firrtl/errors
;============== EXCEPTIONS =================================
defclass PassException <: Exception
@@ -838,7 +839,9 @@ defn lower (body:Stmt) -> Stmt :
switch fn ([x,y]) : lgender == x and rgender == y :
[FEMALE,MALE] : ConnectToIndexed(index(s),locs,r*)
[MALE,FEMALE] : ConnectFromIndexed(index(s),r*,locs)
- (s:Begin|Conditionally|EmptyStmt) : map(lower-stmt,s)
+ (s:Conditionally) :
+ Conditionally(exp(head $ expand-expr(pred(s))),lower-stmt(conseq(s)),lower-stmt(alt(s)))
+ (s:Begin|EmptyStmt) : map(lower-stmt,s)
lower-stmt(body)
@@ -2008,6 +2011,7 @@ public defn run-passes (c: Circuit, p: List<Char>,file:String) :
; Early passes:
; If modules have a reset defined, must be an INPUT and UInt(1)
+ if contains(p,'X') or contains(p,'A') : do-stage("High Form Check", check-high-form)
if contains(p,'X') or contains(p,'a') : do-stage("Temp Elimination", temp-elimination)
if contains(p,'X') or contains(p,'b') : do-stage("Working IR", to-working-ir)
if contains(p,'X') or contains(p,'c') : do-stage("Make Explicit Reset", make-explicit-reset)
diff --git a/src/main/stanza/primop.stanza b/src/main/stanza/primop.stanza
index b293da52..34dd0392 100644
--- a/src/main/stanza/primop.stanza
+++ b/src/main/stanza/primop.stanza
@@ -185,6 +185,7 @@ public defn lower-and-type-primop (e:DoPrim) -> DoPrim :
match(type(args(e)[1]),type(args(e)[2])) :
(t1:UIntType, t2:UIntType) : MUX-UU-OP
(t1:SIntType, t2:SIntType) : MUX-SS-OP
+ (t1,t2) : error(to-string(args(e)))
MUX-UU-OP : DoPrim(op(e),args(e),consts(e),u())
MUX-SS-OP : DoPrim(op(e),args(e),consts(e),s())
PAD-OP :
diff --git a/test/chisel3/Control.fir b/test/chisel3/Control.fir
new file mode 100644
index 00000000..d297d41c
--- /dev/null
+++ b/test/chisel3/Control.fir
@@ -0,0 +1,653 @@
+; CHECK: Done!
+
+circuit Control :
+ module Control :
+ output ctrl : {flip inst : UInt<32>, st_type : UInt<2>, ld_type : UInt<3>, wb_sel : UInt<2>, wb_en : UInt<1>, csr_cmd : UInt<2>, pc_sel : UInt<1>, inst_re : UInt<1>, flip stall : UInt<1>, data_re : UInt<1>, inst_type : UInt<1>, A_sel : UInt<1>, B_sel : UInt<1>, imm_sel : UInt<3>, alu_op : UInt<4>, br_type : UInt<3>}
+
+ node Y = UInt<1>(1)
+ node N = UInt<1>(0)
+ node T_831 = bit-and(Pad(UInt<7>(127),?), Pad(ctrl.inst,?))
+ node T_832 = eq(Pad(T_831,?), Pad(UInt<6>(55),?))
+ node T_833 = bit-and(Pad(UInt<7>(127),?), Pad(ctrl.inst,?))
+ node T_834 = eq(Pad(T_833,?), Pad(UInt<5>(23),?))
+ node T_835 = bit-and(Pad(UInt<7>(127),?), Pad(ctrl.inst,?))
+ node T_836 = eq(Pad(T_835,?), Pad(UInt<7>(111),?))
+ node T_837 = bit-and(Pad(UInt<15>(28799),?), Pad(ctrl.inst,?))
+ node T_838 = eq(Pad(T_837,?), Pad(UInt<7>(103),?))
+ node T_839 = bit-and(Pad(UInt<15>(28799),?), Pad(ctrl.inst,?))
+ node T_840 = eq(Pad(T_839,?), Pad(UInt<7>(99),?))
+ node T_841 = bit-and(Pad(UInt<15>(28799),?), Pad(ctrl.inst,?))
+ node T_842 = eq(Pad(T_841,?), Pad(UInt<13>(4195),?))
+ node T_843 = bit-and(Pad(UInt<15>(28799),?), Pad(ctrl.inst,?))
+ node T_844 = eq(Pad(T_843,?), Pad(UInt<15>(16483),?))
+ node T_845 = bit-and(Pad(UInt<15>(28799),?), Pad(ctrl.inst,?))
+ node T_846 = eq(Pad(T_845,?), Pad(UInt<15>(20579),?))
+ node T_847 = bit-and(Pad(UInt<15>(28799),?), Pad(ctrl.inst,?))
+ node T_848 = eq(Pad(T_847,?), Pad(UInt<15>(24675),?))
+ node T_849 = bit-and(Pad(UInt<15>(28799),?), Pad(ctrl.inst,?))
+ node T_850 = eq(Pad(T_849,?), Pad(UInt<15>(28771),?))
+ node T_851 = bit-and(Pad(UInt<15>(28799),?), Pad(ctrl.inst,?))
+ node T_852 = eq(Pad(T_851,?), Pad(UInt<2>(3),?))
+ node T_853 = bit-and(Pad(UInt<15>(28799),?), Pad(ctrl.inst,?))
+ node T_854 = eq(Pad(T_853,?), Pad(UInt<13>(4099),?))
+ node T_855 = bit-and(Pad(UInt<15>(28799),?), Pad(ctrl.inst,?))
+ node T_856 = eq(Pad(T_855,?), Pad(UInt<14>(8195),?))
+ node T_857 = bit-and(Pad(UInt<15>(28799),?), Pad(ctrl.inst,?))
+ node T_858 = eq(Pad(T_857,?), Pad(UInt<15>(16387),?))
+ node T_859 = bit-and(Pad(UInt<15>(28799),?), Pad(ctrl.inst,?))
+ node T_860 = eq(Pad(T_859,?), Pad(UInt<15>(20483),?))
+ node T_861 = bit-and(Pad(UInt<15>(28799),?), Pad(ctrl.inst,?))
+ node T_862 = eq(Pad(T_861,?), Pad(UInt<6>(35),?))
+ node T_863 = bit-and(Pad(UInt<15>(28799),?), Pad(ctrl.inst,?))
+ node T_864 = eq(Pad(T_863,?), Pad(UInt<13>(4131),?))
+ node T_865 = bit-and(Pad(UInt<15>(28799),?), Pad(ctrl.inst,?))
+ node T_866 = eq(Pad(T_865,?), Pad(UInt<14>(8227),?))
+ node T_867 = bit-and(Pad(UInt<15>(28799),?), Pad(ctrl.inst,?))
+ node T_868 = eq(Pad(T_867,?), Pad(UInt<5>(19),?))
+ node T_869 = bit-and(Pad(UInt<15>(28799),?), Pad(ctrl.inst,?))
+ node T_870 = eq(Pad(T_869,?), Pad(UInt<14>(8211),?))
+ node T_871 = bit-and(Pad(UInt<15>(28799),?), Pad(ctrl.inst,?))
+ node T_872 = eq(Pad(T_871,?), Pad(UInt<14>(12307),?))
+ node T_873 = bit-and(Pad(UInt<15>(28799),?), Pad(ctrl.inst,?))
+ node T_874 = eq(Pad(T_873,?), Pad(UInt<15>(16403),?))
+ node T_875 = bit-and(Pad(UInt<15>(28799),?), Pad(ctrl.inst,?))
+ node T_876 = eq(Pad(T_875,?), Pad(UInt<15>(24595),?))
+ node T_877 = bit-and(Pad(UInt<15>(28799),?), Pad(ctrl.inst,?))
+ node T_878 = eq(Pad(T_877,?), Pad(UInt<15>(28691),?))
+ node T_879 = bit-and(Pad(UInt<32>(4261441663),?), Pad(ctrl.inst,?))
+ node T_880 = eq(Pad(T_879,?), Pad(UInt<13>(4115),?))
+ node T_881 = bit-and(Pad(UInt<32>(4261441663),?), Pad(ctrl.inst,?))
+ node T_882 = eq(Pad(T_881,?), Pad(UInt<15>(20499),?))
+ node T_883 = bit-and(Pad(UInt<32>(4261441663),?), Pad(ctrl.inst,?))
+ node T_884 = eq(Pad(T_883,?), Pad(UInt<31>(1073762323),?))
+ node T_885 = bit-and(Pad(UInt<32>(4261441663),?), Pad(ctrl.inst,?))
+ node T_886 = eq(Pad(T_885,?), Pad(UInt<6>(51),?))
+ node T_887 = bit-and(Pad(UInt<32>(4261441663),?), Pad(ctrl.inst,?))
+ node T_888 = eq(Pad(T_887,?), Pad(UInt<31>(1073741875),?))
+ node T_889 = bit-and(Pad(UInt<32>(4261441663),?), Pad(ctrl.inst,?))
+ node T_890 = eq(Pad(T_889,?), Pad(UInt<13>(4147),?))
+ node T_891 = bit-and(Pad(UInt<32>(4261441663),?), Pad(ctrl.inst,?))
+ node T_892 = eq(Pad(T_891,?), Pad(UInt<14>(8243),?))
+ node T_893 = bit-and(Pad(UInt<32>(4261441663),?), Pad(ctrl.inst,?))
+ node T_894 = eq(Pad(T_893,?), Pad(UInt<14>(12339),?))
+ node T_895 = bit-and(Pad(UInt<32>(4261441663),?), Pad(ctrl.inst,?))
+ node T_896 = eq(Pad(T_895,?), Pad(UInt<15>(16435),?))
+ node T_897 = bit-and(Pad(UInt<32>(4261441663),?), Pad(ctrl.inst,?))
+ node T_898 = eq(Pad(T_897,?), Pad(UInt<15>(20531),?))
+ node T_899 = bit-and(Pad(UInt<32>(4261441663),?), Pad(ctrl.inst,?))
+ node T_900 = eq(Pad(T_899,?), Pad(UInt<31>(1073762355),?))
+ node T_901 = bit-and(Pad(UInt<32>(4261441663),?), Pad(ctrl.inst,?))
+ node T_902 = eq(Pad(T_901,?), Pad(UInt<15>(24627),?))
+ node T_903 = bit-and(Pad(UInt<32>(4261441663),?), Pad(ctrl.inst,?))
+ node T_904 = eq(Pad(T_903,?), Pad(UInt<15>(28723),?))
+ node T_905 = bit-and(Pad(UInt<15>(28799),?), Pad(ctrl.inst,?))
+ node T_906 = eq(Pad(T_905,?), Pad(UInt<13>(4211),?))
+ node T_907 = bit-and(Pad(UInt<15>(28799),?), Pad(ctrl.inst,?))
+ node T_908 = eq(Pad(T_907,?), Pad(UInt<14>(8307),?))
+ node T_909 = bit-and(Pad(UInt<15>(28799),?), Pad(ctrl.inst,?))
+ node T_910 = eq(Pad(T_909,?), Pad(UInt<14>(12403),?))
+ node T_911 = bit-and(Pad(UInt<15>(28799),?), Pad(ctrl.inst,?))
+ node T_912 = eq(Pad(T_911,?), Pad(UInt<15>(20595),?))
+ node T_913 = bit-and(Pad(UInt<15>(28799),?), Pad(ctrl.inst,?))
+ node T_914 = eq(Pad(T_913,?), Pad(UInt<15>(24691),?))
+ node T_915 = bit-and(Pad(UInt<15>(28799),?), Pad(ctrl.inst,?))
+ node T_916 = eq(Pad(T_915,?), Pad(UInt<15>(28787),?))
+ node T_917 = mux(Pad(T_916,?), Pad(UInt<1>(0),?), Pad(UInt<1>(0),?))
+ node T_918 = mux(Pad(T_914,?), Pad(UInt<1>(0),?), Pad(T_917,?))
+ node T_919 = mux(Pad(T_912,?), Pad(UInt<1>(0),?), Pad(T_918,?))
+ node T_920 = mux(Pad(T_910,?), Pad(UInt<1>(0),?), Pad(T_919,?))
+ node T_921 = mux(Pad(T_908,?), Pad(UInt<1>(0),?), Pad(T_920,?))
+ node T_922 = mux(Pad(T_906,?), Pad(UInt<1>(0),?), Pad(T_921,?))
+ node T_923 = mux(Pad(T_904,?), Pad(UInt<1>(0),?), Pad(T_922,?))
+ node T_924 = mux(Pad(T_902,?), Pad(UInt<1>(0),?), Pad(T_923,?))
+ node T_925 = mux(Pad(T_900,?), Pad(UInt<1>(0),?), Pad(T_924,?))
+ node T_926 = mux(Pad(T_898,?), Pad(UInt<1>(0),?), Pad(T_925,?))
+ node T_927 = mux(Pad(T_896,?), Pad(UInt<1>(0),?), Pad(T_926,?))
+ node T_928 = mux(Pad(T_894,?), Pad(UInt<1>(0),?), Pad(T_927,?))
+ node T_929 = mux(Pad(T_892,?), Pad(UInt<1>(0),?), Pad(T_928,?))
+ node T_930 = mux(Pad(T_890,?), Pad(UInt<1>(0),?), Pad(T_929,?))
+ node T_931 = mux(Pad(T_888,?), Pad(UInt<1>(0),?), Pad(T_930,?))
+ node T_932 = mux(Pad(T_886,?), Pad(UInt<1>(0),?), Pad(T_931,?))
+ node T_933 = mux(Pad(T_884,?), Pad(UInt<1>(0),?), Pad(T_932,?))
+ node T_934 = mux(Pad(T_882,?), Pad(UInt<1>(0),?), Pad(T_933,?))
+ node T_935 = mux(Pad(T_880,?), Pad(UInt<1>(0),?), Pad(T_934,?))
+ node T_936 = mux(Pad(T_878,?), Pad(UInt<1>(0),?), Pad(T_935,?))
+ node T_937 = mux(Pad(T_876,?), Pad(UInt<1>(0),?), Pad(T_936,?))
+ node T_938 = mux(Pad(T_874,?), Pad(UInt<1>(0),?), Pad(T_937,?))
+ node T_939 = mux(Pad(T_872,?), Pad(UInt<1>(0),?), Pad(T_938,?))
+ node T_940 = mux(Pad(T_870,?), Pad(UInt<1>(0),?), Pad(T_939,?))
+ node T_941 = mux(Pad(T_868,?), Pad(UInt<1>(0),?), Pad(T_940,?))
+ node T_942 = mux(Pad(T_866,?), Pad(UInt<1>(0),?), Pad(T_941,?))
+ node T_943 = mux(Pad(T_864,?), Pad(UInt<1>(0),?), Pad(T_942,?))
+ node T_944 = mux(Pad(T_862,?), Pad(UInt<1>(0),?), Pad(T_943,?))
+ node T_945 = mux(Pad(T_860,?), Pad(UInt<1>(0),?), Pad(T_944,?))
+ node T_946 = mux(Pad(T_858,?), Pad(UInt<1>(0),?), Pad(T_945,?))
+ node T_947 = mux(Pad(T_856,?), Pad(UInt<1>(0),?), Pad(T_946,?))
+ node T_948 = mux(Pad(T_854,?), Pad(UInt<1>(0),?), Pad(T_947,?))
+ node T_949 = mux(Pad(T_852,?), Pad(UInt<1>(0),?), Pad(T_948,?))
+ node T_950 = mux(Pad(T_850,?), Pad(UInt<1>(0),?), Pad(T_949,?))
+ node T_951 = mux(Pad(T_848,?), Pad(UInt<1>(0),?), Pad(T_950,?))
+ node T_952 = mux(Pad(T_846,?), Pad(UInt<1>(0),?), Pad(T_951,?))
+ node T_953 = mux(Pad(T_844,?), Pad(UInt<1>(0),?), Pad(T_952,?))
+ node T_954 = mux(Pad(T_842,?), Pad(UInt<1>(0),?), Pad(T_953,?))
+ node T_955 = mux(Pad(T_840,?), Pad(UInt<1>(0),?), Pad(T_954,?))
+ node T_956 = mux(Pad(T_838,?), Pad(UInt<1>(1),?), Pad(T_955,?))
+ node T_957 = mux(Pad(T_836,?), Pad(UInt<1>(1),?), Pad(T_956,?))
+ node T_958 = mux(Pad(T_834,?), Pad(UInt<1>(0),?), Pad(T_957,?))
+ node T_959 = mux(Pad(T_832,?), Pad(UInt<1>(0),?), Pad(T_958,?))
+ node T_960 = mux(Pad(T_916,?), Pad(UInt<1>(1),?), Pad(UInt<1>(1),?))
+ node T_961 = mux(Pad(T_914,?), Pad(UInt<1>(1),?), Pad(T_960,?))
+ node T_962 = mux(Pad(T_912,?), Pad(UInt<1>(1),?), Pad(T_961,?))
+ node T_963 = mux(Pad(T_910,?), Pad(UInt<1>(0),?), Pad(T_962,?))
+ node T_964 = mux(Pad(T_908,?), Pad(UInt<1>(0),?), Pad(T_963,?))
+ node T_965 = mux(Pad(T_906,?), Pad(UInt<1>(0),?), Pad(T_964,?))
+ node T_966 = mux(Pad(T_904,?), Pad(UInt<1>(0),?), Pad(T_965,?))
+ node T_967 = mux(Pad(T_902,?), Pad(UInt<1>(0),?), Pad(T_966,?))
+ node T_968 = mux(Pad(T_900,?), Pad(UInt<1>(0),?), Pad(T_967,?))
+ node T_969 = mux(Pad(T_898,?), Pad(UInt<1>(0),?), Pad(T_968,?))
+ node T_970 = mux(Pad(T_896,?), Pad(UInt<1>(0),?), Pad(T_969,?))
+ node T_971 = mux(Pad(T_894,?), Pad(UInt<1>(0),?), Pad(T_970,?))
+ node T_972 = mux(Pad(T_892,?), Pad(UInt<1>(0),?), Pad(T_971,?))
+ node T_973 = mux(Pad(T_890,?), Pad(UInt<1>(0),?), Pad(T_972,?))
+ node T_974 = mux(Pad(T_888,?), Pad(UInt<1>(0),?), Pad(T_973,?))
+ node T_975 = mux(Pad(T_886,?), Pad(UInt<1>(0),?), Pad(T_974,?))
+ node T_976 = mux(Pad(T_884,?), Pad(UInt<1>(0),?), Pad(T_975,?))
+ node T_977 = mux(Pad(T_882,?), Pad(UInt<1>(0),?), Pad(T_976,?))
+ node T_978 = mux(Pad(T_880,?), Pad(UInt<1>(0),?), Pad(T_977,?))
+ node T_979 = mux(Pad(T_878,?), Pad(UInt<1>(0),?), Pad(T_978,?))
+ node T_980 = mux(Pad(T_876,?), Pad(UInt<1>(0),?), Pad(T_979,?))
+ node T_981 = mux(Pad(T_874,?), Pad(UInt<1>(0),?), Pad(T_980,?))
+ node T_982 = mux(Pad(T_872,?), Pad(UInt<1>(0),?), Pad(T_981,?))
+ node T_983 = mux(Pad(T_870,?), Pad(UInt<1>(0),?), Pad(T_982,?))
+ node T_984 = mux(Pad(T_868,?), Pad(UInt<1>(0),?), Pad(T_983,?))
+ node T_985 = mux(Pad(T_866,?), Pad(UInt<1>(0),?), Pad(T_984,?))
+ node T_986 = mux(Pad(T_864,?), Pad(UInt<1>(0),?), Pad(T_985,?))
+ node T_987 = mux(Pad(T_862,?), Pad(UInt<1>(0),?), Pad(T_986,?))
+ node T_988 = mux(Pad(T_860,?), Pad(UInt<1>(0),?), Pad(T_987,?))
+ node T_989 = mux(Pad(T_858,?), Pad(UInt<1>(0),?), Pad(T_988,?))
+ node T_990 = mux(Pad(T_856,?), Pad(UInt<1>(0),?), Pad(T_989,?))
+ node T_991 = mux(Pad(T_854,?), Pad(UInt<1>(0),?), Pad(T_990,?))
+ node T_992 = mux(Pad(T_852,?), Pad(UInt<1>(0),?), Pad(T_991,?))
+ node T_993 = mux(Pad(T_850,?), Pad(UInt<1>(1),?), Pad(T_992,?))
+ node T_994 = mux(Pad(T_848,?), Pad(UInt<1>(1),?), Pad(T_993,?))
+ node T_995 = mux(Pad(T_846,?), Pad(UInt<1>(1),?), Pad(T_994,?))
+ node T_996 = mux(Pad(T_844,?), Pad(UInt<1>(1),?), Pad(T_995,?))
+ node T_997 = mux(Pad(T_842,?), Pad(UInt<1>(1),?), Pad(T_996,?))
+ node T_998 = mux(Pad(T_840,?), Pad(UInt<1>(1),?), Pad(T_997,?))
+ node T_999 = mux(Pad(T_838,?), Pad(UInt<1>(0),?), Pad(T_998,?))
+ node T_1000 = mux(Pad(T_836,?), Pad(UInt<1>(1),?), Pad(T_999,?))
+ node T_1001 = mux(Pad(T_834,?), Pad(UInt<1>(1),?), Pad(T_1000,?))
+ node T_1002 = mux(Pad(T_832,?), Pad(UInt<1>(1),?), Pad(T_1001,?))
+ node T_1003 = mux(Pad(T_916,?), Pad(UInt<1>(1),?), Pad(UInt<1>(0),?))
+ node T_1004 = mux(Pad(T_914,?), Pad(UInt<1>(1),?), Pad(T_1003,?))
+ node T_1005 = mux(Pad(T_912,?), Pad(UInt<1>(1),?), Pad(T_1004,?))
+ node T_1006 = mux(Pad(T_910,?), Pad(UInt<1>(0),?), Pad(T_1005,?))
+ node T_1007 = mux(Pad(T_908,?), Pad(UInt<1>(0),?), Pad(T_1006,?))
+ node T_1008 = mux(Pad(T_906,?), Pad(UInt<1>(0),?), Pad(T_1007,?))
+ node T_1009 = mux(Pad(T_904,?), Pad(UInt<1>(0),?), Pad(T_1008,?))
+ node T_1010 = mux(Pad(T_902,?), Pad(UInt<1>(0),?), Pad(T_1009,?))
+ node T_1011 = mux(Pad(T_900,?), Pad(UInt<1>(0),?), Pad(T_1010,?))
+ node T_1012 = mux(Pad(T_898,?), Pad(UInt<1>(0),?), Pad(T_1011,?))
+ node T_1013 = mux(Pad(T_896,?), Pad(UInt<1>(0),?), Pad(T_1012,?))
+ node T_1014 = mux(Pad(T_894,?), Pad(UInt<1>(0),?), Pad(T_1013,?))
+ node T_1015 = mux(Pad(T_892,?), Pad(UInt<1>(0),?), Pad(T_1014,?))
+ node T_1016 = mux(Pad(T_890,?), Pad(UInt<1>(0),?), Pad(T_1015,?))
+ node T_1017 = mux(Pad(T_888,?), Pad(UInt<1>(0),?), Pad(T_1016,?))
+ node T_1018 = mux(Pad(T_886,?), Pad(UInt<1>(0),?), Pad(T_1017,?))
+ node T_1019 = mux(Pad(T_884,?), Pad(UInt<1>(1),?), Pad(T_1018,?))
+ node T_1020 = mux(Pad(T_882,?), Pad(UInt<1>(1),?), Pad(T_1019,?))
+ node T_1021 = mux(Pad(T_880,?), Pad(UInt<1>(1),?), Pad(T_1020,?))
+ node T_1022 = mux(Pad(T_878,?), Pad(UInt<1>(1),?), Pad(T_1021,?))
+ node T_1023 = mux(Pad(T_876,?), Pad(UInt<1>(1),?), Pad(T_1022,?))
+ node T_1024 = mux(Pad(T_874,?), Pad(UInt<1>(1),?), Pad(T_1023,?))
+ node T_1025 = mux(Pad(T_872,?), Pad(UInt<1>(1),?), Pad(T_1024,?))
+ node T_1026 = mux(Pad(T_870,?), Pad(UInt<1>(1),?), Pad(T_1025,?))
+ node T_1027 = mux(Pad(T_868,?), Pad(UInt<1>(1),?), Pad(T_1026,?))
+ node T_1028 = mux(Pad(T_866,?), Pad(UInt<1>(1),?), Pad(T_1027,?))
+ node T_1029 = mux(Pad(T_864,?), Pad(UInt<1>(1),?), Pad(T_1028,?))
+ node T_1030 = mux(Pad(T_862,?), Pad(UInt<1>(1),?), Pad(T_1029,?))
+ node T_1031 = mux(Pad(T_860,?), Pad(UInt<1>(1),?), Pad(T_1030,?))
+ node T_1032 = mux(Pad(T_858,?), Pad(UInt<1>(1),?), Pad(T_1031,?))
+ node T_1033 = mux(Pad(T_856,?), Pad(UInt<1>(1),?), Pad(T_1032,?))
+ node T_1034 = mux(Pad(T_854,?), Pad(UInt<1>(1),?), Pad(T_1033,?))
+ node T_1035 = mux(Pad(T_852,?), Pad(UInt<1>(1),?), Pad(T_1034,?))
+ node T_1036 = mux(Pad(T_850,?), Pad(UInt<1>(1),?), Pad(T_1035,?))
+ node T_1037 = mux(Pad(T_848,?), Pad(UInt<1>(1),?), Pad(T_1036,?))
+ node T_1038 = mux(Pad(T_846,?), Pad(UInt<1>(1),?), Pad(T_1037,?))
+ node T_1039 = mux(Pad(T_844,?), Pad(UInt<1>(1),?), Pad(T_1038,?))
+ node T_1040 = mux(Pad(T_842,?), Pad(UInt<1>(1),?), Pad(T_1039,?))
+ node T_1041 = mux(Pad(T_840,?), Pad(UInt<1>(1),?), Pad(T_1040,?))
+ node T_1042 = mux(Pad(T_838,?), Pad(UInt<1>(1),?), Pad(T_1041,?))
+ node T_1043 = mux(Pad(T_836,?), Pad(UInt<1>(1),?), Pad(T_1042,?))
+ node T_1044 = mux(Pad(T_834,?), Pad(UInt<1>(1),?), Pad(T_1043,?))
+ node T_1045 = mux(Pad(T_832,?), Pad(UInt<1>(1),?), Pad(T_1044,?))
+ node T_1046 = mux(Pad(T_916,?), Pad(UInt<3>(5),?), Pad(UInt<3>(7),?))
+ node T_1047 = mux(Pad(T_914,?), Pad(UInt<3>(5),?), Pad(T_1046,?))
+ node T_1048 = mux(Pad(T_912,?), Pad(UInt<3>(5),?), Pad(T_1047,?))
+ node T_1049 = mux(Pad(T_910,?), Pad(UInt<3>(5),?), Pad(T_1048,?))
+ node T_1050 = mux(Pad(T_908,?), Pad(UInt<3>(5),?), Pad(T_1049,?))
+ node T_1051 = mux(Pad(T_906,?), Pad(UInt<3>(5),?), Pad(T_1050,?))
+ node T_1052 = mux(Pad(T_904,?), Pad(UInt<3>(7),?), Pad(T_1051,?))
+ node T_1053 = mux(Pad(T_902,?), Pad(UInt<3>(7),?), Pad(T_1052,?))
+ node T_1054 = mux(Pad(T_900,?), Pad(UInt<3>(7),?), Pad(T_1053,?))
+ node T_1055 = mux(Pad(T_898,?), Pad(UInt<3>(7),?), Pad(T_1054,?))
+ node T_1056 = mux(Pad(T_896,?), Pad(UInt<3>(7),?), Pad(T_1055,?))
+ node T_1057 = mux(Pad(T_894,?), Pad(UInt<3>(7),?), Pad(T_1056,?))
+ node T_1058 = mux(Pad(T_892,?), Pad(UInt<3>(7),?), Pad(T_1057,?))
+ node T_1059 = mux(Pad(T_890,?), Pad(UInt<3>(7),?), Pad(T_1058,?))
+ node T_1060 = mux(Pad(T_888,?), Pad(UInt<3>(7),?), Pad(T_1059,?))
+ node T_1061 = mux(Pad(T_886,?), Pad(UInt<3>(7),?), Pad(T_1060,?))
+ node T_1062 = mux(Pad(T_884,?), Pad(UInt<3>(0),?), Pad(T_1061,?))
+ node T_1063 = mux(Pad(T_882,?), Pad(UInt<3>(0),?), Pad(T_1062,?))
+ node T_1064 = mux(Pad(T_880,?), Pad(UInt<3>(0),?), Pad(T_1063,?))
+ node T_1065 = mux(Pad(T_878,?), Pad(UInt<3>(0),?), Pad(T_1064,?))
+ node T_1066 = mux(Pad(T_876,?), Pad(UInt<3>(0),?), Pad(T_1065,?))
+ node T_1067 = mux(Pad(T_874,?), Pad(UInt<3>(0),?), Pad(T_1066,?))
+ node T_1068 = mux(Pad(T_872,?), Pad(UInt<3>(0),?), Pad(T_1067,?))
+ node T_1069 = mux(Pad(T_870,?), Pad(UInt<3>(0),?), Pad(T_1068,?))
+ node T_1070 = mux(Pad(T_868,?), Pad(UInt<3>(0),?), Pad(T_1069,?))
+ node T_1071 = mux(Pad(T_866,?), Pad(UInt<3>(1),?), Pad(T_1070,?))
+ node T_1072 = mux(Pad(T_864,?), Pad(UInt<3>(1),?), Pad(T_1071,?))
+ node T_1073 = mux(Pad(T_862,?), Pad(UInt<3>(1),?), Pad(T_1072,?))
+ node T_1074 = mux(Pad(T_860,?), Pad(UInt<3>(0),?), Pad(T_1073,?))
+ node T_1075 = mux(Pad(T_858,?), Pad(UInt<3>(0),?), Pad(T_1074,?))
+ node T_1076 = mux(Pad(T_856,?), Pad(UInt<3>(0),?), Pad(T_1075,?))
+ node T_1077 = mux(Pad(T_854,?), Pad(UInt<3>(0),?), Pad(T_1076,?))
+ node T_1078 = mux(Pad(T_852,?), Pad(UInt<3>(0),?), Pad(T_1077,?))
+ node T_1079 = mux(Pad(T_850,?), Pad(UInt<3>(4),?), Pad(T_1078,?))
+ node T_1080 = mux(Pad(T_848,?), Pad(UInt<3>(4),?), Pad(T_1079,?))
+ node T_1081 = mux(Pad(T_846,?), Pad(UInt<3>(4),?), Pad(T_1080,?))
+ node T_1082 = mux(Pad(T_844,?), Pad(UInt<3>(4),?), Pad(T_1081,?))
+ node T_1083 = mux(Pad(T_842,?), Pad(UInt<3>(4),?), Pad(T_1082,?))
+ node T_1084 = mux(Pad(T_840,?), Pad(UInt<3>(4),?), Pad(T_1083,?))
+ node T_1085 = mux(Pad(T_838,?), Pad(UInt<3>(0),?), Pad(T_1084,?))
+ node T_1086 = mux(Pad(T_836,?), Pad(UInt<3>(3),?), Pad(T_1085,?))
+ node T_1087 = mux(Pad(T_834,?), Pad(UInt<3>(2),?), Pad(T_1086,?))
+ node T_1088 = mux(Pad(T_832,?), Pad(UInt<3>(2),?), Pad(T_1087,?))
+ node T_1089 = mux(Pad(T_916,?), Pad(UInt<4>(11),?), Pad(UInt<4>(15),?))
+ node T_1090 = mux(Pad(T_914,?), Pad(UInt<4>(11),?), Pad(T_1089,?))
+ node T_1091 = mux(Pad(T_912,?), Pad(UInt<4>(11),?), Pad(T_1090,?))
+ node T_1092 = mux(Pad(T_910,?), Pad(UInt<4>(10),?), Pad(T_1091,?))
+ node T_1093 = mux(Pad(T_908,?), Pad(UInt<4>(10),?), Pad(T_1092,?))
+ node T_1094 = mux(Pad(T_906,?), Pad(UInt<4>(10),?), Pad(T_1093,?))
+ node T_1095 = mux(Pad(T_904,?), Pad(UInt<4>(2),?), Pad(T_1094,?))
+ node T_1096 = mux(Pad(T_902,?), Pad(UInt<4>(3),?), Pad(T_1095,?))
+ node T_1097 = mux(Pad(T_900,?), Pad(UInt<4>(9),?), Pad(T_1096,?))
+ node T_1098 = mux(Pad(T_898,?), Pad(UInt<4>(8),?), Pad(T_1097,?))
+ node T_1099 = mux(Pad(T_896,?), Pad(UInt<4>(4),?), Pad(T_1098,?))
+ node T_1100 = mux(Pad(T_894,?), Pad(UInt<4>(7),?), Pad(T_1099,?))
+ node T_1101 = mux(Pad(T_892,?), Pad(UInt<4>(5),?), Pad(T_1100,?))
+ node T_1102 = mux(Pad(T_890,?), Pad(UInt<4>(6),?), Pad(T_1101,?))
+ node T_1103 = mux(Pad(T_888,?), Pad(UInt<4>(1),?), Pad(T_1102,?))
+ node T_1104 = mux(Pad(T_886,?), Pad(UInt<4>(0),?), Pad(T_1103,?))
+ node T_1105 = mux(Pad(T_884,?), Pad(UInt<4>(9),?), Pad(T_1104,?))
+ node T_1106 = mux(Pad(T_882,?), Pad(UInt<4>(8),?), Pad(T_1105,?))
+ node T_1107 = mux(Pad(T_880,?), Pad(UInt<4>(6),?), Pad(T_1106,?))
+ node T_1108 = mux(Pad(T_878,?), Pad(UInt<4>(2),?), Pad(T_1107,?))
+ node T_1109 = mux(Pad(T_876,?), Pad(UInt<4>(3),?), Pad(T_1108,?))
+ node T_1110 = mux(Pad(T_874,?), Pad(UInt<4>(4),?), Pad(T_1109,?))
+ node T_1111 = mux(Pad(T_872,?), Pad(UInt<4>(7),?), Pad(T_1110,?))
+ node T_1112 = mux(Pad(T_870,?), Pad(UInt<4>(5),?), Pad(T_1111,?))
+ node T_1113 = mux(Pad(T_868,?), Pad(UInt<4>(0),?), Pad(T_1112,?))
+ node T_1114 = mux(Pad(T_866,?), Pad(UInt<4>(0),?), Pad(T_1113,?))
+ node T_1115 = mux(Pad(T_864,?), Pad(UInt<4>(0),?), Pad(T_1114,?))
+ node T_1116 = mux(Pad(T_862,?), Pad(UInt<4>(0),?), Pad(T_1115,?))
+ node T_1117 = mux(Pad(T_860,?), Pad(UInt<4>(0),?), Pad(T_1116,?))
+ node T_1118 = mux(Pad(T_858,?), Pad(UInt<4>(0),?), Pad(T_1117,?))
+ node T_1119 = mux(Pad(T_856,?), Pad(UInt<4>(0),?), Pad(T_1118,?))
+ node T_1120 = mux(Pad(T_854,?), Pad(UInt<4>(0),?), Pad(T_1119,?))
+ node T_1121 = mux(Pad(T_852,?), Pad(UInt<4>(0),?), Pad(T_1120,?))
+ node T_1122 = mux(Pad(T_850,?), Pad(UInt<4>(0),?), Pad(T_1121,?))
+ node T_1123 = mux(Pad(T_848,?), Pad(UInt<4>(0),?), Pad(T_1122,?))
+ node T_1124 = mux(Pad(T_846,?), Pad(UInt<4>(0),?), Pad(T_1123,?))
+ node T_1125 = mux(Pad(T_844,?), Pad(UInt<4>(0),?), Pad(T_1124,?))
+ node T_1126 = mux(Pad(T_842,?), Pad(UInt<4>(0),?), Pad(T_1125,?))
+ node T_1127 = mux(Pad(T_840,?), Pad(UInt<4>(0),?), Pad(T_1126,?))
+ node T_1128 = mux(Pad(T_838,?), Pad(UInt<4>(0),?), Pad(T_1127,?))
+ node T_1129 = mux(Pad(T_836,?), Pad(UInt<4>(0),?), Pad(T_1128,?))
+ node T_1130 = mux(Pad(T_834,?), Pad(UInt<4>(0),?), Pad(T_1129,?))
+ node T_1131 = mux(Pad(T_832,?), Pad(UInt<4>(11),?), Pad(T_1130,?))
+ node T_1132 = mux(Pad(T_916,?), Pad(UInt<3>(7),?), Pad(UInt<3>(7),?))
+ node T_1133 = mux(Pad(T_914,?), Pad(UInt<3>(7),?), Pad(T_1132,?))
+ node T_1134 = mux(Pad(T_912,?), Pad(UInt<3>(7),?), Pad(T_1133,?))
+ node T_1135 = mux(Pad(T_910,?), Pad(UInt<3>(7),?), Pad(T_1134,?))
+ node T_1136 = mux(Pad(T_908,?), Pad(UInt<3>(7),?), Pad(T_1135,?))
+ node T_1137 = mux(Pad(T_906,?), Pad(UInt<3>(7),?), Pad(T_1136,?))
+ node T_1138 = mux(Pad(T_904,?), Pad(UInt<3>(7),?), Pad(T_1137,?))
+ node T_1139 = mux(Pad(T_902,?), Pad(UInt<3>(7),?), Pad(T_1138,?))
+ node T_1140 = mux(Pad(T_900,?), Pad(UInt<3>(7),?), Pad(T_1139,?))
+ node T_1141 = mux(Pad(T_898,?), Pad(UInt<3>(7),?), Pad(T_1140,?))
+ node T_1142 = mux(Pad(T_896,?), Pad(UInt<3>(7),?), Pad(T_1141,?))
+ node T_1143 = mux(Pad(T_894,?), Pad(UInt<3>(7),?), Pad(T_1142,?))
+ node T_1144 = mux(Pad(T_892,?), Pad(UInt<3>(7),?), Pad(T_1143,?))
+ node T_1145 = mux(Pad(T_890,?), Pad(UInt<3>(7),?), Pad(T_1144,?))
+ node T_1146 = mux(Pad(T_888,?), Pad(UInt<3>(7),?), Pad(T_1145,?))
+ node T_1147 = mux(Pad(T_886,?), Pad(UInt<3>(7),?), Pad(T_1146,?))
+ node T_1148 = mux(Pad(T_884,?), Pad(UInt<3>(7),?), Pad(T_1147,?))
+ node T_1149 = mux(Pad(T_882,?), Pad(UInt<3>(7),?), Pad(T_1148,?))
+ node T_1150 = mux(Pad(T_880,?), Pad(UInt<3>(7),?), Pad(T_1149,?))
+ node T_1151 = mux(Pad(T_878,?), Pad(UInt<3>(7),?), Pad(T_1150,?))
+ node T_1152 = mux(Pad(T_876,?), Pad(UInt<3>(7),?), Pad(T_1151,?))
+ node T_1153 = mux(Pad(T_874,?), Pad(UInt<3>(7),?), Pad(T_1152,?))
+ node T_1154 = mux(Pad(T_872,?), Pad(UInt<3>(7),?), Pad(T_1153,?))
+ node T_1155 = mux(Pad(T_870,?), Pad(UInt<3>(7),?), Pad(T_1154,?))
+ node T_1156 = mux(Pad(T_868,?), Pad(UInt<3>(7),?), Pad(T_1155,?))
+ node T_1157 = mux(Pad(T_866,?), Pad(UInt<3>(7),?), Pad(T_1156,?))
+ node T_1158 = mux(Pad(T_864,?), Pad(UInt<3>(7),?), Pad(T_1157,?))
+ node T_1159 = mux(Pad(T_862,?), Pad(UInt<3>(7),?), Pad(T_1158,?))
+ node T_1160 = mux(Pad(T_860,?), Pad(UInt<3>(7),?), Pad(T_1159,?))
+ node T_1161 = mux(Pad(T_858,?), Pad(UInt<3>(7),?), Pad(T_1160,?))
+ node T_1162 = mux(Pad(T_856,?), Pad(UInt<3>(7),?), Pad(T_1161,?))
+ node T_1163 = mux(Pad(T_854,?), Pad(UInt<3>(7),?), Pad(T_1162,?))
+ node T_1164 = mux(Pad(T_852,?), Pad(UInt<3>(7),?), Pad(T_1163,?))
+ node T_1165 = mux(Pad(T_850,?), Pad(UInt<3>(4),?), Pad(T_1164,?))
+ node T_1166 = mux(Pad(T_848,?), Pad(UInt<3>(0),?), Pad(T_1165,?))
+ node T_1167 = mux(Pad(T_846,?), Pad(UInt<3>(5),?), Pad(T_1166,?))
+ node T_1168 = mux(Pad(T_844,?), Pad(UInt<3>(1),?), Pad(T_1167,?))
+ node T_1169 = mux(Pad(T_842,?), Pad(UInt<3>(6),?), Pad(T_1168,?))
+ node T_1170 = mux(Pad(T_840,?), Pad(UInt<3>(2),?), Pad(T_1169,?))
+ node T_1171 = mux(Pad(T_838,?), Pad(UInt<3>(7),?), Pad(T_1170,?))
+ node T_1172 = mux(Pad(T_836,?), Pad(UInt<3>(7),?), Pad(T_1171,?))
+ node T_1173 = mux(Pad(T_834,?), Pad(UInt<3>(7),?), Pad(T_1172,?))
+ node T_1174 = mux(Pad(T_832,?), Pad(UInt<3>(7),?), Pad(T_1173,?))
+ node T_1175 = mux(Pad(T_916,?), Pad(N,?), Pad(N,?))
+ node T_1176 = mux(Pad(T_914,?), Pad(N,?), Pad(T_1175,?))
+ node T_1177 = mux(Pad(T_912,?), Pad(N,?), Pad(T_1176,?))
+ node T_1178 = mux(Pad(T_910,?), Pad(N,?), Pad(T_1177,?))
+ node T_1179 = mux(Pad(T_908,?), Pad(N,?), Pad(T_1178,?))
+ node T_1180 = mux(Pad(T_906,?), Pad(N,?), Pad(T_1179,?))
+ node T_1181 = mux(Pad(T_904,?), Pad(N,?), Pad(T_1180,?))
+ node T_1182 = mux(Pad(T_902,?), Pad(N,?), Pad(T_1181,?))
+ node T_1183 = mux(Pad(T_900,?), Pad(N,?), Pad(T_1182,?))
+ node T_1184 = mux(Pad(T_898,?), Pad(N,?), Pad(T_1183,?))
+ node T_1185 = mux(Pad(T_896,?), Pad(N,?), Pad(T_1184,?))
+ node T_1186 = mux(Pad(T_894,?), Pad(N,?), Pad(T_1185,?))
+ node T_1187 = mux(Pad(T_892,?), Pad(N,?), Pad(T_1186,?))
+ node T_1188 = mux(Pad(T_890,?), Pad(N,?), Pad(T_1187,?))
+ node T_1189 = mux(Pad(T_888,?), Pad(N,?), Pad(T_1188,?))
+ node T_1190 = mux(Pad(T_886,?), Pad(N,?), Pad(T_1189,?))
+ node T_1191 = mux(Pad(T_884,?), Pad(N,?), Pad(T_1190,?))
+ node T_1192 = mux(Pad(T_882,?), Pad(N,?), Pad(T_1191,?))
+ node T_1193 = mux(Pad(T_880,?), Pad(N,?), Pad(T_1192,?))
+ node T_1194 = mux(Pad(T_878,?), Pad(N,?), Pad(T_1193,?))
+ node T_1195 = mux(Pad(T_876,?), Pad(N,?), Pad(T_1194,?))
+ node T_1196 = mux(Pad(T_874,?), Pad(N,?), Pad(T_1195,?))
+ node T_1197 = mux(Pad(T_872,?), Pad(N,?), Pad(T_1196,?))
+ node T_1198 = mux(Pad(T_870,?), Pad(N,?), Pad(T_1197,?))
+ node T_1199 = mux(Pad(T_868,?), Pad(N,?), Pad(T_1198,?))
+ node T_1200 = mux(Pad(T_866,?), Pad(N,?), Pad(T_1199,?))
+ node T_1201 = mux(Pad(T_864,?), Pad(N,?), Pad(T_1200,?))
+ node T_1202 = mux(Pad(T_862,?), Pad(N,?), Pad(T_1201,?))
+ node T_1203 = mux(Pad(T_860,?), Pad(N,?), Pad(T_1202,?))
+ node T_1204 = mux(Pad(T_858,?), Pad(N,?), Pad(T_1203,?))
+ node T_1205 = mux(Pad(T_856,?), Pad(N,?), Pad(T_1204,?))
+ node T_1206 = mux(Pad(T_854,?), Pad(N,?), Pad(T_1205,?))
+ node T_1207 = mux(Pad(T_852,?), Pad(N,?), Pad(T_1206,?))
+ node T_1208 = mux(Pad(T_850,?), Pad(N,?), Pad(T_1207,?))
+ node T_1209 = mux(Pad(T_848,?), Pad(N,?), Pad(T_1208,?))
+ node T_1210 = mux(Pad(T_846,?), Pad(N,?), Pad(T_1209,?))
+ node T_1211 = mux(Pad(T_844,?), Pad(N,?), Pad(T_1210,?))
+ node T_1212 = mux(Pad(T_842,?), Pad(N,?), Pad(T_1211,?))
+ node T_1213 = mux(Pad(T_840,?), Pad(N,?), Pad(T_1212,?))
+ node T_1214 = mux(Pad(T_838,?), Pad(Y,?), Pad(T_1213,?))
+ node T_1215 = mux(Pad(T_836,?), Pad(Y,?), Pad(T_1214,?))
+ node T_1216 = mux(Pad(T_834,?), Pad(N,?), Pad(T_1215,?))
+ node T_1217 = mux(Pad(T_832,?), Pad(N,?), Pad(T_1216,?))
+ node T_1218 = mux(Pad(T_916,?), Pad(UInt<2>(3),?), Pad(UInt<2>(3),?))
+ node T_1219 = mux(Pad(T_914,?), Pad(UInt<2>(3),?), Pad(T_1218,?))
+ node T_1220 = mux(Pad(T_912,?), Pad(UInt<2>(3),?), Pad(T_1219,?))
+ node T_1221 = mux(Pad(T_910,?), Pad(UInt<2>(3),?), Pad(T_1220,?))
+ node T_1222 = mux(Pad(T_908,?), Pad(UInt<2>(3),?), Pad(T_1221,?))
+ node T_1223 = mux(Pad(T_906,?), Pad(UInt<2>(3),?), Pad(T_1222,?))
+ node T_1224 = mux(Pad(T_904,?), Pad(UInt<2>(3),?), Pad(T_1223,?))
+ node T_1225 = mux(Pad(T_902,?), Pad(UInt<2>(3),?), Pad(T_1224,?))
+ node T_1226 = mux(Pad(T_900,?), Pad(UInt<2>(3),?), Pad(T_1225,?))
+ node T_1227 = mux(Pad(T_898,?), Pad(UInt<2>(3),?), Pad(T_1226,?))
+ node T_1228 = mux(Pad(T_896,?), Pad(UInt<2>(3),?), Pad(T_1227,?))
+ node T_1229 = mux(Pad(T_894,?), Pad(UInt<2>(3),?), Pad(T_1228,?))
+ node T_1230 = mux(Pad(T_892,?), Pad(UInt<2>(3),?), Pad(T_1229,?))
+ node T_1231 = mux(Pad(T_890,?), Pad(UInt<2>(3),?), Pad(T_1230,?))
+ node T_1232 = mux(Pad(T_888,?), Pad(UInt<2>(3),?), Pad(T_1231,?))
+ node T_1233 = mux(Pad(T_886,?), Pad(UInt<2>(3),?), Pad(T_1232,?))
+ node T_1234 = mux(Pad(T_884,?), Pad(UInt<2>(3),?), Pad(T_1233,?))
+ node T_1235 = mux(Pad(T_882,?), Pad(UInt<2>(3),?), Pad(T_1234,?))
+ node T_1236 = mux(Pad(T_880,?), Pad(UInt<2>(3),?), Pad(T_1235,?))
+ node T_1237 = mux(Pad(T_878,?), Pad(UInt<2>(3),?), Pad(T_1236,?))
+ node T_1238 = mux(Pad(T_876,?), Pad(UInt<2>(3),?), Pad(T_1237,?))
+ node T_1239 = mux(Pad(T_874,?), Pad(UInt<2>(3),?), Pad(T_1238,?))
+ node T_1240 = mux(Pad(T_872,?), Pad(UInt<2>(3),?), Pad(T_1239,?))
+ node T_1241 = mux(Pad(T_870,?), Pad(UInt<2>(3),?), Pad(T_1240,?))
+ node T_1242 = mux(Pad(T_868,?), Pad(UInt<2>(3),?), Pad(T_1241,?))
+ node T_1243 = mux(Pad(T_866,?), Pad(UInt<2>(0),?), Pad(T_1242,?))
+ node T_1244 = mux(Pad(T_864,?), Pad(UInt<2>(1),?), Pad(T_1243,?))
+ node T_1245 = mux(Pad(T_862,?), Pad(UInt<2>(2),?), Pad(T_1244,?))
+ node T_1246 = mux(Pad(T_860,?), Pad(UInt<2>(3),?), Pad(T_1245,?))
+ node T_1247 = mux(Pad(T_858,?), Pad(UInt<2>(3),?), Pad(T_1246,?))
+ node T_1248 = mux(Pad(T_856,?), Pad(UInt<2>(3),?), Pad(T_1247,?))
+ node T_1249 = mux(Pad(T_854,?), Pad(UInt<2>(3),?), Pad(T_1248,?))
+ node T_1250 = mux(Pad(T_852,?), Pad(UInt<2>(3),?), Pad(T_1249,?))
+ node T_1251 = mux(Pad(T_850,?), Pad(UInt<2>(3),?), Pad(T_1250,?))
+ node T_1252 = mux(Pad(T_848,?), Pad(UInt<2>(3),?), Pad(T_1251,?))
+ node T_1253 = mux(Pad(T_846,?), Pad(UInt<2>(3),?), Pad(T_1252,?))
+ node T_1254 = mux(Pad(T_844,?), Pad(UInt<2>(3),?), Pad(T_1253,?))
+ node T_1255 = mux(Pad(T_842,?), Pad(UInt<2>(3),?), Pad(T_1254,?))
+ node T_1256 = mux(Pad(T_840,?), Pad(UInt<2>(3),?), Pad(T_1255,?))
+ node T_1257 = mux(Pad(T_838,?), Pad(UInt<2>(3),?), Pad(T_1256,?))
+ node T_1258 = mux(Pad(T_836,?), Pad(UInt<2>(3),?), Pad(T_1257,?))
+ node T_1259 = mux(Pad(T_834,?), Pad(UInt<2>(3),?), Pad(T_1258,?))
+ node T_1260 = mux(Pad(T_832,?), Pad(UInt<2>(3),?), Pad(T_1259,?))
+ node T_1261 = mux(Pad(T_916,?), Pad(UInt<3>(7),?), Pad(UInt<3>(7),?))
+ node T_1262 = mux(Pad(T_914,?), Pad(UInt<3>(7),?), Pad(T_1261,?))
+ node T_1263 = mux(Pad(T_912,?), Pad(UInt<3>(7),?), Pad(T_1262,?))
+ node T_1264 = mux(Pad(T_910,?), Pad(UInt<3>(7),?), Pad(T_1263,?))
+ node T_1265 = mux(Pad(T_908,?), Pad(UInt<3>(7),?), Pad(T_1264,?))
+ node T_1266 = mux(Pad(T_906,?), Pad(UInt<3>(7),?), Pad(T_1265,?))
+ node T_1267 = mux(Pad(T_904,?), Pad(UInt<3>(7),?), Pad(T_1266,?))
+ node T_1268 = mux(Pad(T_902,?), Pad(UInt<3>(7),?), Pad(T_1267,?))
+ node T_1269 = mux(Pad(T_900,?), Pad(UInt<3>(7),?), Pad(T_1268,?))
+ node T_1270 = mux(Pad(T_898,?), Pad(UInt<3>(7),?), Pad(T_1269,?))
+ node T_1271 = mux(Pad(T_896,?), Pad(UInt<3>(7),?), Pad(T_1270,?))
+ node T_1272 = mux(Pad(T_894,?), Pad(UInt<3>(7),?), Pad(T_1271,?))
+ node T_1273 = mux(Pad(T_892,?), Pad(UInt<3>(7),?), Pad(T_1272,?))
+ node T_1274 = mux(Pad(T_890,?), Pad(UInt<3>(7),?), Pad(T_1273,?))
+ node T_1275 = mux(Pad(T_888,?), Pad(UInt<3>(7),?), Pad(T_1274,?))
+ node T_1276 = mux(Pad(T_886,?), Pad(UInt<3>(7),?), Pad(T_1275,?))
+ node T_1277 = mux(Pad(T_884,?), Pad(UInt<3>(7),?), Pad(T_1276,?))
+ node T_1278 = mux(Pad(T_882,?), Pad(UInt<3>(7),?), Pad(T_1277,?))
+ node T_1279 = mux(Pad(T_880,?), Pad(UInt<3>(7),?), Pad(T_1278,?))
+ node T_1280 = mux(Pad(T_878,?), Pad(UInt<3>(7),?), Pad(T_1279,?))
+ node T_1281 = mux(Pad(T_876,?), Pad(UInt<3>(7),?), Pad(T_1280,?))
+ node T_1282 = mux(Pad(T_874,?), Pad(UInt<3>(7),?), Pad(T_1281,?))
+ node T_1283 = mux(Pad(T_872,?), Pad(UInt<3>(7),?), Pad(T_1282,?))
+ node T_1284 = mux(Pad(T_870,?), Pad(UInt<3>(7),?), Pad(T_1283,?))
+ node T_1285 = mux(Pad(T_868,?), Pad(UInt<3>(7),?), Pad(T_1284,?))
+ node T_1286 = mux(Pad(T_866,?), Pad(UInt<3>(7),?), Pad(T_1285,?))
+ node T_1287 = mux(Pad(T_864,?), Pad(UInt<3>(7),?), Pad(T_1286,?))
+ node T_1288 = mux(Pad(T_862,?), Pad(UInt<3>(7),?), Pad(T_1287,?))
+ node T_1289 = mux(Pad(T_860,?), Pad(UInt<3>(3),?), Pad(T_1288,?))
+ node T_1290 = mux(Pad(T_858,?), Pad(UInt<3>(4),?), Pad(T_1289,?))
+ node T_1291 = mux(Pad(T_856,?), Pad(UInt<3>(0),?), Pad(T_1290,?))
+ node T_1292 = mux(Pad(T_854,?), Pad(UInt<3>(1),?), Pad(T_1291,?))
+ node T_1293 = mux(Pad(T_852,?), Pad(UInt<3>(2),?), Pad(T_1292,?))
+ node T_1294 = mux(Pad(T_850,?), Pad(UInt<3>(7),?), Pad(T_1293,?))
+ node T_1295 = mux(Pad(T_848,?), Pad(UInt<3>(7),?), Pad(T_1294,?))
+ node T_1296 = mux(Pad(T_846,?), Pad(UInt<3>(7),?), Pad(T_1295,?))
+ node T_1297 = mux(Pad(T_844,?), Pad(UInt<3>(7),?), Pad(T_1296,?))
+ node T_1298 = mux(Pad(T_842,?), Pad(UInt<3>(7),?), Pad(T_1297,?))
+ node T_1299 = mux(Pad(T_840,?), Pad(UInt<3>(7),?), Pad(T_1298,?))
+ node T_1300 = mux(Pad(T_838,?), Pad(UInt<3>(7),?), Pad(T_1299,?))
+ node T_1301 = mux(Pad(T_836,?), Pad(UInt<3>(7),?), Pad(T_1300,?))
+ node T_1302 = mux(Pad(T_834,?), Pad(UInt<3>(7),?), Pad(T_1301,?))
+ node T_1303 = mux(Pad(T_832,?), Pad(UInt<3>(7),?), Pad(T_1302,?))
+ node T_1304 = mux(Pad(T_916,?), Pad(UInt<2>(3),?), Pad(UInt<2>(0),?))
+ node T_1305 = mux(Pad(T_914,?), Pad(UInt<2>(3),?), Pad(T_1304,?))
+ node T_1306 = mux(Pad(T_912,?), Pad(UInt<2>(3),?), Pad(T_1305,?))
+ node T_1307 = mux(Pad(T_910,?), Pad(UInt<2>(3),?), Pad(T_1306,?))
+ node T_1308 = mux(Pad(T_908,?), Pad(UInt<2>(3),?), Pad(T_1307,?))
+ node T_1309 = mux(Pad(T_906,?), Pad(UInt<2>(3),?), Pad(T_1308,?))
+ node T_1310 = mux(Pad(T_904,?), Pad(UInt<2>(0),?), Pad(T_1309,?))
+ node T_1311 = mux(Pad(T_902,?), Pad(UInt<2>(0),?), Pad(T_1310,?))
+ node T_1312 = mux(Pad(T_900,?), Pad(UInt<2>(0),?), Pad(T_1311,?))
+ node T_1313 = mux(Pad(T_898,?), Pad(UInt<2>(0),?), Pad(T_1312,?))
+ node T_1314 = mux(Pad(T_896,?), Pad(UInt<2>(0),?), Pad(T_1313,?))
+ node T_1315 = mux(Pad(T_894,?), Pad(UInt<2>(0),?), Pad(T_1314,?))
+ node T_1316 = mux(Pad(T_892,?), Pad(UInt<2>(0),?), Pad(T_1315,?))
+ node T_1317 = mux(Pad(T_890,?), Pad(UInt<2>(0),?), Pad(T_1316,?))
+ node T_1318 = mux(Pad(T_888,?), Pad(UInt<2>(0),?), Pad(T_1317,?))
+ node T_1319 = mux(Pad(T_886,?), Pad(UInt<2>(0),?), Pad(T_1318,?))
+ node T_1320 = mux(Pad(T_884,?), Pad(UInt<2>(0),?), Pad(T_1319,?))
+ node T_1321 = mux(Pad(T_882,?), Pad(UInt<2>(0),?), Pad(T_1320,?))
+ node T_1322 = mux(Pad(T_880,?), Pad(UInt<2>(0),?), Pad(T_1321,?))
+ node T_1323 = mux(Pad(T_878,?), Pad(UInt<2>(0),?), Pad(T_1322,?))
+ node T_1324 = mux(Pad(T_876,?), Pad(UInt<2>(0),?), Pad(T_1323,?))
+ node T_1325 = mux(Pad(T_874,?), Pad(UInt<2>(0),?), Pad(T_1324,?))
+ node T_1326 = mux(Pad(T_872,?), Pad(UInt<2>(0),?), Pad(T_1325,?))
+ node T_1327 = mux(Pad(T_870,?), Pad(UInt<2>(0),?), Pad(T_1326,?))
+ node T_1328 = mux(Pad(T_868,?), Pad(UInt<2>(0),?), Pad(T_1327,?))
+ node T_1329 = mux(Pad(T_866,?), Pad(UInt<2>(0),?), Pad(T_1328,?))
+ node T_1330 = mux(Pad(T_864,?), Pad(UInt<2>(0),?), Pad(T_1329,?))
+ node T_1331 = mux(Pad(T_862,?), Pad(UInt<2>(0),?), Pad(T_1330,?))
+ node T_1332 = mux(Pad(T_860,?), Pad(UInt<2>(1),?), Pad(T_1331,?))
+ node T_1333 = mux(Pad(T_858,?), Pad(UInt<2>(1),?), Pad(T_1332,?))
+ node T_1334 = mux(Pad(T_856,?), Pad(UInt<2>(1),?), Pad(T_1333,?))
+ node T_1335 = mux(Pad(T_854,?), Pad(UInt<2>(1),?), Pad(T_1334,?))
+ node T_1336 = mux(Pad(T_852,?), Pad(UInt<2>(1),?), Pad(T_1335,?))
+ node T_1337 = mux(Pad(T_850,?), Pad(UInt<2>(0),?), Pad(T_1336,?))
+ node T_1338 = mux(Pad(T_848,?), Pad(UInt<2>(0),?), Pad(T_1337,?))
+ node T_1339 = mux(Pad(T_846,?), Pad(UInt<2>(0),?), Pad(T_1338,?))
+ node T_1340 = mux(Pad(T_844,?), Pad(UInt<2>(0),?), Pad(T_1339,?))
+ node T_1341 = mux(Pad(T_842,?), Pad(UInt<2>(0),?), Pad(T_1340,?))
+ node T_1342 = mux(Pad(T_840,?), Pad(UInt<2>(0),?), Pad(T_1341,?))
+ node T_1343 = mux(Pad(T_838,?), Pad(UInt<2>(2),?), Pad(T_1342,?))
+ node T_1344 = mux(Pad(T_836,?), Pad(UInt<2>(2),?), Pad(T_1343,?))
+ node T_1345 = mux(Pad(T_834,?), Pad(UInt<2>(0),?), Pad(T_1344,?))
+ node T_1346 = mux(Pad(T_832,?), Pad(UInt<2>(0),?), Pad(T_1345,?))
+ node T_1347 = mux(Pad(T_916,?), Pad(N,?), Pad(N,?))
+ node T_1348 = mux(Pad(T_914,?), Pad(N,?), Pad(T_1347,?))
+ node T_1349 = mux(Pad(T_912,?), Pad(N,?), Pad(T_1348,?))
+ node T_1350 = mux(Pad(T_910,?), Pad(N,?), Pad(T_1349,?))
+ node T_1351 = mux(Pad(T_908,?), Pad(N,?), Pad(T_1350,?))
+ node T_1352 = mux(Pad(T_906,?), Pad(N,?), Pad(T_1351,?))
+ node T_1353 = mux(Pad(T_904,?), Pad(Y,?), Pad(T_1352,?))
+ node T_1354 = mux(Pad(T_902,?), Pad(Y,?), Pad(T_1353,?))
+ node T_1355 = mux(Pad(T_900,?), Pad(Y,?), Pad(T_1354,?))
+ node T_1356 = mux(Pad(T_898,?), Pad(Y,?), Pad(T_1355,?))
+ node T_1357 = mux(Pad(T_896,?), Pad(Y,?), Pad(T_1356,?))
+ node T_1358 = mux(Pad(T_894,?), Pad(Y,?), Pad(T_1357,?))
+ node T_1359 = mux(Pad(T_892,?), Pad(Y,?), Pad(T_1358,?))
+ node T_1360 = mux(Pad(T_890,?), Pad(Y,?), Pad(T_1359,?))
+ node T_1361 = mux(Pad(T_888,?), Pad(Y,?), Pad(T_1360,?))
+ node T_1362 = mux(Pad(T_886,?), Pad(Y,?), Pad(T_1361,?))
+ node T_1363 = mux(Pad(T_884,?), Pad(Y,?), Pad(T_1362,?))
+ node T_1364 = mux(Pad(T_882,?), Pad(Y,?), Pad(T_1363,?))
+ node T_1365 = mux(Pad(T_880,?), Pad(Y,?), Pad(T_1364,?))
+ node T_1366 = mux(Pad(T_878,?), Pad(Y,?), Pad(T_1365,?))
+ node T_1367 = mux(Pad(T_876,?), Pad(Y,?), Pad(T_1366,?))
+ node T_1368 = mux(Pad(T_874,?), Pad(Y,?), Pad(T_1367,?))
+ node T_1369 = mux(Pad(T_872,?), Pad(Y,?), Pad(T_1368,?))
+ node T_1370 = mux(Pad(T_870,?), Pad(Y,?), Pad(T_1369,?))
+ node T_1371 = mux(Pad(T_868,?), Pad(Y,?), Pad(T_1370,?))
+ node T_1372 = mux(Pad(T_866,?), Pad(N,?), Pad(T_1371,?))
+ node T_1373 = mux(Pad(T_864,?), Pad(N,?), Pad(T_1372,?))
+ node T_1374 = mux(Pad(T_862,?), Pad(N,?), Pad(T_1373,?))
+ node T_1375 = mux(Pad(T_860,?), Pad(Y,?), Pad(T_1374,?))
+ node T_1376 = mux(Pad(T_858,?), Pad(Y,?), Pad(T_1375,?))
+ node T_1377 = mux(Pad(T_856,?), Pad(Y,?), Pad(T_1376,?))
+ node T_1378 = mux(Pad(T_854,?), Pad(Y,?), Pad(T_1377,?))
+ node T_1379 = mux(Pad(T_852,?), Pad(Y,?), Pad(T_1378,?))
+ node T_1380 = mux(Pad(T_850,?), Pad(N,?), Pad(T_1379,?))
+ node T_1381 = mux(Pad(T_848,?), Pad(N,?), Pad(T_1380,?))
+ node T_1382 = mux(Pad(T_846,?), Pad(N,?), Pad(T_1381,?))
+ node T_1383 = mux(Pad(T_844,?), Pad(N,?), Pad(T_1382,?))
+ node T_1384 = mux(Pad(T_842,?), Pad(N,?), Pad(T_1383,?))
+ node T_1385 = mux(Pad(T_840,?), Pad(N,?), Pad(T_1384,?))
+ node T_1386 = mux(Pad(T_838,?), Pad(Y,?), Pad(T_1385,?))
+ node T_1387 = mux(Pad(T_836,?), Pad(Y,?), Pad(T_1386,?))
+ node T_1388 = mux(Pad(T_834,?), Pad(Y,?), Pad(T_1387,?))
+ node T_1389 = mux(Pad(T_832,?), Pad(Y,?), Pad(T_1388,?))
+ node T_1390 = mux(Pad(T_916,?), Pad(UInt<2>(3),?), Pad(UInt<2>(0),?))
+ node T_1391 = mux(Pad(T_914,?), Pad(UInt<2>(2),?), Pad(T_1390,?))
+ node T_1392 = mux(Pad(T_912,?), Pad(UInt<2>(1),?), Pad(T_1391,?))
+ node T_1393 = mux(Pad(T_910,?), Pad(UInt<2>(3),?), Pad(T_1392,?))
+ node T_1394 = mux(Pad(T_908,?), Pad(UInt<2>(2),?), Pad(T_1393,?))
+ node T_1395 = mux(Pad(T_906,?), Pad(UInt<2>(1),?), Pad(T_1394,?))
+ node T_1396 = mux(Pad(T_904,?), Pad(UInt<2>(0),?), Pad(T_1395,?))
+ node T_1397 = mux(Pad(T_902,?), Pad(UInt<2>(0),?), Pad(T_1396,?))
+ node T_1398 = mux(Pad(T_900,?), Pad(UInt<2>(0),?), Pad(T_1397,?))
+ node T_1399 = mux(Pad(T_898,?), Pad(UInt<2>(0),?), Pad(T_1398,?))
+ node T_1400 = mux(Pad(T_896,?), Pad(UInt<2>(0),?), Pad(T_1399,?))
+ node T_1401 = mux(Pad(T_894,?), Pad(UInt<2>(0),?), Pad(T_1400,?))
+ node T_1402 = mux(Pad(T_892,?), Pad(UInt<2>(0),?), Pad(T_1401,?))
+ node T_1403 = mux(Pad(T_890,?), Pad(UInt<2>(0),?), Pad(T_1402,?))
+ node T_1404 = mux(Pad(T_888,?), Pad(UInt<2>(0),?), Pad(T_1403,?))
+ node T_1405 = mux(Pad(T_886,?), Pad(UInt<2>(0),?), Pad(T_1404,?))
+ node T_1406 = mux(Pad(T_884,?), Pad(UInt<2>(0),?), Pad(T_1405,?))
+ node T_1407 = mux(Pad(T_882,?), Pad(UInt<2>(0),?), Pad(T_1406,?))
+ node T_1408 = mux(Pad(T_880,?), Pad(UInt<2>(0),?), Pad(T_1407,?))
+ node T_1409 = mux(Pad(T_878,?), Pad(UInt<2>(0),?), Pad(T_1408,?))
+ node T_1410 = mux(Pad(T_876,?), Pad(UInt<2>(0),?), Pad(T_1409,?))
+ node T_1411 = mux(Pad(T_874,?), Pad(UInt<2>(0),?), Pad(T_1410,?))
+ node T_1412 = mux(Pad(T_872,?), Pad(UInt<2>(0),?), Pad(T_1411,?))
+ node T_1413 = mux(Pad(T_870,?), Pad(UInt<2>(0),?), Pad(T_1412,?))
+ node T_1414 = mux(Pad(T_868,?), Pad(UInt<2>(0),?), Pad(T_1413,?))
+ node T_1415 = mux(Pad(T_866,?), Pad(UInt<2>(0),?), Pad(T_1414,?))
+ node T_1416 = mux(Pad(T_864,?), Pad(UInt<2>(0),?), Pad(T_1415,?))
+ node T_1417 = mux(Pad(T_862,?), Pad(UInt<2>(0),?), Pad(T_1416,?))
+ node T_1418 = mux(Pad(T_860,?), Pad(UInt<2>(0),?), Pad(T_1417,?))
+ node T_1419 = mux(Pad(T_858,?), Pad(UInt<2>(0),?), Pad(T_1418,?))
+ node T_1420 = mux(Pad(T_856,?), Pad(UInt<2>(0),?), Pad(T_1419,?))
+ node T_1421 = mux(Pad(T_854,?), Pad(UInt<2>(0),?), Pad(T_1420,?))
+ node T_1422 = mux(Pad(T_852,?), Pad(UInt<2>(0),?), Pad(T_1421,?))
+ node T_1423 = mux(Pad(T_850,?), Pad(UInt<2>(0),?), Pad(T_1422,?))
+ node T_1424 = mux(Pad(T_848,?), Pad(UInt<2>(0),?), Pad(T_1423,?))
+ node T_1425 = mux(Pad(T_846,?), Pad(UInt<2>(0),?), Pad(T_1424,?))
+ node T_1426 = mux(Pad(T_844,?), Pad(UInt<2>(0),?), Pad(T_1425,?))
+ node T_1427 = mux(Pad(T_842,?), Pad(UInt<2>(0),?), Pad(T_1426,?))
+ node T_1428 = mux(Pad(T_840,?), Pad(UInt<2>(0),?), Pad(T_1427,?))
+ node T_1429 = mux(Pad(T_838,?), Pad(UInt<2>(0),?), Pad(T_1428,?))
+ node T_1430 = mux(Pad(T_836,?), Pad(UInt<2>(0),?), Pad(T_1429,?))
+ node T_1431 = mux(Pad(T_834,?), Pad(UInt<2>(0),?), Pad(T_1430,?))
+ node T_1432 = mux(Pad(T_832,?), Pad(UInt<2>(0),?), Pad(T_1431,?))
+ node rs1_addr = bits(ctrl.inst, 19, 15)
+ node rs2_addr = bits(ctrl.inst, 24, 20)
+ reg st_type : UInt<2>
+ reg ld_type : UInt
+ reg wb_sel : UInt
+ wire T_1433 : UInt<1>
+ T_1433 := T_1389
+ reg wb_en : UInt<1>
+ reg csr_cmd : UInt
+ ctrl.pc_sel := Pad(T_959,?)
+ node T_1434 = bit-not(ctrl.stall)
+ node T_1435 = bit-not(ctrl.data_re)
+ node T_1436 = bit-and(T_1434, T_1435)
+ ctrl.inst_re := Pad(T_1436,?)
+ node T_1437 = neq(Pad(T_1303,?), Pad(UInt<3>(7),?))
+ wire T_1438 : UInt<1>
+ T_1438 := T_1217
+ node T_1439 = bit-or(T_1437, T_1438)
+ node T_1440 = mux(Pad(T_1439,?), Pad(UInt<1>(1),?), Pad(UInt<1>(0),?))
+ ctrl.inst_type := Pad(T_1440,?)
+ ctrl.A_sel := Pad(T_1002,?)
+ ctrl.B_sel := Pad(T_1045,?)
+ ctrl.imm_sel := Pad(T_1088,?)
+ ctrl.alu_op := Pad(T_1131,?)
+ ctrl.br_type := Pad(T_1174,?)
+ ctrl.st_type := Pad(T_1260,?)
+ node T_1441 = bit-not(ctrl.stall)
+ when T_1441 :
+ st_type := Pad(ctrl.st_type,?)
+ ld_type := Pad(T_1303,?)
+ wb_sel := Pad(T_1346,?)
+ wire T_1442 : UInt<1>
+ T_1442 := T_1389
+ wb_en := Pad(T_1442,?)
+ csr_cmd := Pad(T_1432,?)
+ node T_1443 = neq(Pad(ctrl.ld_type,?), Pad(UInt<3>(7),?))
+ node T_1444 = neq(Pad(T_1303,?), Pad(UInt<3>(7),?))
+ node T_1445 = mux(Pad(ctrl.stall,?), Pad(T_1443,?), Pad(T_1444,?))
+ ctrl.data_re := Pad(T_1445,?)
+ ctrl.ld_type := Pad(ld_type,?)
+ ctrl.wb_en := Pad(wb_en,?)
+ ctrl.wb_sel := Pad(wb_sel,?)
+ ctrl.csr_cmd := Pad(csr_cmd,?)
diff --git a/test/chisel3/Datapath.fir b/test/chisel3/Datapath.fir
new file mode 100644
index 00000000..3b9b0e9c
--- /dev/null
+++ b/test/chisel3/Datapath.fir
@@ -0,0 +1,377 @@
+; RUN: firrtl -i %s -o %s.flo -x X -p c | tee %s.out | FileCheck %s
+; CHECK: Done!
+
+circuit Datapath :
+ module ALU :
+ input B : UInt<32>
+ output out : UInt<32>
+ output sum : UInt<32>
+ input A : UInt<32>
+ input alu_op : UInt<4>
+
+ node T_416 = bits(B, 4, 0)
+ wire shamt : UInt
+ shamt := T_416
+ node T_417 = add-wrap(Pad(A,?), Pad(B,?))
+ node T_418 = sub-wrap(Pad(A,?), Pad(B,?))
+ wire T_419 : SInt
+ T_419 := A
+ node T_420 = dshr(T_419, shamt)
+ wire T_421 : UInt
+ T_421 := T_420
+ node T_422 = dshr(A, shamt)
+ node T_423 = dshl(A, shamt)
+ node T_424 = bits(T_423, 31, 0)
+ wire T_425 : SInt
+ T_425 := A
+ wire T_426 : SInt
+ T_426 := B
+ node T_427 = lt(Pad(T_425,?), Pad(T_426,?))
+ wire T_428 : UInt
+ T_428 := T_427
+ node T_429 = lt(Pad(A,?), Pad(B,?))
+ node T_430 = bit-and(Pad(A,?), Pad(B,?))
+ node T_431 = bit-or(Pad(A,?), Pad(B,?))
+ node T_432 = bit-xor(Pad(A,?), Pad(B,?))
+ node T_433 = eq(Pad(UInt<4>(10),?), Pad(alu_op,?))
+ node T_434 = mux(Pad(T_433,?), Pad(A,?), Pad(B,?))
+ node T_435 = eq(Pad(UInt<4>(4),?), Pad(alu_op,?))
+ node T_436 = mux(Pad(T_435,?), Pad(T_432,?), Pad(T_434,?))
+ node T_437 = eq(Pad(UInt<4>(3),?), Pad(alu_op,?))
+ node T_438 = mux(Pad(T_437,?), Pad(T_431,?), Pad(T_436,?))
+ node T_439 = eq(Pad(UInt<4>(2),?), Pad(alu_op,?))
+ node T_440 = mux(Pad(T_439,?), Pad(T_430,?), Pad(T_438,?))
+ node T_441 = eq(Pad(UInt<4>(7),?), Pad(alu_op,?))
+ node T_442 = mux(Pad(T_441,?), Pad(T_429,?), Pad(T_440,?))
+ node T_443 = eq(Pad(UInt<4>(5),?), Pad(alu_op,?))
+ node T_444 = mux(Pad(T_443,?), Pad(T_428,?), Pad(T_442,?))
+ node T_445 = eq(Pad(UInt<4>(6),?), Pad(alu_op,?))
+ node T_446 = mux(Pad(T_445,?), Pad(T_424,?), Pad(T_444,?))
+ node T_447 = eq(Pad(UInt<4>(8),?), Pad(alu_op,?))
+ node T_448 = mux(Pad(T_447,?), Pad(T_422,?), Pad(T_446,?))
+ node T_449 = eq(Pad(UInt<4>(9),?), Pad(alu_op,?))
+ node T_450 = mux(Pad(T_449,?), Pad(T_421,?), Pad(T_448,?))
+ node T_451 = eq(Pad(UInt<4>(1),?), Pad(alu_op,?))
+ node T_452 = mux(Pad(T_451,?), Pad(T_418,?), Pad(T_450,?))
+ node T_453 = eq(Pad(UInt<4>(0),?), Pad(alu_op,?))
+ node T_454 = mux(Pad(T_453,?), Pad(T_417,?), Pad(T_452,?))
+ out := Pad(T_454,?)
+ node T_455 = bit(alu_op, 0)
+ node T_456 = sub-wrap(Pad(UInt<1>(0),?), Pad(B,?))
+ node T_457 = mux(Pad(T_455,?), Pad(T_456,?), Pad(B,?))
+ node T_458 = add-wrap(Pad(A,?), Pad(T_457,?))
+ sum := Pad(T_458,?)
+ module BrCond :
+ input br_type : UInt<3>
+ input rs2 : UInt<32>
+ input rs1 : UInt<32>
+ output taken : UInt<1>
+
+ node eq = eq(Pad(rs1,?), Pad(rs2,?))
+ node neq = bit-not(eq)
+ wire T_459 : SInt
+ T_459 := rs1
+ wire T_460 : SInt
+ T_460 := rs2
+ node lt = lt(Pad(T_459,?), Pad(T_460,?))
+ node ge = bit-not(lt)
+ node ltu = lt(Pad(rs1,?), Pad(rs2,?))
+ node geu = bit-not(ltu)
+ node T_461 = UInt<1>(1)
+ node T_462 = UInt<1>(0)
+ node T_463 = eq(Pad(br_type,?), Pad(UInt<3>(2),?))
+ node T_464 = bit-and(T_463, eq)
+ node T_465 = eq(Pad(br_type,?), Pad(UInt<3>(6),?))
+ node T_466 = bit-and(T_465, neq)
+ node T_467 = bit-or(T_464, T_466)
+ node T_468 = eq(Pad(br_type,?), Pad(UInt<3>(1),?))
+ node T_469 = bit-and(T_468, lt)
+ node T_470 = bit-or(T_467, T_469)
+ node T_471 = eq(Pad(br_type,?), Pad(UInt<3>(5),?))
+ node T_472 = bit-and(T_471, ge)
+ node T_473 = bit-or(T_470, T_472)
+ node T_474 = eq(Pad(br_type,?), Pad(UInt<3>(0),?))
+ node T_475 = bit-and(T_474, ltu)
+ node T_476 = bit-or(T_473, T_475)
+ node T_477 = eq(Pad(br_type,?), Pad(UInt<3>(4),?))
+ node T_478 = bit-and(T_477, geu)
+ node T_479 = bit-or(T_476, T_478)
+ taken := Pad(T_479,?)
+ module RegFile :
+ input raddr1 : UInt<5>
+ input raddr2 : UInt<5>
+ output rdata1 : UInt<32>
+ output rdata2 : UInt<32>
+ input wen : UInt<1>
+ input waddr : UInt<5>
+ input wdata : UInt<32>
+
+ mem regs : UInt<32>[32]
+ node T_480 = bit-or-reduce(raddr1)
+ accessor T_481 = regs[raddr1]
+ node T_482 = mux(Pad(T_480,?), Pad(T_481,?), Pad(UInt<1>(0),?))
+ rdata1 := Pad(T_482,?)
+ node T_483 = bit-or-reduce(raddr2)
+ accessor T_484 = regs[raddr2]
+ node T_485 = mux(Pad(T_483,?), Pad(T_484,?), Pad(UInt<1>(0),?))
+ rdata2 := Pad(T_485,?)
+ node T_486 = bit-or-reduce(waddr)
+ node T_487 = bit-and(wen, T_486)
+ when T_487 :
+ accessor T_488 = regs[waddr]
+ T_488 := Pad(wdata,?)
+ module ImmGenWire :
+ output out : UInt<32>
+ input sel : UInt<3>
+ input inst : UInt<32>
+
+ node T_489 = bits(inst, 31, 20)
+ wire Iimm : SInt
+ Iimm := T_489
+ node T_490 = bits(inst, 31, 25)
+ node T_491 = bits(inst, 11, 7)
+ node T_492 = cat(T_490, T_491)
+ wire Simm : SInt
+ Simm := T_492
+ node T_493 = bit(inst, 31)
+ node T_494 = bit(inst, 7)
+ node T_495 = bits(inst, 30, 25)
+ node T_496 = bits(inst, 11, 8)
+ node T_497 = cat(T_493, T_494)
+ node T_498 = cat(T_496, UInt<1>(0))
+ node T_499 = cat(T_495, T_498)
+ node T_500 = cat(T_497, T_499)
+ wire Bimm : SInt
+ Bimm := T_500
+ node T_501 = bits(inst, 31, 12)
+ node T_502 = cat(T_501, UInt<12>(0))
+ wire Uimm : SInt
+ Uimm := T_502
+ node T_503 = bit(inst, 31)
+ node T_504 = bits(inst, 19, 12)
+ node T_505 = bit(inst, 20)
+ node T_506 = bits(inst, 30, 25)
+ node T_507 = bits(inst, 24, 21)
+ node T_508 = cat(T_504, T_505)
+ node T_509 = cat(T_503, T_508)
+ node T_510 = cat(T_507, UInt<1>(0))
+ node T_511 = cat(T_506, T_510)
+ node T_512 = cat(T_509, T_511)
+ wire Jimm : SInt
+ Jimm := T_512
+ node T_513 = bits(inst, 19, 15)
+ wire Zimm : UInt
+ Zimm := T_513
+ node T_514 = eq(Pad(UInt<3>(3),?), Pad(sel,?))
+ node T_515 = mux(Pad(T_514,?), Pad(Jimm,?), Pad(Zimm,?))
+ node T_516 = eq(Pad(UInt<3>(2),?), Pad(sel,?))
+ node T_517 = mux(Pad(T_516,?), Pad(Uimm,?), Pad(T_515,?))
+ node T_518 = eq(Pad(UInt<3>(4),?), Pad(sel,?))
+ node T_519 = mux(Pad(T_518,?), Pad(Bimm,?), Pad(T_517,?))
+ node T_520 = eq(Pad(UInt<3>(1),?), Pad(sel,?))
+ node T_521 = mux(Pad(T_520,?), Pad(Simm,?), Pad(T_519,?))
+ node T_522 = eq(Pad(UInt<3>(0),?), Pad(sel,?))
+ node T_523 = mux(Pad(T_522,?), Pad(Iimm,?), Pad(T_521,?))
+ out := Pad(T_523,?)
+ module CSR :
+ output host : {status : UInt<32>, tohost : UInt<32>, flip hid : UInt<1>}
+ input src : UInt<32>
+ input cmd : UInt<2>
+ output data : UInt<32>
+ input addr : UInt<12>
+
+ reg reg_tohost : UInt<32>
+ on-reset reg_tohost := Pad(UInt<32>(0),?)
+ reg reg_status : UInt<32>
+ on-reset reg_status := Pad(UInt<32>(0),?)
+ host.tohost := Pad(reg_tohost,?)
+ host.status := Pad(reg_status,?)
+ node T_524 = eq(Pad(UInt<12>(1291),?), Pad(addr,?))
+ node T_525 = mux(Pad(T_524,?), Pad(host.hid,?), Pad(UInt<1>(0),?))
+ node T_526 = eq(Pad(UInt<12>(1290),?), Pad(addr,?))
+ node T_527 = mux(Pad(T_526,?), Pad(reg_status,?), Pad(T_525,?))
+ node T_528 = eq(Pad(UInt<12>(1310),?), Pad(addr,?))
+ node T_529 = mux(Pad(T_528,?), Pad(reg_tohost,?), Pad(T_527,?))
+ wire T_530 : UInt
+ T_530 := T_529
+ data := Pad(T_530,?)
+ node T_531 = eq(Pad(cmd,?), Pad(UInt<2>(1),?))
+ when T_531 :
+ node T_532 = eq(Pad(addr,?), Pad(UInt<12>(1310),?))
+ when T_532 : reg_tohost := Pad(src,?)
+ node T_533 = eq(Pad(addr,?), Pad(UInt<12>(1290),?))
+ when T_533 : reg_status := Pad(src,?)
+ node T_534 = eq(Pad(cmd,?), Pad(UInt<2>(2),?))
+ node T_535 = neq(Pad(src,?), Pad(UInt<1>(0),?))
+ node T_536 = bit-and(T_534, T_535)
+ when T_536 :
+ node T_537 = eq(Pad(addr,?), Pad(UInt<12>(1310),?))
+ when T_537 :
+ node T_538 = dshl(UInt<1>(1), src)
+ node T_539 = bit-or(Pad(data,?), Pad(T_538,?))
+ reg_tohost := Pad(T_539,?)
+ node T_540 = eq(Pad(addr,?), Pad(UInt<12>(1290),?))
+ when T_540 :
+ node T_541 = dshl(UInt<1>(1), src)
+ node T_542 = bit-or(Pad(data,?), Pad(T_541,?))
+ reg_status := Pad(T_542,?)
+ node T_543 = eq(Pad(cmd,?), Pad(UInt<2>(3),?))
+ node T_544 = neq(Pad(src,?), Pad(UInt<1>(0),?))
+ node T_545 = bit-and(T_543, T_544)
+ when T_545 :
+ node T_546 = eq(Pad(addr,?), Pad(UInt<12>(1310),?))
+ when T_546 :
+ node T_547 = dshl(UInt<1>(0), src)
+ node T_548 = bit-and(Pad(data,?), Pad(T_547,?))
+ reg_tohost := Pad(T_548,?)
+ node T_549 = eq(Pad(addr,?), Pad(UInt<12>(1290),?))
+ when T_549 :
+ node T_550 = dshl(UInt<1>(0), src)
+ node T_551 = bit-and(Pad(data,?), Pad(T_550,?))
+ reg_status := Pad(T_551,?)
+ module Datapath :
+ output host : {status : UInt<32>, tohost : UInt<32>, flip hid : UInt<1>}
+ output dcache : {re : UInt<1>, we : UInt<4>, addr : UInt<32>, flip dout : UInt<32>, din : UInt<32>}
+ input stall : UInt<1>
+ input ctrl : {flip inst : UInt<32>, flip stall : UInt<1>, imm_sel : UInt<3>, wb_en : UInt<1>, wb_sel : UInt<2>, A_sel : UInt<1>, B_sel : UInt<1>, alu_op : UInt<4>, br_type : UInt<3>, data_re : UInt<1>, st_type : UInt<2>, ld_type : UInt<3>, csr_cmd : UInt<2>, pc_sel : UInt<1>, inst_type : UInt<1>, inst_re : UInt<1>}
+ output icache : {re : UInt<1>, we : UInt<4>, addr : UInt<32>, flip dout : UInt<32>, din : UInt<32>}
+
+ inst alu of ALU
+ inst brCond of BrCond
+ inst regFile of RegFile
+ inst immGen of ImmGenWire
+ reg fe_inst : UInt<32>
+ on-reset fe_inst := Pad(UInt<32>(0),?)
+ reg fe_pc : UInt
+ reg ew_inst : UInt<32>
+ on-reset ew_inst := Pad(UInt<32>(0),?)
+ reg ew_pc : UInt
+ reg ew_alu : UInt
+ node T_552 = sub-wrap(Pad(UInt<14>(8192),?), Pad(UInt<3>(4),?))
+ reg pc : UInt
+ on-reset pc := Pad(T_552,?)
+ node T_553 = eq(Pad(ctrl.pc_sel,?), Pad(UInt<1>(1),?))
+ node T_554 = bit-or(T_553, brCond.taken)
+ node T_555 = add-wrap(Pad(pc,?), Pad(UInt<3>(4),?))
+ node iaddr = mux(Pad(T_554,?), Pad(alu.sum,?), Pad(T_555,?))
+ node T_556 = eq(Pad(ctrl.inst_type,?), Pad(UInt<1>(1),?))
+ node T_557 = bit-or(T_556, brCond.taken)
+ node inst = mux(Pad(T_557,?), Pad(UInt<5>(19),?), Pad(icache.dout,?))
+ icache.addr := Pad(iaddr,?)
+ icache.re := Pad(ctrl.inst_re,?)
+ node T_558 = bit-or-reduce(dcache.we)
+ node T_559 = bit-not(T_558)
+ node T_560 = bit-and(icache.re, T_559)
+ node T_561 = mux(Pad(T_560,?), Pad(iaddr,?), Pad(pc,?))
+ pc := Pad(T_561,?)
+ node T_562 = bit-not(stall)
+ when T_562 :
+ fe_pc := Pad(pc,?)
+ fe_inst := Pad(inst,?)
+ ctrl.inst := Pad(fe_inst,?)
+ ctrl.stall := Pad(stall,?)
+ node rd_addr = bits(fe_inst, 11, 7)
+ node rs1_addr = bits(fe_inst, 19, 15)
+ node rs2_addr = bits(fe_inst, 24, 20)
+ regFile.raddr1 := Pad(rs1_addr,?)
+ regFile.raddr2 := Pad(rs2_addr,?)
+ immGen.inst := Pad(fe_inst,?)
+ immGen.sel := Pad(ctrl.imm_sel,?)
+ node rs1NotZero = bit-or-reduce(rs1_addr)
+ node rs2NotZero = bit-or-reduce(rs2_addr)
+ node T_563 = eq(Pad(ctrl.wb_sel,?), Pad(UInt<2>(0),?))
+ node alutype = bit-and(ctrl.wb_en, T_563)
+ node ex_rd_addr = bits(ew_inst, 11, 7)
+ node T_564 = bit-and(alutype, rs1NotZero)
+ node T_565 = eq(Pad(rs1_addr,?), Pad(ex_rd_addr,?))
+ node T_566 = bit-and(T_564, T_565)
+ node rs1 = mux(Pad(T_566,?), Pad(ew_alu,?), Pad(regFile.rdata1,?))
+ node T_567 = bit-and(alutype, rs2NotZero)
+ node T_568 = eq(Pad(rs2_addr,?), Pad(ex_rd_addr,?))
+ node T_569 = bit-and(T_567, T_568)
+ node rs2 = mux(Pad(T_569,?), Pad(ew_alu,?), Pad(regFile.rdata2,?))
+ node T_570 = eq(Pad(ctrl.A_sel,?), Pad(UInt<1>(0),?))
+ node T_571 = mux(Pad(T_570,?), Pad(rs1,?), Pad(fe_pc,?))
+ alu.A := Pad(T_571,?)
+ node T_572 = eq(Pad(ctrl.B_sel,?), Pad(UInt<1>(0),?))
+ node T_573 = mux(Pad(T_572,?), Pad(rs2,?), Pad(immGen.out,?))
+ alu.B := Pad(T_573,?)
+ alu.alu_op := Pad(ctrl.alu_op,?)
+ brCond.rs1 := Pad(rs1,?)
+ brCond.rs2 := Pad(rs2,?)
+ brCond.br_type := Pad(ctrl.br_type,?)
+ node T_574 = bit(alu.sum, 1)
+ node T_575 = dshl(T_574, UInt<3>(4))
+ node T_576 = bit(alu.sum, 0)
+ node T_577 = dshl(T_576, UInt<2>(3))
+ node woffset = bit-or(Pad(T_575,?), Pad(T_577,?))
+ dcache.re := Pad(ctrl.data_re,?)
+ node T_578 = mux(Pad(stall,?), Pad(ew_alu,?), Pad(alu.sum,?))
+ dcache.addr := Pad(T_578,?)
+ node T_579 = bits(alu.sum, 1, 0)
+ node T_580 = dshl(UInt<2>(3), T_579)
+ node T_581 = bits(alu.sum, 1, 0)
+ node T_582 = dshl(UInt<1>(1), T_581)
+ node T_583 = eq(Pad(UInt<2>(2),?), Pad(ctrl.st_type,?))
+ node T_584 = mux(Pad(T_583,?), Pad(T_582,?), Pad(UInt<1>(0),?))
+ node T_585 = eq(Pad(UInt<2>(1),?), Pad(ctrl.st_type,?))
+ node T_586 = mux(Pad(T_585,?), Pad(T_580,?), Pad(T_584,?))
+ node T_587 = eq(Pad(UInt<2>(0),?), Pad(ctrl.st_type,?))
+ node T_588 = mux(Pad(T_587,?), Pad(UInt<4>(15),?), Pad(T_586,?))
+ node T_589 = mux(Pad(stall,?), Pad(UInt<1>(0),?), Pad(T_588,?))
+ dcache.we := Pad(T_589,?)
+ node T_590 = dshl(rs2, woffset)
+ dcache.din := Pad(T_590,?)
+ node T_591 = bit-not(stall)
+ when T_591 :
+ ew_pc := Pad(fe_pc,?)
+ ew_inst := Pad(fe_inst,?)
+ ew_alu := Pad(alu.out,?)
+ node T_592 = bit(ew_alu, 1)
+ node T_593 = dshl(T_592, UInt<3>(4))
+ node T_594 = bit(ew_alu, 0)
+ node T_595 = dshl(T_594, UInt<2>(3))
+ node loffset = bit-or(Pad(T_593,?), Pad(T_595,?))
+ node lshift = dshr(dcache.dout, loffset)
+ node T_596 = bits(lshift, 15, 0)
+ wire T_597 : SInt
+ T_597 := T_596
+ node T_598 = Pad(T_597, 32)
+ wire T_599 : UInt
+ T_599 := T_598
+ node T_600 = bits(lshift, 7, 0)
+ wire T_601 : SInt
+ T_601 := T_600
+ node T_602 = Pad(T_601, 32)
+ wire T_603 : UInt
+ T_603 := T_602
+ node T_604 = bits(lshift, 15, 0)
+ wire T_605 : UInt
+ T_605 := T_604
+ node T_606 = bits(lshift, 7, 0)
+ wire T_607 : UInt
+ T_607 := T_606
+ node T_608 = eq(Pad(UInt<3>(4),?), Pad(ctrl.ld_type,?))
+ node T_609 = mux(Pad(T_608,?), Pad(T_607,?), Pad(dcache.dout,?))
+ node T_610 = eq(Pad(UInt<3>(3),?), Pad(ctrl.ld_type,?))
+ node T_611 = mux(Pad(T_610,?), Pad(T_605,?), Pad(T_609,?))
+ node T_612 = eq(Pad(UInt<3>(2),?), Pad(ctrl.ld_type,?))
+ node T_613 = mux(Pad(T_612,?), Pad(T_603,?), Pad(T_611,?))
+ node T_614 = eq(Pad(UInt<3>(1),?), Pad(ctrl.ld_type,?))
+ node load = mux(Pad(T_614,?), Pad(T_599,?), Pad(T_613,?))
+ inst csr of CSR
+ csr.host := host
+ csr.src := Pad(ew_alu,?)
+ node T_615 = bits(ew_inst, 31, 20)
+ csr.addr := Pad(T_615,?)
+ csr.cmd := Pad(ctrl.csr_cmd,?)
+ node T_616 = add-wrap(Pad(ew_pc,?), Pad(UInt<3>(4),?))
+ node T_617 = eq(Pad(UInt<2>(3),?), Pad(ctrl.wb_sel,?))
+ node T_618 = mux(Pad(T_617,?), Pad(csr.data,?), Pad(ew_alu,?))
+ node T_619 = eq(Pad(UInt<2>(2),?), Pad(ctrl.wb_sel,?))
+ node T_620 = mux(Pad(T_619,?), Pad(T_616,?), Pad(T_618,?))
+ node T_621 = eq(Pad(UInt<2>(1),?), Pad(ctrl.wb_sel,?))
+ node regWrite = mux(Pad(T_621,?), Pad(load,?), Pad(T_620,?))
+ regFile.wen := Pad(ctrl.wb_en,?)
+ regFile.waddr := Pad(ex_rd_addr,?)
+ regFile.wdata := Pad(regWrite,?)
diff --git a/test/errors/high-form/Flip-Mem.fir b/test/errors/high-form/Flip-Mem.fir
new file mode 100644
index 00000000..67fae14f
--- /dev/null
+++ b/test/errors/high-form/Flip-Mem.fir
@@ -0,0 +1,6 @@
+; RUN: firrtl -i %s -o %s.flo -x X -p c | tee %s.out | FileCheck %s
+; CHECK: Memory m cannot be a bundle type with flips.
+
+circuit Flip-Mem :
+ module Flip-Mem :
+ mem m : {x : UInt<3>, flip y : UInt<5>}[10]
diff --git a/test/errors/high-form/Top.fir b/test/errors/high-form/Top.fir
new file mode 100644
index 00000000..1d663c9c
--- /dev/null
+++ b/test/errors/high-form/Top.fir
@@ -0,0 +1,9 @@
+
+; RUN: firrtl -i %s -o %s.flo -x X -p c | tee %s.out | FileCheck %s
+; CHECK: A single module must be named Top.
+
+circuit Top :
+ module Top1 :
+ wire x : UInt<1>
+ module Top2 :
+ wire x : UInt<1>
diff --git a/test/errors/parser/Nested-Module.fir b/test/errors/parser/Nested-Module.fir
new file mode 100644
index 00000000..3f06db76
--- /dev/null
+++ b/test/errors/parser/Nested-Module.fir
@@ -0,0 +1,6 @@
+; RUN: firrtl -i %s -o %s.flo -x X -p c | tee %s.out | FileCheck %s
+; CHECK: FIRRTL Parsing Error: Expected a statement here.
+
+circuit Nested-Module :
+ module Top :
+ module Child :
diff --git a/test/errors/parser/Statements-in-Circuit.fir b/test/errors/parser/Statements-in-Circuit.fir
new file mode 100644
index 00000000..5f675e82
--- /dev/null
+++ b/test/errors/parser/Statements-in-Circuit.fir
@@ -0,0 +1,5 @@
+; RUN: firrtl -i %s -o %s.flo -x X -p c | tee %s.out | FileCheck %s
+; CHECK: FIRRTL Parsing Error: Expected a module declaration here.
+
+circuit Statement-in-Circuit :
+ node x : UInt(1)
diff --git a/test/syntax/letrec-non-struct.fir b/test/syntax/letrec-non-struct.fir
deleted file mode 100644
index 37fb2123..00000000
--- a/test/syntax/letrec-non-struct.fir
+++ /dev/null
@@ -1,9 +0,0 @@
-; RUN: firrtl %s | tee %s.out | FileCheck %s
-circuit top:
- module top:
- input x : UInt(16)
- output y : UInt(16)
- letrec:
- reg r : UInt(10)
- in:
- r := UInt(11)
generated by cgit v1.2.3 (git 2.25.1) at 2026-01-31 13:15:25 +0000