aboutsummaryrefslogtreecommitdiff
path: root/test/chisel3/MemorySearch.fir
diff options
context:
space:
mode:
authorazidar2015-05-21 13:18:09 -0400
committerazidar2015-05-21 13:18:09 -0400
commiteb125225cb96875f31a9af0db187406782b75223 (patch)
treea37566e307424a277a3d2fe229f069cbbcca4ae4 /test/chisel3/MemorySearch.fir
parent81905d9fdd0debe8f666658607c2a20728baa86d (diff)
Added pad pass, used for flo backend
Diffstat (limited to 'test/chisel3/MemorySearch.fir')
-rw-r--r--test/chisel3/MemorySearch.fir59
1 files changed, 24 insertions, 35 deletions
diff --git a/test/chisel3/MemorySearch.fir b/test/chisel3/MemorySearch.fir
index e62f35ba..375bfcff 100644
--- a/test/chisel3/MemorySearch.fir
+++ b/test/chisel3/MemorySearch.fir
@@ -1,45 +1,34 @@
-; RUN: firrtl -i %s -o %s.flo -x X -p c | tee %s.out | FileCheck %s
-; CHECK: Done!
+; RUN: firrtl -i %s -o %s.flo -X flo -p c | tee %s.out | FileCheck %s
+;CHECK: Done!
+
circuit MemorySearch :
module MemorySearch :
input target : UInt<4>
output address : UInt<3>
input en : UInt<1>
- output odone : UInt<1>
+ output done : UInt<1>
- node T_35 = UInt<3>(0)
reg index : UInt<3>
- on-reset index := T_35
- node T_36 = UInt<1>(0)
- node T_37 = UInt<3>(4)
- node T_38 = UInt<4>(15)
- node T_39 = UInt<4>(14)
- node T_40 = UInt<2>(2)
- node T_41 = UInt<3>(5)
- node T_42 = UInt<4>(13)
- wire elts : UInt<1>[7]
- elts[0] := T_36
- elts[1] := T_37
- elts[2] := T_38
- elts[3] := T_39
- elts[4] := T_40
- elts[5] := T_41
- elts[6] := T_42
+ on-reset index := UInt<3>(0)
+ wire elts : UInt<4>[7]
+ elts[0] := UInt<4>(0)
+ elts[1] := UInt<4>(4)
+ elts[2] := UInt<4>(15)
+ elts[3] := UInt<4>(14)
+ elts[4] := UInt<4>(2)
+ elts[5] := UInt<4>(5)
+ elts[6] := UInt<4>(13)
accessor elt = elts[index]
- node T_43 = bit-not(en)
- node T_44 = eq(elt, target)
- node T_45 = UInt<3>(7)
- node T_46 = eq(index, T_45)
- node T_47 = bit-or(T_44, T_46)
- node done = bit-and(T_43, T_47)
- when en :
- node T_48 = UInt<1>(0)
- index := T_48
+ node T_35 = bit-not(en)
+ node T_36 = eq(elt, target)
+ node T_37 = eq(index, UInt<3>(7))
+ node T_38 = bit-or(T_36, T_37)
+ node end = bit-and(T_35, T_38)
+ when en : index := UInt<1>(0)
else :
- node T_49 = bit-not(done)
- when T_49 :
- node T_50 = UInt<1>(1)
- node T_51 = add(index, T_50)
- index := T_51
- odone := done
+ node T_39 = bit-not(end)
+ when T_39 :
+ node T_40 = add-wrap(index, UInt<1>(1))
+ index := T_40
+ done := end
address := index