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authorazidar2015-04-20 12:08:10 -0700
committerazidar2015-04-20 12:08:10 -0700
commit7617e33993abf9f6be357e0261755a4736c2e085 (patch)
treea8a32a3e0d731b49173f1c6f02056aea20902ada /test/chisel3/GCD.fir
parent130c6676418e85d5d4dd12a0f0845e912eda8c3e (diff)
Fixed tests to use new execution arguments. Added and fixed chisel3 bugs
Diffstat (limited to 'test/chisel3/GCD.fir')
-rw-r--r--test/chisel3/GCD.fir27
1 files changed, 0 insertions, 27 deletions
diff --git a/test/chisel3/GCD.fir b/test/chisel3/GCD.fir
deleted file mode 100644
index 35da1802..00000000
--- a/test/chisel3/GCD.fir
+++ /dev/null
@@ -1,27 +0,0 @@
-;RUN: firrtl %s abcefghipjklmno c | tee %s.out | FileCheck %s
-;CHECK: To Flo
-circuit GCD :
- module GCD :
- input b : UInt(16)
- input a : UInt(16)
- input e : UInt(1)
- output z : UInt(16)
- output v : UInt(1)
-
- reg x : UInt(16)
- reg y : UInt(16)
- node T_17 = gt(x, y)
- when T_17 :
- node T_18 = sub-wrap(x, y)
- x := T_18
- else :
- node T_19 = sub-wrap(y, x)
- y := T_19
- when e :
- x := a
- y := b
- z := x
- node T_20 = UInt(0, 1)
- node T_21 = equal(y, T_20)
- v := T_21
-;CHECK: Finished To Flo