diff options
| author | jackbackrack | 2015-06-02 08:47:40 -0700 |
|---|---|---|
| committer | jackbackrack | 2015-06-02 08:47:40 -0700 |
| commit | b178ca42fd9d4f7b94d80c01cd810bf18da9ebc8 (patch) | |
| tree | 033e197aa2e297187e21712faf1957eb405b435b /test/chisel3/EnableShiftRegister.fir | |
| parent | e668a13b285c87678a708a8af5bee2cfa0f7645b (diff) | |
| parent | 8fc826a2770f46d63d8d7b1bccf14d2bf6e6b7cd (diff) | |
merge + fix trim to use correct bits operands
Diffstat (limited to 'test/chisel3/EnableShiftRegister.fir')
| -rw-r--r-- | test/chisel3/EnableShiftRegister.fir | 23 |
1 files changed, 23 insertions, 0 deletions
diff --git a/test/chisel3/EnableShiftRegister.fir b/test/chisel3/EnableShiftRegister.fir new file mode 100644 index 00000000..795b03e4 --- /dev/null +++ b/test/chisel3/EnableShiftRegister.fir @@ -0,0 +1,23 @@ +; RUN: firrtl -i %s -o %s.flo -X flo -p c | tee %s.out | FileCheck %s +;CHECK: Done! + +circuit EnableShiftRegister : + module EnableShiftRegister : + input in : UInt<4> + output out : UInt<4> + input shift : UInt<1> + + reg r0 : UInt<4> + on-reset r0 := UInt<4>(0) + reg r1 : UInt<4> + on-reset r1 := UInt<4>(0) + reg r2 : UInt<4> + on-reset r2 := UInt<4>(0) + reg r3 : UInt<4> + on-reset r3 := UInt<4>(0) + when shift : + r0 := in + r1 := r0 + r2 := r1 + r3 := r2 + out := r3 |