diff options
| author | azidar | 2015-04-20 12:08:10 -0700 |
|---|---|---|
| committer | azidar | 2015-04-20 12:08:10 -0700 |
| commit | 7617e33993abf9f6be357e0261755a4736c2e085 (patch) | |
| tree | a8a32a3e0d731b49173f1c6f02056aea20902ada /test/chisel3/Counter.fir | |
| parent | 130c6676418e85d5d4dd12a0f0845e912eda8c3e (diff) | |
Fixed tests to use new execution arguments. Added and fixed chisel3 bugs
Diffstat (limited to 'test/chisel3/Counter.fir')
| -rw-r--r-- | test/chisel3/Counter.fir | 20 |
1 files changed, 0 insertions, 20 deletions
diff --git a/test/chisel3/Counter.fir b/test/chisel3/Counter.fir deleted file mode 100644 index 55091d7f..00000000 --- a/test/chisel3/Counter.fir +++ /dev/null @@ -1,20 +0,0 @@ -;RUN: firrtl %s abcefghipjklmno c | tee %s.out | FileCheck %s -;CHECK: To Flo -circuit Counter : - module Counter : - input inc : UInt(1) - output tot : UInt(8) - input amt : UInt(4) - - node T_13 = UInt(255, 8) - node T_14 = UInt(0, 8) - reg T_15 : UInt(8) - T_15.init := T_14 - when inc : - node T_16 = add-wrap(T_15, amt) - node T_17 = gt(T_16, T_13) - node T_18 = UInt(0, 1) - node T_19 = mux(T_17, T_18, T_16) - T_15 := T_19 - tot := T_15 -;CHECK: Finished To Flo |