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authorazidar2015-04-20 12:08:10 -0700
committerazidar2015-04-20 12:08:10 -0700
commit7617e33993abf9f6be357e0261755a4736c2e085 (patch)
treea8a32a3e0d731b49173f1c6f02056aea20902ada /test/chisel3/BundleWire.fir
parent130c6676418e85d5d4dd12a0f0845e912eda8c3e (diff)
Fixed tests to use new execution arguments. Added and fixed chisel3 bugs
Diffstat (limited to 'test/chisel3/BundleWire.fir')
-rw-r--r--test/chisel3/BundleWire.fir17
1 files changed, 0 insertions, 17 deletions
diff --git a/test/chisel3/BundleWire.fir b/test/chisel3/BundleWire.fir
deleted file mode 100644
index 86ffa4e8..00000000
--- a/test/chisel3/BundleWire.fir
+++ /dev/null
@@ -1,17 +0,0 @@
-;RUN: firrtl %s abcefghipjklmno c | tee %s.out | FileCheck %s
-;CHECK: To Flo
-circuit BundleWire :
- module BundleWire :
- output in : {flip y : UInt(32), flip x : UInt(32)}
- output outs : {y : UInt(32), x : UInt(32)}[4]
-
- wire coords : {y : UInt(32), x : UInt(32)}[4]
- coords.0 := in
- outs.0 := coords.0
- coords.1 := in
- outs.1 := coords.1
- coords.2 := in
- outs.2 := coords.2
- coords.3 := in
- outs.3 := coords.3
-;CHECK: Finished To Flo