diff options
| author | azidar | 2016-01-26 14:16:09 -0800 |
|---|---|---|
| committer | azidar | 2016-01-28 09:25:03 -0800 |
| commit | f711861808e3ca914f71a3089c6879dbcb7dc08d (patch) | |
| tree | d7864745eaa8048e6a0a2126c150102dd1b2c864 /src | |
| parent | 6c2b6ea5e4ec00aae0963402e2565e91e95098ac (diff) | |
Changed register syntax for optional reset and init values
Diffstat (limited to 'src')
| -rw-r--r-- | src/main/stanza/ir-parser.stanza | 5 | ||||
| -rw-r--r-- | src/main/stanza/ir-utils.stanza | 3 |
2 files changed, 4 insertions, 4 deletions
diff --git a/src/main/stanza/ir-parser.stanza b/src/main/stanza/ir-parser.stanza index e1083d50..5261d587 100644 --- a/src/main/stanza/ir-parser.stanza +++ b/src/main/stanza/ir-parser.stanza @@ -258,9 +258,8 @@ defsyntax firrtl : defrule statements : stmt = (skip) : Empty() stmt = (wire ?name:#id! #:! ?t:#type!) : DefWire(first-info(form),name, t) - stmt = (reg ?name:#id! #:! ?t:#type! ?clk:#exp! ?reset:#exp! ?init:#exp!) : DefRegister(first-info(form),name, t,clk,reset,init) - ;stmt = (mem ?name:#id! #:! ?data-type:#type! ?depth:#int ?writers:#id! ... ?wl:#int ?readers:#id! ... ?rl:#int ?readwriters:#id! ...) : - ; DefMemory(first-info(form),name,data-type,depth,wl,rl,readers,writers,readwriters) + stmt = (reg ?name:#id! #:! ?t:#type! ?clk:#exp! with #:! ( reset => (?reset:#exp! ?init:#exp!))) : DefRegister(first-info(form),name,t,clk,reset,init) + stmt = (reg ?name:#id! #:! ?t:#type! ?clk:#exp!) : DefRegister(first-info(form),name,t,clk,zero,Ref(name,UnknownType())) stmt = (cmem ?name:#id! #:! ?t:#vectype! ) : CDefMemory(first-info(form),name,type(t),size(t),false) stmt = (smem ?name:#id! #:! ?t:#vectype! ) : CDefMemory(first-info(form),name,type(t),size(t),true) diff --git a/src/main/stanza/ir-utils.stanza b/src/main/stanza/ir-utils.stanza index cf9e03e2..66e095fc 100644 --- a/src/main/stanza/ir-utils.stanza +++ b/src/main/stanza/ir-utils.stanza @@ -420,7 +420,8 @@ defmethod print (o:OutputStream, c:Stmt) : (c:DefWire) : print-all(o,["wire " name(c) " : " type(c)]) (c:DefRegister) : - print-all(o,["reg " name(c) " : " type(c) ", " clock(c) ", " reset(c) ", " init(c)]) + print-all(o,["reg " name(c) " : " type(c) ", " clock(c) " with :"]) + print-all(io,["\nreset => (" reset(c) ", " init(c) ")"]) (c:DefMemory) : print-all(o,["mem " name(c) " : "]) print-debug(o,c) |