diff options
| author | Jim Lawson | 2017-12-20 12:28:25 -0800 |
|---|---|---|
| committer | Jack Koenig | 2017-12-20 12:28:25 -0800 |
| commit | e3ea1000d4e4cce40fb7f583a55f4bd30115eb5d (patch) | |
| tree | f2e00e6889fa4c10798bb7b43f2632107501b144 /src | |
| parent | 67243eebac8cdca68f50451c2d08fefb0164daba (diff) | |
Add "checker" to the set of Verilog keywords - fixes 455. (#711)
Diffstat (limited to 'src')
| -rw-r--r-- | src/main/scala/firrtl/Utils.scala | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/main/scala/firrtl/Utils.scala b/src/main/scala/firrtl/Utils.scala index 69d27d23..c9659644 100644 --- a/src/main/scala/firrtl/Utils.scala +++ b/src/main/scala/firrtl/Utils.scala @@ -598,7 +598,7 @@ object Utils extends LazyLogging { "before", "begin", "bind", "bins", "binsof", "bit", "break", "buf", "bufif0", "bufif1", "byte", - "case", "casex", "casez", "cell", "chandle", "class", "clocking", + "case", "casex", "casez", "cell", "chandle", "checker", "class", "clocking", "cmos", "config", "const", "constraint", "context", "continue", "cover", "covergroup", "coverpoint", "cross", |