From e3ea1000d4e4cce40fb7f583a55f4bd30115eb5d Mon Sep 17 00:00:00 2001
From: Jim Lawson
Date: Wed, 20 Dec 2017 12:28:25 -0800
Subject: Add "checker" to the set of Verilog keywords - fixes 455. (#711)

---
 src/main/scala/firrtl/Utils.scala | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

(limited to 'src')

diff --git a/src/main/scala/firrtl/Utils.scala b/src/main/scala/firrtl/Utils.scala
index 69d27d23..c9659644 100644
--- a/src/main/scala/firrtl/Utils.scala
+++ b/src/main/scala/firrtl/Utils.scala
@@ -598,7 +598,7 @@ object Utils extends LazyLogging {
     "before", "begin", "bind", "bins", "binsof", "bit", "break",
     "buf", "bufif0", "bufif1", "byte",
 
-    "case", "casex", "casez", "cell", "chandle", "class", "clocking",
+    "case", "casex", "casez", "cell", "chandle", "checker", "class", "clocking",
     "cmos", "config", "const", "constraint", "context", "continue",
     "cover", "covergroup", "coverpoint", "cross",
 
-- 
cgit v1.2.3