diff options
| author | Andrew Waterman | 2016-07-07 01:17:58 -0700 |
|---|---|---|
| committer | Andrew Waterman | 2016-07-07 02:22:22 -0700 |
| commit | c014c3063e813091caaaa870d67f7ad7fc1e65cb (patch) | |
| tree | 7cc1e5e436925d02b7f4277a2e22d9fc1d4a913a /src | |
| parent | 359021cd1753cd8ad6e5315da6ef2638c5000323 (diff) | |
Re-run constant propagation after pad widths
Diffstat (limited to 'src')
| -rw-r--r-- | src/main/scala/firrtl/LoweringCompilers.scala | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/main/scala/firrtl/LoweringCompilers.scala b/src/main/scala/firrtl/LoweringCompilers.scala index 33cb70db..9a2bc11f 100644 --- a/src/main/scala/firrtl/LoweringCompilers.scala +++ b/src/main/scala/firrtl/LoweringCompilers.scala @@ -141,6 +141,7 @@ class EmitVerilogFromLowFirrtl (val writer: Writer) extends Transform with Simpl passes.RemoveValidIf, passes.ConstProp, passes.PadWidths, + passes.ConstProp, passes.VerilogWrap, passes.SplitExpressions, passes.CommonSubexpressionElimination, |