diff options
| author | Albert Magyar | 2020-04-04 13:14:06 -0700 |
|---|---|---|
| committer | Albert Magyar | 2020-04-06 12:31:06 -0700 |
| commit | bc83b4d11588e21cde591acff944ea419bec1fa5 (patch) | |
| tree | f704dc74e6e7f4b29fa31ac9af0951d99ec3cdb7 /src | |
| parent | 33f8eaeb6e1905f76f10264d29bc72b03f583743 (diff) | |
Remove deprecated ResolveGenders and CheckGenders
* Remove few remaining uses of these passes from FIRRTL codebase
Diffstat (limited to 'src')
| -rw-r--r-- | src/main/scala/firrtl/passes/Checks.scala | 16 | ||||
| -rw-r--r-- | src/main/scala/firrtl/passes/Resolves.scala | 11 | ||||
| -rw-r--r-- | src/test/scala/firrtlTests/interval/IntervalSpec.scala | 18 |
3 files changed, 9 insertions, 36 deletions
diff --git a/src/main/scala/firrtl/passes/Checks.scala b/src/main/scala/firrtl/passes/Checks.scala index 3c9a7eda..0ef0ee0b 100644 --- a/src/main/scala/firrtl/passes/Checks.scala +++ b/src/main/scala/firrtl/passes/Checks.scala @@ -731,19 +731,3 @@ object CheckFlows extends Pass with PreservesAll[Transform] { } } -@deprecated("Use 'CheckFlows'. This object will be removed in 1.3", "1.2") -object CheckGenders { - - implicit def toStr(g: Gender): String = g match { - case MALE => "source" - case FEMALE => "sink" - case UNKNOWNGENDER => "unknown" - case BIGENDER => "sourceOrSink" - } - - def run(c: Circuit): Circuit = CheckFlows.run(c) - - @deprecated("Use 'CheckFlows.WrongFlow'. This class will be removed in 1.3", "1.2") - class WrongGender(info:Info, mname: String, expr: String, wrong: Flow, right: Flow) extends PassException( - s"$info: [module $mname] Expression $expr is used as a $wrong but can only be used as a $right.") -} diff --git a/src/main/scala/firrtl/passes/Resolves.scala b/src/main/scala/firrtl/passes/Resolves.scala index 15750b76..de54a5c1 100644 --- a/src/main/scala/firrtl/passes/Resolves.scala +++ b/src/main/scala/firrtl/passes/Resolves.scala @@ -88,17 +88,6 @@ object ResolveFlows extends Pass with PreservesAll[Transform] { c copy (modules = c.modules map resolve_flow) } -@deprecated("Use 'ResolveFlows'. This will be removed in 1.3", "1.2") -object ResolveGenders extends Pass { - - def run(c: Circuit): Circuit = ResolveFlows.run(c) - - def resolve_e(g: Gender)(e: Expression): Expression = ResolveFlows.resolve_e(g)(e) - - def resolve_s(s: Statement): Statement = ResolveFlows.resolve_s(s) - -} - object CInferMDir extends Pass with PreservesAll[Transform] { override val prerequisites = firrtl.stage.Forms.ChirrtlForm :+ Dependency(CInferTypes) diff --git a/src/test/scala/firrtlTests/interval/IntervalSpec.scala b/src/test/scala/firrtlTests/interval/IntervalSpec.scala index 3914aba0..5d82f6b5 100644 --- a/src/test/scala/firrtlTests/interval/IntervalSpec.scala +++ b/src/test/scala/firrtlTests/interval/IntervalSpec.scala @@ -41,7 +41,7 @@ class IntervalSpec extends FirrtlFlatSpec { } "Interval types" should "infer bp correctly" in { - val passes = Seq(ToWorkingIR, InferTypes, ResolveGenders, new InferBinaryPoints()) + val passes = Seq(ToWorkingIR, InferTypes, ResolveFlows, new InferBinaryPoints()) val input = """circuit Unit : | module Unit : @@ -62,7 +62,7 @@ class IntervalSpec extends FirrtlFlatSpec { } "Interval types" should "trim known intervals correctly" in { - val passes = Seq(ToWorkingIR, InferTypes, ResolveGenders, new InferBinaryPoints(), new TrimIntervals()) + val passes = Seq(ToWorkingIR, InferTypes, ResolveFlows, new InferBinaryPoints(), new TrimIntervals()) val input = """circuit Unit : | module Unit : @@ -83,7 +83,7 @@ class IntervalSpec extends FirrtlFlatSpec { } "Interval types" should "infer intervals correctly" in { - val passes = Seq(ToWorkingIR, InferTypes, ResolveGenders, new InferBinaryPoints(), new TrimIntervals(), new InferWidths()) + val passes = Seq(ToWorkingIR, InferTypes, ResolveFlows, new InferBinaryPoints(), new TrimIntervals(), new InferWidths()) val input = """circuit Unit : | module Unit : @@ -104,7 +104,7 @@ class IntervalSpec extends FirrtlFlatSpec { } "Interval types" should "be removed correctly" in { - val passes = Seq(ToWorkingIR, InferTypes, ResolveGenders, new InferBinaryPoints(), new TrimIntervals(), new InferWidths(), new RemoveIntervals()) + val passes = Seq(ToWorkingIR, InferTypes, ResolveFlows, new InferBinaryPoints(), new TrimIntervals(), new InferWidths(), new RemoveIntervals()) val input = """circuit Unit : | module Unit : @@ -133,7 +133,7 @@ class IntervalSpec extends FirrtlFlatSpec { } "Interval types" should "infer multiplication by zero correctly" in { - val passes = Seq(ToWorkingIR, InferTypes, ResolveGenders, new InferBinaryPoints(), new TrimIntervals(), new InferWidths()) + val passes = Seq(ToWorkingIR, InferTypes, ResolveFlows, new InferBinaryPoints(), new TrimIntervals(), new InferWidths()) val input = s"""circuit Unit : | module Unit : @@ -147,7 +147,7 @@ class IntervalSpec extends FirrtlFlatSpec { } "Interval types" should "infer muxes correctly" in { - val passes = Seq(ToWorkingIR, InferTypes, ResolveGenders, new InferBinaryPoints(), new TrimIntervals(), new InferWidths()) + val passes = Seq(ToWorkingIR, InferTypes, ResolveFlows, new InferBinaryPoints(), new TrimIntervals(), new InferWidths()) val input = s"""circuit Unit : | module Unit : @@ -161,7 +161,7 @@ class IntervalSpec extends FirrtlFlatSpec { executeTest(input, check.split("\n") map normalized, passes) } "Interval types" should "infer dshl correctly" in { - val passes = Seq(ToWorkingIR, InferTypes, ResolveKinds, ResolveGenders, new InferBinaryPoints(), new TrimIntervals, new InferWidths()) + val passes = Seq(ToWorkingIR, InferTypes, ResolveKinds, ResolveFlows, new InferBinaryPoints(), new TrimIntervals, new InferWidths()) val input = s"""circuit Unit : | module Unit : @@ -174,7 +174,7 @@ class IntervalSpec extends FirrtlFlatSpec { executeTest(input, check.split("\n") map normalized, passes) } "Interval types" should "infer asInterval correctly" in { - val passes = Seq(ToWorkingIR, InferTypes, ResolveGenders, new InferWidths()) + val passes = Seq(ToWorkingIR, InferTypes, ResolveFlows, new InferWidths()) val input = s"""circuit Unit : | module Unit : @@ -318,7 +318,7 @@ class IntervalSpec extends FirrtlFlatSpec { executeTest(input, check.split("\n") map normalized, passes) } "Interval types" should "remove negative binary points" in { - val passes = Seq(ToWorkingIR, InferTypes, ResolveGenders, new InferBinaryPoints(), new TrimIntervals(), new InferWidths(), new RemoveIntervals()) + val passes = Seq(ToWorkingIR, InferTypes, ResolveFlows, new InferBinaryPoints(), new TrimIntervals(), new InferWidths(), new RemoveIntervals()) val input = s"""circuit Unit : | module Unit : |
